SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
66.67 | 58.33 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
sysrst_ctrl_combo_detect_det_cg_2 | 33.33 | 1 | 100 | 1 | 64 | 64 |
sysrst_ctrl_combo_detect_det_cg_0 | 66.67 | 1 | 100 | 1 | 64 | 64 |
sysrst_ctrl_combo_detect_det_cg_1 | 66.67 | 1 | 100 | 1 | 64 | 64 |
sysrst_ctrl_combo_detect_det_cg_3 | 66.67 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
33.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 2 | 1 | 33.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_detect_timer | 3 | 2 | 1 | 33.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
66.67 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 1 | 2 | 66.67 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_detect_timer | 3 | 1 | 2 | 66.67 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
66.67 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 1 | 2 | 66.67 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_detect_timer | 3 | 1 | 2 | 66.67 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
66.67 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 1 | 2 | 66.67 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_detect_timer | 3 | 1 | 2 | 66.67 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 2 | 1 | 33.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
max_range | 0 | 1 | 1 | |
mid_range | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
min_range | 714 | 1 | T17 | 5 | T21 | 5 | T22 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 1 | 2 | 66.67 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
max_range | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
mid_range | 450 | 1 | T27 | 9 | T31 | 9 | T33 | 9 | ||||
min_range | 264 | 1 | T17 | 5 | T21 | 5 | T22 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 1 | 2 | 66.67 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
max_range | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
mid_range | 700 | 1 | T17 | 5 | T21 | 5 | T22 | 5 | ||||
min_range | 14 | 1 | T84 | 7 | T85 | 7 | - | - |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 1 | 2 | 66.67 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
max_range | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
mid_range | 450 | 1 | T27 | 9 | T31 | 9 | T33 | 9 | ||||
min_range | 264 | 1 | T17 | 5 | T21 | 5 | T22 | 5 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |