Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.78 99.39 96.05 100.00 97.44 98.78 99.63 93.16


Total test records in report: 909
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T474 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.954326952 Dec 20 12:50:06 PM PST 23 Dec 20 12:50:55 PM PST 23 7282625471 ps
T48 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.2960706912 Dec 20 12:51:40 PM PST 23 Dec 20 12:52:02 PM PST 23 4939412344 ps
T475 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1808309070 Dec 20 12:50:02 PM PST 23 Dec 20 12:50:48 PM PST 23 2256265093 ps
T476 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3925572485 Dec 20 12:50:03 PM PST 23 Dec 20 12:50:53 PM PST 23 3706009740 ps
T477 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.821459971 Dec 20 12:51:46 PM PST 23 Dec 20 12:51:59 PM PST 23 2791256078 ps
T478 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1602015641 Dec 20 12:50:02 PM PST 23 Dec 20 12:50:56 PM PST 23 3548245547 ps
T95 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.160367601 Dec 20 12:50:53 PM PST 23 Dec 20 12:51:28 PM PST 23 5488324305 ps
T479 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3911004181 Dec 20 12:51:00 PM PST 23 Dec 20 12:51:35 PM PST 23 4076368248 ps
T44 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3171601136 Dec 20 12:50:17 PM PST 23 Dec 20 12:52:39 PM PST 23 82891138641 ps
T480 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.825989382 Dec 20 12:50:49 PM PST 23 Dec 20 12:51:25 PM PST 23 2474580155 ps
T165 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.2792677387 Dec 20 12:49:50 PM PST 23 Dec 20 12:50:41 PM PST 23 4665399392 ps
T281 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2897878501 Dec 20 12:50:59 PM PST 23 Dec 20 12:51:41 PM PST 23 33364577600 ps
T481 /workspace/coverage/default/9.sysrst_ctrl_smoke.852958943 Dec 20 12:50:05 PM PST 23 Dec 20 12:50:50 PM PST 23 2134972385 ps
T482 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2979820212 Dec 20 12:51:03 PM PST 23 Dec 20 12:51:31 PM PST 23 2046208837 ps
T106 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2889716440 Dec 20 12:51:40 PM PST 23 Dec 20 12:52:09 PM PST 23 25351848155 ps
T282 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.4046491977 Dec 20 12:51:44 PM PST 23 Dec 20 12:57:57 PM PST 23 145047965533 ps
T132 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2082744025 Dec 20 12:50:53 PM PST 23 Dec 20 12:51:29 PM PST 23 8437074878 ps
T483 /workspace/coverage/default/33.sysrst_ctrl_smoke.1011113737 Dec 20 12:51:20 PM PST 23 Dec 20 12:51:36 PM PST 23 2150903149 ps
T484 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.904027279 Dec 20 12:50:48 PM PST 23 Dec 20 12:51:21 PM PST 23 2948403491 ps
T485 /workspace/coverage/default/36.sysrst_ctrl_alert_test.4126797827 Dec 20 12:51:16 PM PST 23 Dec 20 12:51:35 PM PST 23 2064932925 ps
T486 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1636028646 Dec 20 12:50:13 PM PST 23 Dec 20 12:51:00 PM PST 23 2452671911 ps
T487 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3706886687 Dec 20 12:50:58 PM PST 23 Dec 20 01:24:03 PM PST 23 712650350062 ps
T488 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1664509464 Dec 20 12:50:07 PM PST 23 Dec 20 12:50:56 PM PST 23 2511424255 ps
T489 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3432835000 Dec 20 12:51:09 PM PST 23 Dec 20 12:51:30 PM PST 23 2933698268 ps
T490 /workspace/coverage/default/49.sysrst_ctrl_alert_test.1385035090 Dec 20 12:51:56 PM PST 23 Dec 20 12:52:15 PM PST 23 2011200791 ps
T268 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1679384325 Dec 20 12:51:56 PM PST 23 Dec 20 12:53:50 PM PST 23 37796130210 ps
T491 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2974711225 Dec 20 12:51:53 PM PST 23 Dec 20 12:52:10 PM PST 23 2634831624 ps
T492 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2013113279 Dec 20 12:51:40 PM PST 23 Dec 20 12:52:03 PM PST 23 4728249374 ps
T493 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.1811589961 Dec 20 12:50:14 PM PST 23 Dec 20 12:53:58 PM PST 23 296221993201 ps
T494 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.921743583 Dec 20 12:51:47 PM PST 23 Dec 20 12:52:05 PM PST 23 2458204979 ps
T495 /workspace/coverage/default/46.sysrst_ctrl_smoke.1109647493 Dec 20 12:51:53 PM PST 23 Dec 20 12:52:10 PM PST 23 2117345143 ps
T496 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.964672275 Dec 20 12:50:49 PM PST 23 Dec 20 12:51:21 PM PST 23 2615731288 ps
T497 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.280127101 Dec 20 12:49:42 PM PST 23 Dec 20 12:50:35 PM PST 23 2622230967 ps
T498 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2317978501 Dec 20 12:51:51 PM PST 23 Dec 20 12:52:07 PM PST 23 2532055950 ps
T499 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3783573060 Dec 20 12:51:45 PM PST 23 Dec 20 12:52:00 PM PST 23 2202442976 ps
T500 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.2620973542 Dec 20 12:50:19 PM PST 23 Dec 20 12:51:04 PM PST 23 2610314886 ps
T269 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3197806813 Dec 20 12:51:01 PM PST 23 Dec 20 12:55:18 PM PST 23 86937811925 ps
T501 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2945110278 Dec 20 12:50:22 PM PST 23 Dec 20 12:51:08 PM PST 23 3555469644 ps
T91 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2252277800 Dec 20 12:50:02 PM PST 23 Dec 20 12:53:29 PM PST 23 509606315436 ps
T394 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2414957504 Dec 20 12:51:39 PM PST 23 Dec 20 12:51:53 PM PST 23 2513900002 ps
T502 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1109619449 Dec 20 12:51:50 PM PST 23 Dec 20 12:52:05 PM PST 23 2125125123 ps
T98 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.899403000 Dec 20 12:51:55 PM PST 23 Dec 20 12:53:14 PM PST 23 48678215444 ps
T503 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.314832428 Dec 20 12:51:49 PM PST 23 Dec 20 12:52:12 PM PST 23 3591732900 ps
T266 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1489037274 Dec 20 12:52:09 PM PST 23 Dec 20 12:54:05 PM PST 23 39004723699 ps
T92 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.3140647590 Dec 20 12:51:45 PM PST 23 Dec 20 12:52:04 PM PST 23 4222218486 ps
T179 /workspace/coverage/default/20.sysrst_ctrl_stress_all.170438598 Dec 20 12:50:34 PM PST 23 Dec 20 12:51:14 PM PST 23 8297025457 ps
T166 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.358734064 Dec 20 12:49:46 PM PST 23 Dec 20 12:52:01 PM PST 23 278758092195 ps
T180 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.1133813796 Dec 20 12:50:01 PM PST 23 Dec 20 12:52:33 PM PST 23 83202850873 ps
T178 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1646962662 Dec 20 12:51:51 PM PST 23 Dec 20 12:54:49 PM PST 23 61767711517 ps
T181 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2443714194 Dec 20 12:50:02 PM PST 23 Dec 20 12:50:47 PM PST 23 2581747444 ps
T182 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3924362945 Dec 20 12:51:08 PM PST 23 Dec 20 12:51:34 PM PST 23 7074414977 ps
T183 /workspace/coverage/default/40.sysrst_ctrl_smoke.1748465177 Dec 20 12:51:39 PM PST 23 Dec 20 12:51:51 PM PST 23 2167519795 ps
T184 /workspace/coverage/default/11.sysrst_ctrl_smoke.899713195 Dec 20 12:50:20 PM PST 23 Dec 20 12:51:03 PM PST 23 2112115101 ps
T185 /workspace/coverage/default/48.sysrst_ctrl_smoke.2040643203 Dec 20 12:51:54 PM PST 23 Dec 20 12:52:11 PM PST 23 2120436737 ps
T247 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1440992990 Dec 20 12:52:08 PM PST 23 Dec 20 12:52:58 PM PST 23 25339494035 ps
T248 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2834289708 Dec 20 12:50:04 PM PST 23 Dec 20 12:50:57 PM PST 23 3475715558 ps
T249 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2325301589 Dec 20 12:50:05 PM PST 23 Dec 20 12:50:56 PM PST 23 3225080155 ps
T250 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3716834014 Dec 20 12:50:51 PM PST 23 Dec 20 12:54:37 PM PST 23 75974173047 ps
T504 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3200099234 Dec 20 12:49:56 PM PST 23 Dec 20 12:50:45 PM PST 23 2514621206 ps
T505 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.1450199840 Dec 20 12:50:48 PM PST 23 Dec 20 12:51:22 PM PST 23 2095060259 ps
T506 /workspace/coverage/default/2.sysrst_ctrl_alert_test.12925976 Dec 20 12:49:54 PM PST 23 Dec 20 12:50:42 PM PST 23 2026249796 ps
T507 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1611192004 Dec 20 12:51:52 PM PST 23 Dec 20 12:52:09 PM PST 23 2456435993 ps
T508 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.3488964578 Dec 20 12:50:16 PM PST 23 Dec 20 12:50:57 PM PST 23 2625100330 ps
T194 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.2970169811 Dec 20 12:50:54 PM PST 23 Dec 20 12:51:27 PM PST 23 3725191159 ps
T509 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3977106542 Dec 20 12:49:55 PM PST 23 Dec 20 12:50:43 PM PST 23 2630211655 ps
T339 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.2010853208 Dec 20 12:50:33 PM PST 23 Dec 20 12:54:24 PM PST 23 143386608277 ps
T510 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.836108016 Dec 20 12:51:00 PM PST 23 Dec 20 12:51:30 PM PST 23 2062544815 ps
T511 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.708080233 Dec 20 12:50:52 PM PST 23 Dec 20 12:51:22 PM PST 23 3985415932 ps
T512 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.4260714482 Dec 20 12:50:30 PM PST 23 Dec 20 12:51:13 PM PST 23 2463519630 ps
T267 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.769431493 Dec 20 12:51:12 PM PST 23 Dec 20 12:52:36 PM PST 23 23331550937 ps
T513 /workspace/coverage/default/36.sysrst_ctrl_stress_all.276951987 Dec 20 12:51:17 PM PST 23 Dec 20 12:52:13 PM PST 23 16055942811 ps
T514 /workspace/coverage/default/49.sysrst_ctrl_stress_all.2314061193 Dec 20 12:51:55 PM PST 23 Dec 20 12:52:15 PM PST 23 7131284377 ps
T271 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.798576000 Dec 20 12:52:15 PM PST 23 Dec 20 12:52:55 PM PST 23 30364309309 ps
T270 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.113706154 Dec 20 12:52:00 PM PST 23 Dec 20 12:53:44 PM PST 23 110277446552 ps
T227 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.2304838330 Dec 20 12:50:29 PM PST 23 Dec 20 12:51:11 PM PST 23 2503146572 ps
T515 /workspace/coverage/default/5.sysrst_ctrl_smoke.3290716292 Dec 20 12:50:03 PM PST 23 Dec 20 12:50:50 PM PST 23 2121848715 ps
T342 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.3569975900 Dec 20 12:51:39 PM PST 23 Dec 20 12:52:29 PM PST 23 62371411376 ps
T516 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.289702969 Dec 20 12:51:54 PM PST 23 Dec 20 12:52:11 PM PST 23 2627991993 ps
T272 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2033173016 Dec 20 12:51:55 PM PST 23 Dec 20 12:55:02 PM PST 23 136061435187 ps
T362 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3710978545 Dec 20 12:52:06 PM PST 23 Dec 20 12:53:35 PM PST 23 57573895606 ps
T517 /workspace/coverage/default/34.sysrst_ctrl_alert_test.3505719749 Dec 20 12:51:30 PM PST 23 Dec 20 12:51:44 PM PST 23 2023346148 ps
T518 /workspace/coverage/default/27.sysrst_ctrl_smoke.1193922610 Dec 20 12:51:07 PM PST 23 Dec 20 12:51:28 PM PST 23 2158084115 ps
T287 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3717558249 Dec 20 12:51:54 PM PST 23 Dec 20 12:55:55 PM PST 23 88614019994 ps
T519 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3653936019 Dec 20 12:50:59 PM PST 23 Dec 20 12:51:26 PM PST 23 2929721892 ps
T520 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2730013995 Dec 20 12:50:12 PM PST 23 Dec 20 12:50:54 PM PST 23 2472473587 ps
T341 /workspace/coverage/default/18.sysrst_ctrl_stress_all.869071676 Dec 20 12:50:23 PM PST 23 Dec 20 12:55:30 PM PST 23 209134655266 ps
T139 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3002738095 Dec 20 12:50:16 PM PST 23 Dec 20 12:51:03 PM PST 23 3689549465 ps
T521 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3561465741 Dec 20 12:52:17 PM PST 23 Dec 20 12:52:40 PM PST 23 3458242759 ps
T522 /workspace/coverage/default/3.sysrst_ctrl_smoke.2376616293 Dec 20 12:49:55 PM PST 23 Dec 20 12:50:48 PM PST 23 2107653205 ps
T523 /workspace/coverage/default/16.sysrst_ctrl_smoke.1481460200 Dec 20 12:50:14 PM PST 23 Dec 20 12:50:56 PM PST 23 2130122888 ps
T93 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2953686580 Dec 20 12:49:40 PM PST 23 Dec 20 12:51:23 PM PST 23 226421265602 ps
T107 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1396200911 Dec 20 12:50:32 PM PST 23 Dec 20 12:52:26 PM PST 23 126594363882 ps
T119 /workspace/coverage/default/0.sysrst_ctrl_smoke.2149118982 Dec 20 12:49:47 PM PST 23 Dec 20 12:50:42 PM PST 23 2112953707 ps
T524 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.4283150192 Dec 20 12:50:13 PM PST 23 Dec 20 12:51:05 PM PST 23 4209812832 ps
T525 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2186038398 Dec 20 12:51:42 PM PST 23 Dec 20 12:51:54 PM PST 23 2207725970 ps
T526 /workspace/coverage/default/49.sysrst_ctrl_smoke.1179008447 Dec 20 12:51:57 PM PST 23 Dec 20 12:52:13 PM PST 23 2125032392 ps
T190 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2561049693 Dec 20 12:50:53 PM PST 23 Dec 20 12:53:13 PM PST 23 46014483942 ps
T263 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2793169359 Dec 20 12:52:18 PM PST 23 Dec 20 12:52:43 PM PST 23 2511925476 ps
T527 /workspace/coverage/default/14.sysrst_ctrl_stress_all.3016651975 Dec 20 12:50:19 PM PST 23 Dec 20 01:04:29 PM PST 23 318531487628 ps
T528 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.148791714 Dec 20 12:51:47 PM PST 23 Dec 20 12:52:03 PM PST 23 2462831164 ps
T191 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.4185944068 Dec 20 12:50:04 PM PST 23 Dec 20 01:04:47 PM PST 23 1782650349121 ps
T188 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1393051803 Dec 20 12:49:44 PM PST 23 Dec 20 12:51:32 PM PST 23 86572849291 ps
T196 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1330566260 Dec 20 12:51:09 PM PST 23 Dec 20 12:51:31 PM PST 23 2487831195 ps
T197 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.654836543 Dec 20 12:50:09 PM PST 23 Dec 20 12:50:57 PM PST 23 2396863436 ps
T198 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3587238530 Dec 20 12:49:51 PM PST 23 Dec 20 12:50:46 PM PST 23 2543484286 ps
T199 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1164211939 Dec 20 12:50:58 PM PST 23 Dec 20 12:51:29 PM PST 23 3058265362 ps
T200 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2456449430 Dec 20 12:49:59 PM PST 23 Dec 20 12:50:49 PM PST 23 2647117797 ps
T201 /workspace/coverage/default/31.sysrst_ctrl_stress_all.2668477518 Dec 20 12:51:15 PM PST 23 Dec 20 12:52:03 PM PST 23 11694140402 ps
T202 /workspace/coverage/default/8.sysrst_ctrl_alert_test.2376214209 Dec 20 12:50:06 PM PST 23 Dec 20 12:50:50 PM PST 23 2072212988 ps
T167 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3212670164 Dec 20 12:51:48 PM PST 23 Dec 20 12:52:21 PM PST 23 29295054190 ps
T203 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.597690923 Dec 20 12:50:50 PM PST 23 Dec 20 12:51:21 PM PST 23 3705681487 ps
T529 /workspace/coverage/default/27.sysrst_ctrl_stress_all.137214028 Dec 20 12:50:58 PM PST 23 Dec 20 12:51:35 PM PST 23 9076670004 ps
T204 /workspace/coverage/default/15.sysrst_ctrl_stress_all.1893614485 Dec 20 12:50:17 PM PST 23 Dec 20 12:51:30 PM PST 23 14202914088 ps
T260 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.1084592793 Dec 20 12:50:12 PM PST 23 Dec 20 12:50:54 PM PST 23 3361430470 ps
T530 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1380007498 Dec 20 12:52:18 PM PST 23 Dec 20 12:52:40 PM PST 23 2620530763 ps
T356 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3192777471 Dec 20 12:51:57 PM PST 23 Dec 20 12:53:16 PM PST 23 94325769005 ps
T531 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2140131935 Dec 20 12:50:05 PM PST 23 Dec 20 12:50:50 PM PST 23 2032751448 ps
T229 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.2847640792 Dec 20 12:50:29 PM PST 23 Dec 20 12:51:07 PM PST 23 5939514297 ps
T532 /workspace/coverage/default/43.sysrst_ctrl_alert_test.1924247821 Dec 20 12:51:50 PM PST 23 Dec 20 12:52:08 PM PST 23 2015309012 ps
T533 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1603342066 Dec 20 12:50:07 PM PST 23 Dec 20 12:50:57 PM PST 23 2614020960 ps
T534 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1905166806 Dec 20 12:50:31 PM PST 23 Dec 20 12:51:09 PM PST 23 2624812554 ps
T153 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.597665096 Dec 20 12:51:04 PM PST 23 Dec 20 12:52:39 PM PST 23 32690401078 ps
T239 /workspace/coverage/default/45.sysrst_ctrl_alert_test.669309319 Dec 20 12:51:46 PM PST 23 Dec 20 12:52:03 PM PST 23 2009152216 ps
T240 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.4158370267 Dec 20 12:50:50 PM PST 23 Dec 20 12:51:22 PM PST 23 2997283803 ps
T241 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3309725083 Dec 20 12:50:51 PM PST 23 Dec 20 12:52:29 PM PST 23 31015541484 ps
T242 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1833674636 Dec 20 12:50:53 PM PST 23 Dec 20 12:51:22 PM PST 23 4621472052 ps
T96 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2105265763 Dec 20 12:51:22 PM PST 23 Dec 20 01:00:33 PM PST 23 2209464900443 ps
T243 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1441089720 Dec 20 12:49:42 PM PST 23 Dec 20 12:50:35 PM PST 23 2397853252 ps
T244 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.603587990 Dec 20 12:50:54 PM PST 23 Dec 20 12:51:28 PM PST 23 8095148642 ps
T245 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1893969297 Dec 20 12:50:53 PM PST 23 Dec 20 12:51:24 PM PST 23 2518717167 ps
T246 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.4152179057 Dec 20 12:50:06 PM PST 23 Dec 20 12:50:57 PM PST 23 2611026661 ps
T352 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1923314460 Dec 20 12:51:52 PM PST 23 Dec 20 12:52:36 PM PST 23 49983043002 ps
T174 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.4010781341 Dec 20 12:50:53 PM PST 23 Dec 20 12:51:22 PM PST 23 4403592903 ps
T154 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2144374625 Dec 20 12:50:01 PM PST 23 Dec 20 12:51:40 PM PST 23 27176162954 ps
T357 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3793345971 Dec 20 12:51:56 PM PST 23 Dec 20 12:54:39 PM PST 23 61820589533 ps
T535 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3314366993 Dec 20 12:51:52 PM PST 23 Dec 20 12:52:13 PM PST 23 2613322021 ps
T536 /workspace/coverage/default/12.sysrst_ctrl_smoke.2241192809 Dec 20 12:50:56 PM PST 23 Dec 20 12:51:24 PM PST 23 2134580925 ps
T205 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.2204640924 Dec 20 12:51:09 PM PST 23 Dec 20 12:51:30 PM PST 23 6159326834 ps
T374 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.801026743 Dec 20 12:50:07 PM PST 23 Dec 20 12:54:41 PM PST 23 192899282131 ps
T537 /workspace/coverage/default/43.sysrst_ctrl_smoke.2556796123 Dec 20 12:51:50 PM PST 23 Dec 20 12:52:07 PM PST 23 2120458536 ps
T538 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3087066706 Dec 20 12:51:40 PM PST 23 Dec 20 12:51:57 PM PST 23 2461894789 ps
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