Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.78	99.39	96.05	100.00	97.44	98.78	99.63	93.16

Total tests in report: 909

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
62.10	62.10	66.56	66.56	62.12	62.12	80.75	80.75	97.44	97.44	70.69	70.69	52.90	52.90	4.22	4.22	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3990763795
73.37	11.28	82.44	15.89	76.07	13.95	87.59	6.83	97.44	0.00	83.88	13.19	74.06	21.16	12.14	7.92	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3534023901
79.30	5.93	88.78	6.34	83.46	7.39	91.80	4.21	97.44	0.00	89.73	5.85	79.12	5.06	24.79	12.65	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3627032303
85.12	5.82	92.00	3.21	87.10	3.65	92.94	1.14	97.44	0.00	92.38	2.65	86.61	7.49	47.38	22.59	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2066474806
88.56	3.44	95.21	3.21	89.96	2.86	97.04	4.10	97.44	0.00	94.47	2.09	91.29	4.68	54.55	7.17	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.673079232
90.51	1.94	95.28	0.07	90.06	0.10	97.04	0.00	97.44	0.00	94.60	0.14	91.48	0.19	67.67	13.12	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.522678300
91.81	1.30	96.04	0.76	90.85	0.79	97.04	0.00	97.44	0.00	95.30	0.70	93.45	1.97	72.54	4.87	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2953686580
92.69	0.88	96.61	0.57	91.85	1.00	97.04	0.00	97.44	0.00	95.68	0.38	94.38	0.94	75.82	3.28	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3973698525
93.30	0.61	96.61	0.00	91.97	0.12	98.41	1.37	97.44	0.00	95.68	0.00	94.66	0.28	78.35	2.53	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.4086059274
93.82	0.52	96.86	0.24	92.30	0.33	98.41	0.00	97.44	0.00	95.89	0.21	95.79	1.12	80.08	1.73	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3197806813
94.25	0.42	96.91	0.05	93.23	0.93	99.09	0.68	97.44	0.00	95.93	0.03	95.88	0.09	81.26	1.17	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.2012079879
94.67	0.42	97.27	0.36	93.64	0.41	99.09	0.00	97.44	0.00	96.31	0.38	96.82	0.94	82.10	0.84	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2870648056
95.02	0.35	98.32	1.04	93.95	0.31	99.09	0.00	97.44	0.00	97.42	1.11	96.82	0.00	82.10	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.2859904713
95.33	0.31	98.33	0.02	94.16	0.21	99.32	0.23	97.44	0.00	97.49	0.07	96.82	0.00	83.74	1.64	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_intr_test.2172538381
95.60	0.27	98.35	0.02	94.16	0.00	99.32	0.00	97.44	0.00	97.53	0.03	96.82	0.00	85.57	1.83	/workspace/coverage/default/35.sysrst_ctrl_stress_all.3093182370
95.86	0.27	98.70	0.35	94.42	0.26	99.32	0.00	97.44	0.00	97.81	0.28	97.66	0.84	85.71	0.14	/workspace/coverage/default/23.sysrst_ctrl_stress_all.3287620469
96.08	0.22	98.72	0.02	94.59	0.17	99.32	0.00	97.44	0.00	97.81	0.00	97.66	0.00	87.07	1.36	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2010853208
96.27	0.19	98.75	0.03	95.14	0.55	99.32	0.00	97.44	0.00	97.88	0.07	98.31	0.66	87.07	0.00	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.2044563292
96.39	0.12	98.78	0.03	95.18	0.05	99.32	0.00	97.44	0.00	97.91	0.03	98.41	0.09	87.68	0.61	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.259255079
96.50	0.11	98.78	0.00	95.18	0.00	99.32	0.00	97.44	0.00	97.91	0.00	98.41	0.00	88.47	0.80	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3064166446
96.61	0.11	98.78	0.00	95.18	0.00	99.32	0.00	97.44	0.00	97.91	0.00	98.41	0.00	89.22	0.75	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.2531216493
96.70	0.10	98.78	0.00	95.21	0.02	99.77	0.46	97.44	0.00	97.91	0.00	98.50	0.09	89.32	0.09	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1383789589
96.80	0.09	98.84	0.05	95.28	0.07	99.77	0.00	97.44	0.00	97.98	0.07	98.69	0.19	89.60	0.28	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2857744799
96.88	0.08	98.84	0.00	95.30	0.02	99.77	0.00	97.44	0.00	97.98	0.00	98.78	0.09	90.02	0.42	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.4046491977
96.95	0.07	98.84	0.00	95.30	0.00	99.77	0.00	97.44	0.00	97.98	0.00	98.78	0.00	90.53	0.52	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3171601136
97.01	0.06	98.91	0.07	95.38	0.07	99.77	0.00	97.44	0.00	98.09	0.10	98.78	0.00	90.72	0.19	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.318983185
97.07	0.06	98.99	0.09	95.42	0.05	99.77	0.00	97.44	0.00	98.19	0.10	98.97	0.19	90.72	0.00	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2943638074
97.12	0.05	98.99	0.00	95.42	0.00	99.77	0.00	97.44	0.00	98.19	0.00	98.97	0.00	91.05	0.33	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1319208103
97.16	0.04	99.06	0.07	95.45	0.02	99.77	0.00	97.44	0.00	98.29	0.10	99.06	0.09	91.05	0.00	/workspace/coverage/default/0.sysrst_ctrl_edge_detect.243396250
97.20	0.04	99.10	0.03	95.47	0.02	99.77	0.00	97.44	0.00	98.33	0.03	99.16	0.09	91.14	0.09	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2534706087
97.24	0.04	99.10	0.00	95.52	0.05	100.00	0.23	97.44	0.00	98.33	0.00	99.16	0.00	91.14	0.00	/workspace/coverage/default/21.sysrst_ctrl_alert_test.2538636863
97.28	0.04	99.13	0.03	95.66	0.14	100.00	0.00	97.44	0.00	98.40	0.07	99.16	0.00	91.14	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3600067504
97.31	0.03	99.18	0.05	95.69	0.02	100.00	0.00	97.44	0.00	98.47	0.07	99.25	0.09	91.14	0.00	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3029516424
97.34	0.03	99.18	0.00	95.69	0.00	100.00	0.00	97.44	0.00	98.47	0.00	99.25	0.00	91.38	0.23	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3268345085
97.37	0.03	99.18	0.00	95.71	0.02	100.00	0.00	97.44	0.00	98.47	0.00	99.34	0.09	91.47	0.09	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1566127152
97.40	0.03	99.22	0.03	95.76	0.05	100.00	0.00	97.44	0.00	98.50	0.03	99.44	0.09	91.47	0.00	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.597665096
97.43	0.03	99.22	0.00	95.76	0.00	100.00	0.00	97.44	0.00	98.50	0.00	99.44	0.00	91.66	0.19	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.933301319
97.46	0.03	99.22	0.00	95.76	0.00	100.00	0.00	97.44	0.00	98.50	0.00	99.44	0.00	91.85	0.19	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3906990196
97.48	0.03	99.25	0.03	95.78	0.02	100.00	0.00	97.44	0.00	98.54	0.03	99.53	0.09	91.85	0.00	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3498256492
97.51	0.03	99.29	0.03	95.80	0.02	100.00	0.00	97.44	0.00	98.57	0.03	99.63	0.09	91.85	0.00	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3140647590
97.53	0.02	99.31	0.02	95.80	0.00	100.00	0.00	97.44	0.00	98.61	0.03	99.63	0.00	91.94	0.09	/workspace/coverage/default/47.sysrst_ctrl_stress_all.55873716
97.55	0.02	99.31	0.00	95.95	0.14	100.00	0.00	97.44	0.00	98.61	0.00	99.63	0.00	91.94	0.00	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.2460319197
97.57	0.02	99.31	0.00	95.95	0.00	100.00	0.00	97.44	0.00	98.61	0.00	99.63	0.00	92.08	0.14	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.9176305
97.59	0.02	99.31	0.00	95.97	0.02	100.00	0.00	97.44	0.00	98.61	0.00	99.63	0.00	92.17	0.09	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.160562519
97.60	0.01	99.34	0.03	95.97	0.00	100.00	0.00	97.44	0.00	98.68	0.07	99.63	0.00	92.17	0.00	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.490179851
97.62	0.01	99.34	0.00	95.97	0.00	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	92.27	0.09	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.2719508586
97.63	0.01	99.34	0.00	95.97	0.00	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	92.36	0.09	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1662460560
97.64	0.01	99.34	0.00	95.97	0.00	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	92.46	0.09	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3192777471
97.65	0.01	99.34	0.00	96.00	0.02	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	92.50	0.05	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3250202001
97.66	0.01	99.36	0.02	96.00	0.00	100.00	0.00	97.44	0.00	98.71	0.03	99.63	0.00	92.50	0.00	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.1934837897
97.67	0.01	99.37	0.02	96.00	0.00	100.00	0.00	97.44	0.00	98.75	0.03	99.63	0.00	92.50	0.00	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2121220667
97.68	0.01	99.39	0.02	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.03	99.63	0.00	92.50	0.00	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1616996590
97.68	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.55	0.05	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.960136684
97.69	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.60	0.05	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.846854160
97.70	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.64	0.05	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.358734064
97.70	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.69	0.05	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.166809401
97.71	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.74	0.05	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3284929290
97.72	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.78	0.05	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3672281487
97.72	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.83	0.05	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3858056276
97.73	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.88	0.05	/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1914552233
97.74	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.92	0.05	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.4223211949
97.74	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	92.97	0.05	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.705011966
97.75	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	93.02	0.05	/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.846398076
97.76	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	93.06	0.05	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.269878790
97.76	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	93.11	0.05	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3717558249
97.77	0.01	99.39	0.00	96.00	0.00	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	93.16	0.05	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1260095218
97.77	0.01	99.39	0.00	96.02	0.02	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	93.16	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3592333573

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.4078624205
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.2633999412
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2036373625
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.4166401659
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3745817184
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2974858471
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3459444450
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.562103997
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.4016397096
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3615417371
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2854576522
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3283341389
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1367554504
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2493331982
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3076544882
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2439204281
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1737718376
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1833677167
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.4033028451
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1339378446
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3450760865
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.447893700
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.567137692
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2435726780
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1988079014
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.547017378
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.3677876668
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3526432023
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3560981361
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3724623750
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.570474310
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1521732218
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.4013768923
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.151967308
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1618447831
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1812811386
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1166358415
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.688400869
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1211523659
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3819493560
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.383618100
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1204362624
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3598017098
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.3957855646
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1608038712
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2622523479
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3752699613
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1835621374
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3807337767
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2076228405
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.1016193765
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.379844240
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3425904338
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.3258893311
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3214373045
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2082753575
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3378436684
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1857921343
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.240375726
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.522423199
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1320646108
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1202751255
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2160573290
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.1574112914
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.144252705
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.2606186034
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.1853230141
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.3933130573
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.1217196212
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1086954348
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2279596841
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.3916825475
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2922620811
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2049295511
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2268481887
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.4003930676
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.1304752055
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.738931742
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.2517547736
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.4280650304
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.2355751044
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.4231688557
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.276689468
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.1440263641
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.2867681483
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.1436845698
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.98356158
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.2794294229
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.3525946241
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.4222286103
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.203911333
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.1401365571
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.1291691565
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.2927973999
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.3052566454
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.1276463878
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.4183723316
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.341014703
/workspace/coverage/cover_reg_top/30.sysrst_ctrl_intr_test.881143553
/workspace/coverage/cover_reg_top/31.sysrst_ctrl_intr_test.4233076980
/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.2767369553
/workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.2230623061
/workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.147609844
/workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.2396042230
/workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.314981092
/workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.437011074
/workspace/coverage/cover_reg_top/38.sysrst_ctrl_intr_test.3769301013
/workspace/coverage/cover_reg_top/39.sysrst_ctrl_intr_test.1080466069
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.2089087010
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.2273303681
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.2553460389
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.2792759138
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.3170103232
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_intr_test.3083420075
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.3448991866
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.272183095
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.4275580018
/workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.409618263
/workspace/coverage/cover_reg_top/41.sysrst_ctrl_intr_test.1674016986
/workspace/coverage/cover_reg_top/42.sysrst_ctrl_intr_test.93211225
/workspace/coverage/cover_reg_top/43.sysrst_ctrl_intr_test.1459365965
/workspace/coverage/cover_reg_top/44.sysrst_ctrl_intr_test.2868721233
/workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.530286199
/workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.524190209
/workspace/coverage/cover_reg_top/47.sysrst_ctrl_intr_test.3673425961
/workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.1302895073
/workspace/coverage/cover_reg_top/49.sysrst_ctrl_intr_test.3908431863
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.1648827428
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.1538916330
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_intr_test.3086469711
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_same_csr_outstanding.2025538137
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.2498092802
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.3903343065
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_mem_rw_with_rand_reset.2419495782
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_rw.2302233544
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_intr_test.4187736201
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_same_csr_outstanding.2309548604
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_errors.2658041616
/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.1537098529
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_mem_rw_with_rand_reset.1957237399
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.3975565793
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_intr_test.3748321399
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_same_csr_outstanding.2545863478
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_intg_err.3960552631
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_mem_rw_with_rand_reset.1768895736
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_rw.3785664489
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_intr_test.2518377617
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_same_csr_outstanding.4100915206
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_errors.2001408624
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.507051446
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_mem_rw_with_rand_reset.238080358
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_rw.226911229
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_same_csr_outstanding.3291821786
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.470644007
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.2240332853
/workspace/coverage/default/0.sysrst_ctrl_alert_test.2471108558
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2916675968
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1343019158
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1441089720
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2419811501
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2974654228
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.1309110790
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3977106542
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2269460651
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.418289756
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.2674652345
/workspace/coverage/default/0.sysrst_ctrl_smoke.2149118982
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2677722419
/workspace/coverage/default/1.sysrst_ctrl_alert_test.2841045700
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2064657539
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1081489279
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2443714194
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.339764373
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.85421209
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.2792677387
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2803062681
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2730013995
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1689518146
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1078929672
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.262781640
/workspace/coverage/default/1.sysrst_ctrl_smoke.4173225073
/workspace/coverage/default/1.sysrst_ctrl_stress_all.4136968003
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2516801556
/workspace/coverage/default/10.sysrst_ctrl_alert_test.2140131935
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2034158527
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.3528269697
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.176935615
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.1825045655
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.2620973542
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.2355704248
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.4230328332
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.739596924
/workspace/coverage/default/10.sysrst_ctrl_smoke.1974002111
/workspace/coverage/default/10.sysrst_ctrl_stress_all.1191268762
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2958575076
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3716607761
/workspace/coverage/default/11.sysrst_ctrl_alert_test.2527067472
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3322862663
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2732112246
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2688042963
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2344162688
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.4144737323
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.997744747
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.28226709
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2800243983
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.4100186644
/workspace/coverage/default/11.sysrst_ctrl_smoke.899713195
/workspace/coverage/default/11.sysrst_ctrl_stress_all.1260995146
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.1725970901
/workspace/coverage/default/12.sysrst_ctrl_alert_test.581625407
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3113235180
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.135794182
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.1365487777
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1598430966
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.3997523495
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.3488964578
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2610435674
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.200785981
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2567429078
/workspace/coverage/default/12.sysrst_ctrl_smoke.2241192809
/workspace/coverage/default/12.sysrst_ctrl_stress_all.3404497709
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1368401849
/workspace/coverage/default/13.sysrst_ctrl_alert_test.3615805529
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.1811589961
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.3532666399
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2834289708
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.1611274359
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2516609736
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2757490061
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3745749080
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.56037293
/workspace/coverage/default/13.sysrst_ctrl_smoke.1282968792
/workspace/coverage/default/13.sysrst_ctrl_stress_all.3489706922
/workspace/coverage/default/14.sysrst_ctrl_alert_test.480568768
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3002738095
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.407501556
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.3341734830
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2945110278
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3348802802
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2400779680
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.1120312238
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.3477625389
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3195684353
/workspace/coverage/default/14.sysrst_ctrl_smoke.3615877129
/workspace/coverage/default/14.sysrst_ctrl_stress_all.3016651975
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.436064963
/workspace/coverage/default/15.sysrst_ctrl_alert_test.890062574
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.614944601
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2747508609
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.4283150192
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.4185944068
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.4152179057
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2511430896
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1669623012
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.2882734871
/workspace/coverage/default/15.sysrst_ctrl_smoke.1920202774
/workspace/coverage/default/15.sysrst_ctrl_stress_all.1893614485
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2994098651
/workspace/coverage/default/16.sysrst_ctrl_alert_test.1311087024
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.386276879
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.1597088650
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1264271024
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.3985114085
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3097715037
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1154631280
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2614956774
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.722052770
/workspace/coverage/default/16.sysrst_ctrl_smoke.1481460200
/workspace/coverage/default/16.sysrst_ctrl_stress_all.72162026
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3009833624
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1722149160
/workspace/coverage/default/17.sysrst_ctrl_alert_test.1024897516
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.977493522
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.367603801
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.785100352
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3561465741
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.2847640792
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1494054028
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1215593779
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1879248917
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.750588833
/workspace/coverage/default/17.sysrst_ctrl_smoke.3958986170
/workspace/coverage/default/17.sysrst_ctrl_stress_all.895340366
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3404283713
/workspace/coverage/default/18.sysrst_ctrl_alert_test.636016934
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2385752330
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.110275820
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.4254231393
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.2304838330
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1380007498
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.282453548
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.2484101816
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2793169359
/workspace/coverage/default/18.sysrst_ctrl_smoke.245892748
/workspace/coverage/default/18.sysrst_ctrl_stress_all.869071676
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.22603958
/workspace/coverage/default/19.sysrst_ctrl_alert_test.2930222936
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1225473953
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1669712522
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2422451184
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2449824490
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.524504670
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.2015029683
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.2904171326
/workspace/coverage/default/19.sysrst_ctrl_smoke.924418919
/workspace/coverage/default/19.sysrst_ctrl_stress_all.3523384211
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1315663851
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2628484276
/workspace/coverage/default/2.sysrst_ctrl_alert_test.12925976
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3971449386
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.1916166665
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3945928313
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1320492009
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.4291392952
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.3731065896
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.1979775707
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2118472693
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.4131242548
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.1496511741
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.540408559
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.1419666914
/workspace/coverage/default/2.sysrst_ctrl_smoke.4169776093
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3687913846
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1393051803
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.2559532754
/workspace/coverage/default/20.sysrst_ctrl_alert_test.44300982
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1431024832
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.1396200911
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.3197467599
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.1601298797
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1905166806
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.4260714482
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.3534880464
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1684017156
/workspace/coverage/default/20.sysrst_ctrl_smoke.2024187020
/workspace/coverage/default/20.sysrst_ctrl_stress_all.170438598
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1707633274
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.1119466376
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2056254785
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2708999677
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.3404592333
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3878137684
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.1659053390
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1352311067
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1080494065
/workspace/coverage/default/21.sysrst_ctrl_smoke.3417283625
/workspace/coverage/default/21.sysrst_ctrl_stress_all.3649240474
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1033470071
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1821550014
/workspace/coverage/default/22.sysrst_ctrl_alert_test.3100891774
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1851872698
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.2309369531
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1522303134
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.312106963
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.60599957
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1521130235
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3784776345
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.3733523258
/workspace/coverage/default/22.sysrst_ctrl_smoke.2576084665
/workspace/coverage/default/22.sysrst_ctrl_stress_all.292563499
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2561049693
/workspace/coverage/default/23.sysrst_ctrl_alert_test.1324034517
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2061010332
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3401372235
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3895997574
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.3766033231
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2497665664
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.1970306003
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.1756685720
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3088174902
/workspace/coverage/default/23.sysrst_ctrl_smoke.44299743
/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1833674636
/workspace/coverage/default/24.sysrst_ctrl_alert_test.1859987710
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1767737357
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.3271962271
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.179276806
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3706886687
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.3602754988
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1546062387
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2779219385
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.836108016
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1013228866
/workspace/coverage/default/24.sysrst_ctrl_smoke.3553914847
/workspace/coverage/default/24.sysrst_ctrl_stress_all.808895804
/workspace/coverage/default/25.sysrst_ctrl_alert_test.2163506818
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.597690923
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.538832494
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3155582798
/workspace/coverage/default/25.sysrst_ctrl_edge_detect.4010781341
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.397641389
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3938890752
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2979820212
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1195046969
/workspace/coverage/default/25.sysrst_ctrl_smoke.3087252724
/workspace/coverage/default/25.sysrst_ctrl_stress_all.4055651675
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.98851270
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2082744025
/workspace/coverage/default/26.sysrst_ctrl_alert_test.3493053638
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3911004181
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.2529308462
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1877231978
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3653936019
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.461584475
/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.976742575
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.2935704533
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1893969297
/workspace/coverage/default/26.sysrst_ctrl_smoke.1610459684
/workspace/coverage/default/26.sysrst_ctrl_stress_all.3766776675
/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.1644220424
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.603587990
/workspace/coverage/default/27.sysrst_ctrl_alert_test.2612648487
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.486786459
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.1960161048
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3373977430
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3230885056
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.2970169811
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.2276607930
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.3640308046
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3008653061
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2389735795
/workspace/coverage/default/27.sysrst_ctrl_smoke.1193922610
/workspace/coverage/default/27.sysrst_ctrl_stress_all.137214028
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.4255676788
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.160367601
/workspace/coverage/default/28.sysrst_ctrl_alert_test.2819683042
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.1787862816
/workspace/coverage/default/28.sysrst_ctrl_combo_detect.945721603
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2897878501
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3263625207
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.598580699
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.1454663659
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2453857607
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3840899151
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1918704959
/workspace/coverage/default/28.sysrst_ctrl_smoke.3059177773
/workspace/coverage/default/28.sysrst_ctrl_stress_all.2499337197
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3309725083
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.4132721914
/workspace/coverage/default/29.sysrst_ctrl_alert_test.940765303
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3486033248
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.2604022384
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.3519038522
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.904027279
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.4158370267
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.4088141426
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.825989382
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.1450199840
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3540476503
/workspace/coverage/default/29.sysrst_ctrl_smoke.2299032238
/workspace/coverage/default/29.sysrst_ctrl_stress_all.3449179636
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1198594755
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.496975367
/workspace/coverage/default/3.sysrst_ctrl_alert_test.1403265148
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.380060225
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.3734392170
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.654836543
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3587238530
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1940639424
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1217119183
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.3989284037
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.280127101
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.590411590
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.1685037454
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1700875530
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.1788888676
/workspace/coverage/default/3.sysrst_ctrl_smoke.2376616293
/workspace/coverage/default/3.sysrst_ctrl_stress_all.1103396180
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.663085678
/workspace/coverage/default/30.sysrst_ctrl_alert_test.1686177618
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.4211529004
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.2910541191
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3716834014
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.708080233
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.1866501217
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.964672275
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.1726988169
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2771145954
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1747118023
/workspace/coverage/default/30.sysrst_ctrl_smoke.2457371764
/workspace/coverage/default/30.sysrst_ctrl_stress_all.2836885847
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.278055034
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1164211939
/workspace/coverage/default/31.sysrst_ctrl_alert_test.2048087638
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1972628407
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.2510550818
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3511687554
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.1694752586
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.3139812422
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3227891504
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.16137589
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1012354423
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.200791774
/workspace/coverage/default/31.sysrst_ctrl_smoke.789390124
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2668477518
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2105265763
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3924362945
/workspace/coverage/default/32.sysrst_ctrl_alert_test.2041499875
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3432835000
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.2157816665
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3132719284
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3353750602
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1330566260
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3043474988
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.2487919610
/workspace/coverage/default/32.sysrst_ctrl_smoke.1456497081
/workspace/coverage/default/32.sysrst_ctrl_stress_all.4259523072
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2148561349
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2379416583
/workspace/coverage/default/33.sysrst_ctrl_alert_test.536844884
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1317615890
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1801647194
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3362657288
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.512371823
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3874233094
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1409702621
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.93702805
/workspace/coverage/default/33.sysrst_ctrl_smoke.1011113737
/workspace/coverage/default/33.sysrst_ctrl_stress_all.118104273
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2425929186
/workspace/coverage/default/34.sysrst_ctrl_alert_test.3505719749
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1306214855
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.403321117
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2136925227
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.2768141124
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3120444314
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3808942535
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2450474755
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.1761711909
/workspace/coverage/default/34.sysrst_ctrl_smoke.4275220906
/workspace/coverage/default/34.sysrst_ctrl_stress_all.2627492688
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1498098869
/workspace/coverage/default/35.sysrst_ctrl_alert_test.504735026
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2610464420
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.334782507
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3401785971
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.2366199390
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2029900311
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.2323118303
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3863618106
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2736227316
/workspace/coverage/default/35.sysrst_ctrl_smoke.2141491210
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3976740308
/workspace/coverage/default/36.sysrst_ctrl_alert_test.4126797827
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.995877973
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.3778476139
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.769431493
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3077242064
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.2204640924
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1055200968
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.1206443328
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.1339083538
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.370268124
/workspace/coverage/default/36.sysrst_ctrl_smoke.2825670842
/workspace/coverage/default/36.sysrst_ctrl_stress_all.276951987
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2546307705
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3821753487
/workspace/coverage/default/37.sysrst_ctrl_alert_test.2716642762
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2287338645
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.1706920550
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.1759645538
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.2514130341
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.1166998863
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3677742076
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.4074490670
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.249606018
/workspace/coverage/default/37.sysrst_ctrl_smoke.931028643
/workspace/coverage/default/37.sysrst_ctrl_stress_all.2812983508
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3423591803
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1138789337
/workspace/coverage/default/38.sysrst_ctrl_alert_test.2429584786
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.443824441
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.3569975900
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2569797903
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1072508233
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.2960706912
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.4008489726
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.820064039
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.877245245
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2414957504
/workspace/coverage/default/38.sysrst_ctrl_smoke.1835514239
/workspace/coverage/default/38.sysrst_ctrl_stress_all.936691748
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3902697221
/workspace/coverage/default/39.sysrst_ctrl_alert_test.2290409114
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3335492835
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.2961960757
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2889716440
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2013113279
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1227869508
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2552735488
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1177885379
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1948307650
/workspace/coverage/default/39.sysrst_ctrl_smoke.736084894
/workspace/coverage/default/39.sysrst_ctrl_stress_all.2738764654
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2586912166
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.1156596336
/workspace/coverage/default/4.sysrst_ctrl_alert_test.2578344262
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1657895441
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3792581056
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.575559188
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.305159048
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.3991196730
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.863472043
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.312073369
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2621980723
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2526556788
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1808309070
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2185833163
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.821990876
/workspace/coverage/default/4.sysrst_ctrl_smoke.3973328573
/workspace/coverage/default/4.sysrst_ctrl_stress_all.4283490210
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2252277800
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1375033496
/workspace/coverage/default/40.sysrst_ctrl_alert_test.3815110834
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1459795765
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.4253304135
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.793214471
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.551386153
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1369007525
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2840197258
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.4132171247
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3783573060
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3945595794
/workspace/coverage/default/40.sysrst_ctrl_smoke.1748465177
/workspace/coverage/default/40.sysrst_ctrl_stress_all.3504709905
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2558943733
/workspace/coverage/default/41.sysrst_ctrl_alert_test.3194959236
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.36400230
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3226861360
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1058931031
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3270706037
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1006404903
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3087066706
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.388282838
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.616176403
/workspace/coverage/default/41.sysrst_ctrl_smoke.562464070
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2009498905
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3240521304
/workspace/coverage/default/42.sysrst_ctrl_alert_test.128558536
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2008567538
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.518492018
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3431716619
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4019794366
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2186038398
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1896528997
/workspace/coverage/default/42.sysrst_ctrl_smoke.3071882479
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1930680623
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3212670164
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1758829844
/workspace/coverage/default/43.sysrst_ctrl_alert_test.1924247821
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1876229228
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3918338745
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2178795050
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2952596954
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1156644751
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2881006170
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.921743583
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2651003864
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1315118171
/workspace/coverage/default/43.sysrst_ctrl_smoke.2556796123
/workspace/coverage/default/43.sysrst_ctrl_stress_all.63434588
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1538944234
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2535764033
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.179249820
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.844985500
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1679384325
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1570891085
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1482223259
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3314366993
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2169130924
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3844203822
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3639347048
/workspace/coverage/default/44.sysrst_ctrl_smoke.2912178424
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1515368627
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3799562472
/workspace/coverage/default/45.sysrst_ctrl_alert_test.669309319
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.989823917
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3317398366
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.482958008
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.112859295
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3001405293
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.255034786
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2947057454
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2477339626
/workspace/coverage/default/45.sysrst_ctrl_smoke.1793974854
/workspace/coverage/default/45.sysrst_ctrl_stress_all.4061162621
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.4043172599
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.688259883
/workspace/coverage/default/46.sysrst_ctrl_alert_test.4012030455
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.4252439475
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1892545781
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3793345971
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.721205879
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2298940233
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2076403873
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.148791714
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1109619449
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2317978501
/workspace/coverage/default/46.sysrst_ctrl_smoke.1109647493
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.4212462808
/workspace/coverage/default/47.sysrst_ctrl_alert_test.366306899
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2837408584
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.700479869
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1923314460
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.743803596
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.35705324
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.289702969
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1611192004
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4020713930
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2933458534
/workspace/coverage/default/47.sysrst_ctrl_smoke.775530796
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1725689405
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1836564223
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2420460416
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.314832428
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1342658830
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1215570350
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1653730528
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2940093951
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.657495085
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.373297284
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1467293395
/workspace/coverage/default/48.sysrst_ctrl_smoke.2040643203
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2221992325
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1646962662
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.19078531
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1385035090
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.904162314
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.4042014835
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2033173016
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.821459971
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.4148533969
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2974711225
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3877384408
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3781937967
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1502171942
/workspace/coverage/default/49.sysrst_ctrl_smoke.1179008447
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2314061193
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.899403000
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.271180471
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2362053107
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3925572485
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2323594287
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2232448295
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1084592793
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1603342066
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2823578302
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3529519354
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2206371020
/workspace/coverage/default/5.sysrst_ctrl_smoke.3290716292
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2144374625
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3651511251
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.994143058
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1437448160
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3470494917
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2888805033
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.178045107
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3460756812
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3284692949
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.801026743
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1788344918
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.876756012
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.9223080
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1636028646
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.83812063
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2277998456
/workspace/coverage/default/6.sysrst_ctrl_smoke.674349876
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2443777456
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1093562991
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.381802987
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3326343691
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3958570713
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.113706154
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.388735897
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.853690159
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.4213780309
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1328416164
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2981521681
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2193735582
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.12757286
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1614715399
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1745846285
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1995095909
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1876378165
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3590359109
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3128985740
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1019732254
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3559045162
/workspace/coverage/default/7.sysrst_ctrl_smoke.965926158
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2576304847
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2456449430
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.236307350
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2056645064
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.127235357
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.296910035
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.821000811
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2629794808
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3402224015
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2673767457
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.771532998
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2376214209
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2325301589
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1133813796
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.993079311
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2800795247
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2366735219
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2003237020
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.418394475
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1664509464
/workspace/coverage/default/8.sysrst_ctrl_smoke.2822724925
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3835881065
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1146342429
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.315301506
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1947081943
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3592549268
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3794920220
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3770702650
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.4123005024
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1489037274
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3710978545
/workspace/coverage/default/9.sysrst_ctrl_alert_test.795979677
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1602015641
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.552002295
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1212922497
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2797824950
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1295015672
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.629757669
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3169577691
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.837462804
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3200099234
/workspace/coverage/default/9.sysrst_ctrl_smoke.852958943
/workspace/coverage/default/9.sysrst_ctrl_stress_all.4085420304
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.954326952
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.578471706
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3952660975
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2321507715
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1440992990
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.496653472
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.63379798
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3100211330
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.486522393
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3263707506
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.798576000

Total test records in report: 909

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3990763795	Dec 20 12:31:58 PM PST 23	Dec 20 12:32:44 PM PST 23	5163305976 ps
T2	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.1538916330	Dec 20 12:31:47 PM PST 23	Dec 20 12:32:24 PM PST 23	2043541509 ps
T5	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2974858471	Dec 20 12:30:58 PM PST 23	Dec 20 12:31:46 PM PST 23	2046450176 ps
T22	/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.4280650304	Dec 20 12:31:54 PM PST 23	Dec 20 12:32:29 PM PST 23	2023717899 ps
T3	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.547017378	Dec 20 12:31:55 PM PST 23	Dec 20 12:32:53 PM PST 23	9969254745 ps
T23	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_mem_rw_with_rand_reset.1768895736	Dec 20 12:31:45 PM PST 23	Dec 20 12:32:20 PM PST 23	2141273410 ps
T4	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3600067504	Dec 20 12:30:59 PM PST 23	Dec 20 12:31:56 PM PST 23	10565524131 ps
T6	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3627032303	Dec 20 12:32:03 PM PST 23	Dec 20 12:33:09 PM PST 23	22307135850 ps
T24	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1367554504	Dec 20 12:31:04 PM PST 23	Dec 20 12:31:57 PM PST 23	2012342937 ps
T7	/workspace/coverage/cover_reg_top/6.sysrst_ctrl_same_csr_outstanding.2309548604	Dec 20 12:31:53 PM PST 23	Dec 20 12:32:29 PM PST 23	5111217141 ps
T37	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.570474310	Dec 20 12:31:53 PM PST 23	Dec 20 12:32:28 PM PST 23	2018427197 ps
T8	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.2517547736	Dec 20 12:31:07 PM PST 23	Dec 20 12:32:52 PM PST 23	42388639983 ps
T62	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.1648827428	Dec 20 12:31:55 PM PST 23	Dec 20 12:32:32 PM PST 23	2061972122 ps
T9	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3724623750	Dec 20 12:31:54 PM PST 23	Dec 20 12:32:27 PM PST 23	2063394385 ps
T10	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.2089087010	Dec 20 12:31:47 PM PST 23	Dec 20 12:32:28 PM PST 23	2509887169 ps
T300	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3752699613	Dec 20 12:32:03 PM PST 23	Dec 20 12:32:40 PM PST 23	2035977801 ps
T63	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.567137692	Dec 20 12:31:57 PM PST 23	Dec 20 12:32:34 PM PST 23	2056324083 ps
T384	/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.1436845698	Dec 20 12:32:08 PM PST 23	Dec 20 12:32:53 PM PST 23	2009007343 ps
T64	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3615417371	Dec 20 12:31:00 PM PST 23	Dec 20 12:31:54 PM PST 23	4012213371 ps
T293	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.2012079879	Dec 20 12:31:48 PM PST 23	Dec 20 12:32:28 PM PST 23	2128780878 ps
T301	/workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.1302895073	Dec 20 12:32:18 PM PST 23	Dec 20 12:33:06 PM PST 23	2012221114 ps
T383	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_intr_test.2172538381	Dec 20 12:31:51 PM PST 23	Dec 20 12:32:24 PM PST 23	2036264450 ps
T322	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1204362624	Dec 20 12:31:54 PM PST 23	Dec 20 12:32:29 PM PST 23	2019736783 ps
T11	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3283341389	Dec 20 12:30:59 PM PST 23	Dec 20 12:31:45 PM PST 23	2073378394 ps
T323	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.960136684	Dec 20 12:30:58 PM PST 23	Dec 20 12:31:41 PM PST 23	2066771426 ps
T34	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.2044563292	Dec 20 12:31:54 PM PST 23	Dec 20 12:32:30 PM PST 23	3295563022 ps
T324	/workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.530286199	Dec 20 12:31:59 PM PST 23	Dec 20 12:32:36 PM PST 23	2016257224 ps
T314	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1320646108	Dec 20 12:31:47 PM PST 23	Dec 20 12:32:23 PM PST 23	2077727749 ps
T35	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.3975565793	Dec 20 12:31:53 PM PST 23	Dec 20 12:32:28 PM PST 23	2087418115 ps
T385	/workspace/coverage/cover_reg_top/47.sysrst_ctrl_intr_test.3673425961	Dec 20 12:32:16 PM PST 23	Dec 20 12:33:01 PM PST 23	2035838006 ps
T329	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2622523479	Dec 20 12:31:56 PM PST 23	Dec 20 12:32:33 PM PST 23	2023266705 ps
T325	/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.3525946241	Dec 20 12:31:49 PM PST 23	Dec 20 12:32:28 PM PST 23	2013333250 ps
T84	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1521732218	Dec 20 12:31:53 PM PST 23	Dec 20 12:32:39 PM PST 23	11322422201 ps
T292	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.4275580018	Dec 20 12:31:47 PM PST 23	Dec 20 12:34:14 PM PST 23	42372776347 ps
T326	/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.2355751044	Dec 20 12:31:58 PM PST 23	Dec 20 12:32:32 PM PST 23	2031745915 ps
T315	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.151967308	Dec 20 12:32:04 PM PST 23	Dec 20 12:32:42 PM PST 23	2225535781 ps
T294	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.470644007	Dec 20 12:31:50 PM PST 23	Dec 20 12:32:27 PM PST 23	2276256917 ps
T398	/workspace/coverage/cover_reg_top/39.sysrst_ctrl_intr_test.1080466069	Dec 20 12:31:53 PM PST 23	Dec 20 12:32:29 PM PST 23	2027008422 ps
T399	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1812811386	Dec 20 12:31:58 PM PST 23	Dec 20 12:32:34 PM PST 23	2014776084 ps
T400	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.2553460389	Dec 20 12:31:48 PM PST 23	Dec 20 12:32:25 PM PST 23	6080810162 ps
T295	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3450760865	Dec 20 12:31:46 PM PST 23	Dec 20 12:32:23 PM PST 23	2130781167 ps
T330	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_same_csr_outstanding.2545863478	Dec 20 12:31:51 PM PST 23	Dec 20 12:32:28 PM PST 23	4743431478 ps
T298	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_errors.2001408624	Dec 20 12:31:56 PM PST 23	Dec 20 12:32:30 PM PST 23	2183245453 ps
T401	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.4003930676	Dec 20 12:31:04 PM PST 23	Dec 20 12:31:58 PM PST 23	2010314375 ps
T402	/workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.524190209	Dec 20 12:32:04 PM PST 23	Dec 20 12:32:46 PM PST 23	2014670036 ps
T403	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2036373625	Dec 20 12:30:50 PM PST 23	Dec 20 12:31:32 PM PST 23	4040669991 ps
T404	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.2792759138	Dec 20 12:31:51 PM PST 23	Dec 20 12:32:28 PM PST 23	2046731046 ps
T405	/workspace/coverage/cover_reg_top/42.sysrst_ctrl_intr_test.93211225	Dec 20 12:32:15 PM PST 23	Dec 20 12:33:05 PM PST 23	2018197969 ps
T406	/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.276689468	Dec 20 12:31:53 PM PST 23	Dec 20 12:32:30 PM PST 23	2009103969 ps
T302	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2439204281	Dec 20 12:31:02 PM PST 23	Dec 20 12:32:01 PM PST 23	22571849131 ps
T407	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2854576522	Dec 20 12:31:03 PM PST 23	Dec 20 12:31:52 PM PST 23	2125617443 ps
T408	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2160573290	Dec 20 12:31:52 PM PST 23	Dec 20 12:32:26 PM PST 23	2034899951 ps
T386	/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_rw.2302233544	Dec 20 12:31:44 PM PST 23	Dec 20 12:32:19 PM PST 23	2108402209 ps
T409	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.1853230141	Dec 20 12:31:50 PM PST 23	Dec 20 12:32:25 PM PST 23	2040308946 ps
T410	/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.4231688557	Dec 20 12:31:53 PM PST 23	Dec 20 12:32:27 PM PST 23	2025531132 ps
T397	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3819493560	Dec 20 12:31:51 PM PST 23	Dec 20 12:32:27 PM PST 23	2177073315 ps
T411	/workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.314981092	Dec 20 12:31:56 PM PST 23	Dec 20 12:32:29 PM PST 23	2038778052 ps
T316	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.3448991866	Dec 20 12:31:52 PM PST 23	Dec 20 12:32:34 PM PST 23	10255342977 ps
T412	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2493331982	Dec 20 12:31:05 PM PST 23	Dec 20 12:32:15 PM PST 23	10455508203 ps
T413	/workspace/coverage/cover_reg_top/31.sysrst_ctrl_intr_test.4233076980	Dec 20 12:31:54 PM PST 23	Dec 20 12:32:27 PM PST 23	2035235017 ps
T414	/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.2794294229	Dec 20 12:32:08 PM PST 23	Dec 20 12:32:53 PM PST 23	2014812276 ps
T296	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.2460319197	Dec 20 12:32:04 PM PST 23	Dec 20 12:32:44 PM PST 23	2323672486 ps
T415	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_mem_rw_with_rand_reset.1957237399	Dec 20 12:31:50 PM PST 23	Dec 20 12:32:28 PM PST 23	2056692016 ps
T317	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.4086059274	Dec 20 12:31:46 PM PST 23	Dec 20 12:32:48 PM PST 23	42870861400 ps
T416	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_same_csr_outstanding.3291821786	Dec 20 12:31:47 PM PST 23	Dec 20 12:32:33 PM PST 23	5506107334 ps
T417	/workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.147609844	Dec 20 12:32:01 PM PST 23	Dec 20 12:32:36 PM PST 23	2032946782 ps
T299	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.2498092802	Dec 20 12:31:54 PM PST 23	Dec 20 12:32:32 PM PST 23	2118809084 ps
T418	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3425904338	Dec 20 12:32:31 PM PST 23	Dec 20 12:33:20 PM PST 23	2010036794 ps
T318	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.1016193765	Dec 20 12:31:49 PM PST 23	Dec 20 12:32:23 PM PST 23	2068513806 ps
T335	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1202751255	Dec 20 12:31:54 PM PST 23	Dec 20 12:32:31 PM PST 23	2057130354 ps
T419	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.240375726	Dec 20 12:31:53 PM PST 23	Dec 20 12:32:30 PM PST 23	2014828379 ps
T420	/workspace/coverage/cover_reg_top/49.sysrst_ctrl_intr_test.3908431863	Dec 20 12:31:59 PM PST 23	Dec 20 12:32:37 PM PST 23	2014016869 ps
T421	/workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.437011074	Dec 20 12:32:09 PM PST 23	Dec 20 12:32:49 PM PST 23	2037842069 ps
T422	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3745817184	Dec 20 12:31:03 PM PST 23	Dec 20 12:31:52 PM PST 23	2034990232 ps
T327	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3459444450	Dec 20 12:30:58 PM PST 23	Dec 20 12:32:20 PM PST 23	22203340796 ps
T423	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.522423199	Dec 20 12:32:02 PM PST 23	Dec 20 12:33:08 PM PST 23	8416887287 ps
T297	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.144252705	Dec 20 12:31:47 PM PST 23	Dec 20 12:32:29 PM PST 23	2045474692 ps
T424	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.4166401659	Dec 20 12:31:03 PM PST 23	Dec 20 12:31:52 PM PST 23	2160727760 ps
T425	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_same_csr_outstanding.4100915206	Dec 20 12:31:49 PM PST 23	Dec 20 12:32:27 PM PST 23	5209839755 ps
T426	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_intr_test.3086469711	Dec 20 12:31:50 PM PST 23	Dec 20 12:32:25 PM PST 23	2019375240 ps
T328	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_intg_err.3960552631	Dec 20 12:31:44 PM PST 23	Dec 20 12:33:18 PM PST 23	22211848676 ps
T319	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.2927973999	Dec 20 12:31:48 PM PST 23	Dec 20 12:32:26 PM PST 23	2035998155 ps
T427	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2279596841	Dec 20 12:31:47 PM PST 23	Dec 20 12:32:51 PM PST 23	42784026931 ps
T321	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3378436684	Dec 20 12:31:50 PM PST 23	Dec 20 12:32:25 PM PST 23	2082103037 ps
T428	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3598017098	Dec 20 12:31:59 PM PST 23	Dec 20 12:32:35 PM PST 23	2301588032 ps
T429	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.3258893311	Dec 20 12:32:35 PM PST 23	Dec 20 12:33:31 PM PST 23	7891680122 ps
T430	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2049295511	Dec 20 12:31:49 PM PST 23	Dec 20 12:32:28 PM PST 23	2104291187 ps
T431	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.3933130573	Dec 20 12:31:49 PM PST 23	Dec 20 12:32:24 PM PST 23	2025339075 ps
T432	/workspace/coverage/cover_reg_top/44.sysrst_ctrl_intr_test.2868721233	Dec 20 12:32:02 PM PST 23	Dec 20 12:32:40 PM PST 23	2022389805 ps
T433	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.2240332853	Dec 20 12:31:54 PM PST 23	Dec 20 12:34:21 PM PST 23	42443865933 ps
T320	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.4016397096	Dec 20 12:30:53 PM PST 23	Dec 20 12:34:59 PM PST 23	49944779758 ps
T382	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.846854160	Dec 20 12:32:01 PM PST 23	Dec 20 12:34:20 PM PST 23	42464910093 ps
T434	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1211523659	Dec 20 12:31:58 PM PST 23	Dec 20 12:32:58 PM PST 23	42894210438 ps
T435	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.4183723316	Dec 20 12:31:47 PM PST 23	Dec 20 12:32:35 PM PST 23	2180116208 ps
T436	/workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.2396042230	Dec 20 12:32:09 PM PST 23	Dec 20 12:32:50 PM PST 23	2038397309 ps
T437	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.507051446	Dec 20 12:32:33 PM PST 23	Dec 20 12:34:12 PM PST 23	42441493947 ps
T438	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.1401365571	Dec 20 12:31:56 PM PST 23	Dec 20 12:32:28 PM PST 23	4119322355 ps
T439	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_intr_test.3083420075	Dec 20 12:31:51 PM PST 23	Dec 20 12:32:24 PM PST 23	2074073701 ps
T440	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1166358415	Dec 20 12:31:55 PM PST 23	Dec 20 12:32:40 PM PST 23	5551789864 ps
T441	/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.1537098529	Dec 20 12:31:49 PM PST 23	Dec 20 12:32:38 PM PST 23	22402204042 ps
T442	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1737718376	Dec 20 12:31:47 PM PST 23	Dec 20 12:32:23 PM PST 23	2046399317 ps
T443	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2076228405	Dec 20 12:32:09 PM PST 23	Dec 20 12:33:18 PM PST 23	42872983527 ps
T444	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_intr_test.2518377617	Dec 20 12:31:51 PM PST 23	Dec 20 12:32:28 PM PST 23	2015867695 ps
T445	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.3052566454	Dec 20 12:31:53 PM PST 23	Dec 20 12:32:27 PM PST 23	2023571625 ps
T446	/workspace/coverage/cover_reg_top/6.sysrst_ctrl_intr_test.4187736201	Dec 20 12:31:56 PM PST 23	Dec 20 12:32:28 PM PST 23	2074346352 ps
T447	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.688400869	Dec 20 12:32:05 PM PST 23	Dec 20 12:32:47 PM PST 23	2094634944 ps
T448	/workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.2230623061	Dec 20 12:31:55 PM PST 23	Dec 20 12:32:28 PM PST 23	2022586292 ps
T449	/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.2867681483	Dec 20 12:31:58 PM PST 23	Dec 20 12:32:33 PM PST 23	2021628086 ps
T331	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.379844240	Dec 20 12:32:35 PM PST 23	Dec 20 12:33:24 PM PST 23	2030001153 ps
T36	/workspace/coverage/default/21.sysrst_ctrl_alert_test.2538636863	Dec 20 12:50:41 PM PST 23	Dec 20 12:51:18 PM PST 23	2014996984 ps
T12	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3534023901	Dec 20 12:51:56 PM PST 23	Dec 20 12:53:38 PM PST 23	929833287916 ps
T25	/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1948307650	Dec 20 12:51:45 PM PST 23	Dec 20 12:52:04 PM PST 23	2510272895 ps
T26	/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3799562472	Dec 20 12:52:00 PM PST 23	Dec 20 12:52:18 PM PST 23	3504640303 ps
T27	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3001405293	Dec 20 12:51:46 PM PST 23	Dec 20 12:52:04 PM PST 23	2613594568 ps
T28	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.1759645538	Dec 20 12:51:30 PM PST 23	Dec 20 12:51:45 PM PST 23	4996937529 ps
T29	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2614956774	Dec 20 12:50:13 PM PST 23	Dec 20 12:50:56 PM PST 23	2248145620 ps
T30	/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.2015029683	Dec 20 12:50:22 PM PST 23	Dec 20 12:51:00 PM PST 23	2264396428 ps
T31	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2803062681	Dec 20 12:49:46 PM PST 23	Dec 20 12:50:42 PM PST 23	2610021688 ps
T32	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3322862663	Dec 20 12:50:22 PM PST 23	Dec 20 12:51:07 PM PST 23	3155403855 ps
T33	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3155582798	Dec 20 12:50:58 PM PST 23	Dec 20 12:51:25 PM PST 23	3699073299 ps
T102	/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1546062387	Dec 20 12:51:00 PM PST 23	Dec 20 12:51:27 PM PST 23	2623579064 ps
T13	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3348802802	Dec 20 12:50:20 PM PST 23	Dec 20 12:51:07 PM PST 23	3320011428 ps
T79	/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.1206443328	Dec 20 12:51:32 PM PST 23	Dec 20 12:51:50 PM PST 23	2476406911 ps
T103	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2344162688	Dec 20 12:50:12 PM PST 23	Dec 20 12:51:05 PM PST 23	4257348501 ps
T104	/workspace/coverage/default/35.sysrst_ctrl_alert_test.504735026	Dec 20 12:51:26 PM PST 23	Dec 20 12:51:42 PM PST 23	2017951497 ps
T14	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.160562519	Dec 20 12:51:14 PM PST 23	Dec 20 12:54:51 PM PST 23	81601338388 ps
T68	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.512371823	Dec 20 12:51:08 PM PST 23	Dec 20 12:51:35 PM PST 23	2609828387 ps
T57	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2419811501	Dec 20 12:49:42 PM PST 23	Dec 20 12:50:36 PM PST 23	2253541014 ps
T69	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.2355704248	Dec 20 12:50:12 PM PST 23	Dec 20 12:50:59 PM PST 23	2432886314 ps
T450	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2952596954	Dec 20 12:51:55 PM PST 23	Dec 20 12:52:13 PM PST 23	4676686714 ps
T15	/workspace/coverage/default/8.sysrst_ctrl_stress_all.3835881065	Dec 20 12:50:08 PM PST 23	Dec 20 12:51:08 PM PST 23	13775489344 ps
T172	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2477339626	Dec 20 12:51:43 PM PST 23	Dec 20 12:51:55 PM PST 23	2549325521 ps
T173	/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.721205879	Dec 20 12:51:48 PM PST 23	Dec 20 12:52:02 PM PST 23	2470337487 ps
T16	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2870648056	Dec 20 12:51:41 PM PST 23	Dec 20 12:53:42 PM PST 23	50352502532 ps
T70	/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.1119466376	Dec 20 12:50:39 PM PST 23	Dec 20 12:51:16 PM PST 23	3311822504 ps
T17	/workspace/coverage/default/16.sysrst_ctrl_stress_all.72162026	Dec 20 12:51:46 PM PST 23	Dec 20 12:52:10 PM PST 23	10308193459 ps
T71	/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1876229228	Dec 20 12:51:48 PM PST 23	Dec 20 12:52:08 PM PST 23	3479441161 ps
T72	/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3043474988	Dec 20 12:51:13 PM PST 23	Dec 20 12:51:38 PM PST 23	2084806520 ps
T73	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1522303134	Dec 20 12:51:07 PM PST 23	Dec 20 12:51:38 PM PST 23	3969699716 ps
T55	/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.821000811	Dec 20 12:52:09 PM PST 23	Dec 20 12:53:34 PM PST 23	26329191860 ps
T18	/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.4123005024	Dec 20 12:52:08 PM PST 23	Dec 20 12:54:19 PM PST 23	44294147611 ps
T131	/workspace/coverage/default/23.sysrst_ctrl_alert_test.1324034517	Dec 20 12:50:59 PM PST 23	Dec 20 12:51:29 PM PST 23	2014177705 ps
T99	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.12757286	Dec 20 12:50:03 PM PST 23	Dec 20 12:50:58 PM PST 23	3618038315 ps
T228	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.112859295	Dec 20 12:51:40 PM PST 23	Dec 20 12:52:00 PM PST 23	3438647974 ps
T19	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.2510550818	Dec 20 12:51:08 PM PST 23	Dec 20 12:52:11 PM PST 23	63033076240 ps
T20	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.3139812422	Dec 20 12:51:14 PM PST 23	Dec 20 12:51:41 PM PST 23	3247899990 ps
T117	/workspace/coverage/default/29.sysrst_ctrl_smoke.2299032238	Dec 20 12:50:49 PM PST 23	Dec 20 12:51:20 PM PST 23	2135689034 ps
T56	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3401372235	Dec 20 12:50:53 PM PST 23	Dec 20 12:52:21 PM PST 23	26081124183 ps
T118	/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3353750602	Dec 20 12:51:12 PM PST 23	Dec 20 12:51:33 PM PST 23	2638603868 ps
T80	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2526556788	Dec 20 12:49:58 PM PST 23	Dec 20 12:50:50 PM PST 23	2466991472 ps
T451	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2800243983	Dec 20 12:50:19 PM PST 23	Dec 20 12:51:03 PM PST 23	2170804592 ps
T21	/workspace/coverage/default/45.sysrst_ctrl_stress_all.4061162621	Dec 20 12:51:52 PM PST 23	Dec 20 12:52:20 PM PST 23	11580434223 ps
T133	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.551386153	Dec 20 12:51:40 PM PST 23	Dec 20 12:51:55 PM PST 23	2830256637 ps
T59	/workspace/coverage/default/49.sysrst_ctrl_combo_detect.4042014835	Dec 20 12:51:52 PM PST 23	Dec 20 12:59:14 PM PST 23	159690766135 ps
T134	/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.977493522	Dec 20 12:50:35 PM PST 23	Dec 20 12:51:13 PM PST 23	3177205979 ps
T135	/workspace/coverage/default/37.sysrst_ctrl_smoke.931028643	Dec 20 12:51:15 PM PST 23	Dec 20 12:51:39 PM PST 23	2114586449 ps
T136	/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2232448295	Dec 20 12:50:08 PM PST 23	Dec 20 12:50:52 PM PST 23	3212685155 ps
T137	/workspace/coverage/default/35.sysrst_ctrl_smoke.2141491210	Dec 20 12:51:17 PM PST 23	Dec 20 12:51:37 PM PST 23	2113061891 ps
T138	/workspace/coverage/default/29.sysrst_ctrl_alert_test.940765303	Dec 20 12:50:56 PM PST 23	Dec 20 12:51:24 PM PST 23	2033920603 ps
T38	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.259255079	Dec 20 12:51:55 PM PST 23	Dec 20 12:53:35 PM PST 23	56877673743 ps
T129	/workspace/coverage/default/24.sysrst_ctrl_smoke.3553914847	Dec 20 12:50:59 PM PST 23	Dec 20 12:51:26 PM PST 23	2124115273 ps
T130	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3938890752	Dec 20 12:50:49 PM PST 23	Dec 20 12:51:24 PM PST 23	2468976748 ps
T49	/workspace/coverage/default/37.sysrst_ctrl_stress_all.2812983508	Dec 20 12:52:18 PM PST 23	Dec 20 12:53:04 PM PST 23	12561153992 ps
T53	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.2514130341	Dec 20 12:51:19 PM PST 23	Dec 20 12:51:42 PM PST 23	4412782625 ps
T54	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.3602754988	Dec 20 12:50:59 PM PST 23	Dec 20 12:51:33 PM PST 23	4107262936 ps
T175	/workspace/coverage/default/44.sysrst_ctrl_alert_test.2535764033	Dec 20 12:51:41 PM PST 23	Dec 20 12:51:52 PM PST 23	2131874075 ps
T51	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.312073369	Dec 20 12:49:55 PM PST 23	Dec 20 12:50:49 PM PST 23	3525542534 ps
T176	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3559045162	Dec 20 12:50:02 PM PST 23	Dec 20 12:50:49 PM PST 23	2533767982 ps
T65	/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1836564223	Dec 20 12:51:53 PM PST 23	Dec 20 12:52:13 PM PST 23	3034264218 ps
T452	/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.1694752586	Dec 20 12:51:08 PM PST 23	Dec 20 12:51:41 PM PST 23	4947148991 ps
T453	/workspace/coverage/default/1.sysrst_ctrl_smoke.4173225073	Dec 20 12:49:56 PM PST 23	Dec 20 12:50:47 PM PST 23	2107310707 ps
T74	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1821550014	Dec 20 12:50:42 PM PST 23	Dec 20 01:01:24 PM PST 23	3966393438611 ps
T395	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2185833163	Dec 20 12:49:59 PM PST 23	Dec 20 12:50:51 PM PST 23	2512787199 ps
T454	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1409702621	Dec 20 12:51:11 PM PST 23	Dec 20 12:51:34 PM PST 23	2243700312 ps
T455	/workspace/coverage/default/20.sysrst_ctrl_smoke.2024187020	Dec 20 12:50:29 PM PST 23	Dec 20 12:51:11 PM PST 23	2110054950 ps
T456	/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2076403873	Dec 20 12:51:48 PM PST 23	Dec 20 12:52:02 PM PST 23	2624363683 ps
T45	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2066474806	Dec 20 12:52:10 PM PST 23	Dec 20 12:53:06 PM PST 23	61258437124 ps
T146	/workspace/coverage/default/41.sysrst_ctrl_smoke.562464070	Dec 20 12:51:39 PM PST 23	Dec 20 12:51:52 PM PST 23	2126403192 ps
T147	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.370268124	Dec 20 12:51:33 PM PST 23	Dec 20 12:51:51 PM PST 23	2511700469 ps
T41	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.673079232	Dec 20 12:51:49 PM PST 23	Dec 20 12:55:51 PM PST 23	95277824896 ps
T148	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1006404903	Dec 20 12:51:42 PM PST 23	Dec 20 12:51:55 PM PST 23	2634589756 ps
T66	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1669712522	Dec 20 12:50:25 PM PST 23	Dec 20 12:52:38 PM PST 23	37031978998 ps
T149	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.663085678	Dec 20 12:50:03 PM PST 23	Dec 20 12:50:49 PM PST 23	11005397625 ps
T52	/workspace/coverage/default/23.sysrst_ctrl_stress_all.3287620469	Dec 20 12:51:01 PM PST 23	Dec 20 12:57:10 PM PST 23	533609553284 ps
T67	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.2157816665	Dec 20 12:51:08 PM PST 23	Dec 20 12:52:39 PM PST 23	57602815998 ps
T150	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2169130924	Dec 20 12:51:53 PM PST 23	Dec 20 12:52:10 PM PST 23	2482041177 ps
T279	/workspace/coverage/default/22.sysrst_ctrl_smoke.2576084665	Dec 20 12:50:35 PM PST 23	Dec 20 12:51:15 PM PST 23	2112040994 ps
T39	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2747508609	Dec 20 12:50:12 PM PST 23	Dec 20 12:51:38 PM PST 23	77905715807 ps
T40	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.1916166665	Dec 20 12:50:01 PM PST 23	Dec 20 12:52:39 PM PST 23	147641977354 ps
T457	/workspace/coverage/default/22.sysrst_ctrl_alert_test.3100891774	Dec 20 12:51:00 PM PST 23	Dec 20 12:51:30 PM PST 23	2010229172 ps
T458	/workspace/coverage/default/18.sysrst_ctrl_alert_test.636016934	Dec 20 12:52:07 PM PST 23	Dec 20 12:52:32 PM PST 23	2012942714 ps
T459	/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3263625207	Dec 20 12:50:49 PM PST 23	Dec 20 12:51:29 PM PST 23	3784383749 ps
T128	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3973698525	Dec 20 12:49:44 PM PST 23	Dec 20 12:54:35 PM PST 23	97343830594 ps
T171	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.4148533969	Dec 20 12:51:46 PM PST 23	Dec 20 12:52:00 PM PST 23	2911979283 ps
T460	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1767737357	Dec 20 12:50:59 PM PST 23	Dec 20 12:51:29 PM PST 23	3155927271 ps
T58	/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2673767457	Dec 20 12:52:02 PM PST 23	Dec 20 12:54:06 PM PST 23	40984957700 ps
T461	/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.1309110790	Dec 20 12:49:50 PM PST 23	Dec 20 12:50:43 PM PST 23	3696713188 ps
T462	/workspace/coverage/default/17.sysrst_ctrl_smoke.3958986170	Dec 20 12:50:33 PM PST 23	Dec 20 12:51:13 PM PST 23	2108430495 ps
T463	/workspace/coverage/default/26.sysrst_ctrl_alert_test.3493053638	Dec 20 12:50:53 PM PST 23	Dec 20 12:51:25 PM PST 23	2018100256 ps
T464	/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.85421209	Dec 20 12:49:39 PM PST 23	Dec 20 12:50:33 PM PST 23	3273713505 ps
T465	/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2497665664	Dec 20 12:50:52 PM PST 23	Dec 20 12:51:26 PM PST 23	2612796298 ps
T50	/workspace/coverage/default/39.sysrst_ctrl_stress_all.2738764654	Dec 20 12:51:41 PM PST 23	Dec 20 12:51:58 PM PST 23	10286719936 ps
T100	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.614944601	Dec 20 12:50:26 PM PST 23	Dec 20 12:51:13 PM PST 23	3943479164 ps
T466	/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.657495085	Dec 20 12:51:54 PM PST 23	Dec 20 12:52:10 PM PST 23	2462837586 ps
T467	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3097715037	Dec 20 12:51:46 PM PST 23	Dec 20 12:52:02 PM PST 23	2616071385 ps
T468	/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.837462804	Dec 20 12:50:06 PM PST 23	Dec 20 12:50:52 PM PST 23	2200090078 ps
T396	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.616176403	Dec 20 12:51:41 PM PST 23	Dec 20 12:51:58 PM PST 23	2509315899 ps
T469	/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.1166998863	Dec 20 12:51:17 PM PST 23	Dec 20 12:51:41 PM PST 23	2614899438 ps
T393	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1758829844	Dec 20 12:51:45 PM PST 23	Dec 20 12:52:00 PM PST 23	6703301613 ps
T470	/workspace/coverage/default/10.sysrst_ctrl_stress_all.1191268762	Dec 20 12:50:04 PM PST 23	Dec 20 12:51:12 PM PST 23	8680339492 ps
T101	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2061010332	Dec 20 12:51:00 PM PST 23	Dec 20 12:52:19 PM PST 23	92171783476 ps
T46	/workspace/coverage/default/11.sysrst_ctrl_stress_all.1260995146	Dec 20 12:50:24 PM PST 23	Dec 20 12:51:10 PM PST 23	6925671737 ps
T273	/workspace/coverage/default/30.sysrst_ctrl_combo_detect.2910541191	Dec 20 12:50:55 PM PST 23	Dec 20 12:52:21 PM PST 23	89374213340 ps
T285	/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.540408559	Dec 20 12:49:51 PM PST 23	Dec 20 12:50:40 PM PST 23	2538368802 ps
T75	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1138789337	Dec 20 12:51:31 PM PST 23	Dec 20 12:51:44 PM PST 23	2738906068 ps
T76	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3250202001	Dec 20 12:51:28 PM PST 23	Dec 20 12:54:44 PM PST 23	71002698041 ps
T157	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.2882734871	Dec 20 12:52:10 PM PST 23	Dec 20 12:52:33 PM PST 23	2516469778 ps
T158	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.3271962271	Dec 20 12:50:59 PM PST 23	Dec 20 12:54:07 PM PST 23	65437270430 ps
T60	/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1212922497	Dec 20 12:50:21 PM PST 23	Dec 20 12:52:05 PM PST 23	54791666080 ps
T159	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3639347048	Dec 20 12:51:57 PM PST 23	Dec 20 12:52:18 PM PST 23	2512898689 ps
T160	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2511430896	Dec 20 12:50:19 PM PST 23	Dec 20 12:50:58 PM PST 23	2475395561 ps
T61	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3373977430	Dec 20 12:50:59 PM PST 23	Dec 20 12:52:15 PM PST 23	76471743223 ps
T161	/workspace/coverage/default/37.sysrst_ctrl_alert_test.2716642762	Dec 20 12:51:15 PM PST 23	Dec 20 12:51:38 PM PST 23	2013269220 ps
T162	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1156644751	Dec 20 12:51:55 PM PST 23	Dec 20 12:52:19 PM PST 23	3377048070 ps
T42	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2534706087	Dec 20 12:51:46 PM PST 23	Dec 20 12:55:10 PM PST 23	76085018926 ps
T105	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.482958008	Dec 20 12:51:49 PM PST 23	Dec 20 12:52:39 PM PST 23	81493434645 ps
T288	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.3778476139	Dec 20 12:51:13 PM PST 23	Dec 20 12:53:04 PM PST 23	36715859858 ps
T81	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.2309369531	Dec 20 12:50:54 PM PST 23	Dec 20 12:56:25 PM PST 23	177737916139 ps
T471	/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1521130235	Dec 20 12:50:43 PM PST 23	Dec 20 12:51:20 PM PST 23	2472663525 ps
T472	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1080494065	Dec 20 12:50:27 PM PST 23	Dec 20 12:51:11 PM PST 23	2512810822 ps
T473	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3677742076	Dec 20 12:51:09 PM PST 23	Dec 20 12:51:32 PM PST 23	2492591346 ps
T88	/workspace/coverage/default/28.sysrst_ctrl_edge_detect.598580699	Dec 20 12:50:50 PM PST 23	Dec 20 12:51:24 PM PST 23	3284701766 ps
T47	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1295015672	Dec 20 12:50:16 PM PST 23	Dec 20 12:51:01 PM PST 23	2975732025 ps
T231	/workspace/coverage/default/47.sysrst_ctrl_alert_test.366306899	Dec 20 12:51:50 PM PST 23	Dec 20 12:52:05 PM PST 23	2087530532 ps
T43	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.945721603	Dec 20 12:50:49 PM PST 23	Dec 20 12:51:52 PM PST 23	86745066542 ps
T232	/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.2484101816	Dec 20 12:50:24 PM PST 23	Dec 20 12:51:03 PM PST 23	2140094640 ps
T233	/workspace/coverage/default/6.sysrst_ctrl_alert_test.3460756812	Dec 20 12:50:08 PM PST 23	Dec 20 12:50:51 PM PST 23	2058448343 ps
T97	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1851872698	Dec 20 12:50:58 PM PST 23	Dec 20 12:51:26 PM PST 23	3109935503 ps
T234	/workspace/coverage/default/11.sysrst_ctrl_alert_test.2527067472	Dec 20 12:50:13 PM PST 23	Dec 20 12:50:56 PM PST 23	2019311833 ps
T235	/workspace/coverage/default/35.sysrst_ctrl_stress_all.3093182370	Dec 20 12:51:31 PM PST 23	Dec 20 12:51:59 PM PST 23	88593003909 ps
T236	/workspace/coverage/default/6.sysrst_ctrl_stress_all.2443777456	Dec 20 12:50:14 PM PST 23	Dec 20 12:51:25 PM PST 23	11407220851 ps
T77	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2148561349	Dec 20 12:51:08 PM PST 23	Dec 20 12:52:27 PM PST 23	39069585139 ps
T219	/workspace/coverage/default/39.sysrst_ctrl_smoke.736084894	Dec 20 12:51:39 PM PST 23	Dec 20 12:51:55 PM PST 23	2109905799 ps
T220	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2277998456	Dec 20 12:50:05 PM PST 23	Dec 20 12:50:51 PM PST 23	2518652489 ps
T221	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.486522393	Dec 20 12:52:13 PM PST 23	Dec 20 12:55:02 PM PST 23	56744652411 ps
T222	/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2947057454	Dec 20 12:51:43 PM PST 23	Dec 20 12:51:59 PM PST 23	2019652147 ps
T223	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2840197258	Dec 20 12:51:42 PM PST 23	Dec 20 12:51:54 PM PST 23	2693807582 ps
T224	/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.443824441	Dec 20 12:51:40 PM PST 23	Dec 20 12:51:59 PM PST 23	3182754930 ps
T225	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1896528997	Dec 20 12:51:42 PM PST 23	Dec 20 12:52:00 PM PST 23	2512699863 ps
T78	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2994098651	Dec 20 12:50:16 PM PST 23	Dec 20 12:50:57 PM PST 23	8778729916 ps