| T603 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.820064039 |
|
|
Dec 20 12:51:25 PM PST 23 |
Dec 20 12:51:44 PM PST 23 |
2453008283 ps |
| T604 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.200785981 |
|
|
Dec 20 12:50:21 PM PST 23 |
Dec 20 12:51:01 PM PST 23 |
2100019681 ps |
| T605 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3335492835 |
|
|
Dec 20 12:51:43 PM PST 23 |
Dec 20 12:52:02 PM PST 23 |
3038349050 ps |
| T111 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1725689405 |
|
|
Dec 20 12:51:48 PM PST 23 |
Dec 20 12:52:57 PM PST 23 |
46926132353 ps |
| T606 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1494054028 |
|
|
Dec 20 12:50:20 PM PST 23 |
Dec 20 12:51:05 PM PST 23 |
2609792342 ps |
| T355 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2732112246 |
|
|
Dec 20 12:50:32 PM PST 23 |
Dec 20 12:55:30 PM PST 23 |
102029589624 ps |
| T607 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2362053107 |
|
|
Dec 20 12:50:07 PM PST 23 |
Dec 20 12:50:53 PM PST 23 |
2016954583 ps |
| T608 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2034158527 |
|
|
Dec 20 12:50:22 PM PST 23 |
Dec 20 12:53:08 PM PST 23 |
196212454056 ps |
| T609 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2118472693 |
|
|
Dec 20 12:49:51 PM PST 23 |
Dec 20 12:50:45 PM PST 23 |
2611499166 ps |
| T610 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.518492018 |
|
|
Dec 20 12:51:42 PM PST 23 |
Dec 20 12:51:55 PM PST 23 |
2458392212 ps |
| T611 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.1686177618 |
|
|
Dec 20 12:50:54 PM PST 23 |
Dec 20 12:51:26 PM PST 23 |
2009861613 ps |
| T612 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.1859987710 |
|
|
Dec 20 12:51:05 PM PST 23 |
Dec 20 12:51:28 PM PST 23 |
2036835832 ps |
| T613 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.1456497081 |
|
|
Dec 20 12:51:10 PM PST 23 |
Dec 20 12:51:30 PM PST 23 |
2196897050 ps |
| T614 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2797824950 |
|
|
Dec 20 12:50:07 PM PST 23 |
Dec 20 01:20:57 PM PST 23 |
808224333429 ps |
| T377 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3470494917 |
|
|
Dec 20 12:51:56 PM PST 23 |
Dec 20 12:56:19 PM PST 23 |
94000148456 ps |
| T615 |
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3326343691 |
|
|
Dec 20 12:51:51 PM PST 23 |
Dec 20 12:52:21 PM PST 23 |
58623208150 ps |
| T616 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.4253304135 |
|
|
Dec 20 12:51:42 PM PST 23 |
Dec 20 12:52:05 PM PST 23 |
63304400205 ps |
| T617 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1689518146 |
|
|
Dec 20 12:49:34 PM PST 23 |
Dec 20 12:50:31 PM PST 23 |
2225343447 ps |
| T618 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.581625407 |
|
|
Dec 20 12:50:16 PM PST 23 |
Dec 20 12:50:57 PM PST 23 |
2030782444 ps |
| T619 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1459795765 |
|
|
Dec 20 12:51:46 PM PST 23 |
Dec 20 12:52:00 PM PST 23 |
3414788874 ps |
| T620 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.2499337197 |
|
|
Dec 20 12:50:58 PM PST 23 |
Dec 20 12:51:26 PM PST 23 |
7217820616 ps |
| T177 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2121220667 |
|
|
Dec 20 12:51:00 PM PST 23 |
Dec 20 12:51:35 PM PST 23 |
3726715670 ps |
| T621 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.4213780309 |
|
|
Dec 20 12:51:55 PM PST 23 |
Dec 20 12:53:04 PM PST 23 |
42620235059 ps |
| T622 |
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2779219385 |
|
|
Dec 20 12:51:02 PM PST 23 |
Dec 20 12:51:31 PM PST 23 |
2467081593 ps |
| T623 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.1979775707 |
|
|
Dec 20 12:49:43 PM PST 23 |
Dec 20 12:50:41 PM PST 23 |
2723572175 ps |
| T624 |
/workspace/coverage/default/13.sysrst_ctrl_alert_test.3615805529 |
|
|
Dec 20 12:50:13 PM PST 23 |
Dec 20 12:50:56 PM PST 23 |
2021331662 ps |
| T390 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2958575076 |
|
|
Dec 20 12:50:23 PM PST 23 |
Dec 20 12:51:09 PM PST 23 |
27310149269 ps |
| T625 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3540476503 |
|
|
Dec 20 12:50:49 PM PST 23 |
Dec 20 12:51:19 PM PST 23 |
2550016034 ps |
| T626 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1315118171 |
|
|
Dec 20 12:51:46 PM PST 23 |
Dec 20 12:52:01 PM PST 23 |
2521187271 ps |
| T627 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.3640308046 |
|
|
Dec 20 12:50:59 PM PST 23 |
Dec 20 12:51:26 PM PST 23 |
2496924576 ps |
| T628 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.22603958 |
|
|
Dec 20 12:50:27 PM PST 23 |
Dec 20 12:51:06 PM PST 23 |
4872100756 ps |
| T629 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3431716619 |
|
|
Dec 20 12:51:41 PM PST 23 |
Dec 20 12:51:58 PM PST 23 |
2615433930 ps |
| T217 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.98851270 |
|
|
Dec 20 12:50:50 PM PST 23 |
Dec 20 12:53:34 PM PST 23 |
214889648694 ps |
| T364 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.933301319 |
|
|
Dec 20 12:51:56 PM PST 23 |
Dec 20 12:55:24 PM PST 23 |
84442827252 ps |
| T630 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2576304847 |
|
|
Dec 20 12:50:10 PM PST 23 |
Dec 20 12:50:58 PM PST 23 |
11522127470 ps |
| T631 |
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1431024832 |
|
|
Dec 20 12:50:31 PM PST 23 |
Dec 20 12:51:11 PM PST 23 |
3062192485 ps |
| T632 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.312106963 |
|
|
Dec 20 12:50:53 PM PST 23 |
Dec 20 12:51:26 PM PST 23 |
3024919297 ps |
| T633 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.388282838 |
|
|
Dec 20 12:51:39 PM PST 23 |
Dec 20 12:51:56 PM PST 23 |
2113324125 ps |
| T634 |
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3840899151 |
|
|
Dec 20 12:50:51 PM PST 23 |
Dec 20 12:51:21 PM PST 23 |
2129831858 ps |
| T635 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.536844884 |
|
|
Dec 20 12:51:29 PM PST 23 |
Dec 20 12:51:41 PM PST 23 |
2095658238 ps |
| T636 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2933458534 |
|
|
Dec 20 12:51:56 PM PST 23 |
Dec 20 12:52:12 PM PST 23 |
2532128526 ps |
| T637 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2677722419 |
|
|
Dec 20 12:49:53 PM PST 23 |
Dec 20 12:50:46 PM PST 23 |
5337051288 ps |
| T638 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1317615890 |
|
|
Dec 20 12:51:22 PM PST 23 |
Dec 20 12:51:38 PM PST 23 |
2882154773 ps |
| T639 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1467293395 |
|
|
Dec 20 12:51:52 PM PST 23 |
Dec 20 12:52:13 PM PST 23 |
2508881643 ps |
| T640 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.3528269697 |
|
|
Dec 20 12:50:05 PM PST 23 |
Dec 20 12:59:51 PM PST 23 |
204064909754 ps |
| T641 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.3417283625 |
|
|
Dec 20 12:50:35 PM PST 23 |
Dec 20 12:51:12 PM PST 23 |
2114424584 ps |
| T642 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1570891085 |
|
|
Dec 20 12:51:59 PM PST 23 |
Dec 20 12:52:21 PM PST 23 |
2778456758 ps |
| T112 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.4055651675 |
|
|
Dec 20 12:50:51 PM PST 23 |
Dec 20 12:52:55 PM PST 23 |
1022460701563 ps |
| T643 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.1725970901 |
|
|
Dec 20 12:50:13 PM PST 23 |
Dec 20 01:02:19 PM PST 23 |
3047039083346 ps |
| T187 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3029516424 |
|
|
Dec 20 12:51:41 PM PST 23 |
Dec 20 12:51:54 PM PST 23 |
4644721316 ps |
| T207 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1343019158 |
|
|
Dec 20 12:50:05 PM PST 23 |
Dec 20 12:51:50 PM PST 23 |
91454722799 ps |
| T208 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1217119183 |
|
|
Dec 20 12:49:57 PM PST 23 |
Dec 20 12:50:45 PM PST 23 |
3802435840 ps |
| T209 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3284692949 |
|
|
Dec 20 12:50:06 PM PST 23 |
Dec 20 12:50:55 PM PST 23 |
4043305018 ps |
| T210 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3230885056 |
|
|
Dec 20 12:51:07 PM PST 23 |
Dec 20 12:51:33 PM PST 23 |
4483247197 ps |
| T211 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2008567538 |
|
|
Dec 20 12:51:46 PM PST 23 |
Dec 20 12:52:01 PM PST 23 |
3744474557 ps |
| T212 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.1282968792 |
|
|
Dec 20 12:50:19 PM PST 23 |
Dec 20 12:50:57 PM PST 23 |
2212734276 ps |
| T213 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2389735795 |
|
|
Dec 20 12:51:07 PM PST 23 |
Dec 20 12:51:34 PM PST 23 |
2508920215 ps |
| T214 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1707633274 |
|
|
Dec 20 12:50:33 PM PST 23 |
Dec 20 12:52:41 PM PST 23 |
44981634406 ps |
| T215 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3945928313 |
|
|
Dec 20 12:49:51 PM PST 23 |
Dec 20 12:50:44 PM PST 23 |
2225117952 ps |
| T644 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.386276879 |
|
|
Dec 20 12:50:05 PM PST 23 |
Dec 20 12:50:50 PM PST 23 |
3759733747 ps |
| T371 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3672281487 |
|
|
Dec 20 12:52:05 PM PST 23 |
Dec 20 12:52:46 PM PST 23 |
69768674322 ps |
| T645 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.461584475 |
|
|
Dec 20 12:50:53 PM PST 23 |
Dec 20 12:51:25 PM PST 23 |
2616160898 ps |
| T646 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.4230328332 |
|
|
Dec 20 12:50:02 PM PST 23 |
Dec 20 12:50:48 PM PST 23 |
2215820212 ps |
| T262 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.3404592333 |
|
|
Dec 20 12:50:34 PM PST 23 |
Dec 20 12:51:17 PM PST 23 |
3627314858 ps |
| T647 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3169577691 |
|
|
Dec 20 12:50:08 PM PST 23 |
Dec 20 12:50:52 PM PST 23 |
2459583578 ps |
| T648 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.789390124 |
|
|
Dec 20 12:51:18 PM PST 23 |
Dec 20 12:51:36 PM PST 23 |
2129252082 ps |
| T649 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.2429584786 |
|
|
Dec 20 12:51:40 PM PST 23 |
Dec 20 12:51:53 PM PST 23 |
2026920741 ps |
| T650 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.4212462808 |
|
|
Dec 20 12:51:52 PM PST 23 |
Dec 20 12:52:13 PM PST 23 |
5269965381 ps |
| T113 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.55873716 |
|
|
Dec 20 12:51:49 PM PST 23 |
Dec 20 12:54:55 PM PST 23 |
74139683711 ps |
| T354 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.127235357 |
|
|
Dec 20 12:52:08 PM PST 23 |
Dec 20 12:57:23 PM PST 23 |
118015577881 ps |
| T651 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1747118023 |
|
|
Dec 20 12:50:50 PM PST 23 |
Dec 20 12:51:25 PM PST 23 |
2508018076 ps |
| T169 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.3404497709 |
|
|
Dec 20 12:50:19 PM PST 23 |
Dec 20 12:51:06 PM PST 23 |
15690512251 ps |
| T652 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3401785971 |
|
|
Dec 20 12:51:21 PM PST 23 |
Dec 20 12:51:45 PM PST 23 |
3707048053 ps |
| T114 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1033470071 |
|
|
Dec 20 12:50:35 PM PST 23 |
Dec 20 12:51:50 PM PST 23 |
89165208679 ps |
| T653 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3077242064 |
|
|
Dec 20 12:51:27 PM PST 23 |
Dec 20 12:51:42 PM PST 23 |
4103762050 ps |
| T170 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2425929186 |
|
|
Dec 20 12:51:29 PM PST 23 |
Dec 20 12:53:55 PM PST 23 |
113052877764 ps |
| T654 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.2276607930 |
|
|
Dec 20 12:50:55 PM PST 23 |
Dec 20 12:51:25 PM PST 23 |
2613753564 ps |
| T655 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.3059177773 |
|
|
Dec 20 12:50:59 PM PST 23 |
Dec 20 12:51:30 PM PST 23 |
2113278356 ps |
| T656 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2453857607 |
|
|
Dec 20 12:50:48 PM PST 23 |
Dec 20 12:51:19 PM PST 23 |
2484059725 ps |
| T657 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.9223080 |
|
|
Dec 20 12:50:08 PM PST 23 |
Dec 20 12:50:51 PM PST 23 |
2643332481 ps |
| T658 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.236307350 |
|
|
Dec 20 12:52:01 PM PST 23 |
Dec 20 12:52:54 PM PST 23 |
55241199127 ps |
| T659 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1538944234 |
|
|
Dec 20 12:51:51 PM PST 23 |
Dec 20 12:52:54 PM PST 23 |
17801015418 ps |
| T660 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2651003864 |
|
|
Dec 20 12:51:45 PM PST 23 |
Dec 20 12:51:58 PM PST 23 |
2101213217 ps |
| T661 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1198594755 |
|
|
Dec 20 12:50:49 PM PST 23 |
Dec 20 12:52:04 PM PST 23 |
113243878986 ps |
| T662 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3781937967 |
|
|
Dec 20 12:51:51 PM PST 23 |
Dec 20 12:52:11 PM PST 23 |
2186617133 ps |
| T663 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2940093951 |
|
|
Dec 20 12:51:46 PM PST 23 |
Dec 20 12:51:59 PM PST 23 |
2635766237 ps |
| T664 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.4169776093 |
|
|
Dec 20 12:49:51 PM PST 23 |
Dec 20 12:50:45 PM PST 23 |
2108126561 ps |
| T665 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.305159048 |
|
|
Dec 20 12:49:54 PM PST 23 |
Dec 20 12:50:46 PM PST 23 |
2346616993 ps |
| T378 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3284929290 |
|
|
Dec 20 12:50:24 PM PST 23 |
Dec 20 12:51:19 PM PST 23 |
37153693609 ps |
| T666 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.3766033231 |
|
|
Dec 20 12:51:00 PM PST 23 |
Dec 20 12:51:31 PM PST 23 |
3079689788 ps |
| T667 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.3973328573 |
|
|
Dec 20 12:50:11 PM PST 23 |
Dec 20 12:50:57 PM PST 23 |
2111111468 ps |
| T668 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.4254231393 |
|
|
Dec 20 12:50:34 PM PST 23 |
Dec 20 12:51:14 PM PST 23 |
4343451647 ps |
| T669 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.2471108558 |
|
|
Dec 20 12:50:03 PM PST 23 |
Dec 20 12:50:49 PM PST 23 |
2033932996 ps |
| T670 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.1120312238 |
|
|
Dec 20 12:50:12 PM PST 23 |
Dec 20 12:51:00 PM PST 23 |
2459382318 ps |
| T671 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3008653061 |
|
|
Dec 20 12:51:07 PM PST 23 |
Dec 20 12:51:29 PM PST 23 |
2123798302 ps |
| T289 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.1419666914 |
|
|
Dec 20 12:49:58 PM PST 23 |
Dec 20 12:51:11 PM PST 23 |
42096269685 ps |
| T305 |
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.60599957 |
|
|
Dec 20 12:50:55 PM PST 23 |
Dec 20 12:51:29 PM PST 23 |
2608751373 ps |
| T306 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.496975367 |
|
|
Dec 20 12:50:51 PM PST 23 |
Dec 20 12:51:23 PM PST 23 |
7430055032 ps |
| T307 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2516801556 |
|
|
Dec 20 12:49:50 PM PST 23 |
Dec 20 12:50:44 PM PST 23 |
7174291813 ps |
| T308 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2221992325 |
|
|
Dec 20 12:51:55 PM PST 23 |
Dec 20 12:52:36 PM PST 23 |
9294768883 ps |
| T309 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.135794182 |
|
|
Dec 20 12:50:21 PM PST 23 |
Dec 20 12:51:30 PM PST 23 |
124432027636 ps |
| T310 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all.4136968003 |
|
|
Dec 20 12:49:47 PM PST 23 |
Dec 20 12:50:58 PM PST 23 |
8942742828 ps |
| T311 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1657895441 |
|
|
Dec 20 12:49:51 PM PST 23 |
Dec 20 01:03:46 PM PST 23 |
287179339861 ps |
| T312 |
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.373297284 |
|
|
Dec 20 12:51:50 PM PST 23 |
Dec 20 12:52:10 PM PST 23 |
2224409758 ps |
| T313 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.993079311 |
|
|
Dec 20 12:50:02 PM PST 23 |
Dec 20 12:50:50 PM PST 23 |
2588384470 ps |
| T115 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1892545781 |
|
|
Dec 20 12:51:46 PM PST 23 |
Dec 20 12:55:50 PM PST 23 |
88927035963 ps |
| T672 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3945595794 |
|
|
Dec 20 12:51:41 PM PST 23 |
Dec 20 12:51:52 PM PST 23 |
2629278046 ps |
| T673 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.989823917 |
|
|
Dec 20 12:51:42 PM PST 23 |
Dec 20 12:51:58 PM PST 23 |
3559216803 ps |
| T674 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.3766776675 |
|
|
Dec 20 12:50:51 PM PST 23 |
Dec 20 12:51:25 PM PST 23 |
15305964884 ps |
| T189 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1482223259 |
|
|
Dec 20 12:52:00 PM PST 23 |
Dec 20 12:52:21 PM PST 23 |
3120731505 ps |
| T286 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.178045107 |
|
|
Dec 20 12:51:51 PM PST 23 |
Dec 20 12:53:05 PM PST 23 |
36494187445 ps |
| T675 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.292563499 |
|
|
Dec 20 12:51:00 PM PST 23 |
Dec 20 12:51:38 PM PST 23 |
15783346769 ps |
| T676 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2323594287 |
|
|
Dec 20 12:50:08 PM PST 23 |
Dec 20 12:52:00 PM PST 23 |
105435260023 ps |
| T677 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.2904171326 |
|
|
Dec 20 12:52:03 PM PST 23 |
Dec 20 12:52:27 PM PST 23 |
2510578600 ps |
| T678 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.1403265148 |
|
|
Dec 20 12:49:46 PM PST 23 |
Dec 20 12:50:41 PM PST 23 |
2012878456 ps |
| T679 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4020713930 |
|
|
Dec 20 12:51:49 PM PST 23 |
Dec 20 12:52:09 PM PST 23 |
2189932470 ps |
| T680 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3486033248 |
|
|
Dec 20 12:50:48 PM PST 23 |
Dec 20 12:51:22 PM PST 23 |
3259119286 ps |
| T681 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2321507715 |
|
|
Dec 20 12:52:14 PM PST 23 |
Dec 20 12:54:10 PM PST 23 |
143351133252 ps |
| T682 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3009833624 |
|
|
Dec 20 12:50:28 PM PST 23 |
Dec 20 12:52:12 PM PST 23 |
31568277141 ps |
| T683 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2771145954 |
|
|
Dec 20 12:50:47 PM PST 23 |
Dec 20 12:51:18 PM PST 23 |
2178560772 ps |
| T684 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.282453548 |
|
|
Dec 20 12:50:20 PM PST 23 |
Dec 20 12:51:05 PM PST 23 |
2453822436 ps |
| T206 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2943638074 |
|
|
Dec 20 12:51:13 PM PST 23 |
Dec 20 12:51:39 PM PST 23 |
3338110219 ps |
| T152 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3404283713 |
|
|
Dec 20 12:50:21 PM PST 23 |
Dec 20 12:51:06 PM PST 23 |
6748359028 ps |
| T685 |
/workspace/coverage/default/40.sysrst_ctrl_alert_test.3815110834 |
|
|
Dec 20 12:51:45 PM PST 23 |
Dec 20 12:51:58 PM PST 23 |
2042498106 ps |
| T686 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1215570350 |
|
|
Dec 20 12:51:51 PM PST 23 |
Dec 20 12:52:13 PM PST 23 |
2633656436 ps |
| T687 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3088174902 |
|
|
Dec 20 12:51:00 PM PST 23 |
Dec 20 12:51:26 PM PST 23 |
2542470963 ps |
| T688 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.524504670 |
|
|
Dec 20 12:50:28 PM PST 23 |
Dec 20 12:51:07 PM PST 23 |
2481780537 ps |
| T689 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1669623012 |
|
|
Dec 20 12:50:16 PM PST 23 |
Dec 20 12:51:00 PM PST 23 |
2018372367 ps |
| T348 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.9176305 |
|
|
Dec 20 12:50:02 PM PST 23 |
Dec 20 12:52:43 PM PST 23 |
83698369022 ps |
| T690 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.3087252724 |
|
|
Dec 20 12:51:11 PM PST 23 |
Dec 20 12:51:31 PM PST 23 |
2134606011 ps |
| T691 |
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.1756685720 |
|
|
Dec 20 12:51:00 PM PST 23 |
Dec 20 12:51:26 PM PST 23 |
2140693473 ps |
| T155 |
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.1156596336 |
|
|
Dec 20 12:51:41 PM PST 23 |
Dec 20 12:51:53 PM PST 23 |
3222584717 ps |
| T346 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3918338745 |
|
|
Dec 20 12:51:54 PM PST 23 |
Dec 20 12:57:28 PM PST 23 |
116730877397 ps |
| T692 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3120444314 |
|
|
Dec 20 12:51:29 PM PST 23 |
Dec 20 12:51:44 PM PST 23 |
2617932578 ps |
| T693 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1342658830 |
|
|
Dec 20 12:51:50 PM PST 23 |
Dec 20 12:54:29 PM PST 23 |
80519721480 ps |
| T370 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.296910035 |
|
|
Dec 20 12:52:01 PM PST 23 |
Dec 20 12:53:45 PM PST 23 |
62977819453 ps |
| T261 |
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1616996590 |
|
|
Dec 20 12:51:50 PM PST 23 |
Dec 20 12:52:07 PM PST 23 |
5152927188 ps |
| T694 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.339764373 |
|
|
Dec 20 12:49:43 PM PST 23 |
Dec 20 12:54:28 PM PST 23 |
90297921269 ps |
| T695 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2610464420 |
|
|
Dec 20 12:51:26 PM PST 23 |
Dec 20 12:51:44 PM PST 23 |
3928620308 ps |
| T696 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.2912178424 |
|
|
Dec 20 12:51:53 PM PST 23 |
Dec 20 12:52:11 PM PST 23 |
2118492308 ps |
| T350 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1662460560 |
|
|
Dec 20 12:50:30 PM PST 23 |
Dec 20 12:51:27 PM PST 23 |
61999140541 ps |
| T697 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2379416583 |
|
|
Dec 20 12:51:33 PM PST 23 |
Dec 20 12:51:51 PM PST 23 |
5468170697 ps |
| T698 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.3649240474 |
|
|
Dec 20 12:50:34 PM PST 23 |
Dec 20 12:51:19 PM PST 23 |
15493482639 ps |
| T699 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3423591803 |
|
|
Dec 20 12:51:15 PM PST 23 |
Dec 20 12:52:04 PM PST 23 |
12184776183 ps |
| T700 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.739596924 |
|
|
Dec 20 12:50:13 PM PST 23 |
Dec 20 12:51:00 PM PST 23 |
2512073249 ps |
| T701 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2064657539 |
|
|
Dec 20 12:50:03 PM PST 23 |
Dec 20 12:50:57 PM PST 23 |
3567640066 ps |
| T702 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.1103396180 |
|
|
Dec 20 12:49:56 PM PST 23 |
Dec 20 12:50:47 PM PST 23 |
7901633979 ps |
| T703 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.674349876 |
|
|
Dec 20 12:50:13 PM PST 23 |
Dec 20 12:50:55 PM PST 23 |
2133053840 ps |
| T192 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.243396250 |
|
|
Dec 20 12:50:01 PM PST 23 |
Dec 20 12:50:53 PM PST 23 |
3185319925 ps |
| T704 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3863618106 |
|
|
Dec 20 12:51:24 PM PST 23 |
Dec 20 12:51:39 PM PST 23 |
2266684656 ps |
| T705 |
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.994143058 |
|
|
Dec 20 12:51:55 PM PST 23 |
Dec 20 12:53:46 PM PST 23 |
35043692457 ps |
| T706 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.63434588 |
|
|
Dec 20 12:51:51 PM PST 23 |
Dec 20 12:52:29 PM PST 23 |
8859246729 ps |
| T259 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.1611274359 |
|
|
Dec 20 12:50:31 PM PST 23 |
Dec 20 12:51:11 PM PST 23 |
2435526473 ps |
| T707 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1154631280 |
|
|
Dec 20 12:50:05 PM PST 23 |
Dec 20 12:50:52 PM PST 23 |
2469277261 ps |
| T380 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3792581056 |
|
|
Dec 20 12:50:02 PM PST 23 |
Dec 20 12:51:18 PM PST 23 |
128571856182 ps |
| T708 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.28226709 |
|
|
Dec 20 12:50:16 PM PST 23 |
Dec 20 12:51:00 PM PST 23 |
2461579853 ps |
| T709 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.2041499875 |
|
|
Dec 20 12:51:10 PM PST 23 |
Dec 20 12:51:35 PM PST 23 |
2008911178 ps |
| T710 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.1974002111 |
|
|
Dec 20 12:50:07 PM PST 23 |
Dec 20 12:50:53 PM PST 23 |
2117323624 ps |
| T711 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3844203822 |
|
|
Dec 20 12:51:53 PM PST 23 |
Dec 20 12:52:11 PM PST 23 |
2249569941 ps |
| T712 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2269460651 |
|
|
Dec 20 12:49:48 PM PST 23 |
Dec 20 12:50:44 PM PST 23 |
2459531177 ps |
| T163 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.1934837897 |
|
|
Dec 20 12:52:10 PM PST 23 |
Dec 20 12:52:31 PM PST 23 |
3803270733 ps |
| T713 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3858056276 |
|
|
Dec 20 12:50:35 PM PST 23 |
Dec 20 12:52:13 PM PST 23 |
97204396200 ps |
| T143 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3240521304 |
|
|
Dec 20 12:51:42 PM PST 23 |
Dec 20 12:51:59 PM PST 23 |
7724234725 ps |
| T387 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.705011966 |
|
|
Dec 20 12:51:40 PM PST 23 |
Dec 20 12:52:00 PM PST 23 |
47059916372 ps |
| T714 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3132719284 |
|
|
Dec 20 12:51:09 PM PST 23 |
Dec 20 12:51:34 PM PST 23 |
3741618052 ps |
| T715 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2757490061 |
|
|
Dec 20 12:50:07 PM PST 23 |
Dec 20 12:50:51 PM PST 23 |
2497470574 ps |
| T716 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1788344918 |
|
|
Dec 20 12:50:11 PM PST 23 |
Dec 20 12:51:03 PM PST 23 |
4260076906 ps |
| T717 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.397641389 |
|
|
Dec 20 12:50:52 PM PST 23 |
Dec 20 12:51:24 PM PST 23 |
2618563763 ps |
| T283 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.407501556 |
|
|
Dec 20 12:50:07 PM PST 23 |
Dec 20 12:51:22 PM PST 23 |
25609844326 ps |
| T718 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.4088141426 |
|
|
Dec 20 12:50:48 PM PST 23 |
Dec 20 12:51:18 PM PST 23 |
2690896210 ps |
| T388 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.269878790 |
|
|
Dec 20 12:51:54 PM PST 23 |
Dec 20 12:53:03 PM PST 23 |
87451238735 ps |
| T719 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.2612648487 |
|
|
Dec 20 12:50:53 PM PST 23 |
Dec 20 12:51:22 PM PST 23 |
2029737051 ps |
| T720 |
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3821753487 |
|
|
Dec 20 12:51:25 PM PST 23 |
Dec 20 12:51:39 PM PST 23 |
3473204713 ps |
| T721 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.4223211949 |
|
|
Dec 20 12:50:56 PM PST 23 |
Dec 20 12:51:46 PM PST 23 |
114265879790 ps |
| T722 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1195046969 |
|
|
Dec 20 12:50:53 PM PST 23 |
Dec 20 12:51:25 PM PST 23 |
2518277206 ps |
| T723 |
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1328416164 |
|
|
Dec 20 12:51:53 PM PST 23 |
Dec 20 12:53:11 PM PST 23 |
49159034887 ps |
| T724 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1653730528 |
|
|
Dec 20 12:51:49 PM PST 23 |
Dec 20 12:52:04 PM PST 23 |
3792259320 ps |
| T725 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.3997523495 |
|
|
Dec 20 12:50:16 PM PST 23 |
Dec 20 12:51:02 PM PST 23 |
2753374532 ps |
| T144 |
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.436064963 |
|
|
Dec 20 12:50:16 PM PST 23 |
Dec 20 12:56:42 PM PST 23 |
1626968842225 ps |
| T726 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.1597088650 |
|
|
Dec 20 12:50:16 PM PST 23 |
Dec 20 12:51:48 PM PST 23 |
86594548192 ps |
| T290 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.821990876 |
|
|
Dec 20 12:50:03 PM PST 23 |
Dec 20 12:52:30 PM PST 23 |
42011156461 ps |
| T727 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2422451184 |
|
|
Dec 20 12:50:31 PM PST 23 |
Dec 20 12:51:13 PM PST 23 |
4049595936 ps |
| T193 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.1601298797 |
|
|
Dec 20 12:50:33 PM PST 23 |
Dec 20 12:51:10 PM PST 23 |
4043084672 ps |
| T145 |
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2628484276 |
|
|
Dec 20 12:50:25 PM PST 23 |
Dec 20 12:51:06 PM PST 23 |
8728564743 ps |
| T265 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3511687554 |
|
|
Dec 20 12:51:13 PM PST 23 |
Dec 20 12:53:40 PM PST 23 |
47333827180 ps |
| T373 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.846398076 |
|
|
Dec 20 12:51:55 PM PST 23 |
Dec 20 12:54:36 PM PST 23 |
115973182119 ps |
| T264 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1437448160 |
|
|
Dec 20 12:51:53 PM PST 23 |
Dec 20 12:56:50 PM PST 23 |
168620317240 ps |
| T284 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.367603801 |
|
|
Dec 20 12:50:30 PM PST 23 |
Dec 20 12:54:46 PM PST 23 |
88113097558 ps |
| T83 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2009498905 |
|
|
Dec 20 12:51:41 PM PST 23 |
Dec 20 12:54:31 PM PST 23 |
112839934817 ps |
| T728 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.4259523072 |
|
|
Dec 20 12:51:09 PM PST 23 |
Dec 20 12:56:57 PM PST 23 |
114941268248 ps |
| T729 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1058931031 |
|
|
Dec 20 12:51:42 PM PST 23 |
Dec 20 12:52:00 PM PST 23 |
2832574449 ps |
| T730 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1700875530 |
|
|
Dec 20 12:49:54 PM PST 23 |
Dec 20 12:50:42 PM PST 23 |
2530971808 ps |
| T731 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2516609736 |
|
|
Dec 20 12:50:11 PM PST 23 |
Dec 20 12:50:54 PM PST 23 |
2637432980 ps |
| T367 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1260095218 |
|
|
Dec 20 12:50:06 PM PST 23 |
Dec 20 12:52:01 PM PST 23 |
106024116653 ps |
| T732 |
/workspace/coverage/default/47.sysrst_ctrl_smoke.775530796 |
|
|
Dec 20 12:51:52 PM PST 23 |
Dec 20 12:52:13 PM PST 23 |
2111325030 ps |
| T733 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.1866501217 |
|
|
Dec 20 12:50:53 PM PST 23 |
Dec 20 12:51:25 PM PST 23 |
2718303194 ps |
| T734 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1947081943 |
|
|
Dec 20 12:52:09 PM PST 23 |
Dec 20 12:53:22 PM PST 23 |
90196109669 ps |
| T735 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.2768141124 |
|
|
Dec 20 12:51:17 PM PST 23 |
Dec 20 12:51:37 PM PST 23 |
2942895617 ps |
| T736 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.2323118303 |
|
|
Dec 20 12:51:17 PM PST 23 |
Dec 20 12:51:37 PM PST 23 |
2457824221 ps |
| T737 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.4252439475 |
|
|
Dec 20 12:51:49 PM PST 23 |
Dec 20 12:55:17 PM PST 23 |
138723767941 ps |
| T738 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.722052770 |
|
|
Dec 20 12:52:02 PM PST 23 |
Dec 20 12:52:21 PM PST 23 |
2527209787 ps |
| T351 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.318983185 |
|
|
Dec 20 12:51:22 PM PST 23 |
Dec 20 12:52:30 PM PST 23 |
82216433084 ps |
| T739 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1879248917 |
|
|
Dec 20 12:50:31 PM PST 23 |
Dec 20 12:51:13 PM PST 23 |
2043196502 ps |
| T740 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.997744747 |
|
|
Dec 20 12:50:12 PM PST 23 |
Dec 20 12:50:56 PM PST 23 |
2617527989 ps |
| T741 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2420460416 |
|
|
Dec 20 12:51:56 PM PST 23 |
Dec 20 12:52:16 PM PST 23 |
2014927995 ps |
| T742 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1515368627 |
|
|
Dec 20 12:52:06 PM PST 23 |
Dec 20 12:52:29 PM PST 23 |
11478092714 ps |
| T743 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1093562991 |
|
|
Dec 20 12:50:02 PM PST 23 |
Dec 20 12:51:43 PM PST 23 |
22559343620 ps |
| T744 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1072508233 |
|
|
Dec 20 12:51:46 PM PST 23 |
Dec 20 12:52:03 PM PST 23 |
4310326526 ps |
| T745 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3976740308 |
|
|
Dec 20 12:51:23 PM PST 23 |
Dec 20 12:51:42 PM PST 23 |
9527594757 ps |
| T746 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.2604022384 |
|
|
Dec 20 12:50:49 PM PST 23 |
Dec 20 12:52:12 PM PST 23 |
77287487574 ps |
| T747 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2981521681 |
|
|
Dec 20 12:51:53 PM PST 23 |
Dec 20 12:52:44 PM PST 23 |
50986155953 ps |
| T748 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2193735582 |
|
|
Dec 20 12:49:58 PM PST 23 |
Dec 20 12:50:49 PM PST 23 |
2015792312 ps |
| T86 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3592333573 |
|
|
Dec 20 12:49:39 PM PST 23 |
Dec 20 12:50:56 PM PST 23 |
33862004722 ps |
| T274 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.844985500 |
|
|
Dec 20 12:51:59 PM PST 23 |
Dec 20 12:57:03 PM PST 23 |
115200413521 ps |
| T749 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.1793974854 |
|
|
Dec 20 12:52:06 PM PST 23 |
Dec 20 12:52:26 PM PST 23 |
2131461668 ps |
| T750 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.750588833 |
|
|
Dec 20 12:50:26 PM PST 23 |
Dec 20 12:51:04 PM PST 23 |
2537625011 ps |
| T751 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1055200968 |
|
|
Dec 20 12:51:27 PM PST 23 |
Dec 20 12:51:45 PM PST 23 |
2611981146 ps |
| T752 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1019732254 |
|
|
Dec 20 12:49:57 PM PST 23 |
Dec 20 12:50:48 PM PST 23 |
2048024608 ps |
| T291 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.262781640 |
|
|
Dec 20 12:49:49 PM PST 23 |
Dec 20 12:51:27 PM PST 23 |
42034291092 ps |
| T753 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2888805033 |
|
|
Dec 20 12:51:51 PM PST 23 |
Dec 20 12:52:40 PM PST 23 |
26585195086 ps |
| T754 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all.3523384211 |
|
|
Dec 20 12:50:27 PM PST 23 |
Dec 20 01:02:37 PM PST 23 |
288449369103 ps |
| T755 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3745749080 |
|
|
Dec 20 12:50:16 PM PST 23 |
Dec 20 12:50:56 PM PST 23 |
2194250469 ps |
| T756 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1227869508 |
|
|
Dec 20 12:51:42 PM PST 23 |
Dec 20 12:52:01 PM PST 23 |
2611009199 ps |
| T757 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.4074490670 |
|
|
Dec 20 12:51:21 PM PST 23 |
Dec 20 12:51:37 PM PST 23 |
2047421755 ps |
| T758 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.16137589 |
|
|
Dec 20 12:51:13 PM PST 23 |
Dec 20 12:51:34 PM PST 23 |
2480294798 ps |
| T759 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.1970306003 |
|
|
Dec 20 12:51:05 PM PST 23 |
Dec 20 12:51:27 PM PST 23 |
2505179728 ps |
| T760 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2287338645 |
|
|
Dec 20 12:51:17 PM PST 23 |
Dec 20 12:51:40 PM PST 23 |
3735505594 ps |
| T761 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2708999677 |
|
|
Dec 20 12:50:34 PM PST 23 |
Dec 20 12:51:10 PM PST 23 |
4200355049 ps |
| T762 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1502171942 |
|
|
Dec 20 12:51:54 PM PST 23 |
Dec 20 12:52:10 PM PST 23 |
2525370843 ps |
| T344 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.1960161048 |
|
|
Dec 20 12:50:41 PM PST 23 |
Dec 20 12:51:51 PM PST 23 |
165777188483 ps |
| T116 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.179249820 |
|
|
Dec 20 12:52:04 PM PST 23 |
Dec 20 12:52:25 PM PST 23 |
3307068807 ps |
| T763 |
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.1339083538 |
|
|
Dec 20 12:51:24 PM PST 23 |
Dec 20 12:51:40 PM PST 23 |
2207973215 ps |
| T764 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.4008489726 |
|
|
Dec 20 12:51:40 PM PST 23 |
Dec 20 12:51:53 PM PST 23 |
2630705441 ps |
| T765 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3808942535 |
|
|
Dec 20 12:51:36 PM PST 23 |
Dec 20 12:51:54 PM PST 23 |
2459552457 ps |
| T766 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3687913846 |
|
|
Dec 20 12:50:13 PM PST 23 |
Dec 20 12:50:58 PM PST 23 |
9334388988 ps |
| T767 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3226861360 |
|
|
Dec 20 12:51:41 PM PST 23 |
Dec 20 12:56:05 PM PST 23 |
99542722257 ps |
| T768 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.56037293 |
|
|
Dec 20 12:50:11 PM PST 23 |
Dec 20 12:50:58 PM PST 23 |
2510761909 ps |
| T769 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2823578302 |
|
|
Dec 20 12:50:06 PM PST 23 |
Dec 20 12:50:51 PM PST 23 |
2480584510 ps |
| T770 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.2366199390 |
|
|
Dec 20 12:51:23 PM PST 23 |
Dec 20 12:51:38 PM PST 23 |
3506683603 ps |
| T771 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1877231978 |
|
|
Dec 20 12:50:52 PM PST 23 |
Dec 20 12:51:56 PM PST 23 |
55529520639 ps |
| T772 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3877384408 |
|
|
Dec 20 12:51:51 PM PST 23 |
Dec 20 12:52:09 PM PST 23 |
2476608857 ps |
| T773 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.924418919 |
|
|
Dec 20 12:50:31 PM PST 23 |
Dec 20 12:51:13 PM PST 23 |
2110941637 ps |
| T303 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1383789589 |
|
|
Dec 20 12:49:54 PM PST 23 |
Dec 20 12:51:35 PM PST 23 |
22009789044 ps |
| T774 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.2163506818 |
|
|
Dec 20 12:50:54 PM PST 23 |
Dec 20 12:51:27 PM PST 23 |
2011821558 ps |
| T775 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3895997574 |
|
|
Dec 20 12:50:52 PM PST 23 |
Dec 20 12:51:26 PM PST 23 |
5727322791 ps |
| T776 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2688042963 |
|
|
Dec 20 12:50:21 PM PST 23 |
Dec 20 12:53:03 PM PST 23 |
46015806678 ps |
| T777 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3195684353 |
|
|
Dec 20 12:50:23 PM PST 23 |
Dec 20 12:51:07 PM PST 23 |
2513299383 ps |
| T778 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2206371020 |
|
|
Dec 20 12:50:05 PM PST 23 |
Dec 20 12:50:55 PM PST 23 |
2511704210 ps |
| T195 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.35705324 |
|
|
Dec 20 12:51:51 PM PST 23 |
Dec 20 12:52:12 PM PST 23 |
2658829914 ps |
| T779 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.4211529004 |
|
|
Dec 20 12:50:50 PM PST 23 |
Dec 20 12:51:21 PM PST 23 |
3612235896 ps |