| T292 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.1841390326 |
|
|
Feb 04 01:27:46 PM PST 24 |
Feb 04 01:29:40 PM PST 24 |
42011275768 ps |
| T308 |
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1101549898 |
|
|
Feb 04 01:28:58 PM PST 24 |
Feb 04 01:29:06 PM PST 24 |
2615941131 ps |
| T96 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.668093936 |
|
|
Feb 04 01:30:13 PM PST 24 |
Feb 04 01:32:21 PM PST 24 |
204320040314 ps |
| T97 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.75078043 |
|
|
Feb 04 01:31:38 PM PST 24 |
Feb 04 01:32:54 PM PST 24 |
26582159607 ps |
| T282 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.2396476242 |
|
|
Feb 04 01:28:59 PM PST 24 |
Feb 04 01:29:09 PM PST 24 |
2509933553 ps |
| T98 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3675772823 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:29:09 PM PST 24 |
23621866842 ps |
| T283 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3937239386 |
|
|
Feb 04 01:30:31 PM PST 24 |
Feb 04 01:32:57 PM PST 24 |
52403612715 ps |
| T231 |
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.1054371699 |
|
|
Feb 04 01:30:08 PM PST 24 |
Feb 04 01:30:18 PM PST 24 |
2888286730 ps |
| T309 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2738530939 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:29:09 PM PST 24 |
3475867839 ps |
| T310 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1181111284 |
|
|
Feb 04 01:31:43 PM PST 24 |
Feb 04 01:31:53 PM PST 24 |
2623251465 ps |
| T50 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.1731066268 |
|
|
Feb 04 01:29:40 PM PST 24 |
Feb 04 01:30:26 PM PST 24 |
17896807221 ps |
| T487 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.1062384379 |
|
|
Feb 04 01:30:34 PM PST 24 |
Feb 04 01:30:47 PM PST 24 |
2022020875 ps |
| T488 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2641882102 |
|
|
Feb 04 01:28:25 PM PST 24 |
Feb 04 01:28:33 PM PST 24 |
2033809643 ps |
| T336 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.795009984 |
|
|
Feb 04 01:29:24 PM PST 24 |
Feb 04 01:35:24 PM PST 24 |
134993717835 ps |
| T489 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.1666233613 |
|
|
Feb 04 01:27:46 PM PST 24 |
Feb 04 01:27:53 PM PST 24 |
2115846233 ps |
| T68 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3873666175 |
|
|
Feb 04 01:31:41 PM PST 24 |
Feb 04 01:31:54 PM PST 24 |
8012509202 ps |
| T490 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3181703068 |
|
|
Feb 04 01:30:05 PM PST 24 |
Feb 04 01:30:17 PM PST 24 |
2610220422 ps |
| T160 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1761085503 |
|
|
Feb 04 01:31:14 PM PST 24 |
Feb 04 01:33:47 PM PST 24 |
1322392341070 ps |
| T181 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.817255757 |
|
|
Feb 04 01:28:21 PM PST 24 |
Feb 04 01:28:25 PM PST 24 |
2422665833 ps |
| T491 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.509199985 |
|
|
Feb 04 01:28:22 PM PST 24 |
Feb 04 01:28:31 PM PST 24 |
2608625407 ps |
| T492 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3067552814 |
|
|
Feb 04 01:29:13 PM PST 24 |
Feb 04 01:29:19 PM PST 24 |
2521864867 ps |
| T493 |
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3475747785 |
|
|
Feb 04 01:30:19 PM PST 24 |
Feb 04 01:30:24 PM PST 24 |
2631799213 ps |
| T99 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.709198575 |
|
|
Feb 04 01:30:40 PM PST 24 |
Feb 04 01:34:52 PM PST 24 |
92165358978 ps |
| T266 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1163787006 |
|
|
Feb 04 01:30:08 PM PST 24 |
Feb 04 01:31:28 PM PST 24 |
118612647047 ps |
| T494 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2974507500 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:11 PM PST 24 |
2614768796 ps |
| T495 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.777369010 |
|
|
Feb 04 01:30:09 PM PST 24 |
Feb 04 01:30:12 PM PST 24 |
5886008911 ps |
| T152 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.4121984045 |
|
|
Feb 04 01:29:37 PM PST 24 |
Feb 04 01:29:44 PM PST 24 |
5399082796 ps |
| T161 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.1803272093 |
|
|
Feb 04 01:27:21 PM PST 24 |
Feb 04 01:27:24 PM PST 24 |
2040922775 ps |
| T162 |
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3275841701 |
|
|
Feb 04 01:30:07 PM PST 24 |
Feb 04 01:30:12 PM PST 24 |
3757965698 ps |
| T163 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1580183350 |
|
|
Feb 04 01:30:27 PM PST 24 |
Feb 04 01:30:33 PM PST 24 |
2145359011 ps |
| T164 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.954260791 |
|
|
Feb 04 01:31:55 PM PST 24 |
Feb 04 01:40:53 PM PST 24 |
257519869713 ps |
| T100 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2443196047 |
|
|
Feb 04 01:29:02 PM PST 24 |
Feb 04 01:30:12 PM PST 24 |
24079272105 ps |
| T496 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.1636586107 |
|
|
Feb 04 01:30:27 PM PST 24 |
Feb 04 01:30:34 PM PST 24 |
2476572440 ps |
| T284 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.1271259365 |
|
|
Feb 04 01:27:29 PM PST 24 |
Feb 04 01:27:49 PM PST 24 |
42882412557 ps |
| T287 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.4292302024 |
|
|
Feb 04 01:29:02 PM PST 24 |
Feb 04 01:29:11 PM PST 24 |
2612190004 ps |
| T288 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.614608596 |
|
|
Feb 04 01:28:21 PM PST 24 |
Feb 04 01:28:25 PM PST 24 |
2121656408 ps |
| T289 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.545049176 |
|
|
Feb 04 01:30:57 PM PST 24 |
Feb 04 01:31:04 PM PST 24 |
3704663730 ps |
| T290 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.476581062 |
|
|
Feb 04 01:30:12 PM PST 24 |
Feb 04 01:30:18 PM PST 24 |
2020074989 ps |
| T497 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.806255952 |
|
|
Feb 04 01:28:08 PM PST 24 |
Feb 04 01:28:17 PM PST 24 |
2613806464 ps |
| T202 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.286986954 |
|
|
Feb 04 01:31:03 PM PST 24 |
Feb 04 01:31:16 PM PST 24 |
2725857369 ps |
| T498 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1988294027 |
|
|
Feb 04 01:29:22 PM PST 24 |
Feb 04 01:29:27 PM PST 24 |
2139268056 ps |
| T499 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.491164660 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:29:05 PM PST 24 |
2518053830 ps |
| T500 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3535915203 |
|
|
Feb 04 01:28:03 PM PST 24 |
Feb 04 01:28:13 PM PST 24 |
2459331078 ps |
| T501 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3224470942 |
|
|
Feb 04 01:28:05 PM PST 24 |
Feb 04 01:28:08 PM PST 24 |
2123898364 ps |
| T502 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2512899519 |
|
|
Feb 04 01:28:09 PM PST 24 |
Feb 04 01:28:15 PM PST 24 |
2535133153 ps |
| T226 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3919539162 |
|
|
Feb 04 01:31:40 PM PST 24 |
Feb 04 01:32:25 PM PST 24 |
29997768970 ps |
| T258 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3030373518 |
|
|
Feb 04 01:31:57 PM PST 24 |
Feb 04 01:32:32 PM PST 24 |
39801570221 ps |
| T153 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2551948911 |
|
|
Feb 04 01:28:24 PM PST 24 |
Feb 04 01:28:27 PM PST 24 |
4688856232 ps |
| T503 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.2025540307 |
|
|
Feb 04 01:27:46 PM PST 24 |
Feb 04 01:27:53 PM PST 24 |
2128238032 ps |
| T504 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.2569989353 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:07 PM PST 24 |
2464849198 ps |
| T400 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.134609595 |
|
|
Feb 04 01:30:30 PM PST 24 |
Feb 04 01:44:29 PM PST 24 |
1486602879333 ps |
| T80 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.18740593 |
|
|
Feb 04 01:28:21 PM PST 24 |
Feb 04 01:28:22 PM PST 24 |
5856898807 ps |
| T145 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.1809950753 |
|
|
Feb 04 01:29:01 PM PST 24 |
Feb 04 01:30:47 PM PST 24 |
161141115254 ps |
| T146 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.1263526350 |
|
|
Feb 04 01:27:48 PM PST 24 |
Feb 04 01:28:09 PM PST 24 |
22078256445 ps |
| T147 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1995587677 |
|
|
Feb 04 01:30:15 PM PST 24 |
Feb 04 01:30:22 PM PST 24 |
3280229904 ps |
| T148 |
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.1629828333 |
|
|
Feb 04 01:27:33 PM PST 24 |
Feb 04 01:27:38 PM PST 24 |
2463033497 ps |
| T149 |
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.4237693405 |
|
|
Feb 04 01:30:17 PM PST 24 |
Feb 04 01:30:25 PM PST 24 |
2462122574 ps |
| T150 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1567336844 |
|
|
Feb 04 01:27:22 PM PST 24 |
Feb 04 01:27:28 PM PST 24 |
2512436676 ps |
| T151 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.2309323755 |
|
|
Feb 04 01:31:03 PM PST 24 |
Feb 04 01:31:16 PM PST 24 |
2112599882 ps |
| T278 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2947285370 |
|
|
Feb 04 01:32:04 PM PST 24 |
Feb 04 01:37:06 PM PST 24 |
111154852698 ps |
| T365 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2973486081 |
|
|
Feb 04 01:32:09 PM PST 24 |
Feb 04 01:35:13 PM PST 24 |
71789826510 ps |
| T69 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.586774472 |
|
|
Feb 04 01:30:05 PM PST 24 |
Feb 04 01:31:59 PM PST 24 |
165486056112 ps |
| T383 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.1538005804 |
|
|
Feb 04 01:30:18 PM PST 24 |
Feb 04 01:31:46 PM PST 24 |
72057723382 ps |
| T280 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3558918369 |
|
|
Feb 04 01:27:47 PM PST 24 |
Feb 04 01:30:57 PM PST 24 |
139834080970 ps |
| T505 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.23724404 |
|
|
Feb 04 01:27:56 PM PST 24 |
Feb 04 01:30:21 PM PST 24 |
53371087289 ps |
| T506 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1891449777 |
|
|
Feb 04 01:29:03 PM PST 24 |
Feb 04 01:29:16 PM PST 24 |
2460019944 ps |
| T507 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.1974971312 |
|
|
Feb 04 01:29:44 PM PST 24 |
Feb 04 01:29:50 PM PST 24 |
2035916957 ps |
| T508 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.1462847445 |
|
|
Feb 04 01:30:45 PM PST 24 |
Feb 04 01:30:49 PM PST 24 |
2038002726 ps |
| T509 |
/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.2785003198 |
|
|
Feb 04 01:29:51 PM PST 24 |
Feb 04 01:30:00 PM PST 24 |
2444664895 ps |
| T182 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.851656964 |
|
|
Feb 04 01:28:55 PM PST 24 |
Feb 04 01:29:06 PM PST 24 |
2598408486 ps |
| T510 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.516108018 |
|
|
Feb 04 01:30:10 PM PST 24 |
Feb 04 01:31:02 PM PST 24 |
18594882354 ps |
| T511 |
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.2148358546 |
|
|
Feb 04 01:30:31 PM PST 24 |
Feb 04 01:30:36 PM PST 24 |
3098319025 ps |
| T232 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.999313128 |
|
|
Feb 04 01:29:41 PM PST 24 |
Feb 04 01:29:48 PM PST 24 |
3232586364 ps |
| T377 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1575593562 |
|
|
Feb 04 01:29:40 PM PST 24 |
Feb 04 01:30:40 PM PST 24 |
75066737813 ps |
| T512 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.1810942212 |
|
|
Feb 04 01:29:14 PM PST 24 |
Feb 04 01:29:19 PM PST 24 |
2126580204 ps |
| T513 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.4256778440 |
|
|
Feb 04 01:30:58 PM PST 24 |
Feb 04 01:31:11 PM PST 24 |
3248872906 ps |
| T514 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.883045641 |
|
|
Feb 04 01:29:18 PM PST 24 |
Feb 04 01:29:27 PM PST 24 |
2025996493 ps |
| T515 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1820163788 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:29:02 PM PST 24 |
2480059936 ps |
| T516 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2226507867 |
|
|
Feb 04 01:27:20 PM PST 24 |
Feb 04 01:27:23 PM PST 24 |
2470033600 ps |
| T101 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2273241979 |
|
|
Feb 04 01:31:54 PM PST 24 |
Feb 04 01:33:56 PM PST 24 |
87868359266 ps |
| T517 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.4150802937 |
|
|
Feb 04 01:30:17 PM PST 24 |
Feb 04 01:30:27 PM PST 24 |
2460735870 ps |
| T518 |
/workspace/coverage/default/36.sysrst_ctrl_alert_test.456817303 |
|
|
Feb 04 01:30:17 PM PST 24 |
Feb 04 01:30:22 PM PST 24 |
2044980251 ps |
| T519 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2583485523 |
|
|
Feb 04 01:29:17 PM PST 24 |
Feb 04 01:29:31 PM PST 24 |
2543196180 ps |
| T77 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.290708261 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:24 PM PST 24 |
16768364410 ps |
| T102 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.206101974 |
|
|
Feb 04 01:29:12 PM PST 24 |
Feb 04 01:31:11 PM PST 24 |
95917236751 ps |
| T103 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.843567840 |
|
|
Feb 04 01:29:56 PM PST 24 |
Feb 04 01:30:31 PM PST 24 |
26085213846 ps |
| T82 |
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3300249287 |
|
|
Feb 04 01:29:42 PM PST 24 |
Feb 04 01:29:55 PM PST 24 |
4600079257 ps |
| T133 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2812451941 |
|
|
Feb 04 01:31:39 PM PST 24 |
Feb 04 01:31:46 PM PST 24 |
2592740526 ps |
| T134 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.2239399020 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 01:31:41 PM PST 24 |
2124475975 ps |
| T135 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2072774771 |
|
|
Feb 04 01:29:52 PM PST 24 |
Feb 04 01:30:43 PM PST 24 |
90965360333 ps |
| T136 |
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.2630158571 |
|
|
Feb 04 01:29:36 PM PST 24 |
Feb 04 01:34:42 PM PST 24 |
244731368407 ps |
| T213 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.459130351 |
|
|
Feb 04 01:30:58 PM PST 24 |
Feb 04 01:31:12 PM PST 24 |
4570314934 ps |
| T235 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2578003879 |
|
|
Feb 04 01:28:08 PM PST 24 |
Feb 04 01:28:15 PM PST 24 |
2036722941 ps |
| T236 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.3557338726 |
|
|
Feb 04 01:31:00 PM PST 24 |
Feb 04 01:31:34 PM PST 24 |
11668763067 ps |
| T237 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1340396734 |
|
|
Feb 04 01:31:37 PM PST 24 |
Feb 04 01:32:43 PM PST 24 |
99288726510 ps |
| T238 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.1408646484 |
|
|
Feb 04 01:27:20 PM PST 24 |
Feb 04 01:27:28 PM PST 24 |
2510366386 ps |
| T157 |
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3418770968 |
|
|
Feb 04 01:29:13 PM PST 24 |
Feb 04 01:29:19 PM PST 24 |
5554547822 ps |
| T520 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.1412740699 |
|
|
Feb 04 01:30:17 PM PST 24 |
Feb 04 01:30:23 PM PST 24 |
2527548569 ps |
| T521 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3367494630 |
|
|
Feb 04 01:30:38 PM PST 24 |
Feb 04 01:30:51 PM PST 24 |
2513679692 ps |
| T381 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.3089290622 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:32:06 PM PST 24 |
158132539028 ps |
| T522 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2673415780 |
|
|
Feb 04 01:31:41 PM PST 24 |
Feb 04 01:31:59 PM PST 24 |
3824566428 ps |
| T104 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.599021623 |
|
|
Feb 04 01:31:56 PM PST 24 |
Feb 04 01:36:42 PM PST 24 |
111795198460 ps |
| T523 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.4042556924 |
|
|
Feb 04 01:30:44 PM PST 24 |
Feb 04 01:30:48 PM PST 24 |
2074643526 ps |
| T524 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.14638654 |
|
|
Feb 04 01:29:44 PM PST 24 |
Feb 04 01:29:52 PM PST 24 |
2616928636 ps |
| T525 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3001236969 |
|
|
Feb 04 01:27:36 PM PST 24 |
Feb 04 01:27:39 PM PST 24 |
2116977711 ps |
| T526 |
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3702796402 |
|
|
Feb 04 01:30:31 PM PST 24 |
Feb 04 01:30:37 PM PST 24 |
2085452490 ps |
| T527 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1867273432 |
|
|
Feb 04 01:30:43 PM PST 24 |
Feb 04 01:30:49 PM PST 24 |
3776835449 ps |
| T274 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all.1881294369 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:30:43 PM PST 24 |
151160211459 ps |
| T528 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2755515821 |
|
|
Feb 04 01:30:23 PM PST 24 |
Feb 04 01:30:31 PM PST 24 |
3045564706 ps |
| T529 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.1267617850 |
|
|
Feb 04 01:30:32 PM PST 24 |
Feb 04 01:31:02 PM PST 24 |
8266853417 ps |
| T530 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.341355262 |
|
|
Feb 04 01:27:33 PM PST 24 |
Feb 04 01:27:40 PM PST 24 |
2178513028 ps |
| T384 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.2503869950 |
|
|
Feb 04 01:30:10 PM PST 24 |
Feb 04 01:30:37 PM PST 24 |
66628037124 ps |
| T531 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2521884377 |
|
|
Feb 04 01:30:56 PM PST 24 |
Feb 04 01:31:05 PM PST 24 |
2511792088 ps |
| T532 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1752968007 |
|
|
Feb 04 01:28:58 PM PST 24 |
Feb 04 01:29:05 PM PST 24 |
2514560148 ps |
| T105 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.391814928 |
|
|
Feb 04 01:30:24 PM PST 24 |
Feb 04 01:31:34 PM PST 24 |
99359787832 ps |
| T533 |
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3720041823 |
|
|
Feb 04 01:27:17 PM PST 24 |
Feb 04 01:27:25 PM PST 24 |
4764173882 ps |
| T534 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all.2974589720 |
|
|
Feb 04 01:29:03 PM PST 24 |
Feb 04 01:29:25 PM PST 24 |
8121877442 ps |
| T535 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3692397214 |
|
|
Feb 04 01:30:55 PM PST 24 |
Feb 04 01:31:40 PM PST 24 |
17544916773 ps |
| T536 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2376091075 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:41:18 PM PST 24 |
243846221974 ps |
| T371 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.271664248 |
|
|
Feb 04 01:31:44 PM PST 24 |
Feb 04 01:32:35 PM PST 24 |
73364172000 ps |
| T537 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3159692750 |
|
|
Feb 04 01:31:11 PM PST 24 |
Feb 04 01:31:15 PM PST 24 |
2611419339 ps |
| T538 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.855958185 |
|
|
Feb 04 01:30:29 PM PST 24 |
Feb 04 01:30:38 PM PST 24 |
2613757899 ps |
| T362 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3493544055 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:35:33 PM PST 24 |
119914693297 ps |
| T70 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.560771112 |
|
|
Feb 04 01:30:44 PM PST 24 |
Feb 04 01:33:18 PM PST 24 |
155739272502 ps |
| T539 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.4096130329 |
|
|
Feb 04 01:29:46 PM PST 24 |
Feb 04 01:29:50 PM PST 24 |
2572739491 ps |
| T281 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1764466292 |
|
|
Feb 04 01:32:15 PM PST 24 |
Feb 04 01:33:09 PM PST 24 |
77563119340 ps |
| T540 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2205495436 |
|
|
Feb 04 01:30:49 PM PST 24 |
Feb 04 01:31:02 PM PST 24 |
3542471889 ps |
| T541 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2445611385 |
|
|
Feb 04 01:29:35 PM PST 24 |
Feb 04 01:29:43 PM PST 24 |
2610759893 ps |
| T542 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.2913046683 |
|
|
Feb 04 01:29:18 PM PST 24 |
Feb 04 01:29:25 PM PST 24 |
2115411355 ps |
| T225 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.2034237926 |
|
|
Feb 04 01:28:49 PM PST 24 |
Feb 04 01:29:00 PM PST 24 |
3494520520 ps |
| T229 |
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3962074610 |
|
|
Feb 04 01:29:37 PM PST 24 |
Feb 04 01:29:42 PM PST 24 |
3358501249 ps |
| T543 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.4236759502 |
|
|
Feb 04 01:31:11 PM PST 24 |
Feb 04 01:31:24 PM PST 24 |
3977819530 ps |
| T275 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1894044422 |
|
|
Feb 04 01:31:13 PM PST 24 |
Feb 04 01:32:26 PM PST 24 |
121000480520 ps |
| T81 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3361948426 |
|
|
Feb 04 01:31:12 PM PST 24 |
Feb 04 01:31:32 PM PST 24 |
30499231082 ps |
| T544 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2474309113 |
|
|
Feb 04 01:28:51 PM PST 24 |
Feb 04 01:29:04 PM PST 24 |
5073715138 ps |
| T545 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.764831725 |
|
|
Feb 04 01:30:48 PM PST 24 |
Feb 04 01:30:52 PM PST 24 |
2468022271 ps |
| T546 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.850603684 |
|
|
Feb 04 01:30:47 PM PST 24 |
Feb 04 01:30:54 PM PST 24 |
2617873956 ps |
| T547 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.3164249357 |
|
|
Feb 04 01:30:30 PM PST 24 |
Feb 04 01:30:38 PM PST 24 |
2013555691 ps |
| T259 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1688234371 |
|
|
Feb 04 01:28:27 PM PST 24 |
Feb 04 01:29:11 PM PST 24 |
77128023362 ps |
| T342 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2358782241 |
|
|
Feb 04 01:32:23 PM PST 24 |
Feb 04 01:33:45 PM PST 24 |
55846488742 ps |
| T367 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.21080474 |
|
|
Feb 04 01:30:56 PM PST 24 |
Feb 04 01:34:04 PM PST 24 |
72687027237 ps |
| T548 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1927331193 |
|
|
Feb 04 01:27:56 PM PST 24 |
Feb 04 01:28:32 PM PST 24 |
17939036347 ps |
| T379 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.2506483519 |
|
|
Feb 04 01:29:02 PM PST 24 |
Feb 04 01:32:14 PM PST 24 |
73636755750 ps |
| T214 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.448676587 |
|
|
Feb 04 01:30:17 PM PST 24 |
Feb 04 01:30:22 PM PST 24 |
2792199364 ps |
| T240 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1104540280 |
|
|
Feb 04 01:30:59 PM PST 24 |
Feb 04 01:31:04 PM PST 24 |
2073473661 ps |
| T122 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1370935150 |
|
|
Feb 04 01:30:31 PM PST 24 |
Feb 04 01:30:36 PM PST 24 |
3074440584 ps |
| T241 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3841815790 |
|
|
Feb 04 01:27:35 PM PST 24 |
Feb 04 01:27:46 PM PST 24 |
3837094861 ps |
| T242 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2789699568 |
|
|
Feb 04 01:30:30 PM PST 24 |
Feb 04 01:30:40 PM PST 24 |
2454334709 ps |
| T243 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1561031776 |
|
|
Feb 04 01:30:49 PM PST 24 |
Feb 04 01:30:53 PM PST 24 |
2631810706 ps |
| T244 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.556998047 |
|
|
Feb 04 01:30:34 PM PST 24 |
Feb 04 01:30:45 PM PST 24 |
2120304976 ps |
| T245 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.602173262 |
|
|
Feb 04 01:29:52 PM PST 24 |
Feb 04 01:31:28 PM PST 24 |
44207405697 ps |
| T549 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1911480985 |
|
|
Feb 04 01:27:55 PM PST 24 |
Feb 04 01:28:06 PM PST 24 |
2010658376 ps |
| T267 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.322870412 |
|
|
Feb 04 01:31:46 PM PST 24 |
Feb 04 01:32:09 PM PST 24 |
23343079679 ps |
| T550 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3273479492 |
|
|
Feb 04 01:29:40 PM PST 24 |
Feb 04 01:29:55 PM PST 24 |
2820767146 ps |
| T239 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1163494513 |
|
|
Feb 04 01:29:20 PM PST 24 |
Feb 04 01:30:23 PM PST 24 |
44902341896 ps |
| T268 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3369487693 |
|
|
Feb 04 01:29:41 PM PST 24 |
Feb 04 01:30:23 PM PST 24 |
26336798323 ps |
| T392 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.4026089513 |
|
|
Feb 04 01:29:43 PM PST 24 |
Feb 04 01:30:08 PM PST 24 |
29357276569 ps |
| T551 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3853369191 |
|
|
Feb 04 01:30:21 PM PST 24 |
Feb 04 01:30:33 PM PST 24 |
3158515101 ps |
| T552 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.880167149 |
|
|
Feb 04 01:31:54 PM PST 24 |
Feb 04 01:32:05 PM PST 24 |
26443063435 ps |
| T553 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1399489788 |
|
|
Feb 04 01:28:55 PM PST 24 |
Feb 04 01:29:00 PM PST 24 |
3630905310 ps |
| T554 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.3706627438 |
|
|
Feb 04 01:27:35 PM PST 24 |
Feb 04 01:27:38 PM PST 24 |
3311708721 ps |
| T340 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2523020253 |
|
|
Feb 04 01:32:17 PM PST 24 |
Feb 04 01:33:47 PM PST 24 |
121536873331 ps |
| T337 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.2664999207 |
|
|
Feb 04 01:30:26 PM PST 24 |
Feb 04 01:33:04 PM PST 24 |
123071395171 ps |
| T555 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.2842336839 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:30:18 PM PST 24 |
2008605749 ps |
| T556 |
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.228424497 |
|
|
Feb 04 01:31:13 PM PST 24 |
Feb 04 01:31:19 PM PST 24 |
3155415453 ps |
| T557 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1710805406 |
|
|
Feb 04 01:29:39 PM PST 24 |
Feb 04 01:29:43 PM PST 24 |
2621192934 ps |
| T558 |
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.4100736721 |
|
|
Feb 04 01:30:20 PM PST 24 |
Feb 04 01:30:30 PM PST 24 |
3582458523 ps |
| T559 |
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3699807162 |
|
|
Feb 04 01:31:14 PM PST 24 |
Feb 04 01:31:21 PM PST 24 |
2741938004 ps |
| T560 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2165628666 |
|
|
Feb 04 01:30:08 PM PST 24 |
Feb 04 01:30:12 PM PST 24 |
3697519517 ps |
| T293 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.193017893 |
|
|
Feb 04 01:27:56 PM PST 24 |
Feb 04 01:28:30 PM PST 24 |
22020583984 ps |
| T561 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2315227829 |
|
|
Feb 04 01:30:47 PM PST 24 |
Feb 04 01:30:51 PM PST 24 |
3105832235 ps |
| T339 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.801298920 |
|
|
Feb 04 01:29:17 PM PST 24 |
Feb 04 01:29:37 PM PST 24 |
116301812009 ps |
| T183 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.3960953692 |
|
|
Feb 04 01:29:52 PM PST 24 |
Feb 04 01:31:18 PM PST 24 |
126612131326 ps |
| T562 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.1988982313 |
|
|
Feb 04 01:29:05 PM PST 24 |
Feb 04 01:29:13 PM PST 24 |
2117594266 ps |
| T349 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.140853990 |
|
|
Feb 04 01:31:58 PM PST 24 |
Feb 04 01:33:54 PM PST 24 |
76002037555 ps |
| T563 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.954298255 |
|
|
Feb 04 01:30:18 PM PST 24 |
Feb 04 01:30:24 PM PST 24 |
3597283798 ps |
| T564 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1068943783 |
|
|
Feb 04 01:30:15 PM PST 24 |
Feb 04 01:30:20 PM PST 24 |
2495227743 ps |
| T565 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1510294905 |
|
|
Feb 04 01:30:46 PM PST 24 |
Feb 04 01:30:51 PM PST 24 |
3585095258 ps |
| T566 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2099390335 |
|
|
Feb 04 01:31:13 PM PST 24 |
Feb 04 01:31:19 PM PST 24 |
2614425169 ps |
| T567 |
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3995778872 |
|
|
Feb 04 01:29:01 PM PST 24 |
Feb 04 01:29:07 PM PST 24 |
2020073565 ps |
| T368 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.757555960 |
|
|
Feb 04 01:30:10 PM PST 24 |
Feb 04 01:33:29 PM PST 24 |
82775470046 ps |
| T338 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2482705579 |
|
|
Feb 04 01:30:29 PM PST 24 |
Feb 04 01:33:42 PM PST 24 |
93848510463 ps |
| T568 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.2999844733 |
|
|
Feb 04 01:30:15 PM PST 24 |
Feb 04 01:30:19 PM PST 24 |
3116390025 ps |
| T569 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.130047663 |
|
|
Feb 04 01:31:38 PM PST 24 |
Feb 04 01:31:48 PM PST 24 |
2509420842 ps |
| T570 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.3888411753 |
|
|
Feb 04 01:30:34 PM PST 24 |
Feb 04 01:30:49 PM PST 24 |
2015038673 ps |
| T571 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.778523954 |
|
|
Feb 04 01:30:55 PM PST 24 |
Feb 04 01:31:01 PM PST 24 |
2580820721 ps |
| T140 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.3333291246 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:30:15 PM PST 24 |
3408353064 ps |
| T572 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1907310036 |
|
|
Feb 04 01:27:47 PM PST 24 |
Feb 04 01:27:55 PM PST 24 |
2529135169 ps |
| T378 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3100326330 |
|
|
Feb 04 01:31:41 PM PST 24 |
Feb 04 01:37:07 PM PST 24 |
128800938924 ps |
| T573 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.4151272469 |
|
|
Feb 04 01:28:59 PM PST 24 |
Feb 04 01:29:08 PM PST 24 |
2014531175 ps |
| T574 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1749138450 |
|
|
Feb 04 01:27:37 PM PST 24 |
Feb 04 01:27:40 PM PST 24 |
2405457712 ps |
| T575 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.191247360 |
|
|
Feb 04 01:31:41 PM PST 24 |
Feb 04 01:31:50 PM PST 24 |
2046436982 ps |
| T576 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.3759368791 |
|
|
Feb 04 01:30:16 PM PST 24 |
Feb 04 01:30:21 PM PST 24 |
2120262101 ps |
| T83 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.445585797 |
|
|
Feb 04 01:27:22 PM PST 24 |
Feb 04 01:27:32 PM PST 24 |
5454908959 ps |
| T123 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4029046620 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 01:32:04 PM PST 24 |
44066057487 ps |
| T137 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.1442182898 |
|
|
Feb 04 01:29:18 PM PST 24 |
Feb 04 01:29:31 PM PST 24 |
2513690908 ps |
| T138 |
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.2538349492 |
|
|
Feb 04 01:29:36 PM PST 24 |
Feb 04 01:29:41 PM PST 24 |
2484467005 ps |
| T139 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.751674780 |
|
|
Feb 04 01:31:38 PM PST 24 |
Feb 04 01:31:46 PM PST 24 |
2021454627 ps |
| T341 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.52549012 |
|
|
Feb 04 01:30:13 PM PST 24 |
Feb 04 01:32:20 PM PST 24 |
48828483291 ps |
| T124 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.401296413 |
|
|
Feb 04 01:30:12 PM PST 24 |
Feb 04 01:30:47 PM PST 24 |
15538073326 ps |
| T84 |
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3955909615 |
|
|
Feb 04 01:30:47 PM PST 24 |
Feb 04 01:30:57 PM PST 24 |
3455180487 ps |
| T577 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2281921460 |
|
|
Feb 04 01:29:19 PM PST 24 |
Feb 04 01:29:35 PM PST 24 |
25937131474 ps |
| T578 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3601204759 |
|
|
Feb 04 01:27:31 PM PST 24 |
Feb 04 01:27:33 PM PST 24 |
2746911074 ps |
| T579 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3622600527 |
|
|
Feb 04 01:28:54 PM PST 24 |
Feb 04 01:30:36 PM PST 24 |
525484431127 ps |
| T580 |
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.4071599339 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:29:06 PM PST 24 |
2092434555 ps |
| T158 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.1358552956 |
|
|
Feb 04 01:29:24 PM PST 24 |
Feb 04 01:29:29 PM PST 24 |
6545470569 ps |
| T581 |
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3043083288 |
|
|
Feb 04 01:29:04 PM PST 24 |
Feb 04 01:29:18 PM PST 24 |
3121721067 ps |
| T582 |
/workspace/coverage/default/11.sysrst_ctrl_smoke.1148628406 |
|
|
Feb 04 01:28:58 PM PST 24 |
Feb 04 01:29:07 PM PST 24 |
2114086033 ps |
| T583 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.221725762 |
|
|
Feb 04 01:31:14 PM PST 24 |
Feb 04 01:31:23 PM PST 24 |
2453912536 ps |
| T73 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3965753763 |
|
|
Feb 04 01:27:30 PM PST 24 |
Feb 04 01:27:56 PM PST 24 |
37872442248 ps |
| T584 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.1720365278 |
|
|
Feb 04 01:30:06 PM PST 24 |
Feb 04 01:30:15 PM PST 24 |
2066988306 ps |
| T276 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1753137327 |
|
|
Feb 04 01:31:01 PM PST 24 |
Feb 04 01:32:26 PM PST 24 |
88321123267 ps |
| T585 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.3033113180 |
|
|
Feb 04 01:30:10 PM PST 24 |
Feb 04 01:30:13 PM PST 24 |
2131844078 ps |
| T586 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.660598697 |
|
|
Feb 04 01:28:58 PM PST 24 |
Feb 04 01:29:02 PM PST 24 |
2675704325 ps |
| T587 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2538875585 |
|
|
Feb 04 01:27:50 PM PST 24 |
Feb 04 01:27:58 PM PST 24 |
3680579979 ps |
| T588 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2574313061 |
|
|
Feb 04 01:30:39 PM PST 24 |
Feb 04 01:30:46 PM PST 24 |
2495895805 ps |
| T209 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1311806875 |
|
|
Feb 04 01:29:01 PM PST 24 |
Feb 04 01:31:54 PM PST 24 |
64847298621 ps |
| T589 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3421560879 |
|
|
Feb 04 01:30:30 PM PST 24 |
Feb 04 01:30:35 PM PST 24 |
3422452187 ps |
| T71 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.1398320743 |
|
|
Feb 04 01:30:18 PM PST 24 |
Feb 04 01:31:06 PM PST 24 |
79276013554 ps |
| T590 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1323705673 |
|
|
Feb 04 01:29:03 PM PST 24 |
Feb 04 01:29:10 PM PST 24 |
2524742598 ps |
| T591 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2475045374 |
|
|
Feb 04 01:29:18 PM PST 24 |
Feb 04 01:29:28 PM PST 24 |
2619673603 ps |
| T592 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.255062073 |
|
|
Feb 04 01:29:16 PM PST 24 |
Feb 04 01:29:20 PM PST 24 |
2466216892 ps |
| T593 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3730554087 |
|
|
Feb 04 01:31:58 PM PST 24 |
Feb 04 01:32:31 PM PST 24 |
41295021115 ps |
| T594 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.2381804430 |
|
|
Feb 04 01:29:03 PM PST 24 |
Feb 04 01:30:37 PM PST 24 |
147695712735 ps |
| T595 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.3439856301 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:30:48 PM PST 24 |
149808094807 ps |
| T596 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.466439106 |
|
|
Feb 04 01:27:38 PM PST 24 |
Feb 04 01:27:42 PM PST 24 |
2530905911 ps |
| T372 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2743112815 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:31:24 PM PST 24 |
121394075864 ps |
| T106 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.3273417434 |
|
|
Feb 04 01:27:31 PM PST 24 |
Feb 04 01:32:28 PM PST 24 |
113452532033 ps |
| T343 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.2431240020 |
|
|
Feb 04 01:27:22 PM PST 24 |
Feb 04 01:29:32 PM PST 24 |
107880271074 ps |
| T597 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2488379927 |
|
|
Feb 04 01:27:55 PM PST 24 |
Feb 04 01:28:11 PM PST 24 |
15721183567 ps |
| T165 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.2763474110 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:06 PM PST 24 |
4996612279 ps |
| T393 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3385841890 |
|
|
Feb 04 01:32:05 PM PST 24 |
Feb 04 01:32:26 PM PST 24 |
26862647345 ps |
| T598 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.3170432061 |
|
|
Feb 04 01:29:34 PM PST 24 |
Feb 04 01:29:39 PM PST 24 |
11359822296 ps |
| T599 |
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1994087706 |
|
|
Feb 04 01:31:53 PM PST 24 |
Feb 04 01:36:52 PM PST 24 |
108777465927 ps |
| T600 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1413889670 |
|
|
Feb 04 01:30:38 PM PST 24 |
Feb 04 01:30:47 PM PST 24 |
2156611887 ps |
| T601 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.3475265761 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:06 PM PST 24 |
2122431255 ps |
| T344 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.129061296 |
|
|
Feb 04 01:30:28 PM PST 24 |
Feb 04 01:34:49 PM PST 24 |
99400619080 ps |
| T602 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.3936743813 |
|
|
Feb 04 01:29:44 PM PST 24 |
Feb 04 01:29:50 PM PST 24 |
2144553172 ps |
| T603 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1775667567 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:29:02 PM PST 24 |
2529938272 ps |
| T604 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1095176368 |
|
|
Feb 04 01:31:09 PM PST 24 |
Feb 04 01:31:16 PM PST 24 |
2051049469 ps |
| T605 |
/workspace/coverage/default/13.sysrst_ctrl_alert_test.4108070135 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:29:01 PM PST 24 |
2041857553 ps |
| T606 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2824764228 |
|
|
Feb 04 01:31:34 PM PST 24 |
Feb 04 01:31:42 PM PST 24 |
2612203569 ps |
| T607 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.4268878003 |
|
|
Feb 04 01:30:35 PM PST 24 |
Feb 04 01:30:50 PM PST 24 |
2259058053 ps |
| T608 |
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.756917786 |
|
|
Feb 04 01:29:13 PM PST 24 |
Feb 04 01:29:18 PM PST 24 |
4638348534 ps |
| T348 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1671919614 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 01:32:32 PM PST 24 |
76704992724 ps |
| T609 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1461236898 |
|
|
Feb 04 01:29:24 PM PST 24 |
Feb 04 01:31:19 PM PST 24 |
82289617861 ps |
| T364 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2928465311 |
|
|
Feb 04 01:31:11 PM PST 24 |
Feb 04 01:32:24 PM PST 24 |
60701768090 ps |
| T396 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.500110251 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:30:42 PM PST 24 |
187440790637 ps |
| T610 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.236233768 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:09 PM PST 24 |
2038455030 ps |
| T611 |
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3258594321 |
|
|
Feb 04 01:30:29 PM PST 24 |
Feb 04 01:30:37 PM PST 24 |
5075804418 ps |