| T612 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.1926880106 |
|
|
Feb 04 01:31:01 PM PST 24 |
Feb 04 01:31:05 PM PST 24 |
2033439429 ps |
| T613 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2333581217 |
|
|
Feb 04 01:32:01 PM PST 24 |
Feb 04 01:38:03 PM PST 24 |
155822866280 ps |
| T107 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.3824564208 |
|
|
Feb 04 01:30:37 PM PST 24 |
Feb 04 01:31:34 PM PST 24 |
74183605429 ps |
| T614 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.167744165 |
|
|
Feb 04 01:30:13 PM PST 24 |
Feb 04 01:30:18 PM PST 24 |
3555679349 ps |
| T615 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.441066317 |
|
|
Feb 04 01:28:59 PM PST 24 |
Feb 04 01:29:10 PM PST 24 |
2507351154 ps |
| T616 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.994235094 |
|
|
Feb 04 01:30:10 PM PST 24 |
Feb 04 01:30:18 PM PST 24 |
2513408793 ps |
| T617 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.1809516346 |
|
|
Feb 04 01:29:17 PM PST 24 |
Feb 04 01:29:26 PM PST 24 |
2609633878 ps |
| T224 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.3144925458 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:29:08 PM PST 24 |
3426906751 ps |
| T199 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.296793618 |
|
|
Feb 04 01:30:26 PM PST 24 |
Feb 04 01:30:38 PM PST 24 |
5373499483 ps |
| T203 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.4212976726 |
|
|
Feb 04 01:30:13 PM PST 24 |
Feb 04 01:30:17 PM PST 24 |
2704371529 ps |
| T204 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3516988410 |
|
|
Feb 04 01:29:16 PM PST 24 |
Feb 04 01:29:20 PM PST 24 |
2220385221 ps |
| T205 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1836587609 |
|
|
Feb 04 01:27:46 PM PST 24 |
Feb 04 01:27:55 PM PST 24 |
3081492208 ps |
| T206 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2339931261 |
|
|
Feb 04 01:28:06 PM PST 24 |
Feb 04 01:28:19 PM PST 24 |
4421071171 ps |
| T207 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1036506309 |
|
|
Feb 04 01:28:25 PM PST 24 |
Feb 04 01:28:34 PM PST 24 |
2609957745 ps |
| T208 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.597373299 |
|
|
Feb 04 01:27:20 PM PST 24 |
Feb 04 01:27:28 PM PST 24 |
2425259638 ps |
| T200 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.740316084 |
|
|
Feb 04 01:28:25 PM PST 24 |
Feb 04 01:28:29 PM PST 24 |
2947932278 ps |
| T171 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3074963577 |
|
|
Feb 04 01:30:22 PM PST 24 |
Feb 04 01:30:30 PM PST 24 |
3375059414 ps |
| T175 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.2392766490 |
|
|
Feb 04 01:27:18 PM PST 24 |
Feb 04 01:27:25 PM PST 24 |
2136123306 ps |
| T176 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.3919990115 |
|
|
Feb 04 01:28:53 PM PST 24 |
Feb 04 01:30:59 PM PST 24 |
92491268877 ps |
| T177 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.942346930 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:33:18 PM PST 24 |
95865681681 ps |
| T178 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1838269082 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:29:08 PM PST 24 |
3032600352 ps |
| T618 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2809597111 |
|
|
Feb 04 01:29:43 PM PST 24 |
Feb 04 01:29:50 PM PST 24 |
3386314880 ps |
| T619 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.4064237931 |
|
|
Feb 04 01:30:07 PM PST 24 |
Feb 04 01:30:16 PM PST 24 |
2459515380 ps |
| T620 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.4202383274 |
|
|
Feb 04 01:29:46 PM PST 24 |
Feb 04 01:29:52 PM PST 24 |
2226487608 ps |
| T388 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.4144472546 |
|
|
Feb 04 01:30:43 PM PST 24 |
Feb 04 01:33:07 PM PST 24 |
55943187649 ps |
| T125 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.945632146 |
|
|
Feb 04 01:30:13 PM PST 24 |
Feb 04 01:30:46 PM PST 24 |
26969773515 ps |
| T621 |
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1953899735 |
|
|
Feb 04 01:27:49 PM PST 24 |
Feb 04 01:27:56 PM PST 24 |
2619802146 ps |
| T622 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2140079813 |
|
|
Feb 04 01:30:59 PM PST 24 |
Feb 04 01:31:06 PM PST 24 |
2474102633 ps |
| T623 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2697828953 |
|
|
Feb 04 01:30:14 PM PST 24 |
Feb 04 01:33:48 PM PST 24 |
78982167397 ps |
| T75 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1703256233 |
|
|
Feb 04 01:28:23 PM PST 24 |
Feb 04 01:28:47 PM PST 24 |
33212476562 ps |
| T374 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.467220073 |
|
|
Feb 04 01:31:48 PM PST 24 |
Feb 04 01:36:41 PM PST 24 |
104353446671 ps |
| T386 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.2455944916 |
|
|
Feb 04 01:30:29 PM PST 24 |
Feb 04 01:34:39 PM PST 24 |
97597044608 ps |
| T624 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.3183027645 |
|
|
Feb 04 01:30:27 PM PST 24 |
Feb 04 01:30:35 PM PST 24 |
2012473003 ps |
| T353 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.2821169949 |
|
|
Feb 04 01:30:24 PM PST 24 |
Feb 04 01:32:16 PM PST 24 |
43222500176 ps |
| T260 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.4291127746 |
|
|
Feb 04 01:30:09 PM PST 24 |
Feb 04 01:30:58 PM PST 24 |
72510905704 ps |
| T625 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.2574913339 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:29:07 PM PST 24 |
2930054881 ps |
| T626 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3894472625 |
|
|
Feb 04 01:30:13 PM PST 24 |
Feb 04 01:30:18 PM PST 24 |
4288517589 ps |
| T627 |
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.761373522 |
|
|
Feb 04 01:31:03 PM PST 24 |
Feb 04 01:31:10 PM PST 24 |
3317179271 ps |
| T628 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.3708804869 |
|
|
Feb 04 01:30:17 PM PST 24 |
Feb 04 01:30:22 PM PST 24 |
2632405180 ps |
| T126 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.798834144 |
|
|
Feb 04 01:30:30 PM PST 24 |
Feb 04 01:32:16 PM PST 24 |
84393566742 ps |
| T629 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.715444381 |
|
|
Feb 04 01:28:49 PM PST 24 |
Feb 04 01:28:58 PM PST 24 |
2470989126 ps |
| T127 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.491766105 |
|
|
Feb 04 01:30:12 PM PST 24 |
Feb 04 01:30:23 PM PST 24 |
6679494810 ps |
| T630 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.1571210181 |
|
|
Feb 04 01:30:29 PM PST 24 |
Feb 04 01:30:38 PM PST 24 |
2112793838 ps |
| T631 |
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.4293842689 |
|
|
Feb 04 01:29:16 PM PST 24 |
Feb 04 01:29:22 PM PST 24 |
2617982713 ps |
| T361 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.735976467 |
|
|
Feb 04 01:32:07 PM PST 24 |
Feb 04 01:35:48 PM PST 24 |
94132939612 ps |
| T397 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.775156811 |
|
|
Feb 04 01:29:24 PM PST 24 |
Feb 04 01:32:34 PM PST 24 |
74640809557 ps |
| T632 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.616411579 |
|
|
Feb 04 01:28:59 PM PST 24 |
Feb 04 01:29:04 PM PST 24 |
2123652837 ps |
| T633 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.512817055 |
|
|
Feb 04 01:28:24 PM PST 24 |
Feb 04 01:28:35 PM PST 24 |
3624572273 ps |
| T634 |
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.139134747 |
|
|
Feb 04 01:29:14 PM PST 24 |
Feb 04 01:29:18 PM PST 24 |
2185900457 ps |
| T370 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2306406391 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 01:34:24 PM PST 24 |
63566375073 ps |
| T635 |
/workspace/coverage/default/43.sysrst_ctrl_smoke.3610902564 |
|
|
Feb 04 01:30:58 PM PST 24 |
Feb 04 01:31:08 PM PST 24 |
2113528848 ps |
| T636 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.112853773 |
|
|
Feb 04 01:27:35 PM PST 24 |
Feb 04 01:27:38 PM PST 24 |
2481212560 ps |
| T131 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1798220519 |
|
|
Feb 04 01:29:20 PM PST 24 |
Feb 04 01:29:30 PM PST 24 |
6792613467 ps |
| T637 |
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.4001106160 |
|
|
Feb 04 01:28:06 PM PST 24 |
Feb 04 01:28:09 PM PST 24 |
2249961060 ps |
| T74 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.955934763 |
|
|
Feb 04 01:27:18 PM PST 24 |
Feb 04 01:28:57 PM PST 24 |
37995685027 ps |
| T638 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3891058396 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:29:10 PM PST 24 |
3575442557 ps |
| T166 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.4110389741 |
|
|
Feb 04 01:31:37 PM PST 24 |
Feb 04 01:32:05 PM PST 24 |
13533128036 ps |
| T230 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.3949288750 |
|
|
Feb 04 01:28:58 PM PST 24 |
Feb 04 01:33:30 PM PST 24 |
104929274652 ps |
| T639 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.167888791 |
|
|
Feb 04 01:31:38 PM PST 24 |
Feb 04 01:33:07 PM PST 24 |
62571000860 ps |
| T640 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.602627881 |
|
|
Feb 04 01:31:10 PM PST 24 |
Feb 04 01:31:17 PM PST 24 |
2009226140 ps |
| T641 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.985161466 |
|
|
Feb 04 01:30:05 PM PST 24 |
Feb 04 01:30:42 PM PST 24 |
24412615302 ps |
| T642 |
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.721402543 |
|
|
Feb 04 01:29:53 PM PST 24 |
Feb 04 01:29:55 PM PST 24 |
2236164911 ps |
| T643 |
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.3924983519 |
|
|
Feb 04 01:29:13 PM PST 24 |
Feb 04 01:29:17 PM PST 24 |
3414309586 ps |
| T644 |
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.57232235 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:30:20 PM PST 24 |
2462649593 ps |
| T645 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2870046038 |
|
|
Feb 04 01:30:27 PM PST 24 |
Feb 04 01:30:46 PM PST 24 |
6379452021 ps |
| T646 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.161347709 |
|
|
Feb 04 01:27:31 PM PST 24 |
Feb 04 01:27:39 PM PST 24 |
2463953150 ps |
| T647 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.2722217243 |
|
|
Feb 04 01:30:15 PM PST 24 |
Feb 04 01:30:19 PM PST 24 |
2023621898 ps |
| T648 |
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2686243069 |
|
|
Feb 04 01:30:33 PM PST 24 |
Feb 04 01:30:46 PM PST 24 |
2519608965 ps |
| T649 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.2642748131 |
|
|
Feb 04 01:28:48 PM PST 24 |
Feb 04 01:29:09 PM PST 24 |
13202039070 ps |
| T650 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.3903180829 |
|
|
Feb 04 01:28:54 PM PST 24 |
Feb 04 01:29:01 PM PST 24 |
2132571277 ps |
| T651 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3249325758 |
|
|
Feb 04 01:30:38 PM PST 24 |
Feb 04 01:30:48 PM PST 24 |
2658879859 ps |
| T167 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1080267319 |
|
|
Feb 04 01:27:46 PM PST 24 |
Feb 04 01:28:36 PM PST 24 |
32478302129 ps |
| T215 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1484569683 |
|
|
Feb 04 01:29:02 PM PST 24 |
Feb 04 01:29:16 PM PST 24 |
3271729847 ps |
| T216 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.2906584052 |
|
|
Feb 04 01:29:54 PM PST 24 |
Feb 04 01:30:08 PM PST 24 |
14252944546 ps |
| T217 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.1881437324 |
|
|
Feb 04 01:30:44 PM PST 24 |
Feb 04 01:30:53 PM PST 24 |
2111178833 ps |
| T218 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3905667504 |
|
|
Feb 04 01:31:38 PM PST 24 |
Feb 04 01:31:44 PM PST 24 |
4282057062 ps |
| T219 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.1693226400 |
|
|
Feb 04 01:28:52 PM PST 24 |
Feb 04 01:29:00 PM PST 24 |
2029842130 ps |
| T220 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.1175179834 |
|
|
Feb 04 01:29:17 PM PST 24 |
Feb 04 01:29:21 PM PST 24 |
2501674303 ps |
| T221 |
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.4137779198 |
|
|
Feb 04 01:31:38 PM PST 24 |
Feb 04 01:33:03 PM PST 24 |
31830345301 ps |
| T222 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3841609566 |
|
|
Feb 04 01:27:47 PM PST 24 |
Feb 04 01:28:36 PM PST 24 |
66723914376 ps |
| T223 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.4202851004 |
|
|
Feb 04 01:29:22 PM PST 24 |
Feb 04 01:29:32 PM PST 24 |
3163068587 ps |
| T652 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.3254569333 |
|
|
Feb 04 01:30:50 PM PST 24 |
Feb 04 01:31:06 PM PST 24 |
36269362692 ps |
| T653 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2803418381 |
|
|
Feb 04 01:28:59 PM PST 24 |
Feb 04 01:29:05 PM PST 24 |
2188587668 ps |
| T246 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1963188363 |
|
|
Feb 04 01:27:32 PM PST 24 |
Feb 04 01:29:21 PM PST 24 |
48243463266 ps |
| T654 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2349923825 |
|
|
Feb 04 01:31:37 PM PST 24 |
Feb 04 01:31:42 PM PST 24 |
4371890734 ps |
| T390 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4267740449 |
|
|
Feb 04 01:28:22 PM PST 24 |
Feb 04 01:30:38 PM PST 24 |
51989722636 ps |
| T141 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1844263863 |
|
|
Feb 04 01:28:55 PM PST 24 |
Feb 04 01:29:26 PM PST 24 |
46075875094 ps |
| T655 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.1780269769 |
|
|
Feb 04 01:30:07 PM PST 24 |
Feb 04 01:30:16 PM PST 24 |
2507245078 ps |
| T247 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.3603207474 |
|
|
Feb 04 01:29:01 PM PST 24 |
Feb 04 01:29:11 PM PST 24 |
3126584796 ps |
| T656 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3366604625 |
|
|
Feb 04 01:28:23 PM PST 24 |
Feb 04 01:41:03 PM PST 24 |
287823475294 ps |
| T657 |
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.4126708328 |
|
|
Feb 04 01:30:58 PM PST 24 |
Feb 04 01:31:09 PM PST 24 |
7137181907 ps |
| T108 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2289840313 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:30:50 PM PST 24 |
424796489392 ps |
| T658 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1635632972 |
|
|
Feb 04 01:29:05 PM PST 24 |
Feb 04 01:29:12 PM PST 24 |
3040144164 ps |
| T659 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3925195753 |
|
|
Feb 04 01:28:23 PM PST 24 |
Feb 04 01:28:31 PM PST 24 |
2450570779 ps |
| T660 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2613265968 |
|
|
Feb 04 01:29:14 PM PST 24 |
Feb 04 01:29:21 PM PST 24 |
3719807099 ps |
| T661 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3465226346 |
|
|
Feb 04 01:30:58 PM PST 24 |
Feb 04 01:31:06 PM PST 24 |
2622105291 ps |
| T662 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.2521429896 |
|
|
Feb 04 01:30:22 PM PST 24 |
Feb 04 01:30:25 PM PST 24 |
2068321638 ps |
| T663 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.1403591799 |
|
|
Feb 04 01:27:35 PM PST 24 |
Feb 04 01:27:38 PM PST 24 |
2441064811 ps |
| T664 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3236401848 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 01:31:46 PM PST 24 |
2452504391 ps |
| T665 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.969424968 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:30:15 PM PST 24 |
2023615631 ps |
| T666 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.918339776 |
|
|
Feb 04 01:27:18 PM PST 24 |
Feb 04 01:27:21 PM PST 24 |
2237272876 ps |
| T667 |
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.3034428443 |
|
|
Feb 04 01:27:55 PM PST 24 |
Feb 04 01:28:08 PM PST 24 |
2722426482 ps |
| T345 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all.3225156630 |
|
|
Feb 04 01:30:15 PM PST 24 |
Feb 04 01:31:15 PM PST 24 |
86476955910 ps |
| T668 |
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3960027583 |
|
|
Feb 04 01:30:30 PM PST 24 |
Feb 04 01:30:40 PM PST 24 |
2513119854 ps |
| T306 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.3554557095 |
|
|
Feb 04 01:27:16 PM PST 24 |
Feb 04 01:29:05 PM PST 24 |
42011348764 ps |
| T669 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1203562389 |
|
|
Feb 04 01:27:28 PM PST 24 |
Feb 04 01:27:36 PM PST 24 |
2669116788 ps |
| T670 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3111094599 |
|
|
Feb 04 01:28:23 PM PST 24 |
Feb 04 01:28:26 PM PST 24 |
3448184762 ps |
| T671 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.474774851 |
|
|
Feb 04 01:27:19 PM PST 24 |
Feb 04 01:27:22 PM PST 24 |
3149448656 ps |
| T672 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.438587748 |
|
|
Feb 04 01:27:23 PM PST 24 |
Feb 04 01:28:53 PM PST 24 |
258281817404 ps |
| T673 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3518394554 |
|
|
Feb 04 01:31:38 PM PST 24 |
Feb 04 01:31:46 PM PST 24 |
3811644617 ps |
| T674 |
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2682438406 |
|
|
Feb 04 01:30:15 PM PST 24 |
Feb 04 01:30:23 PM PST 24 |
2200198873 ps |
| T675 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1855171276 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 01:31:39 PM PST 24 |
2036158643 ps |
| T676 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3447085704 |
|
|
Feb 04 01:28:23 PM PST 24 |
Feb 04 01:28:25 PM PST 24 |
2116657779 ps |
| T677 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.2728720223 |
|
|
Feb 04 01:29:36 PM PST 24 |
Feb 04 01:29:42 PM PST 24 |
2530189884 ps |
| T678 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.1644986172 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:30:19 PM PST 24 |
2614335667 ps |
| T679 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.763464221 |
|
|
Feb 04 01:29:36 PM PST 24 |
Feb 04 01:29:42 PM PST 24 |
2928578658 ps |
| T680 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.27950254 |
|
|
Feb 04 01:28:04 PM PST 24 |
Feb 04 01:28:31 PM PST 24 |
12730859390 ps |
| T363 |
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.687102489 |
|
|
Feb 04 01:31:41 PM PST 24 |
Feb 04 01:32:49 PM PST 24 |
130834553402 ps |
| T109 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1558661145 |
|
|
Feb 04 01:30:46 PM PST 24 |
Feb 04 01:31:33 PM PST 24 |
73582039409 ps |
| T681 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2083183568 |
|
|
Feb 04 01:30:17 PM PST 24 |
Feb 04 01:30:32 PM PST 24 |
4621316890 ps |
| T369 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3499185969 |
|
|
Feb 04 01:31:39 PM PST 24 |
Feb 04 01:32:05 PM PST 24 |
61951779941 ps |
| T682 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1060504600 |
|
|
Feb 04 01:30:12 PM PST 24 |
Feb 04 01:30:21 PM PST 24 |
2868969525 ps |
| T683 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1214585293 |
|
|
Feb 04 01:30:48 PM PST 24 |
Feb 04 01:36:06 PM PST 24 |
111278238990 ps |
| T684 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.2301502273 |
|
|
Feb 04 01:30:06 PM PST 24 |
Feb 04 01:30:10 PM PST 24 |
2590015404 ps |
| T685 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.844563306 |
|
|
Feb 04 01:30:12 PM PST 24 |
Feb 04 01:30:16 PM PST 24 |
2040231420 ps |
| T686 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.2723929228 |
|
|
Feb 04 01:30:28 PM PST 24 |
Feb 04 01:30:36 PM PST 24 |
2110739438 ps |
| T687 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.3593480818 |
|
|
Feb 04 01:30:50 PM PST 24 |
Feb 04 01:30:54 PM PST 24 |
2124936303 ps |
| T350 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.101745900 |
|
|
Feb 04 01:32:01 PM PST 24 |
Feb 04 01:33:44 PM PST 24 |
57397355920 ps |
| T347 |
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2151353086 |
|
|
Feb 04 01:32:17 PM PST 24 |
Feb 04 01:32:50 PM PST 24 |
82053138906 ps |
| T688 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.1315020255 |
|
|
Feb 04 01:28:10 PM PST 24 |
Feb 04 01:28:19 PM PST 24 |
2112728415 ps |
| T689 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.4128387517 |
|
|
Feb 04 01:29:44 PM PST 24 |
Feb 04 01:29:49 PM PST 24 |
2094080337 ps |
| T690 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.132085807 |
|
|
Feb 04 01:27:54 PM PST 24 |
Feb 04 01:28:03 PM PST 24 |
3885445366 ps |
| T691 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1679567497 |
|
|
Feb 04 01:27:20 PM PST 24 |
Feb 04 01:27:23 PM PST 24 |
2535416738 ps |
| T382 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.458968563 |
|
|
Feb 04 01:30:47 PM PST 24 |
Feb 04 01:35:34 PM PST 24 |
110934250064 ps |
| T692 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.431964633 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:07 PM PST 24 |
6769277912 ps |
| T693 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3887246220 |
|
|
Feb 04 01:30:29 PM PST 24 |
Feb 04 01:30:38 PM PST 24 |
2192784061 ps |
| T694 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.35572608 |
|
|
Feb 04 01:28:24 PM PST 24 |
Feb 04 01:28:30 PM PST 24 |
2520453642 ps |
| T695 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3130706515 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:29:06 PM PST 24 |
2510687491 ps |
| T696 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1984283345 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 01:31:44 PM PST 24 |
2011056949 ps |
| T277 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.2079176522 |
|
|
Feb 04 01:30:19 PM PST 24 |
Feb 04 01:31:35 PM PST 24 |
82840422304 ps |
| T697 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3440178146 |
|
|
Feb 04 01:30:10 PM PST 24 |
Feb 04 01:30:19 PM PST 24 |
2875149535 ps |
| T698 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.2399545559 |
|
|
Feb 04 01:30:21 PM PST 24 |
Feb 04 01:30:25 PM PST 24 |
7065965254 ps |
| T699 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3277107868 |
|
|
Feb 04 01:31:14 PM PST 24 |
Feb 04 01:31:25 PM PST 24 |
17148537035 ps |
| T700 |
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2156226820 |
|
|
Feb 04 01:27:46 PM PST 24 |
Feb 04 01:27:56 PM PST 24 |
11876409780 ps |
| T701 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1256982505 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:29:08 PM PST 24 |
3302257631 ps |
| T248 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.798818475 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 01:34:49 PM PST 24 |
1184776252133 ps |
| T702 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2586649523 |
|
|
Feb 04 01:30:07 PM PST 24 |
Feb 04 01:30:17 PM PST 24 |
2611514555 ps |
| T703 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.756603736 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:29:07 PM PST 24 |
2613068938 ps |
| T132 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.776928616 |
|
|
Feb 04 01:29:37 PM PST 24 |
Feb 04 01:30:37 PM PST 24 |
381082544342 ps |
| T704 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.3826040913 |
|
|
Feb 04 01:29:16 PM PST 24 |
Feb 04 01:29:31 PM PST 24 |
4937506357 ps |
| T398 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.378552869 |
|
|
Feb 04 01:28:54 PM PST 24 |
Feb 04 01:30:38 PM PST 24 |
37814384083 ps |
| T173 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1037766621 |
|
|
Feb 04 01:30:16 PM PST 24 |
Feb 04 01:31:05 PM PST 24 |
35290728451 ps |
| T705 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.1851628033 |
|
|
Feb 04 01:27:20 PM PST 24 |
Feb 04 01:27:27 PM PST 24 |
2114775410 ps |
| T706 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.3716591815 |
|
|
Feb 04 01:27:50 PM PST 24 |
Feb 04 01:28:01 PM PST 24 |
32024506137 ps |
| T707 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3468635427 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:05 PM PST 24 |
2480942463 ps |
| T708 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2283266406 |
|
|
Feb 04 01:28:55 PM PST 24 |
Feb 04 01:29:06 PM PST 24 |
2451869575 ps |
| T709 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.990459407 |
|
|
Feb 04 01:31:55 PM PST 24 |
Feb 04 01:33:10 PM PST 24 |
55479298598 ps |
| T249 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2073214874 |
|
|
Feb 04 01:30:44 PM PST 24 |
Feb 04 01:30:54 PM PST 24 |
3370407059 ps |
| T710 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.4257480654 |
|
|
Feb 04 01:27:50 PM PST 24 |
Feb 04 01:28:06 PM PST 24 |
8070185504 ps |
| T711 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.870655350 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:30:08 PM PST 24 |
27080920767 ps |
| T712 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.764475892 |
|
|
Feb 04 01:29:15 PM PST 24 |
Feb 04 01:29:25 PM PST 24 |
2512418632 ps |
| T713 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2575909715 |
|
|
Feb 04 01:31:41 PM PST 24 |
Feb 04 01:31:52 PM PST 24 |
10947299123 ps |
| T714 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.1715788919 |
|
|
Feb 04 01:27:31 PM PST 24 |
Feb 04 01:27:36 PM PST 24 |
2023615945 ps |
| T715 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.3753517858 |
|
|
Feb 04 01:30:13 PM PST 24 |
Feb 04 01:30:19 PM PST 24 |
2448540347 ps |
| T716 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3563281917 |
|
|
Feb 04 01:29:03 PM PST 24 |
Feb 04 01:29:11 PM PST 24 |
10178106591 ps |
| T717 |
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.288287189 |
|
|
Feb 04 01:29:42 PM PST 24 |
Feb 04 01:29:56 PM PST 24 |
2608278883 ps |
| T718 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.1890303175 |
|
|
Feb 04 01:27:38 PM PST 24 |
Feb 04 01:27:44 PM PST 24 |
2014708715 ps |
| T719 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.2829153445 |
|
|
Feb 04 01:30:44 PM PST 24 |
Feb 04 01:30:49 PM PST 24 |
2516166388 ps |
| T346 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.2390932380 |
|
|
Feb 04 01:30:47 PM PST 24 |
Feb 04 01:35:46 PM PST 24 |
113246527937 ps |
| T233 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3596276150 |
|
|
Feb 04 01:30:50 PM PST 24 |
Feb 04 01:30:58 PM PST 24 |
3921599020 ps |
| T261 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.672222047 |
|
|
Feb 04 01:27:47 PM PST 24 |
Feb 04 01:30:09 PM PST 24 |
55637074893 ps |
| T385 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1309436228 |
|
|
Feb 04 01:29:02 PM PST 24 |
Feb 04 01:31:18 PM PST 24 |
102817057430 ps |
| T720 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2832371958 |
|
|
Feb 04 01:28:12 PM PST 24 |
Feb 04 01:28:15 PM PST 24 |
3255639479 ps |
| T721 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3972834431 |
|
|
Feb 04 01:28:52 PM PST 24 |
Feb 04 01:29:05 PM PST 24 |
2107271726 ps |
| T722 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.388445637 |
|
|
Feb 04 01:30:33 PM PST 24 |
Feb 04 01:32:08 PM PST 24 |
1766346086080 ps |
| T723 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.1511902934 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:29:11 PM PST 24 |
4129485008 ps |
| T128 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2361031948 |
|
|
Feb 04 01:30:45 PM PST 24 |
Feb 04 01:30:52 PM PST 24 |
5378704870 ps |
| T724 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1934737461 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 02:26:07 PM PST 24 |
1317296067389 ps |
| T725 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.729856229 |
|
|
Feb 04 01:30:30 PM PST 24 |
Feb 04 01:30:33 PM PST 24 |
3462959830 ps |
| T285 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3982501542 |
|
|
Feb 04 01:30:58 PM PST 24 |
Feb 04 01:33:35 PM PST 24 |
62602967133 ps |
| T399 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2704974427 |
|
|
Feb 04 01:28:55 PM PST 24 |
Feb 04 01:31:16 PM PST 24 |
55208906018 ps |
| T726 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.2969437982 |
|
|
Feb 04 01:29:01 PM PST 24 |
Feb 04 01:29:06 PM PST 24 |
2625426042 ps |
| T727 |
/workspace/coverage/default/21.sysrst_ctrl_alert_test.759906086 |
|
|
Feb 04 01:29:14 PM PST 24 |
Feb 04 01:29:21 PM PST 24 |
2014850566 ps |
| T728 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.487812228 |
|
|
Feb 04 01:28:57 PM PST 24 |
Feb 04 01:29:03 PM PST 24 |
2111865979 ps |
| T729 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2030014930 |
|
|
Feb 04 01:29:16 PM PST 24 |
Feb 04 01:29:37 PM PST 24 |
26607213671 ps |
| T730 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3261803294 |
|
|
Feb 04 01:30:47 PM PST 24 |
Feb 04 01:30:58 PM PST 24 |
2471426150 ps |
| T79 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1606785446 |
|
|
Feb 04 01:31:55 PM PST 24 |
Feb 04 01:32:36 PM PST 24 |
54832600625 ps |
| T394 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1291966488 |
|
|
Feb 04 01:31:56 PM PST 24 |
Feb 04 01:33:30 PM PST 24 |
70431829162 ps |
| T731 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.143881596 |
|
|
Feb 04 01:28:54 PM PST 24 |
Feb 04 01:29:10 PM PST 24 |
8654651971 ps |
| T732 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1852888071 |
|
|
Feb 04 01:29:56 PM PST 24 |
Feb 04 01:29:58 PM PST 24 |
2582996811 ps |
| T172 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3680943016 |
|
|
Feb 04 01:30:49 PM PST 24 |
Feb 04 01:32:07 PM PST 24 |
63280149443 ps |
| T179 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.655499837 |
|
|
Feb 04 01:27:46 PM PST 24 |
Feb 04 01:27:51 PM PST 24 |
2728324054 ps |
| T180 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.1795392890 |
|
|
Feb 04 01:27:21 PM PST 24 |
Feb 04 01:27:24 PM PST 24 |
2635271795 ps |
| T262 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.64072297 |
|
|
Feb 04 01:27:19 PM PST 24 |
Feb 04 01:28:37 PM PST 24 |
166265173970 ps |
| T733 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.458019567 |
|
|
Feb 04 01:30:46 PM PST 24 |
Feb 04 01:30:49 PM PST 24 |
2259359419 ps |
| T734 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3132746955 |
|
|
Feb 04 01:28:26 PM PST 24 |
Feb 04 01:28:32 PM PST 24 |
2504177608 ps |
| T735 |
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.1462878424 |
|
|
Feb 04 01:29:01 PM PST 24 |
Feb 04 01:29:11 PM PST 24 |
2513803231 ps |
| T736 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.125165606 |
|
|
Feb 04 01:30:44 PM PST 24 |
Feb 04 01:30:49 PM PST 24 |
3566661292 ps |
| T737 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2838213520 |
|
|
Feb 04 01:30:59 PM PST 24 |
Feb 04 01:31:05 PM PST 24 |
2466055339 ps |
| T738 |
/workspace/coverage/default/17.sysrst_ctrl_alert_test.1029922998 |
|
|
Feb 04 01:29:03 PM PST 24 |
Feb 04 01:29:11 PM PST 24 |
2037884368 ps |
| T739 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2726654233 |
|
|
Feb 04 01:31:00 PM PST 24 |
Feb 04 01:32:23 PM PST 24 |
166686666420 ps |
| T740 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.87267696 |
|
|
Feb 04 01:27:42 PM PST 24 |
Feb 04 01:27:48 PM PST 24 |
2109907590 ps |
| T741 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.4240546613 |
|
|
Feb 04 01:30:13 PM PST 24 |
Feb 04 01:30:20 PM PST 24 |
3715018852 ps |
| T142 |
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1346859073 |
|
|
Feb 04 01:30:18 PM PST 24 |
Feb 04 01:30:28 PM PST 24 |
3931976593 ps |
| T184 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.504054984 |
|
|
Feb 04 01:28:07 PM PST 24 |
Feb 04 01:28:16 PM PST 24 |
3452705058 ps |
| T742 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.2499567872 |
|
|
Feb 04 01:30:26 PM PST 24 |
Feb 04 01:30:34 PM PST 24 |
2235797186 ps |
| T743 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.1778677776 |
|
|
Feb 04 01:30:12 PM PST 24 |
Feb 04 01:30:18 PM PST 24 |
12794409152 ps |
| T744 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.785619862 |
|
|
Feb 04 01:31:15 PM PST 24 |
Feb 04 01:31:25 PM PST 24 |
2510530878 ps |
| T745 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.214832980 |
|
|
Feb 04 01:30:55 PM PST 24 |
Feb 04 01:31:01 PM PST 24 |
6774768467 ps |
| T746 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3956421531 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:29:01 PM PST 24 |
2478235311 ps |
| T747 |
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.748875683 |
|
|
Feb 04 01:31:58 PM PST 24 |
Feb 04 01:38:37 PM PST 24 |
148636672126 ps |
| T748 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3364474583 |
|
|
Feb 04 01:31:58 PM PST 24 |
Feb 04 01:32:49 PM PST 24 |
86237248035 ps |
| T154 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2857402530 |
|
|
Feb 04 01:30:17 PM PST 24 |
Feb 04 01:31:21 PM PST 24 |
107029878031 ps |
| T749 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all.4101015631 |
|
|
Feb 04 01:27:46 PM PST 24 |
Feb 04 01:28:02 PM PST 24 |
17407261379 ps |
| T750 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.3750100627 |
|
|
Feb 04 01:28:58 PM PST 24 |
Feb 04 01:29:04 PM PST 24 |
2018828440 ps |
| T751 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1946264998 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:30:15 PM PST 24 |
2150972847 ps |
| T752 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1223144864 |
|
|
Feb 04 01:30:12 PM PST 24 |
Feb 04 01:30:16 PM PST 24 |
2526484858 ps |
| T753 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2241946574 |
|
|
Feb 04 01:27:21 PM PST 24 |
Feb 04 01:27:34 PM PST 24 |
4215619100 ps |
| T754 |
/workspace/coverage/default/3.sysrst_ctrl_smoke.2502304167 |
|
|
Feb 04 01:27:45 PM PST 24 |
Feb 04 01:27:49 PM PST 24 |
2125481834 ps |
| T755 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2276557788 |
|
|
Feb 04 01:31:37 PM PST 24 |
Feb 04 01:31:41 PM PST 24 |
2515653199 ps |
| T174 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.855918973 |
|
|
Feb 04 01:29:01 PM PST 24 |
Feb 04 01:29:13 PM PST 24 |
3222133596 ps |
| T756 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3475171228 |
|
|
Feb 04 01:28:24 PM PST 24 |
Feb 04 01:28:31 PM PST 24 |
2010277346 ps |
| T757 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.477217443 |
|
|
Feb 04 01:27:50 PM PST 24 |
Feb 04 01:27:56 PM PST 24 |
2074757134 ps |
| T758 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1858067119 |
|
|
Feb 04 01:31:13 PM PST 24 |
Feb 04 01:31:19 PM PST 24 |
3124201743 ps |
| T759 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.3959321076 |
|
|
Feb 04 01:28:56 PM PST 24 |
Feb 04 01:29:02 PM PST 24 |
2013700896 ps |
| T760 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3308033388 |
|
|
Feb 04 01:30:16 PM PST 24 |
Feb 04 01:30:27 PM PST 24 |
2609278390 ps |
| T761 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.3303452684 |
|
|
Feb 04 01:31:41 PM PST 24 |
Feb 04 01:31:51 PM PST 24 |
2524059396 ps |
| T762 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3195872151 |
|
|
Feb 04 01:31:15 PM PST 24 |
Feb 04 01:33:13 PM PST 24 |
141147471690 ps |
| T763 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.4119593876 |
|
|
Feb 04 01:28:55 PM PST 24 |
Feb 04 01:47:14 PM PST 24 |
1704473312158 ps |
| T764 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2279109483 |
|
|
Feb 04 01:28:14 PM PST 24 |
Feb 04 01:28:28 PM PST 24 |
26119072268 ps |
| T375 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2241040130 |
|
|
Feb 04 01:31:03 PM PST 24 |
Feb 04 01:31:31 PM PST 24 |
41252581879 ps |
| T401 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2952064772 |
|
|
Feb 04 01:31:13 PM PST 24 |
Feb 04 01:31:41 PM PST 24 |
232107917490 ps |
| T765 |
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2203136923 |
|
|
Feb 04 01:27:46 PM PST 24 |
Feb 04 01:27:53 PM PST 24 |
2476538812 ps |
| T766 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2964584911 |
|
|
Feb 04 01:28:27 PM PST 24 |
Feb 04 01:47:43 PM PST 24 |
1822482991349 ps |
| T767 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2438324653 |
|
|
Feb 04 01:28:25 PM PST 24 |
Feb 04 01:28:36 PM PST 24 |
6643786498 ps |
| T768 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3779816861 |
|
|
Feb 04 01:31:13 PM PST 24 |
Feb 04 01:32:19 PM PST 24 |
26331922423 ps |
| T769 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3945853764 |
|
|
Feb 04 01:31:36 PM PST 24 |
Feb 04 01:31:40 PM PST 24 |
2039860290 ps |
| T770 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1303483609 |
|
|
Feb 04 01:30:24 PM PST 24 |
Feb 04 01:30:27 PM PST 24 |
2550461941 ps |
| T771 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all.4211509115 |
|
|
Feb 04 01:30:11 PM PST 24 |
Feb 04 01:30:23 PM PST 24 |
6987169388 ps |
| T772 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.1813335839 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:20 PM PST 24 |
7125838154 ps |
| T263 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1828129102 |
|
|
Feb 04 01:31:35 PM PST 24 |
Feb 04 01:32:15 PM PST 24 |
62143250541 ps |
| T773 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2102136737 |
|
|
Feb 04 01:30:20 PM PST 24 |
Feb 04 01:30:35 PM PST 24 |
4587451431 ps |
| T774 |
/workspace/coverage/default/40.sysrst_ctrl_alert_test.4115358716 |
|
|
Feb 04 01:30:50 PM PST 24 |
Feb 04 01:30:54 PM PST 24 |
2049236301 ps |
| T775 |
/workspace/coverage/default/39.sysrst_ctrl_smoke.3173590477 |
|
|
Feb 04 01:30:34 PM PST 24 |
Feb 04 01:30:48 PM PST 24 |
2108789466 ps |
| T307 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.3431674740 |
|
|
Feb 04 01:27:34 PM PST 24 |
Feb 04 01:29:15 PM PST 24 |
42074467028 ps |
| T776 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.536397397 |
|
|
Feb 04 01:29:00 PM PST 24 |
Feb 04 01:29:09 PM PST 24 |
2107606695 ps |
| T777 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1333968735 |
|
|
Feb 04 01:29:15 PM PST 24 |
Feb 04 01:29:19 PM PST 24 |
6425582402 ps |
| T778 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.486707808 |
|
|
Feb 04 01:30:31 PM PST 24 |
Feb 04 01:30:43 PM PST 24 |
3526005233 ps |
| T779 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.1571856258 |
|
|
Feb 04 01:27:31 PM PST 24 |
Feb 04 01:28:52 PM PST 24 |
124493756164 ps |
| T351 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.4171965382 |
|
|
Feb 04 01:28:53 PM PST 24 |
Feb 04 01:30:46 PM PST 24 |
143077298564 ps |