| T134 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3064589860 |
|
|
Feb 07 12:44:57 PM PST 24 |
Feb 07 12:45:05 PM PST 24 |
6100251684 ps |
| T459 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3500325219 |
|
|
Feb 07 12:45:05 PM PST 24 |
Feb 07 12:45:11 PM PST 24 |
2192856255 ps |
| T460 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1372596837 |
|
|
Feb 07 12:46:22 PM PST 24 |
Feb 07 12:46:28 PM PST 24 |
2048653062 ps |
| T461 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1910012070 |
|
|
Feb 07 12:45:38 PM PST 24 |
Feb 07 12:45:54 PM PST 24 |
2512874486 ps |
| T462 |
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.3523211320 |
|
|
Feb 07 12:45:35 PM PST 24 |
Feb 07 12:45:48 PM PST 24 |
3859770763 ps |
| T463 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.584307446 |
|
|
Feb 07 12:46:11 PM PST 24 |
Feb 07 12:46:15 PM PST 24 |
2136283580 ps |
| T464 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.4269928534 |
|
|
Feb 07 12:45:38 PM PST 24 |
Feb 07 12:45:56 PM PST 24 |
2453067427 ps |
| T465 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2418102256 |
|
|
Feb 07 12:44:39 PM PST 24 |
Feb 07 12:44:43 PM PST 24 |
2636428398 ps |
| T466 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2719939317 |
|
|
Feb 07 12:46:05 PM PST 24 |
Feb 07 12:46:16 PM PST 24 |
2450203680 ps |
| T467 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1786629821 |
|
|
Feb 07 12:44:32 PM PST 24 |
Feb 07 12:44:34 PM PST 24 |
3163082926 ps |
| T53 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3198449835 |
|
|
Feb 07 12:44:28 PM PST 24 |
Feb 07 12:45:12 PM PST 24 |
35060911466 ps |
| T468 |
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2243741488 |
|
|
Feb 07 12:45:45 PM PST 24 |
Feb 07 12:45:55 PM PST 24 |
2165370004 ps |
| T469 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.1834159625 |
|
|
Feb 07 12:44:41 PM PST 24 |
Feb 07 12:44:48 PM PST 24 |
14216344114 ps |
| T264 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1911099209 |
|
|
Feb 07 12:44:56 PM PST 24 |
Feb 07 12:45:05 PM PST 24 |
20859518519 ps |
| T470 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2270062850 |
|
|
Feb 07 12:46:57 PM PST 24 |
Feb 07 12:47:04 PM PST 24 |
4003718727 ps |
| T471 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.4233876579 |
|
|
Feb 07 12:44:57 PM PST 24 |
Feb 07 12:45:04 PM PST 24 |
2016824293 ps |
| T472 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3874605102 |
|
|
Feb 07 12:44:33 PM PST 24 |
Feb 07 12:44:36 PM PST 24 |
2529636089 ps |
| T271 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3204866722 |
|
|
Feb 07 12:46:53 PM PST 24 |
Feb 07 12:47:43 PM PST 24 |
42519404711 ps |
| T95 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2556458623 |
|
|
Feb 07 12:46:47 PM PST 24 |
Feb 07 12:48:16 PM PST 24 |
147222788522 ps |
| T125 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1150347224 |
|
|
Feb 07 12:45:36 PM PST 24 |
Feb 07 12:45:41 PM PST 24 |
7593580490 ps |
| T126 |
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2949727314 |
|
|
Feb 07 12:46:48 PM PST 24 |
Feb 07 12:46:57 PM PST 24 |
2511530286 ps |
| T158 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1977970195 |
|
|
Feb 07 12:46:26 PM PST 24 |
Feb 07 12:50:35 PM PST 24 |
995969602105 ps |
| T113 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.2041991526 |
|
|
Feb 07 12:47:00 PM PST 24 |
Feb 07 12:48:54 PM PST 24 |
78755259097 ps |
| T279 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.3257365940 |
|
|
Feb 07 12:45:43 PM PST 24 |
Feb 07 12:45:58 PM PST 24 |
2013350494 ps |
| T280 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.3422772310 |
|
|
Feb 07 12:46:47 PM PST 24 |
Feb 07 12:46:51 PM PST 24 |
2033799416 ps |
| T159 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.1312321464 |
|
|
Feb 07 12:45:55 PM PST 24 |
Feb 07 12:46:13 PM PST 24 |
4711597436 ps |
| T61 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.66025528 |
|
|
Feb 07 12:47:00 PM PST 24 |
Feb 07 12:47:07 PM PST 24 |
4134341667 ps |
| T167 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1545417483 |
|
|
Feb 07 12:46:58 PM PST 24 |
Feb 07 12:48:58 PM PST 24 |
50860302996 ps |
| T253 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.1366888504 |
|
|
Feb 07 12:45:44 PM PST 24 |
Feb 07 12:45:56 PM PST 24 |
4908806036 ps |
| T114 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.551635350 |
|
|
Feb 07 12:45:22 PM PST 24 |
Feb 07 12:46:58 PM PST 24 |
35351079356 ps |
| T254 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.4026982002 |
|
|
Feb 07 12:45:04 PM PST 24 |
Feb 07 12:45:12 PM PST 24 |
2109067822 ps |
| T255 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.175954213 |
|
|
Feb 07 12:46:55 PM PST 24 |
Feb 07 12:47:31 PM PST 24 |
116893994158 ps |
| T256 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1873468144 |
|
|
Feb 07 12:45:17 PM PST 24 |
Feb 07 12:45:19 PM PST 24 |
2786472103 ps |
| T257 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1004649975 |
|
|
Feb 07 12:45:57 PM PST 24 |
Feb 07 12:46:14 PM PST 24 |
3407244404 ps |
| T258 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.362860547 |
|
|
Feb 07 12:45:54 PM PST 24 |
Feb 07 12:46:05 PM PST 24 |
2555023088 ps |
| T473 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.211114491 |
|
|
Feb 07 12:44:56 PM PST 24 |
Feb 07 12:45:04 PM PST 24 |
2511865080 ps |
| T54 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.157508743 |
|
|
Feb 07 12:46:58 PM PST 24 |
Feb 07 12:47:10 PM PST 24 |
16784695761 ps |
| T474 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2145941514 |
|
|
Feb 07 12:45:07 PM PST 24 |
Feb 07 12:45:17 PM PST 24 |
2457527076 ps |
| T475 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2620098496 |
|
|
Feb 07 12:44:50 PM PST 24 |
Feb 07 12:44:57 PM PST 24 |
2012606297 ps |
| T160 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.2965020181 |
|
|
Feb 07 12:45:34 PM PST 24 |
Feb 07 12:45:41 PM PST 24 |
4083976929 ps |
| T476 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.2474081596 |
|
|
Feb 07 12:46:06 PM PST 24 |
Feb 07 12:46:16 PM PST 24 |
5228380220 ps |
| T477 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1331296011 |
|
|
Feb 07 12:44:57 PM PST 24 |
Feb 07 12:45:01 PM PST 24 |
2624943320 ps |
| T478 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.3808092940 |
|
|
Feb 07 12:45:37 PM PST 24 |
Feb 07 12:46:01 PM PST 24 |
14256642387 ps |
| T479 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.824213598 |
|
|
Feb 07 12:44:56 PM PST 24 |
Feb 07 12:45:00 PM PST 24 |
8073859007 ps |
| T480 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1227994955 |
|
|
Feb 07 12:45:03 PM PST 24 |
Feb 07 12:45:09 PM PST 24 |
5671831386 ps |
| T481 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.174333246 |
|
|
Feb 07 12:46:56 PM PST 24 |
Feb 07 12:47:00 PM PST 24 |
4379355663 ps |
| T482 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.964588002 |
|
|
Feb 07 12:44:57 PM PST 24 |
Feb 07 12:45:02 PM PST 24 |
2250053621 ps |
| T483 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.1189337769 |
|
|
Feb 07 12:46:14 PM PST 24 |
Feb 07 12:46:19 PM PST 24 |
2024933195 ps |
| T484 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.4218252297 |
|
|
Feb 07 12:46:47 PM PST 24 |
Feb 07 12:46:50 PM PST 24 |
2032334715 ps |
| T485 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.157566050 |
|
|
Feb 07 12:44:43 PM PST 24 |
Feb 07 12:44:47 PM PST 24 |
3236520477 ps |
| T486 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.4219254586 |
|
|
Feb 07 12:46:51 PM PST 24 |
Feb 07 12:47:02 PM PST 24 |
10852932517 ps |
| T487 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1308888703 |
|
|
Feb 07 12:44:56 PM PST 24 |
Feb 07 12:45:00 PM PST 24 |
2535536974 ps |
| T284 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.1901177771 |
|
|
Feb 07 12:46:15 PM PST 24 |
Feb 07 12:47:30 PM PST 24 |
113803413262 ps |
| T488 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1443406038 |
|
|
Feb 07 12:46:07 PM PST 24 |
Feb 07 12:46:17 PM PST 24 |
2454834382 ps |
| T489 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1823219197 |
|
|
Feb 07 12:44:56 PM PST 24 |
Feb 07 12:45:04 PM PST 24 |
2473314474 ps |
| T490 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.752406523 |
|
|
Feb 07 12:46:31 PM PST 24 |
Feb 07 12:46:40 PM PST 24 |
6611781161 ps |
| T491 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.3477137794 |
|
|
Feb 07 12:45:38 PM PST 24 |
Feb 07 12:45:51 PM PST 24 |
2527824241 ps |
| T492 |
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3219074548 |
|
|
Feb 07 12:45:36 PM PST 24 |
Feb 07 12:45:45 PM PST 24 |
2235779810 ps |
| T493 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.2144189461 |
|
|
Feb 07 12:46:25 PM PST 24 |
Feb 07 12:46:30 PM PST 24 |
2518458102 ps |
| T115 |
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1129624524 |
|
|
Feb 07 12:47:01 PM PST 24 |
Feb 07 12:48:02 PM PST 24 |
86058456147 ps |
| T494 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.325756639 |
|
|
Feb 07 12:45:43 PM PST 24 |
Feb 07 12:45:54 PM PST 24 |
2498213530 ps |
| T495 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.1301205282 |
|
|
Feb 07 12:45:36 PM PST 24 |
Feb 07 12:45:42 PM PST 24 |
2636101916 ps |
| T496 |
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3411961300 |
|
|
Feb 07 12:45:44 PM PST 24 |
Feb 07 12:45:59 PM PST 24 |
2057325815 ps |
| T497 |
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1131369221 |
|
|
Feb 07 12:45:18 PM PST 24 |
Feb 07 12:45:27 PM PST 24 |
6056639314 ps |
| T209 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1589724885 |
|
|
Feb 07 12:45:06 PM PST 24 |
Feb 07 12:47:06 PM PST 24 |
641489762261 ps |
| T498 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2227894516 |
|
|
Feb 07 12:46:30 PM PST 24 |
Feb 07 12:46:40 PM PST 24 |
2613821253 ps |
| T204 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.1541324747 |
|
|
Feb 07 12:46:33 PM PST 24 |
Feb 07 12:47:10 PM PST 24 |
15370708072 ps |
| T499 |
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.2114557227 |
|
|
Feb 07 12:45:46 PM PST 24 |
Feb 07 12:46:02 PM PST 24 |
2462321756 ps |
| T356 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2808705093 |
|
|
Feb 07 12:44:56 PM PST 24 |
Feb 07 12:50:04 PM PST 24 |
114891575637 ps |
| T327 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.4022906747 |
|
|
Feb 07 12:46:47 PM PST 24 |
Feb 07 12:47:13 PM PST 24 |
98109815785 ps |
| T500 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.653651908 |
|
|
Feb 07 12:44:28 PM PST 24 |
Feb 07 12:44:31 PM PST 24 |
2409683779 ps |
| T501 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1314188011 |
|
|
Feb 07 12:45:26 PM PST 24 |
Feb 07 12:45:38 PM PST 24 |
3550452325 ps |
| T336 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.887787535 |
|
|
Feb 07 12:47:05 PM PST 24 |
Feb 07 12:50:18 PM PST 24 |
68826665252 ps |
| T502 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.46814128 |
|
|
Feb 07 12:44:37 PM PST 24 |
Feb 07 12:44:41 PM PST 24 |
2548768809 ps |
| T283 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2399127274 |
|
|
Feb 07 12:46:47 PM PST 24 |
Feb 07 12:47:14 PM PST 24 |
34520613019 ps |
| T503 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.4261219513 |
|
|
Feb 07 12:45:18 PM PST 24 |
Feb 07 12:45:23 PM PST 24 |
2464670244 ps |
| T504 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.813265617 |
|
|
Feb 07 12:46:58 PM PST 24 |
Feb 07 12:48:03 PM PST 24 |
24800386999 ps |
| T505 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.4127017680 |
|
|
Feb 07 12:47:08 PM PST 24 |
Feb 07 12:47:12 PM PST 24 |
3896692666 ps |
| T506 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2196081212 |
|
|
Feb 07 12:46:30 PM PST 24 |
Feb 07 12:46:37 PM PST 24 |
2768355562 ps |
| T507 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.2804736181 |
|
|
Feb 07 12:44:32 PM PST 24 |
Feb 07 12:44:39 PM PST 24 |
2510916954 ps |
| T291 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1753801650 |
|
|
Feb 07 12:44:33 PM PST 24 |
Feb 07 12:46:18 PM PST 24 |
42021416567 ps |
| T508 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3915338134 |
|
|
Feb 07 12:46:11 PM PST 24 |
Feb 07 12:46:14 PM PST 24 |
3406954083 ps |
| T93 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.2893764316 |
|
|
Feb 07 12:44:39 PM PST 24 |
Feb 07 12:47:53 PM PST 24 |
75960580635 ps |
| T509 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.4171877399 |
|
|
Feb 07 12:46:20 PM PST 24 |
Feb 07 12:46:23 PM PST 24 |
2094857470 ps |
| T510 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2438790907 |
|
|
Feb 07 12:44:52 PM PST 24 |
Feb 07 12:44:55 PM PST 24 |
2235351366 ps |
| T511 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2137788856 |
|
|
Feb 07 12:46:43 PM PST 24 |
Feb 07 12:46:52 PM PST 24 |
2509499163 ps |
| T512 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3888047714 |
|
|
Feb 07 12:46:46 PM PST 24 |
Feb 07 12:46:50 PM PST 24 |
2217134742 ps |
| T270 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.4027599704 |
|
|
Feb 07 12:47:05 PM PST 24 |
Feb 07 12:50:01 PM PST 24 |
70350206121 ps |
| T274 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.3847580419 |
|
|
Feb 07 12:46:07 PM PST 24 |
Feb 07 12:46:21 PM PST 24 |
36019317718 ps |
| T281 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.59886496 |
|
|
Feb 07 12:47:05 PM PST 24 |
Feb 07 12:48:11 PM PST 24 |
30443664077 ps |
| T282 |
/workspace/coverage/default/15.sysrst_ctrl_alert_test.2169580238 |
|
|
Feb 07 12:45:22 PM PST 24 |
Feb 07 12:45:29 PM PST 24 |
2011267015 ps |
| T513 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.189931791 |
|
|
Feb 07 12:46:06 PM PST 24 |
Feb 07 12:46:12 PM PST 24 |
2235126960 ps |
| T514 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.4065242667 |
|
|
Feb 07 12:44:41 PM PST 24 |
Feb 07 12:44:43 PM PST 24 |
2666936545 ps |
| T515 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.376502171 |
|
|
Feb 07 12:44:57 PM PST 24 |
Feb 07 12:45:02 PM PST 24 |
2114180621 ps |
| T516 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.3234468963 |
|
|
Feb 07 12:45:37 PM PST 24 |
Feb 07 12:45:54 PM PST 24 |
2112440098 ps |
| T517 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2845506704 |
|
|
Feb 07 12:44:53 PM PST 24 |
Feb 07 12:45:02 PM PST 24 |
3089747368 ps |
| T350 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3873476858 |
|
|
Feb 07 12:45:50 PM PST 24 |
Feb 07 12:48:24 PM PST 24 |
93741235214 ps |
| T367 |
/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1639097660 |
|
|
Feb 07 12:45:41 PM PST 24 |
Feb 07 12:48:24 PM PST 24 |
2108809197884 ps |
| T518 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1907386635 |
|
|
Feb 07 12:46:07 PM PST 24 |
Feb 07 12:46:15 PM PST 24 |
9441731198 ps |
| T519 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.2479551251 |
|
|
Feb 07 12:46:06 PM PST 24 |
Feb 07 12:46:15 PM PST 24 |
2007704060 ps |
| T520 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.2702188212 |
|
|
Feb 07 12:44:39 PM PST 24 |
Feb 07 12:44:47 PM PST 24 |
2262788776 ps |
| T521 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2380824004 |
|
|
Feb 07 12:45:25 PM PST 24 |
Feb 07 12:45:40 PM PST 24 |
4938520291 ps |
| T522 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.4032278780 |
|
|
Feb 07 12:46:55 PM PST 24 |
Feb 07 12:47:00 PM PST 24 |
2612151458 ps |
| T523 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2944177160 |
|
|
Feb 07 12:45:25 PM PST 24 |
Feb 07 12:45:35 PM PST 24 |
2610814117 ps |
| T345 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.267571157 |
|
|
Feb 07 12:47:07 PM PST 24 |
Feb 07 12:47:32 PM PST 24 |
107953451811 ps |
| T524 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.151485682 |
|
|
Feb 07 12:45:51 PM PST 24 |
Feb 07 12:46:08 PM PST 24 |
2108983935 ps |
| T339 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1216151435 |
|
|
Feb 07 12:47:08 PM PST 24 |
Feb 07 12:54:12 PM PST 24 |
161584222971 ps |
| T525 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.877493894 |
|
|
Feb 07 12:44:57 PM PST 24 |
Feb 07 12:45:01 PM PST 24 |
5960990442 ps |
| T526 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.4265548139 |
|
|
Feb 07 12:44:49 PM PST 24 |
Feb 07 12:44:53 PM PST 24 |
3413290948 ps |
| T527 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1651760920 |
|
|
Feb 07 12:45:28 PM PST 24 |
Feb 07 12:45:38 PM PST 24 |
2441386387 ps |
| T528 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3247658247 |
|
|
Feb 07 12:45:19 PM PST 24 |
Feb 07 12:45:22 PM PST 24 |
2635718872 ps |
| T529 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.1359503871 |
|
|
Feb 07 12:45:40 PM PST 24 |
Feb 07 12:45:59 PM PST 24 |
2113417718 ps |
| T326 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.877887469 |
|
|
Feb 07 12:47:05 PM PST 24 |
Feb 07 12:50:37 PM PST 24 |
77996958982 ps |
| T97 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.336275704 |
|
|
Feb 07 12:45:26 PM PST 24 |
Feb 07 12:45:33 PM PST 24 |
5272322332 ps |
| T144 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.454129990 |
|
|
Feb 07 12:46:51 PM PST 24 |
Feb 07 12:46:54 PM PST 24 |
3681156906 ps |
| T145 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.3033157279 |
|
|
Feb 07 12:46:28 PM PST 24 |
Feb 07 12:49:42 PM PST 24 |
148981481660 ps |
| T146 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.201772643 |
|
|
Feb 07 12:45:01 PM PST 24 |
Feb 07 12:51:38 PM PST 24 |
153822473824 ps |
| T147 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3534105990 |
|
|
Feb 07 12:46:06 PM PST 24 |
Feb 07 12:46:11 PM PST 24 |
2276194580 ps |
| T62 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2653278639 |
|
|
Feb 07 12:45:44 PM PST 24 |
Feb 07 12:47:33 PM PST 24 |
42927644842 ps |
| T530 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.4211962498 |
|
|
Feb 07 12:45:46 PM PST 24 |
Feb 07 12:45:56 PM PST 24 |
2136205712 ps |
| T531 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3295887952 |
|
|
Feb 07 12:46:55 PM PST 24 |
Feb 07 12:47:02 PM PST 24 |
2011427409 ps |
| T532 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.426260024 |
|
|
Feb 07 12:46:18 PM PST 24 |
Feb 07 12:46:24 PM PST 24 |
10358786461 ps |
| T358 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.119761399 |
|
|
Feb 07 12:45:41 PM PST 24 |
Feb 07 12:46:50 PM PST 24 |
87361347403 ps |
| T533 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3270991592 |
|
|
Feb 07 12:47:02 PM PST 24 |
Feb 07 12:47:06 PM PST 24 |
2032337237 ps |
| T116 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3431264253 |
|
|
Feb 07 12:46:42 PM PST 24 |
Feb 07 12:48:24 PM PST 24 |
76118388384 ps |
| T534 |
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.1706902783 |
|
|
Feb 07 12:46:01 PM PST 24 |
Feb 07 12:46:13 PM PST 24 |
3001088608 ps |
| T535 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2369175080 |
|
|
Feb 07 12:46:12 PM PST 24 |
Feb 07 12:46:27 PM PST 24 |
4749019077 ps |
| T536 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3189532255 |
|
|
Feb 07 12:46:54 PM PST 24 |
Feb 07 12:46:58 PM PST 24 |
3221476332 ps |
| T168 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.500481883 |
|
|
Feb 07 12:45:37 PM PST 24 |
Feb 07 12:45:57 PM PST 24 |
3685696662 ps |
| T537 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1304862925 |
|
|
Feb 07 12:46:42 PM PST 24 |
Feb 07 12:46:47 PM PST 24 |
3635592322 ps |
| T538 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.2175537156 |
|
|
Feb 07 12:45:28 PM PST 24 |
Feb 07 12:45:32 PM PST 24 |
2135825834 ps |
| T340 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1528144771 |
|
|
Feb 07 12:47:04 PM PST 24 |
Feb 07 12:49:34 PM PST 24 |
56957999395 ps |
| T205 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3067852465 |
|
|
Feb 07 12:47:04 PM PST 24 |
Feb 07 12:47:08 PM PST 24 |
3815260716 ps |
| T539 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.786798896 |
|
|
Feb 07 12:45:12 PM PST 24 |
Feb 07 12:45:16 PM PST 24 |
2535688698 ps |
| T540 |
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.340103017 |
|
|
Feb 07 12:44:35 PM PST 24 |
Feb 07 12:44:41 PM PST 24 |
2623067314 ps |
| T541 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.3983714682 |
|
|
Feb 07 12:44:35 PM PST 24 |
Feb 07 12:44:45 PM PST 24 |
7001951122 ps |
| T542 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.1001598858 |
|
|
Feb 07 12:46:05 PM PST 24 |
Feb 07 12:46:13 PM PST 24 |
2022473364 ps |
| T543 |
/workspace/coverage/default/14.sysrst_ctrl_alert_test.1167053635 |
|
|
Feb 07 12:45:07 PM PST 24 |
Feb 07 12:45:17 PM PST 24 |
2014200609 ps |
| T206 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3666828111 |
|
|
Feb 07 12:46:44 PM PST 24 |
Feb 07 12:46:53 PM PST 24 |
10960013906 ps |
| T544 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3344529836 |
|
|
Feb 07 12:47:01 PM PST 24 |
Feb 07 12:48:49 PM PST 24 |
41042238349 ps |
| T359 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.3619193166 |
|
|
Feb 07 12:46:23 PM PST 24 |
Feb 07 12:47:07 PM PST 24 |
68199975618 ps |
| T210 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2523972246 |
|
|
Feb 07 12:46:30 PM PST 24 |
Feb 07 12:46:32 PM PST 24 |
2727414538 ps |
| T368 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1060424171 |
|
|
Feb 07 12:45:49 PM PST 24 |
Feb 07 12:47:30 PM PST 24 |
39001055031 ps |
| T91 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1592729402 |
|
|
Feb 07 12:44:32 PM PST 24 |
Feb 07 12:45:48 PM PST 24 |
128004352070 ps |
| T231 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3278469059 |
|
|
Feb 07 12:46:51 PM PST 24 |
Feb 07 12:46:53 PM PST 24 |
2214777203 ps |
| T545 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.90261155 |
|
|
Feb 07 12:44:52 PM PST 24 |
Feb 07 12:44:57 PM PST 24 |
3334331001 ps |
| T117 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1536944036 |
|
|
Feb 07 12:46:26 PM PST 24 |
Feb 07 12:52:09 PM PST 24 |
129798825410 ps |
| T546 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.2582292209 |
|
|
Feb 07 12:45:35 PM PST 24 |
Feb 07 12:45:40 PM PST 24 |
2257876039 ps |
| T547 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3577400983 |
|
|
Feb 07 12:46:44 PM PST 24 |
Feb 07 12:46:49 PM PST 24 |
2011938666 ps |
| T548 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.1824780640 |
|
|
Feb 07 12:47:01 PM PST 24 |
Feb 07 12:47:09 PM PST 24 |
2113635595 ps |
| T364 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.3154226723 |
|
|
Feb 07 12:45:06 PM PST 24 |
Feb 07 12:46:15 PM PST 24 |
25828960532 ps |
| T330 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1465377846 |
|
|
Feb 07 12:47:16 PM PST 24 |
Feb 07 12:48:29 PM PST 24 |
53502078963 ps |
| T170 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.4233547105 |
|
|
Feb 07 12:46:30 PM PST 24 |
Feb 07 12:47:38 PM PST 24 |
37353967221 ps |
| T180 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.567613871 |
|
|
Feb 07 12:44:37 PM PST 24 |
Feb 07 12:44:45 PM PST 24 |
2860571141 ps |
| T96 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2384361666 |
|
|
Feb 07 12:46:43 PM PST 24 |
Feb 07 12:46:48 PM PST 24 |
7585079901 ps |
| T171 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.2225020234 |
|
|
Feb 07 12:45:22 PM PST 24 |
Feb 07 12:45:35 PM PST 24 |
4447985292 ps |
| T181 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.481239875 |
|
|
Feb 07 12:45:25 PM PST 24 |
Feb 07 12:45:30 PM PST 24 |
2050628743 ps |
| T182 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1021166655 |
|
|
Feb 07 12:47:21 PM PST 24 |
Feb 07 12:47:35 PM PST 24 |
48586932226 ps |
| T183 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2238672260 |
|
|
Feb 07 12:44:37 PM PST 24 |
Feb 07 12:46:15 PM PST 24 |
90020454259 ps |
| T184 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1126646366 |
|
|
Feb 07 12:46:47 PM PST 24 |
Feb 07 12:47:36 PM PST 24 |
78437958925 ps |
| T185 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3658622715 |
|
|
Feb 07 12:44:56 PM PST 24 |
Feb 07 12:45:02 PM PST 24 |
7005513777 ps |
| T186 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3804996005 |
|
|
Feb 07 12:45:34 PM PST 24 |
Feb 07 12:50:11 PM PST 24 |
109462456441 ps |
| T241 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1109577920 |
|
|
Feb 07 12:45:06 PM PST 24 |
Feb 07 12:45:54 PM PST 24 |
169120721011 ps |
| T549 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.2820899748 |
|
|
Feb 07 12:45:23 PM PST 24 |
Feb 07 12:45:26 PM PST 24 |
2455645499 ps |
| T550 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.569132135 |
|
|
Feb 07 12:46:44 PM PST 24 |
Feb 07 12:46:50 PM PST 24 |
2615530995 ps |
| T551 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1124280131 |
|
|
Feb 07 12:46:12 PM PST 24 |
Feb 07 12:46:24 PM PST 24 |
3865471985 ps |
| T552 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3954796299 |
|
|
Feb 07 12:45:38 PM PST 24 |
Feb 07 12:45:54 PM PST 24 |
3353114835 ps |
| T553 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.4069967126 |
|
|
Feb 07 12:46:30 PM PST 24 |
Feb 07 12:46:37 PM PST 24 |
11812532812 ps |
| T175 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2633203723 |
|
|
Feb 07 12:44:49 PM PST 24 |
Feb 07 12:47:19 PM PST 24 |
295971612468 ps |
| T554 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.419334649 |
|
|
Feb 07 12:44:35 PM PST 24 |
Feb 07 12:44:39 PM PST 24 |
3998932284 ps |
| T555 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3004444268 |
|
|
Feb 07 12:46:43 PM PST 24 |
Feb 07 12:46:52 PM PST 24 |
2452758429 ps |
| T285 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.1976319813 |
|
|
Feb 07 12:46:31 PM PST 24 |
Feb 07 12:46:53 PM PST 24 |
31785113018 ps |
| T556 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1833391183 |
|
|
Feb 07 12:46:47 PM PST 24 |
Feb 07 12:46:50 PM PST 24 |
2793191806 ps |
| T357 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1777764247 |
|
|
Feb 07 12:44:55 PM PST 24 |
Feb 07 12:45:33 PM PST 24 |
52217833757 ps |
| T118 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2637210209 |
|
|
Feb 07 12:45:40 PM PST 24 |
Feb 07 12:46:35 PM PST 24 |
450810135778 ps |
| T162 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.2944919542 |
|
|
Feb 07 12:45:53 PM PST 24 |
Feb 07 12:46:44 PM PST 24 |
16805211900 ps |
| T557 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.4150702435 |
|
|
Feb 07 12:44:50 PM PST 24 |
Feb 07 12:44:59 PM PST 24 |
2607866641 ps |
| T558 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.2051415899 |
|
|
Feb 07 12:44:31 PM PST 24 |
Feb 07 12:44:33 PM PST 24 |
2033027346 ps |
| T559 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2783560748 |
|
|
Feb 07 12:45:36 PM PST 24 |
Feb 07 12:45:46 PM PST 24 |
2458182670 ps |
| T560 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1922936819 |
|
|
Feb 07 12:46:21 PM PST 24 |
Feb 07 12:46:25 PM PST 24 |
2533126429 ps |
| T561 |
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.4194814764 |
|
|
Feb 07 12:44:33 PM PST 24 |
Feb 07 12:44:42 PM PST 24 |
2985227023 ps |
| T562 |
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1345090951 |
|
|
Feb 07 12:46:49 PM PST 24 |
Feb 07 12:46:55 PM PST 24 |
3345809910 ps |
| T207 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.2550789079 |
|
|
Feb 07 12:46:06 PM PST 24 |
Feb 07 12:46:19 PM PST 24 |
4220258536 ps |
| T176 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3487975703 |
|
|
Feb 07 12:46:28 PM PST 24 |
Feb 07 12:46:32 PM PST 24 |
2930517193 ps |
| T563 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3584459340 |
|
|
Feb 07 12:44:57 PM PST 24 |
Feb 07 12:45:00 PM PST 24 |
2489730976 ps |
| T564 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1608244529 |
|
|
Feb 07 12:44:52 PM PST 24 |
Feb 07 12:44:59 PM PST 24 |
2609497681 ps |
| T349 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3599693112 |
|
|
Feb 07 12:47:05 PM PST 24 |
Feb 07 12:48:01 PM PST 24 |
75488541648 ps |
| T288 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1482888362 |
|
|
Feb 07 12:44:49 PM PST 24 |
Feb 07 12:45:36 PM PST 24 |
66261980390 ps |
| T289 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.2038171288 |
|
|
Feb 07 12:44:33 PM PST 24 |
Feb 07 12:46:06 PM PST 24 |
143765915633 ps |
| T565 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.1532747242 |
|
|
Feb 07 12:45:56 PM PST 24 |
Feb 07 12:46:12 PM PST 24 |
3198005640 ps |
| T566 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.226424500 |
|
|
Feb 07 12:45:25 PM PST 24 |
Feb 07 12:45:34 PM PST 24 |
3667656229 ps |
| T262 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.1926664956 |
|
|
Feb 07 12:46:16 PM PST 24 |
Feb 07 12:46:30 PM PST 24 |
3811580597 ps |
| T163 |
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3147621080 |
|
|
Feb 07 12:46:46 PM PST 24 |
Feb 07 12:46:51 PM PST 24 |
5861696141 ps |
| T337 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2401335955 |
|
|
Feb 07 12:45:51 PM PST 24 |
Feb 07 12:49:30 PM PST 24 |
76027530297 ps |
| T98 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all.3697783580 |
|
|
Feb 07 12:46:24 PM PST 24 |
Feb 07 12:52:37 PM PST 24 |
142345330915 ps |
| T567 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.4167179681 |
|
|
Feb 07 12:45:36 PM PST 24 |
Feb 07 12:58:12 PM PST 24 |
265948150836 ps |
| T119 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3197960518 |
|
|
Feb 07 12:47:05 PM PST 24 |
Feb 07 12:48:05 PM PST 24 |
21829629519 ps |
| T568 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1473921071 |
|
|
Feb 07 12:46:30 PM PST 24 |
Feb 07 12:46:39 PM PST 24 |
2511165280 ps |
| T569 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.685465601 |
|
|
Feb 07 12:44:35 PM PST 24 |
Feb 07 12:44:41 PM PST 24 |
3382038511 ps |
| T164 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.1024258083 |
|
|
Feb 07 12:46:20 PM PST 24 |
Feb 07 12:46:23 PM PST 24 |
3417543037 ps |
| T570 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.790808245 |
|
|
Feb 07 12:46:57 PM PST 24 |
Feb 07 12:47:00 PM PST 24 |
3283942819 ps |
| T571 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.432265834 |
|
|
Feb 07 12:46:55 PM PST 24 |
Feb 07 12:46:57 PM PST 24 |
2482172882 ps |
| T331 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.11153578 |
|
|
Feb 07 12:46:45 PM PST 24 |
Feb 07 12:47:16 PM PST 24 |
46678926428 ps |
| T148 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3686545287 |
|
|
Feb 07 12:46:32 PM PST 24 |
Feb 07 12:46:37 PM PST 24 |
11424466921 ps |
| T572 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.1173098973 |
|
|
Feb 07 12:45:50 PM PST 24 |
Feb 07 12:46:03 PM PST 24 |
2820289531 ps |
| T187 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.557878274 |
|
|
Feb 07 12:44:31 PM PST 24 |
Feb 07 12:45:40 PM PST 24 |
26367448655 ps |
| T329 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.385195831 |
|
|
Feb 07 12:46:27 PM PST 24 |
Feb 07 12:56:48 PM PST 24 |
241979390685 ps |
| T573 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.1026024328 |
|
|
Feb 07 12:46:11 PM PST 24 |
Feb 07 12:46:23 PM PST 24 |
3637702367 ps |
| T574 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.903669192 |
|
|
Feb 07 12:45:19 PM PST 24 |
Feb 07 12:45:24 PM PST 24 |
3795526746 ps |
| T362 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.454138211 |
|
|
Feb 07 12:46:12 PM PST 24 |
Feb 07 12:46:37 PM PST 24 |
35811806289 ps |
| T219 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.1689157798 |
|
|
Feb 07 12:45:03 PM PST 24 |
Feb 07 12:45:08 PM PST 24 |
3540629941 ps |
| T265 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.901910123 |
|
|
Feb 07 12:47:09 PM PST 24 |
Feb 07 12:48:31 PM PST 24 |
30081296400 ps |
| T575 |
/workspace/coverage/default/17.sysrst_ctrl_alert_test.399438740 |
|
|
Feb 07 12:45:20 PM PST 24 |
Feb 07 12:45:26 PM PST 24 |
2009817284 ps |
| T576 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.2149820544 |
|
|
Feb 07 12:44:21 PM PST 24 |
Feb 07 12:44:29 PM PST 24 |
2110551532 ps |
| T577 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.2230670841 |
|
|
Feb 07 12:45:55 PM PST 24 |
Feb 07 12:46:07 PM PST 24 |
2023976998 ps |
| T578 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.2012235872 |
|
|
Feb 07 12:45:33 PM PST 24 |
Feb 07 12:45:36 PM PST 24 |
2041499112 ps |
| T579 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.658536501 |
|
|
Feb 07 12:46:07 PM PST 24 |
Feb 07 12:46:14 PM PST 24 |
2491342131 ps |
| T580 |
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1719744038 |
|
|
Feb 07 12:46:13 PM PST 24 |
Feb 07 12:46:17 PM PST 24 |
5859304333 ps |
| T581 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.898656926 |
|
|
Feb 07 12:46:12 PM PST 24 |
Feb 07 12:46:16 PM PST 24 |
2470905330 ps |
| T582 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1897511006 |
|
|
Feb 07 12:45:13 PM PST 24 |
Feb 07 12:45:16 PM PST 24 |
2144299182 ps |
| T583 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.1243481273 |
|
|
Feb 07 12:46:17 PM PST 24 |
Feb 07 12:46:24 PM PST 24 |
2121454718 ps |
| T351 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2787297842 |
|
|
Feb 07 12:45:41 PM PST 24 |
Feb 07 12:48:51 PM PST 24 |
68653682348 ps |
| T584 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2114946182 |
|
|
Feb 07 12:44:44 PM PST 24 |
Feb 07 12:44:46 PM PST 24 |
3576816588 ps |
| T585 |
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3781078651 |
|
|
Feb 07 12:45:14 PM PST 24 |
Feb 07 12:45:22 PM PST 24 |
2610571913 ps |
| T120 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1245605702 |
|
|
Feb 07 12:46:06 PM PST 24 |
Feb 07 12:47:13 PM PST 24 |
331667207822 ps |
| T586 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.3097942832 |
|
|
Feb 07 12:46:07 PM PST 24 |
Feb 07 12:46:37 PM PST 24 |
9484134081 ps |
| T587 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1136403354 |
|
|
Feb 07 12:46:40 PM PST 24 |
Feb 07 12:46:43 PM PST 24 |
4887721677 ps |
| T588 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.3328332145 |
|
|
Feb 07 12:46:06 PM PST 24 |
Feb 07 12:46:10 PM PST 24 |
2179868913 ps |
| T290 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2858549747 |
|
|
Feb 07 12:46:55 PM PST 24 |
Feb 07 12:49:11 PM PST 24 |
50170789415 ps |
| T589 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2907522077 |
|
|
Feb 07 12:46:45 PM PST 24 |
Feb 07 12:46:48 PM PST 24 |
4581915886 ps |
| T590 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.1644730406 |
|
|
Feb 07 12:45:36 PM PST 24 |
Feb 07 12:45:47 PM PST 24 |
2683519903 ps |
| T343 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3793432694 |
|
|
Feb 07 12:47:08 PM PST 24 |
Feb 07 12:49:11 PM PST 24 |
48246454302 ps |
| T149 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2657887269 |
|
|
Feb 07 12:46:12 PM PST 24 |
Feb 07 12:46:31 PM PST 24 |
36753138006 ps |
| T591 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1354199180 |
|
|
Feb 07 12:46:45 PM PST 24 |
Feb 07 12:46:49 PM PST 24 |
3371307761 ps |
| T592 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2404072609 |
|
|
Feb 07 12:45:38 PM PST 24 |
Feb 07 12:45:52 PM PST 24 |
2616770738 ps |
| T593 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.4092243656 |
|
|
Feb 07 12:45:43 PM PST 24 |
Feb 07 12:45:56 PM PST 24 |
2016327773 ps |
| T594 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.1318029101 |
|
|
Feb 07 12:46:25 PM PST 24 |
Feb 07 12:47:08 PM PST 24 |
15548942076 ps |
| T595 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2063117381 |
|
|
Feb 07 12:46:43 PM PST 24 |
Feb 07 12:46:46 PM PST 24 |
2028544605 ps |
| T596 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.2515383019 |
|
|
Feb 07 12:44:49 PM PST 24 |
Feb 07 12:44:50 PM PST 24 |
2161921116 ps |
| T347 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2115144143 |
|
|
Feb 07 12:44:47 PM PST 24 |
Feb 07 12:47:40 PM PST 24 |
86821060916 ps |
| T597 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1216737913 |
|
|
Feb 07 12:47:02 PM PST 24 |
Feb 07 12:47:07 PM PST 24 |
4295664726 ps |
| T598 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1531469849 |
|
|
Feb 07 12:44:37 PM PST 24 |
Feb 07 12:44:40 PM PST 24 |
2574628278 ps |
| T599 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.3496366117 |
|
|
Feb 07 12:46:14 PM PST 24 |
Feb 07 12:46:23 PM PST 24 |
2444477669 ps |
| T600 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.2372262393 |
|
|
Feb 07 12:45:35 PM PST 24 |
Feb 07 12:45:39 PM PST 24 |
2054819594 ps |
| T601 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1561611972 |
|
|
Feb 07 12:46:47 PM PST 24 |
Feb 07 12:46:55 PM PST 24 |
3904194584 ps |
| T602 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2346821183 |
|
|
Feb 07 12:44:39 PM PST 24 |
Feb 07 12:44:44 PM PST 24 |
2313482663 ps |
| T603 |
/workspace/coverage/default/34.sysrst_ctrl_smoke.3577489087 |
|
|
Feb 07 12:46:11 PM PST 24 |
Feb 07 12:46:15 PM PST 24 |
2113890359 ps |
| T604 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.2941406000 |
|
|
Feb 07 12:44:42 PM PST 24 |
Feb 07 12:44:46 PM PST 24 |
2117278993 ps |
| T605 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1188289580 |
|
|
Feb 07 12:46:33 PM PST 24 |
Feb 07 12:46:43 PM PST 24 |
3499084061 ps |
| T338 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.4039100827 |
|
|
Feb 07 12:45:51 PM PST 24 |
Feb 07 12:47:37 PM PST 24 |
77707600072 ps |