Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.99 99.39 96.35 100.00 97.44 98.78 99.63 94.31


Total test records in report: 905
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T595 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2249240978 Feb 21 03:01:45 PM PST 24 Feb 21 03:01:48 PM PST 24 2183476085 ps
T596 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1923865079 Feb 21 03:00:23 PM PST 24 Feb 21 03:00:26 PM PST 24 2338084206 ps
T597 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.4251755978 Feb 21 03:01:22 PM PST 24 Feb 21 03:01:28 PM PST 24 3377547765 ps
T598 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2300901756 Feb 21 03:00:12 PM PST 24 Feb 21 03:00:20 PM PST 24 2463572917 ps
T599 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2365391491 Feb 21 03:00:28 PM PST 24 Feb 21 03:00:38 PM PST 24 33792922263 ps
T336 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2854998592 Feb 21 03:01:38 PM PST 24 Feb 21 03:02:33 PM PST 24 87696678981 ps
T361 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3986447542 Feb 21 03:00:36 PM PST 24 Feb 21 03:01:50 PM PST 24 1191476690599 ps
T600 /workspace/coverage/default/25.sysrst_ctrl_stress_all.1163768313 Feb 21 03:00:30 PM PST 24 Feb 21 03:00:37 PM PST 24 7697234220 ps
T601 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3937709880 Feb 21 03:00:25 PM PST 24 Feb 21 03:00:29 PM PST 24 2474087701 ps
T99 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.4197676670 Feb 21 03:00:23 PM PST 24 Feb 21 03:05:26 PM PST 24 207686419959 ps
T602 /workspace/coverage/default/10.sysrst_ctrl_alert_test.977356875 Feb 21 03:00:10 PM PST 24 Feb 21 03:00:13 PM PST 24 2030139026 ps
T603 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3042973704 Feb 21 03:00:13 PM PST 24 Feb 21 03:00:23 PM PST 24 3332092422 ps
T604 /workspace/coverage/default/47.sysrst_ctrl_smoke.483251742 Feb 21 03:01:27 PM PST 24 Feb 21 03:01:31 PM PST 24 2121730935 ps
T605 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2317716692 Feb 21 03:01:12 PM PST 24 Feb 21 03:01:16 PM PST 24 2623912857 ps
T606 /workspace/coverage/default/18.sysrst_ctrl_smoke.3377272242 Feb 21 03:00:00 PM PST 24 Feb 21 03:00:03 PM PST 24 2125131940 ps
T607 /workspace/coverage/default/3.sysrst_ctrl_stress_all.853658841 Feb 21 02:59:53 PM PST 24 Feb 21 02:59:59 PM PST 24 8056270297 ps
T275 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.398387505 Feb 21 03:01:44 PM PST 24 Feb 21 03:03:04 PM PST 24 28702082996 ps
T608 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2915202020 Feb 21 03:01:38 PM PST 24 Feb 21 03:01:55 PM PST 24 24844557898 ps
T609 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.3684564593 Feb 21 03:00:17 PM PST 24 Feb 21 03:00:29 PM PST 24 3819785043 ps
T610 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.3394157218 Feb 21 03:00:08 PM PST 24 Feb 21 03:00:11 PM PST 24 2534441519 ps
T611 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3929018746 Feb 21 03:00:30 PM PST 24 Feb 21 03:00:35 PM PST 24 3461287180 ps
T612 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2341933784 Feb 21 03:01:52 PM PST 24 Feb 21 03:03:28 PM PST 24 36793048844 ps
T613 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.4248848635 Feb 21 02:59:30 PM PST 24 Feb 21 03:01:23 PM PST 24 77704785002 ps
T614 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.2299963475 Feb 21 03:01:13 PM PST 24 Feb 21 03:01:16 PM PST 24 3157727623 ps
T615 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.1368310113 Feb 21 03:01:22 PM PST 24 Feb 21 03:01:31 PM PST 24 3405076454 ps
T616 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2337739477 Feb 21 02:59:26 PM PST 24 Feb 21 02:59:30 PM PST 24 2424901362 ps
T617 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1361196506 Feb 21 02:59:51 PM PST 24 Feb 21 02:59:55 PM PST 24 6118455064 ps
T362 /workspace/coverage/default/17.sysrst_ctrl_stress_all.2693587655 Feb 21 03:00:19 PM PST 24 Feb 21 03:09:55 PM PST 24 1156969288883 ps
T345 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2716229300 Feb 21 03:00:11 PM PST 24 Feb 21 03:01:37 PM PST 24 75445444610 ps
T276 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1472789372 Feb 21 03:00:47 PM PST 24 Feb 21 03:03:12 PM PST 24 61934975890 ps
T618 /workspace/coverage/default/49.sysrst_ctrl_smoke.1090597154 Feb 21 03:01:29 PM PST 24 Feb 21 03:01:31 PM PST 24 2133784558 ps
T619 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1719437502 Feb 21 03:00:18 PM PST 24 Feb 21 03:00:25 PM PST 24 3689821903 ps
T620 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1722595706 Feb 21 03:00:42 PM PST 24 Feb 21 03:00:44 PM PST 24 2226729215 ps
T221 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.2730974773 Feb 21 03:01:27 PM PST 24 Feb 21 03:01:29 PM PST 24 3826215480 ps
T621 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2535242705 Feb 21 03:01:22 PM PST 24 Feb 21 03:01:25 PM PST 24 3433605084 ps
T622 /workspace/coverage/default/26.sysrst_ctrl_stress_all.2697373129 Feb 21 03:00:35 PM PST 24 Feb 21 03:00:41 PM PST 24 6518913139 ps
T623 /workspace/coverage/default/25.sysrst_ctrl_smoke.2540086446 Feb 21 03:00:39 PM PST 24 Feb 21 03:00:43 PM PST 24 2120538623 ps
T624 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3790927212 Feb 21 03:01:53 PM PST 24 Feb 21 03:05:43 PM PST 24 88269829764 ps
T340 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1378384109 Feb 21 03:00:21 PM PST 24 Feb 21 03:03:23 PM PST 24 124788143047 ps
T625 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1800429780 Feb 21 03:00:18 PM PST 24 Feb 21 03:00:21 PM PST 24 2493775661 ps
T626 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.3221391768 Feb 21 03:00:15 PM PST 24 Feb 21 03:00:19 PM PST 24 2961189287 ps
T627 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1001267864 Feb 21 03:00:23 PM PST 24 Feb 21 03:00:27 PM PST 24 2481700171 ps
T628 /workspace/coverage/default/48.sysrst_ctrl_smoke.1564874376 Feb 21 03:01:29 PM PST 24 Feb 21 03:01:32 PM PST 24 2115078266 ps
T629 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.204062417 Feb 21 02:59:50 PM PST 24 Feb 21 02:59:53 PM PST 24 2532204721 ps
T630 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.3260378098 Feb 21 03:00:20 PM PST 24 Feb 21 03:00:24 PM PST 24 2463868593 ps
T631 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.504991499 Feb 21 03:01:26 PM PST 24 Feb 21 03:01:28 PM PST 24 2216640004 ps
T632 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.1634509185 Feb 21 03:00:13 PM PST 24 Feb 21 03:00:46 PM PST 24 49995327464 ps
T334 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2893648517 Feb 21 03:01:29 PM PST 24 Feb 21 03:03:01 PM PST 24 71402789906 ps
T326 /workspace/coverage/default/34.sysrst_ctrl_stress_all.2485031609 Feb 21 03:01:13 PM PST 24 Feb 21 03:02:35 PM PST 24 124191316594 ps
T633 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3497987062 Feb 21 03:00:15 PM PST 24 Feb 21 03:00:47 PM PST 24 11571401218 ps
T634 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.589299610 Feb 21 03:00:14 PM PST 24 Feb 21 03:00:17 PM PST 24 2344841016 ps
T635 /workspace/coverage/default/34.sysrst_ctrl_alert_test.516504942 Feb 21 03:01:11 PM PST 24 Feb 21 03:01:16 PM PST 24 2013760561 ps
T636 /workspace/coverage/default/47.sysrst_ctrl_alert_test.3058777886 Feb 21 03:01:19 PM PST 24 Feb 21 03:01:23 PM PST 24 2018120117 ps
T637 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.2242899652 Feb 21 03:01:35 PM PST 24 Feb 21 03:01:44 PM PST 24 3612491874 ps
T638 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.589776523 Feb 21 03:00:28 PM PST 24 Feb 21 03:00:35 PM PST 24 3533049367 ps
T639 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.464723734 Feb 21 03:00:19 PM PST 24 Feb 21 03:00:30 PM PST 24 3840202922 ps
T640 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.379604120 Feb 21 03:01:25 PM PST 24 Feb 21 03:01:28 PM PST 24 2635730674 ps
T341 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2407666242 Feb 21 03:01:48 PM PST 24 Feb 21 03:06:04 PM PST 24 98948995857 ps
T641 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3054637183 Feb 21 03:00:50 PM PST 24 Feb 21 03:00:53 PM PST 24 2499408073 ps
T642 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3089712328 Feb 21 03:01:14 PM PST 24 Feb 21 03:01:23 PM PST 24 2613011170 ps
T245 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.2580945925 Feb 21 03:00:15 PM PST 24 Feb 21 03:01:45 PM PST 24 29662500292 ps
T643 /workspace/coverage/default/25.sysrst_ctrl_alert_test.940563213 Feb 21 03:00:26 PM PST 24 Feb 21 03:00:30 PM PST 24 2021931785 ps
T644 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3229228337 Feb 21 03:01:23 PM PST 24 Feb 21 03:01:26 PM PST 24 2625865831 ps
T645 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3915871103 Feb 21 03:00:28 PM PST 24 Feb 21 03:03:05 PM PST 24 56416400178 ps
T646 /workspace/coverage/default/16.sysrst_ctrl_smoke.2168282727 Feb 21 03:00:18 PM PST 24 Feb 21 03:00:23 PM PST 24 2116223606 ps
T647 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2330551629 Feb 21 03:00:16 PM PST 24 Feb 21 03:00:29 PM PST 24 3918182371 ps
T648 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.4123750931 Feb 21 03:01:11 PM PST 24 Feb 21 03:01:14 PM PST 24 2616928253 ps
T649 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2282025111 Feb 21 03:01:20 PM PST 24 Feb 21 03:01:23 PM PST 24 3513001879 ps
T225 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.764630702 Feb 21 03:01:16 PM PST 24 Feb 21 03:02:13 PM PST 24 78852391987 ps
T277 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1331528841 Feb 21 03:00:55 PM PST 24 Feb 21 03:03:34 PM PST 24 128532190915 ps
T220 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1564167049 Feb 21 02:59:51 PM PST 24 Feb 21 03:00:42 PM PST 24 225388265859 ps
T650 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3452625750 Feb 21 03:01:12 PM PST 24 Feb 21 03:01:18 PM PST 24 2512421379 ps
T651 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2681693271 Feb 21 02:59:44 PM PST 24 Feb 21 02:59:47 PM PST 24 3361763431 ps
T652 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1690675338 Feb 21 03:01:36 PM PST 24 Feb 21 03:02:41 PM PST 24 24581513909 ps
T342 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3088478675 Feb 21 03:01:43 PM PST 24 Feb 21 03:02:14 PM PST 24 38228081963 ps
T653 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1401904294 Feb 21 03:01:14 PM PST 24 Feb 21 03:01:19 PM PST 24 2513555078 ps
T654 /workspace/coverage/default/22.sysrst_ctrl_stress_all.2136337913 Feb 21 03:00:22 PM PST 24 Feb 21 03:00:39 PM PST 24 6318423828 ps
T655 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.3690493940 Feb 21 03:01:22 PM PST 24 Feb 21 03:03:34 PM PST 24 100565774097 ps
T656 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2051327572 Feb 21 03:00:23 PM PST 24 Feb 21 03:00:28 PM PST 24 2516630704 ps
T657 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.4143427552 Feb 21 03:01:35 PM PST 24 Feb 21 03:01:53 PM PST 24 24096507800 ps
T658 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2078777634 Feb 21 02:59:47 PM PST 24 Feb 21 02:59:50 PM PST 24 3219231916 ps
T659 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1874803774 Feb 21 03:01:15 PM PST 24 Feb 21 03:01:23 PM PST 24 2453075166 ps
T660 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.2267905374 Feb 21 03:00:59 PM PST 24 Feb 21 03:01:04 PM PST 24 7839317480 ps
T661 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.597045547 Feb 21 03:00:16 PM PST 24 Feb 21 03:00:20 PM PST 24 2459997935 ps
T662 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2455577182 Feb 21 03:00:20 PM PST 24 Feb 21 03:03:25 PM PST 24 1734450615868 ps
T663 /workspace/coverage/default/5.sysrst_ctrl_smoke.393920090 Feb 21 03:00:26 PM PST 24 Feb 21 03:00:28 PM PST 24 2127548754 ps
T664 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3744848059 Feb 21 03:01:14 PM PST 24 Feb 21 03:01:19 PM PST 24 2248208783 ps
T665 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2879684882 Feb 21 03:00:13 PM PST 24 Feb 21 03:00:20 PM PST 24 3655114577 ps
T666 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.469444001 Feb 21 03:01:26 PM PST 24 Feb 21 03:09:25 PM PST 24 894891773328 ps
T667 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3158765999 Feb 21 03:01:22 PM PST 24 Feb 21 03:01:24 PM PST 24 2593396143 ps
T668 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3738686336 Feb 21 03:01:27 PM PST 24 Feb 21 03:01:29 PM PST 24 2634795131 ps
T669 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.937469372 Feb 21 03:00:17 PM PST 24 Feb 21 03:00:20 PM PST 24 3839485897 ps
T670 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1798432330 Feb 21 03:00:14 PM PST 24 Feb 21 03:00:21 PM PST 24 2180788680 ps
T671 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3632853894 Feb 21 03:00:28 PM PST 24 Feb 21 03:00:36 PM PST 24 2473633391 ps
T672 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1174714099 Feb 21 03:00:40 PM PST 24 Feb 21 03:00:42 PM PST 24 2532175505 ps
T123 /workspace/coverage/default/31.sysrst_ctrl_stress_all.1975323257 Feb 21 03:01:11 PM PST 24 Feb 21 03:03:27 PM PST 24 55275470091 ps
T673 /workspace/coverage/default/15.sysrst_ctrl_smoke.3102508521 Feb 21 03:00:12 PM PST 24 Feb 21 03:00:18 PM PST 24 2107086002 ps
T674 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1964637887 Feb 21 03:00:14 PM PST 24 Feb 21 03:00:19 PM PST 24 2622754237 ps
T675 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1242894647 Feb 21 03:01:39 PM PST 24 Feb 21 03:02:29 PM PST 24 77518087492 ps
T676 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1435441627 Feb 21 03:01:11 PM PST 24 Feb 21 03:01:45 PM PST 24 23089705575 ps
T76 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.1031156267 Feb 21 03:00:12 PM PST 24 Feb 21 03:01:38 PM PST 24 34752802412 ps
T677 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3418843486 Feb 21 03:00:18 PM PST 24 Feb 21 03:00:21 PM PST 24 2504377140 ps
T678 /workspace/coverage/default/11.sysrst_ctrl_stress_all.1208350379 Feb 21 03:00:21 PM PST 24 Feb 21 03:00:26 PM PST 24 8026531228 ps
T679 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3570930012 Feb 21 03:01:11 PM PST 24 Feb 21 03:01:14 PM PST 24 2527633301 ps
T124 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.3343965167 Feb 21 03:00:08 PM PST 24 Feb 21 03:00:16 PM PST 24 4377392442 ps
T165 /workspace/coverage/default/48.sysrst_ctrl_stress_all.4097635415 Feb 21 03:01:29 PM PST 24 Feb 21 03:01:36 PM PST 24 15136131626 ps
T100 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2547158315 Feb 21 03:00:12 PM PST 24 Feb 21 03:00:55 PM PST 24 60857398632 ps
T346 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2078323608 Feb 21 03:01:53 PM PST 24 Feb 21 03:09:12 PM PST 24 153212434842 ps
T680 /workspace/coverage/default/3.sysrst_ctrl_smoke.2962278829 Feb 21 02:59:43 PM PST 24 Feb 21 02:59:50 PM PST 24 2107409843 ps
T681 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.88898931 Feb 21 03:00:12 PM PST 24 Feb 21 03:01:48 PM PST 24 72437953763 ps
T145 /workspace/coverage/default/18.sysrst_ctrl_stress_all.1832870632 Feb 21 03:00:02 PM PST 24 Feb 21 03:00:13 PM PST 24 15219927707 ps
T153 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2870423165 Feb 21 03:01:45 PM PST 24 Feb 21 03:01:48 PM PST 24 2473734555 ps
T154 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2784851437 Feb 21 03:00:52 PM PST 24 Feb 21 03:00:58 PM PST 24 27279717679 ps
T155 /workspace/coverage/default/41.sysrst_ctrl_alert_test.1364805212 Feb 21 03:01:23 PM PST 24 Feb 21 03:01:29 PM PST 24 2012626210 ps
T156 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1868490649 Feb 21 03:00:35 PM PST 24 Feb 21 03:02:52 PM PST 24 57859926541 ps
T157 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1555341902 Feb 21 03:01:23 PM PST 24 Feb 21 03:01:25 PM PST 24 4629563892 ps
T146 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3465091594 Feb 21 03:00:27 PM PST 24 Feb 21 03:01:41 PM PST 24 115834443746 ps
T158 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1871026207 Feb 21 03:01:37 PM PST 24 Feb 21 03:02:57 PM PST 24 31047500823 ps
T159 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.2175711848 Feb 21 03:01:20 PM PST 24 Feb 21 03:01:29 PM PST 24 2848629403 ps
T160 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.173616312 Feb 21 03:01:46 PM PST 24 Feb 21 03:03:38 PM PST 24 168686359812 ps
T682 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1908702167 Feb 21 03:00:12 PM PST 24 Feb 21 03:00:15 PM PST 24 3309809250 ps
T683 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.304400364 Feb 21 03:00:16 PM PST 24 Feb 21 03:00:21 PM PST 24 2636504041 ps
T684 /workspace/coverage/default/15.sysrst_ctrl_stress_all.1238582598 Feb 21 03:00:25 PM PST 24 Feb 21 03:00:36 PM PST 24 13071196616 ps
T327 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.329983979 Feb 21 02:59:48 PM PST 24 Feb 21 03:01:55 PM PST 24 99767881719 ps
T685 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3694548012 Feb 21 03:01:21 PM PST 24 Feb 21 03:01:24 PM PST 24 7940677306 ps
T686 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.1788487926 Feb 21 03:01:12 PM PST 24 Feb 21 03:01:23 PM PST 24 3275793845 ps
T687 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.29118784 Feb 21 03:01:51 PM PST 24 Feb 21 03:04:48 PM PST 24 81922017764 ps
T688 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1534838905 Feb 21 03:00:23 PM PST 24 Feb 21 03:00:30 PM PST 24 7743195544 ps
T689 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2652956266 Feb 21 03:01:25 PM PST 24 Feb 21 03:01:30 PM PST 24 2520307291 ps
T690 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.2841611833 Feb 21 03:00:36 PM PST 24 Feb 21 03:00:40 PM PST 24 2616508427 ps
T691 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1806718061 Feb 21 03:01:12 PM PST 24 Feb 21 03:01:26 PM PST 24 4631674285 ps
T692 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2937230057 Feb 21 03:01:26 PM PST 24 Feb 21 03:01:33 PM PST 24 2509732887 ps
T693 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3620187627 Feb 21 03:01:41 PM PST 24 Feb 21 03:04:52 PM PST 24 66406496314 ps
T694 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.423235023 Feb 21 02:59:44 PM PST 24 Feb 21 02:59:49 PM PST 24 2620240283 ps
T695 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1779131134 Feb 21 02:59:56 PM PST 24 Feb 21 02:59:59 PM PST 24 2629641640 ps
T696 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2975149574 Feb 21 03:01:23 PM PST 24 Feb 21 03:03:30 PM PST 24 207086413722 ps
T697 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.1431010560 Feb 21 03:01:18 PM PST 24 Feb 21 03:01:27 PM PST 24 4333825972 ps
T698 /workspace/coverage/default/0.sysrst_ctrl_stress_all.1069312246 Feb 21 02:59:41 PM PST 24 Feb 21 02:59:57 PM PST 24 6214774484 ps
T699 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.4081741982 Feb 21 03:01:17 PM PST 24 Feb 21 03:01:20 PM PST 24 2533692613 ps
T351 /workspace/coverage/default/16.sysrst_ctrl_stress_all.1306539291 Feb 21 03:00:12 PM PST 24 Feb 21 03:09:42 PM PST 24 209993785819 ps
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T788 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.590437704 Feb 21 12:36:29 PM PST 24 Feb 21 12:36:35 PM PST 24 2013962322 ps
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