Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.99	99.39	96.35	100.00	97.44	98.78	99.63	94.31

Total tests in report: 905

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
65.37	65.37	83.04	83.04	73.77	73.77	93.85	93.85	28.21	28.21	84.86	84.86	70.69	70.69	23.18	23.18	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2014383335
72.98	7.61	88.49	5.45	79.49	5.72	95.22	1.37	46.15	17.95	88.97	4.11	79.31	8.61	33.22	10.05	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2810120567
79.43	6.45	94.83	6.34	87.93	8.44	97.04	1.82	56.41	10.26	94.22	5.26	89.14	9.83	36.45	3.22	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1511668401
83.86	4.43	94.84	0.02	87.98	0.05	97.04	0.00	57.05	0.64	94.29	0.07	89.33	0.19	66.49	30.05	/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2305086036
86.90	3.04	96.09	1.25	89.74	1.76	97.04	0.00	73.72	16.67	95.54	1.25	89.61	0.28	66.54	0.05	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.518822355
89.68	2.78	97.27	1.18	90.70	0.95	97.49	0.46	83.97	10.26	96.59	1.04	93.07	3.46	68.63	2.09	/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1387132341
90.86	1.19	97.34	0.07	91.94	1.24	98.18	0.68	83.97	0.00	96.69	0.10	93.07	0.00	74.83	6.21	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.3152108660
91.95	1.09	97.92	0.57	92.44	0.50	98.18	0.00	88.46	4.49	97.29	0.59	94.57	1.50	74.83	0.00	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1430235369
93.02	1.06	98.32	0.40	92.89	0.45	98.18	0.00	91.67	3.21	97.77	0.49	97.28	2.72	75.02	0.19	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.791279542
93.65	0.63	98.49	0.17	93.06	0.17	98.18	0.00	92.95	1.28	97.84	0.07	97.47	0.19	77.58	2.56	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.527004871
94.22	0.57	98.51	0.02	93.13	0.07	98.18	0.00	92.95	0.00	97.88	0.03	97.47	0.00	81.42	3.84	/workspace/coverage/default/24.sysrst_ctrl_stress_all.2528883412
94.63	0.41	98.59	0.09	93.30	0.17	98.18	0.00	92.95	0.00	97.88	0.00	97.57	0.09	83.93	2.51	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3405013730
94.93	0.30	98.66	0.07	93.56	0.26	98.18	0.00	92.95	0.00	97.88	0.00	97.66	0.09	85.64	1.71	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.3351897042
95.22	0.28	98.77	0.10	93.66	0.10	98.18	0.00	94.23	1.28	98.05	0.17	97.85	0.19	85.78	0.14	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.359466570
95.46	0.25	98.77	0.00	93.68	0.02	99.54	1.37	94.23	0.00	98.05	0.00	97.94	0.09	86.02	0.24	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3754666634
95.70	0.24	98.84	0.07	93.73	0.05	99.54	0.00	95.51	1.28	98.12	0.07	98.13	0.19	86.02	0.00	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.4265875575
95.88	0.18	98.98	0.14	94.40	0.67	99.54	0.00	95.51	0.00	98.40	0.28	98.31	0.19	86.02	0.00	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.2344963791
96.06	0.18	98.98	0.00	94.42	0.02	99.54	0.00	95.51	0.00	98.40	0.00	98.41	0.09	87.16	1.14	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.275489279
96.22	0.16	99.01	0.03	94.47	0.05	99.54	0.00	96.15	0.64	98.43	0.03	98.50	0.09	87.44	0.28	/workspace/coverage/default/27.sysrst_ctrl_stress_all.1040346378
96.37	0.15	99.06	0.05	94.47	0.00	99.54	0.00	96.15	0.00	98.43	0.00	98.50	0.00	88.44	1.00	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4175676947
96.51	0.14	99.11	0.05	94.51	0.05	99.54	0.00	96.79	0.64	98.47	0.03	98.60	0.09	88.53	0.09	/workspace/coverage/default/22.sysrst_ctrl_edge_detect.1465312106
96.63	0.12	99.11	0.00	95.23	0.72	99.54	0.00	96.79	0.00	98.47	0.00	98.60	0.00	88.67	0.14	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3389693243
96.75	0.12	99.11	0.00	95.25	0.02	99.54	0.00	96.79	0.00	98.47	0.00	98.60	0.00	89.48	0.81	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.4094018210
96.87	0.12	99.15	0.03	95.28	0.02	99.54	0.00	97.44	0.64	98.50	0.03	98.69	0.09	89.48	0.00	/workspace/coverage/default/18.sysrst_ctrl_stress_all.1832870632
96.97	0.10	99.20	0.05	95.28	0.00	99.54	0.00	97.44	0.00	98.50	0.00	98.69	0.00	90.14	0.66	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3381174209
97.06	0.09	99.20	0.00	95.30	0.02	99.54	0.00	97.44	0.00	98.50	0.00	98.78	0.09	90.66	0.52	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.4197676670
97.15	0.09	99.20	0.00	95.59	0.29	99.54	0.00	97.44	0.00	98.50	0.00	99.06	0.28	90.71	0.05	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1524525101
97.24	0.09	99.20	0.00	95.59	0.00	99.54	0.00	97.44	0.00	98.50	0.00	99.63	0.56	90.76	0.05	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1598287680
97.32	0.08	99.25	0.05	95.66	0.07	100.00	0.46	97.44	0.00	98.50	0.00	99.63	0.00	90.76	0.00	/workspace/coverage/default/11.sysrst_ctrl_alert_test.3147745901
97.39	0.07	99.25	0.00	95.66	0.00	100.00	0.00	97.44	0.00	98.50	0.00	99.63	0.00	91.28	0.52	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3837568047
97.45	0.06	99.25	0.00	95.66	0.00	100.00	0.00	97.44	0.00	98.50	0.00	99.63	0.00	91.71	0.43	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1689705132
97.51	0.05	99.25	0.00	96.02	0.36	100.00	0.00	97.44	0.00	98.50	0.00	99.63	0.00	91.71	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1031156267
97.55	0.05	99.27	0.02	96.02	0.00	100.00	0.00	97.44	0.00	98.54	0.03	99.63	0.00	91.99	0.28	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.395536319
97.60	0.05	99.27	0.00	96.02	0.00	100.00	0.00	97.44	0.00	98.54	0.00	99.63	0.00	92.32	0.33	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.1912983446
97.64	0.04	99.27	0.00	96.02	0.00	100.00	0.00	97.44	0.00	98.54	0.00	99.63	0.00	92.61	0.28	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.404441779
97.67	0.03	99.27	0.00	96.21	0.19	100.00	0.00	97.44	0.00	98.54	0.00	99.63	0.00	92.61	0.00	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.984254700
97.70	0.03	99.27	0.00	96.21	0.00	100.00	0.00	97.44	0.00	98.54	0.00	99.63	0.00	92.80	0.19	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.3134815957
97.72	0.02	99.27	0.00	96.21	0.00	100.00	0.00	97.44	0.00	98.54	0.00	99.63	0.00	92.94	0.14	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.1639062452
97.74	0.02	99.27	0.00	96.21	0.00	100.00	0.00	97.44	0.00	98.54	0.00	99.63	0.00	93.08	0.14	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3021572834
97.75	0.02	99.27	0.00	96.23	0.02	100.00	0.00	97.44	0.00	98.54	0.00	99.63	0.00	93.18	0.09	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1071199293
97.77	0.02	99.29	0.02	96.23	0.00	100.00	0.00	97.44	0.00	98.54	0.00	99.63	0.00	93.27	0.09	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1717290358
97.78	0.01	99.32	0.03	96.23	0.00	100.00	0.00	97.44	0.00	98.61	0.07	99.63	0.00	93.27	0.00	/workspace/coverage/default/10.sysrst_ctrl_stress_all.3764018201
97.80	0.01	99.36	0.03	96.23	0.00	100.00	0.00	97.44	0.00	98.68	0.07	99.63	0.00	93.27	0.00	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2875331987
97.81	0.01	99.36	0.00	96.23	0.00	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	93.36	0.09	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1308202601
97.83	0.01	99.36	0.00	96.23	0.00	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	93.46	0.09	/workspace/coverage/default/17.sysrst_ctrl_stress_all.2693587655
97.84	0.01	99.36	0.00	96.23	0.00	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	93.55	0.09	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.948292034
97.85	0.01	99.36	0.00	96.23	0.00	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	93.65	0.09	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.325442458
97.87	0.01	99.36	0.00	96.23	0.00	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	93.74	0.09	/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.423061911
97.88	0.01	99.36	0.00	96.23	0.00	100.00	0.00	97.44	0.00	98.68	0.00	99.63	0.00	93.84	0.09	/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2407666242
97.89	0.01	99.37	0.02	96.23	0.00	100.00	0.00	97.44	0.00	98.71	0.03	99.63	0.00	93.84	0.00	/workspace/coverage/default/21.sysrst_ctrl_stress_all.4281318458
97.90	0.01	99.39	0.02	96.23	0.00	100.00	0.00	97.44	0.00	98.75	0.03	99.63	0.00	93.84	0.00	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2345460779
97.90	0.01	99.39	0.00	96.28	0.05	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	93.84	0.00	/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.3206285996
97.91	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	93.89	0.05	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.4005443310
97.92	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	93.93	0.05	/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.415506399
97.92	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	93.98	0.05	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3015247213
97.93	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	94.03	0.05	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.2180603597
97.94	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	94.08	0.05	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.764630702
97.94	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	94.12	0.05	/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2893648517
97.95	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	94.17	0.05	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3804458876
97.96	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	94.22	0.05	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2854998592
97.96	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	94.27	0.05	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3088478675
97.97	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.75	0.00	99.63	0.00	94.31	0.05	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2682374751
97.98	0.01	99.39	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.78	0.03	99.63	0.00	94.31	0.00	/workspace/coverage/default/10.sysrst_ctrl_smoke.2657487333
97.98	0.01	99.39	0.00	96.30	0.02	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	94.31	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3388352779
97.98	0.01	99.39	0.00	96.33	0.02	100.00	0.00	97.44	0.00	98.78	0.00	99.63	0.00	94.31	0.00	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1871026207

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3894498952
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.2377239972
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2993066496
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1516020926
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.167031076
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1332429950
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.812421435
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1130637922
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.354810146
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2226173876
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3078198393
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1440954640
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2554881422
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3196672275
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3118922650
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1734967814
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.500770156
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3997468126
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.267163072
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.296418484
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1608591918
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3870731411
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.590437704
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1942370719
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2665315495
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3024580573
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3900595566
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2320192516
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2096610408
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.4054383132
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.810097600
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.247073909
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1383247585
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.10373711
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1859525098
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.3645043541
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.1904343419
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.903985578
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.464294049
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.409209044
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3206669282
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2679264981
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.439316494
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.567813305
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2199870937
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4002757144
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.153870120
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2534308649
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3122269206
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2738675589
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3886181001
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1599797681
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2677041315
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3210185476
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.644996935
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/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1780359447
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3966598655
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3097902322
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1295001967
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.643694821
/workspace/coverage/default/4.sysrst_ctrl_smoke.4270872529
/workspace/coverage/default/4.sysrst_ctrl_stress_all.3285851004
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2206734329
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2269665244
/workspace/coverage/default/40.sysrst_ctrl_alert_test.1970538190
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.2205116495
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2502253480
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3180152310
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.1429254052
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2175711848
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1258481852
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2637629162
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3781772222
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3497920387
/workspace/coverage/default/40.sysrst_ctrl_smoke.2349083227
/workspace/coverage/default/40.sysrst_ctrl_stress_all.1699828519
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2253353025
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3570435936
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1364805212
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2485575607
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3096618515
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3342023961
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2299963475
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.556114609
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.304126086
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2490499137
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.4081741982
/workspace/coverage/default/41.sysrst_ctrl_smoke.1769736024
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3730802234
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2478539642
/workspace/coverage/default/42.sysrst_ctrl_alert_test.336111444
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2282025111
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3013309156
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3018215373
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3434059813
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2223012814
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4014791070
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3694516556
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3966801365
/workspace/coverage/default/42.sysrst_ctrl_smoke.1205041668
/workspace/coverage/default/42.sysrst_ctrl_stress_all.4221126182
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3308677036
/workspace/coverage/default/43.sysrst_ctrl_alert_test.747024371
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.4171250470
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2205342269
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2546058449
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3017551396
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.679659661
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1874803774
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2650062469
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1045666393
/workspace/coverage/default/43.sysrst_ctrl_smoke.90678621
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3391005728
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1264602775
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.487371339
/workspace/coverage/default/44.sysrst_ctrl_alert_test.85274586
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2945686744
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3821287322
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3321745868
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.469444001
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.4227679727
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1726325124
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1196448646
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.35428102
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.356850561
/workspace/coverage/default/44.sysrst_ctrl_smoke.3116540629
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1634591473
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.994662994
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1226077145
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2866685010
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.620153962
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2527867407
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1368310113
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3229228337
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.157630919
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2110579957
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.105512759
/workspace/coverage/default/45.sysrst_ctrl_smoke.3797134808
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2595223449
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3064997230
/workspace/coverage/default/46.sysrst_ctrl_alert_test.256497934
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.802416580
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3753623312
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2014956084
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1431010560
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2838194110
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2870423165
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2249240978
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2303850917
/workspace/coverage/default/46.sysrst_ctrl_smoke.2230257802
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1106712549
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1462981007
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3058777886
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2790784977
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3057106828
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3335751307
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1783131394
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.379604120
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1259165658
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.75762807
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4222432806
/workspace/coverage/default/47.sysrst_ctrl_smoke.483251742
/workspace/coverage/default/47.sysrst_ctrl_stress_all.294876285
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.4289346381
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3110466624
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1509162043
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.867137170
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3690493940
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2258238119
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2730974773
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3738686336
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3459385435
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.504991499
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2937230057
/workspace/coverage/default/48.sysrst_ctrl_smoke.1564874376
/workspace/coverage/default/48.sysrst_ctrl_stress_all.4097635415
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3455026407
/workspace/coverage/default/49.sysrst_ctrl_alert_test.191274781
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3229967663
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.173616312
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2865398914
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2242899652
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1286319621
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3767266093
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2272541942
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2652956266
/workspace/coverage/default/49.sysrst_ctrl_smoke.1090597154
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2529703399
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.398387505
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.365165380
/workspace/coverage/default/5.sysrst_ctrl_alert_test.662618381
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3042973704
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.329983979
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1091663725
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.38568915
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2691324515
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1361026807
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1462613322
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1424755288
/workspace/coverage/default/5.sysrst_ctrl_smoke.393920090
/workspace/coverage/default/5.sysrst_ctrl_stress_all.317101573
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2870982401
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1541269550
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3437734213
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.212940739
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2371558320
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1242894647
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2468179662
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.745773930
/workspace/coverage/default/6.sysrst_ctrl_alert_test.206545020
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.289813472
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1459539838
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2212953297
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.1661302093
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1363018187
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1001267864
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3145054663
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3445753795
/workspace/coverage/default/6.sysrst_ctrl_smoke.1547857417
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1977131610
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1672548651
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.4265064706
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1690675338
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3620187627
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1275927470
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2915202020
/workspace/coverage/default/7.sysrst_ctrl_alert_test.634542471
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2545218398
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.4234740022
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1986469844
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.646439190
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.4268743993
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1433103766
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1497734323
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1092399818
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2675375493
/workspace/coverage/default/7.sysrst_ctrl_smoke.170177054
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1626695976
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2449942729
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.765185320
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2486531619
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2428687419
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1957141199
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.858482472
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1743329694
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3407672798
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3924879834
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2078777634
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1833039963
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3907400574
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.919609453
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2434972191
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1255000341
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1206822713
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3653990136
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1040486057
/workspace/coverage/default/8.sysrst_ctrl_smoke.291566402
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3867734706
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3699704709
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.4143427552
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3791014191
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1339845501
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2078323608
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.29118784
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1739555852
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2200136090
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1224727108
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3243296180
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3649876309
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3892001153
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1234306962
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.423235023
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1173178804
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3939757758
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.874837405
/workspace/coverage/default/9.sysrst_ctrl_smoke.3482606462
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3538922790
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1564167049
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.420274841
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1355826185
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2341933784
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3821988837
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3538058117
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3790927212
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1765004250
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1350183124
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1334823970
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.230076266

Total test records in report: 905

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.3312891968	Feb 21 03:01:22 PM PST 24	Feb 21 03:07:43 PM PST 24	175317862561 ps
T4	/workspace/coverage/default/28.sysrst_ctrl_smoke.3435181724	Feb 21 03:00:45 PM PST 24	Feb 21 03:00:47 PM PST 24	2127651706 ps
T5	/workspace/coverage/default/4.sysrst_ctrl_smoke.4270872529	Feb 21 02:59:54 PM PST 24	Feb 21 02:59:57 PM PST 24	2136905860 ps
T2	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2014383335	Feb 21 03:00:59 PM PST 24	Feb 21 03:02:24 PM PST 24	67539719829 ps
T3	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1524525101	Feb 21 03:01:22 PM PST 24	Feb 21 03:01:29 PM PST 24	8010299369 ps
T6	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.4289346381	Feb 21 03:01:23 PM PST 24	Feb 21 03:01:55 PM PST 24	205375643743 ps
T24	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1717290358	Feb 21 03:01:03 PM PST 24	Feb 21 03:01:09 PM PST 24	3582288764 ps
T25	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3966598655	Feb 21 02:59:44 PM PST 24	Feb 21 02:59:47 PM PST 24	2482371920 ps
T26	/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.3434845809	Feb 21 03:00:47 PM PST 24	Feb 21 03:00:51 PM PST 24	3800181184 ps
T27	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3121215219	Feb 21 03:00:28 PM PST 24	Feb 21 03:00:38 PM PST 24	2469635543 ps
T7	/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1854300324	Feb 21 03:00:26 PM PST 24	Feb 21 03:00:31 PM PST 24	2626128087 ps
T28	/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3459385435	Feb 21 03:01:30 PM PST 24	Feb 21 03:01:38 PM PST 24	2441984946 ps
T29	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.1658106082	Feb 21 03:01:11 PM PST 24	Feb 21 03:01:14 PM PST 24	2540982565 ps
T30	/workspace/coverage/default/37.sysrst_ctrl_smoke.607828413	Feb 21 03:01:13 PM PST 24	Feb 21 03:01:21 PM PST 24	2115145089 ps
T56	/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1651525106	Feb 21 03:00:19 PM PST 24	Feb 21 03:00:27 PM PST 24	10047845945 ps
T8	/workspace/coverage/default/4.sysrst_ctrl_combo_detect.1590623903	Feb 21 03:00:19 PM PST 24	Feb 21 03:05:02 PM PST 24	206727092620 ps
T63	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2631231818	Feb 21 03:00:16 PM PST 24	Feb 21 03:00:25 PM PST 24	2512182262 ps
T61	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4014791070	Feb 21 03:01:21 PM PST 24	Feb 21 03:01:24 PM PST 24	2489726192 ps
T57	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.481988721	Feb 21 03:00:10 PM PST 24	Feb 21 03:23:18 PM PST 24	632847148937 ps
T64	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.874837405	Feb 21 02:59:44 PM PST 24	Feb 21 02:59:46 PM PST 24	2529662909 ps
T236	/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3874084374	Feb 21 03:00:22 PM PST 24	Feb 21 03:00:29 PM PST 24	2153964366 ps
T40	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.948292034	Feb 21 03:00:05 PM PST 24	Feb 21 03:03:01 PM PST 24	66638151538 ps
T52	/workspace/coverage/default/37.sysrst_ctrl_alert_test.1995485132	Feb 21 03:01:22 PM PST 24	Feb 21 03:01:24 PM PST 24	2024142624 ps
T47	/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.4171250470	Feb 21 03:01:21 PM PST 24	Feb 21 03:01:31 PM PST 24	3687388507 ps
T9	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.994662994	Feb 21 03:01:16 PM PST 24	Feb 21 03:03:26 PM PST 24	58445276688 ps
T10	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.3351897042	Feb 21 03:00:40 PM PST 24	Feb 21 03:02:46 PM PST 24	72704251761 ps
T53	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1255036930	Feb 21 03:00:22 PM PST 24	Feb 21 03:00:30 PM PST 24	2509912537 ps
T41	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1996796989	Feb 21 03:01:18 PM PST 24	Feb 21 03:02:21 PM PST 24	24327708148 ps
T54	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2851122493	Feb 21 03:00:57 PM PST 24	Feb 21 03:01:04 PM PST 24	2166798215 ps
T65	/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.826561633	Feb 21 03:00:22 PM PST 24	Feb 21 03:00:25 PM PST 24	2625643510 ps
T48	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2101029718	Feb 21 03:00:36 PM PST 24	Feb 21 03:00:40 PM PST 24	3463743513 ps
T151	/workspace/coverage/default/40.sysrst_ctrl_stress_all.1699828519	Feb 21 03:01:30 PM PST 24	Feb 21 03:01:42 PM PST 24	8358253448 ps
T58	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.919609453	Feb 21 03:00:08 PM PST 24	Feb 21 03:00:23 PM PST 24	5207617972 ps
T152	/workspace/coverage/default/13.sysrst_ctrl_smoke.2965920024	Feb 21 03:00:03 PM PST 24	Feb 21 03:00:10 PM PST 24	2109330770 ps
T42	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3907400574	Feb 21 03:00:16 PM PST 24	Feb 21 03:00:35 PM PST 24	25609630447 ps
T11	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.3793787583	Feb 21 03:00:57 PM PST 24	Feb 21 03:01:05 PM PST 24	4208704927 ps
T169	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1092399818	Feb 21 02:59:44 PM PST 24	Feb 21 02:59:50 PM PST 24	2134364603 ps
T66	/workspace/coverage/default/43.sysrst_ctrl_stress_all.3391005728	Feb 21 03:01:18 PM PST 24	Feb 21 03:01:45 PM PST 24	10639141525 ps
T170	/workspace/coverage/default/10.sysrst_ctrl_smoke.2657487333	Feb 21 02:59:49 PM PST 24	Feb 21 02:59:50 PM PST 24	2188698074 ps
T59	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3570435936	Feb 21 03:01:30 PM PST 24	Feb 21 03:01:36 PM PST 24	4072039209 ps
T171	/workspace/coverage/default/21.sysrst_ctrl_smoke.620473189	Feb 21 03:00:22 PM PST 24	Feb 21 03:00:28 PM PST 24	2112927750 ps
T172	/workspace/coverage/default/36.sysrst_ctrl_smoke.71544646	Feb 21 03:01:12 PM PST 24	Feb 21 03:01:19 PM PST 24	2109648174 ps
T12	/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3649876309	Feb 21 02:59:54 PM PST 24	Feb 21 03:01:25 PM PST 24	36996224731 ps
T62	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1123445656	Feb 21 03:01:21 PM PST 24	Feb 21 03:01:25 PM PST 24	2473850627 ps
T67	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3055001067	Feb 21 03:00:03 PM PST 24	Feb 21 03:00:11 PM PST 24	2514164030 ps
T246	/workspace/coverage/default/32.sysrst_ctrl_alert_test.2094347633	Feb 21 03:01:12 PM PST 24	Feb 21 03:01:20 PM PST 24	2011824931 ps
T13	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2810120567	Feb 21 03:00:21 PM PST 24	Feb 21 03:04:54 PM PST 24	101648240350 ps
T197	/workspace/coverage/default/27.sysrst_ctrl_smoke.4198016254	Feb 21 03:00:35 PM PST 24	Feb 21 03:00:39 PM PST 24	2116919009 ps
T14	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1511668401	Feb 21 03:01:41 PM PST 24	Feb 21 03:02:22 PM PST 24	64160490848 ps
T15	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.395536319	Feb 21 02:59:57 PM PST 24	Feb 21 03:01:21 PM PST 24	65675826589 ps
T16	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.527004871	Feb 21 03:00:05 PM PST 24	Feb 21 03:00:53 PM PST 24	32511179555 ps
T17	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.791279542	Feb 21 03:00:00 PM PST 24	Feb 21 03:00:24 PM PST 24	41273760845 ps
T198	/workspace/coverage/default/48.sysrst_ctrl_alert_test.1509162043	Feb 21 03:01:39 PM PST 24	Feb 21 03:01:46 PM PST 24	2014102167 ps
T199	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1361026807	Feb 21 03:00:26 PM PST 24	Feb 21 03:00:33 PM PST 24	2434349998 ps
T18	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.4062883428	Feb 21 03:01:20 PM PST 24	Feb 21 03:01:22 PM PST 24	3068288167 ps
T19	/workspace/coverage/default/2.sysrst_ctrl_stress_all.1694911894	Feb 21 03:00:06 PM PST 24	Feb 21 03:00:15 PM PST 24	14183849190 ps
T183	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1196448646	Feb 21 03:01:26 PM PST 24	Feb 21 03:01:34 PM PST 24	2460063245 ps
T20	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2502253480	Feb 21 03:01:17 PM PST 24	Feb 21 03:06:51 PM PST 24	134740341322 ps
T21	/workspace/coverage/default/22.sysrst_ctrl_edge_detect.1465312106	Feb 21 03:00:24 PM PST 24	Feb 21 03:05:55 PM PST 24	1021729163114 ps
T184	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1404559468	Feb 21 03:01:12 PM PST 24	Feb 21 03:01:15 PM PST 24	3274482537 ps
T185	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3057106828	Feb 21 03:01:26 PM PST 24	Feb 21 03:02:38 PM PST 24	30250406570 ps
T186	/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.395807566	Feb 21 03:00:21 PM PST 24	Feb 21 03:00:25 PM PST 24	2622426850 ps
T187	/workspace/coverage/default/19.sysrst_ctrl_alert_test.2938613007	Feb 21 03:00:06 PM PST 24	Feb 21 03:00:08 PM PST 24	2063146966 ps
T49	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1739555852	Feb 21 03:01:51 PM PST 24	Feb 21 03:02:29 PM PST 24	28085263092 ps
T188	/workspace/coverage/default/36.sysrst_ctrl_alert_test.1236256143	Feb 21 03:01:12 PM PST 24	Feb 21 03:01:19 PM PST 24	2014224744 ps
T167	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.3794486438	Feb 21 03:01:22 PM PST 24	Feb 21 03:01:33 PM PST 24	3608269556 ps
T68	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.765185320	Feb 21 03:01:37 PM PST 24	Feb 21 03:01:58 PM PST 24	26345272127 ps
T148	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.943365860	Feb 21 03:00:10 PM PST 24	Feb 21 03:00:12 PM PST 24	4816384305 ps
T364	/workspace/coverage/default/3.sysrst_ctrl_alert_test.4289903782	Feb 21 03:00:19 PM PST 24	Feb 21 03:00:21 PM PST 24	2114792692 ps
T365	/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2691324515	Feb 21 03:00:10 PM PST 24	Feb 21 03:00:19 PM PST 24	2610507522 ps
T366	/workspace/coverage/default/44.sysrst_ctrl_smoke.3116540629	Feb 21 03:01:26 PM PST 24	Feb 21 03:01:30 PM PST 24	2121298725 ps
T367	/workspace/coverage/default/45.sysrst_ctrl_smoke.3797134808	Feb 21 03:01:21 PM PST 24	Feb 21 03:01:28 PM PST 24	2111741103 ps
T280	/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1092819475	Feb 21 03:00:49 PM PST 24	Feb 21 03:00:53 PM PST 24	2461320283 ps
T149	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.3367650782	Feb 21 02:59:59 PM PST 24	Feb 21 03:00:07 PM PST 24	2502471457 ps
T46	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2449942729	Feb 21 03:01:41 PM PST 24	Feb 21 03:03:29 PM PST 24	44007146732 ps
T284	/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2952963638	Feb 21 03:01:09 PM PST 24	Feb 21 03:01:13 PM PST 24	2517491643 ps
T368	/workspace/coverage/default/22.sysrst_ctrl_alert_test.1950235936	Feb 21 03:00:18 PM PST 24	Feb 21 03:00:21 PM PST 24	2048867549 ps
T369	/workspace/coverage/default/19.sysrst_ctrl_smoke.4215928877	Feb 21 03:00:15 PM PST 24	Feb 21 03:00:19 PM PST 24	2127858353 ps
T50	/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.171238128	Feb 21 03:01:02 PM PST 24	Feb 21 03:01:08 PM PST 24	3736326568 ps
T69	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3381174209	Feb 21 03:00:25 PM PST 24	Feb 21 03:01:15 PM PST 24	74413897485 ps
T281	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.842347446	Feb 21 03:00:12 PM PST 24	Feb 21 03:00:15 PM PST 24	2492730013 ps
T370	/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2780085248	Feb 21 03:01:13 PM PST 24	Feb 21 03:01:17 PM PST 24	2247312067 ps
T150	/workspace/coverage/default/23.sysrst_ctrl_edge_detect.776353655	Feb 21 03:00:22 PM PST 24	Feb 21 03:00:26 PM PST 24	3293454283 ps
T43	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1430235369	Feb 21 03:01:16 PM PST 24	Feb 21 03:01:26 PM PST 24	3206472822 ps
T210	/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2494110137	Feb 21 03:00:19 PM PST 24	Feb 21 03:00:28 PM PST 24	2614167192 ps
T211	/workspace/coverage/default/11.sysrst_ctrl_alert_test.3147745901	Feb 21 03:00:08 PM PST 24	Feb 21 03:00:11 PM PST 24	2025781514 ps
T212	/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.1023780954	Feb 21 03:00:20 PM PST 24	Feb 21 03:00:23 PM PST 24	2633478414 ps
T213	/workspace/coverage/default/14.sysrst_ctrl_alert_test.3890253952	Feb 21 03:00:12 PM PST 24	Feb 21 03:00:14 PM PST 24	2035952894 ps
T60	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2723597194	Feb 21 03:00:14 PM PST 24	Feb 21 03:00:21 PM PST 24	2811960199 ps
T22	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2478539642	Feb 21 03:01:21 PM PST 24	Feb 21 03:03:08 PM PST 24	78538494138 ps
T139	/workspace/coverage/default/0.sysrst_ctrl_alert_test.1532295848	Feb 21 02:59:54 PM PST 24	Feb 21 02:59:57 PM PST 24	2021404904 ps
T23	/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1226077145	Feb 21 03:01:22 PM PST 24	Feb 21 03:01:24 PM PST 24	5506861588 ps
T73	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3405013730	Feb 21 03:01:25 PM PST 24	Feb 21 03:04:45 PM PST 24	150589865912 ps
T70	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3180152310	Feb 21 03:01:22 PM PST 24	Feb 21 03:01:33 PM PST 24	22609193648 ps
T140	/workspace/coverage/default/24.sysrst_ctrl_alert_test.318023318	Feb 21 03:00:36 PM PST 24	Feb 21 03:00:43 PM PST 24	2014699657 ps
T141	/workspace/coverage/default/43.sysrst_ctrl_smoke.90678621	Feb 21 03:01:19 PM PST 24	Feb 21 03:01:23 PM PST 24	2123507344 ps
T142	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.556114609	Feb 21 03:01:20 PM PST 24	Feb 21 03:01:27 PM PST 24	2608922122 ps
T143	/workspace/coverage/default/42.sysrst_ctrl_alert_test.336111444	Feb 21 03:01:13 PM PST 24	Feb 21 03:01:15 PM PST 24	2050509312 ps
T144	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3754666634	Feb 21 02:59:51 PM PST 24	Feb 21 03:01:31 PM PST 24	42008409216 ps
T267	/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1206822713	Feb 21 02:59:41 PM PST 24	Feb 21 02:59:46 PM PST 24	2451391417 ps
T268	/workspace/coverage/default/20.sysrst_ctrl_smoke.4082725194	Feb 21 03:00:28 PM PST 24	Feb 21 03:00:32 PM PST 24	2136191560 ps
T237	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1833039963	Feb 21 02:59:55 PM PST 24	Feb 21 03:04:17 PM PST 24	110068488676 ps
T193	/workspace/coverage/default/28.sysrst_ctrl_stress_all.2017250223	Feb 21 03:00:55 PM PST 24	Feb 21 03:01:02 PM PST 24	10334132854 ps
T168	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.2100439145	Feb 21 03:00:56 PM PST 24	Feb 21 03:00:59 PM PST 24	3107109469 ps
T269	/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1780359447	Feb 21 03:00:09 PM PST 24	Feb 21 03:00:12 PM PST 24	2635912701 ps
T270	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1726325124	Feb 21 03:01:29 PM PST 24	Feb 21 03:01:37 PM PST 24	2608708782 ps
T231	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.154649898	Feb 21 03:01:09 PM PST 24	Feb 21 03:07:31 PM PST 24	151517852020 ps
T31	/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.2222823376	Feb 21 03:00:29 PM PST 24	Feb 21 03:00:37 PM PST 24	3045986218 ps
T363	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.1655539287	Feb 21 03:00:23 PM PST 24	Feb 21 03:00:31 PM PST 24	2510267169 ps
T32	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.3426025330	Feb 21 03:00:56 PM PST 24	Feb 21 03:01:57 PM PST 24	23508550932 ps
T33	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.1500039697	Feb 21 03:00:19 PM PST 24	Feb 21 03:00:24 PM PST 24	6673843200 ps
T83	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.4162665745	Feb 21 03:00:17 PM PST 24	Feb 21 03:00:22 PM PST 24	2727665081 ps
T130	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.1301577324	Feb 21 02:59:48 PM PST 24	Feb 21 02:59:54 PM PST 24	3098036568 ps
T131	/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.2103630045	Feb 21 03:00:08 PM PST 24	Feb 21 03:00:10 PM PST 24	2204985535 ps
T132	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.880937170	Feb 21 03:01:10 PM PST 24	Feb 21 03:01:21 PM PST 24	3484722901 ps
T133	/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.367444194	Feb 21 03:00:21 PM PST 24	Feb 21 03:00:25 PM PST 24	2623333773 ps
T134	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.1925831793	Feb 21 03:00:10 PM PST 24	Feb 21 03:00:19 PM PST 24	5963474361 ps
T34	/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.2842499553	Feb 21 03:00:16 PM PST 24	Feb 21 03:00:22 PM PST 24	6985394659 ps
T72	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.1498387122	Feb 21 03:01:15 PM PST 24	Feb 21 03:04:50 PM PST 24	84416348835 ps
T135	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1234306962	Feb 21 03:00:06 PM PST 24	Feb 21 03:00:15 PM PST 24	3408290890 ps
T223	/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1424755288	Feb 21 03:00:28 PM PST 24	Feb 21 03:00:33 PM PST 24	2521749453 ps
T371	/workspace/coverage/default/12.sysrst_ctrl_smoke.2794901279	Feb 21 03:00:10 PM PST 24	Feb 21 03:00:14 PM PST 24	2125100143 ps
T44	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3699704709	Feb 21 03:01:38 PM PST 24	Feb 21 03:03:51 PM PST 24	205931301218 ps
T45	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.404441779	Feb 21 03:01:20 PM PST 24	Feb 21 03:05:23 PM PST 24	113285410828 ps
T372	/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3145054663	Feb 21 03:00:12 PM PST 24	Feb 21 03:00:19 PM PST 24	2259433418 ps
T226	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4175676947	Feb 21 03:01:50 PM PST 24	Feb 21 03:03:52 PM PST 24	88827579107 ps
T373	/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3788532384	Feb 21 02:59:49 PM PST 24	Feb 21 02:59:54 PM PST 24	2621571485 ps
T374	/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2490499137	Feb 21 03:01:16 PM PST 24	Feb 21 03:01:22 PM PST 24	2019444451 ps
T375	/workspace/coverage/default/30.sysrst_ctrl_stress_all.3759677695	Feb 21 03:00:55 PM PST 24	Feb 21 03:01:02 PM PST 24	9212667200 ps
T376	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1433103766	Feb 21 02:59:41 PM PST 24	Feb 21 02:59:44 PM PST 24	2623671039 ps
T377	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.2451096299	Feb 21 02:59:55 PM PST 24	Feb 21 03:00:03 PM PST 24	2407267789 ps
T378	/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3986833843	Feb 21 03:00:17 PM PST 24	Feb 21 03:00:26 PM PST 24	2609239830 ps
T79	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1071199293	Feb 21 03:01:40 PM PST 24	Feb 21 03:03:16 PM PST 24	74046074992 ps
T285	/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.787325069	Feb 21 02:59:49 PM PST 24	Feb 21 02:59:51 PM PST 24	2535638677 ps
T379	/workspace/coverage/default/2.sysrst_ctrl_alert_test.2904931507	Feb 21 02:59:48 PM PST 24	Feb 21 02:59:55 PM PST 24	2008416672 ps
T380	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3181393542	Feb 21 03:00:30 PM PST 24	Feb 21 03:00:35 PM PST 24	4489905359 ps
T227	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2012269393	Feb 21 03:00:09 PM PST 24	Feb 21 03:01:46 PM PST 24	74496720002 ps
T381	/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2947426555	Feb 21 03:00:23 PM PST 24	Feb 21 03:00:26 PM PST 24	2277931278 ps
T286	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2953047577	Feb 21 03:00:16 PM PST 24	Feb 21 03:00:26 PM PST 24	2511785608 ps
T224	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1689705132	Feb 21 03:01:36 PM PST 24	Feb 21 03:03:06 PM PST 24	66914919814 ps
T323	/workspace/coverage/default/7.sysrst_ctrl_stress_all.1626695976	Feb 21 03:00:17 PM PST 24	Feb 21 03:04:42 PM PST 24	103296433292 ps
T382	/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.215384240	Feb 21 03:01:12 PM PST 24	Feb 21 03:01:17 PM PST 24	2466187525 ps
T383	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3519597243	Feb 21 03:01:15 PM PST 24	Feb 21 03:01:19 PM PST 24	2617090375 ps
T232	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.2996955016	Feb 21 03:00:28 PM PST 24	Feb 21 03:02:58 PM PST 24	57805195101 ps
T51	/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1355489659	Feb 21 03:01:01 PM PST 24	Feb 21 03:07:24 PM PST 24	271433475832 ps
T85	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.1403811368	Feb 21 03:00:11 PM PST 24	Feb 21 03:00:17 PM PST 24	4790818513 ps
T384	/workspace/coverage/default/38.sysrst_ctrl_smoke.1545006455	Feb 21 03:01:21 PM PST 24	Feb 21 03:01:27 PM PST 24	2112304812 ps
T385	/workspace/coverage/default/29.sysrst_ctrl_stress_all.4037586946	Feb 21 03:01:04 PM PST 24	Feb 21 03:01:07 PM PST 24	7370174342 ps
T240	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.1926028274	Feb 21 03:00:43 PM PST 24	Feb 21 03:02:03 PM PST 24	118039718708 ps
T386	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1259165658	Feb 21 03:01:40 PM PST 24	Feb 21 03:01:47 PM PST 24	2458458112 ps
T387	/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3107431895	Feb 21 02:59:47 PM PST 24	Feb 21 02:59:53 PM PST 24	4255718816 ps
T228	/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2486531619	Feb 21 03:01:49 PM PST 24	Feb 21 03:01:59 PM PST 24	57373483241 ps
T249	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.496134496	Feb 21 02:59:54 PM PST 24	Feb 21 03:01:41 PM PST 24	42007658041 ps
T239	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.4005443310	Feb 21 02:59:31 PM PST 24	Feb 21 03:00:37 PM PST 24	51660775627 ps
T196	/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3387192270	Feb 21 03:00:18 PM PST 24	Feb 21 03:00:23 PM PST 24	4548885978 ps
T55	/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2506669709	Feb 21 02:59:49 PM PST 24	Feb 21 02:59:58 PM PST 24	3293157738 ps
T388	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3494030149	Feb 21 03:00:15 PM PST 24	Feb 21 03:00:19 PM PST 24	2636799566 ps
T271	/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2922809924	Feb 21 03:01:14 PM PST 24	Feb 21 03:01:24 PM PST 24	3166909303 ps
T389	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1290920319	Feb 21 03:00:18 PM PST 24	Feb 21 03:00:27 PM PST 24	2512211075 ps
T390	/workspace/coverage/default/17.sysrst_ctrl_smoke.428849744	Feb 21 03:00:08 PM PST 24	Feb 21 03:00:14 PM PST 24	2110725597 ps
T391	/workspace/coverage/default/23.sysrst_ctrl_stress_all.1880131810	Feb 21 03:00:43 PM PST 24	Feb 21 03:01:20 PM PST 24	14113257233 ps
T392	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2504310979	Feb 21 03:00:19 PM PST 24	Feb 21 03:00:23 PM PST 24	2054630419 ps
T393	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3966801365	Feb 21 03:01:20 PM PST 24	Feb 21 03:01:22 PM PST 24	2531266996 ps
T209	/workspace/coverage/default/6.sysrst_ctrl_edge_detect.1661302093	Feb 21 02:59:42 PM PST 24	Feb 21 02:59:52 PM PST 24	4582973306 ps
T88	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3821287322	Feb 21 03:01:22 PM PST 24	Feb 21 03:01:35 PM PST 24	63805156588 ps
T101	/workspace/coverage/default/47.sysrst_ctrl_stress_all.294876285	Feb 21 03:01:45 PM PST 24	Feb 21 03:01:55 PM PST 24	16489775637 ps
T102	/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.1153498367	Feb 21 03:00:15 PM PST 24	Feb 21 03:00:26 PM PST 24	3606513168 ps
T86	/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2957321392	Feb 21 02:59:51 PM PST 24	Feb 21 03:00:02 PM PST 24	3787489393 ps
T81	/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1387132341	Feb 21 03:01:10 PM PST 24	Feb 21 03:02:32 PM PST 24	256068641877 ps
T87	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2777027427	Feb 21 03:00:15 PM PST 24	Feb 21 03:01:58 PM PST 24	43465385544 ps
T103	/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2721258815	Feb 21 03:01:01 PM PST 24	Feb 21 03:01:04 PM PST 24	3760315847 ps
T104	/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.646439190	Feb 21 02:59:56 PM PST 24	Feb 21 03:00:06 PM PST 24	3160575300 ps
T105	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.486308240	Feb 21 02:59:34 PM PST 24	Feb 21 02:59:38 PM PST 24	2272973040 ps
T106	/workspace/coverage/default/30.sysrst_ctrl_alert_test.759179988	Feb 21 03:00:56 PM PST 24	Feb 21 03:01:02 PM PST 24	2013660871 ps
T394	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.1664274770	Feb 21 03:00:16 PM PST 24	Feb 21 03:00:22 PM PST 24	2938964168 ps
T229	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1176114314	Feb 21 03:01:11 PM PST 24	Feb 21 03:01:45 PM PST 24	101267527882 ps
T319	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3428856599	Feb 21 03:00:12 PM PST 24	Feb 21 03:01:16 PM PST 24	144060163801 ps
T395	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3557950745	Feb 21 03:00:18 PM PST 24	Feb 21 03:00:22 PM PST 24	2537858960 ps
T396	/workspace/coverage/default/40.sysrst_ctrl_alert_test.1970538190	Feb 21 03:01:20 PM PST 24	Feb 21 03:01:27 PM PST 24	2013425916 ps
T230	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.986400644	Feb 21 03:00:14 PM PST 24	Feb 21 03:01:25 PM PST 24	58294341268 ps
T77	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.4265875575	Feb 21 03:00:17 PM PST 24	Feb 21 03:00:26 PM PST 24	2494107080 ps
T173	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2448904084	Feb 21 03:00:46 PM PST 24	Feb 21 03:00:54 PM PST 24	2448769057 ps
T174	/workspace/coverage/default/45.sysrst_ctrl_alert_test.2866685010	Feb 21 03:01:25 PM PST 24	Feb 21 03:01:28 PM PST 24	2021436224 ps
T175	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.75762807	Feb 21 03:01:46 PM PST 24	Feb 21 03:01:48 PM PST 24	2052273439 ps
T89	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.527582398	Feb 21 03:00:54 PM PST 24	Feb 21 03:06:10 PM PST 24	221943933280 ps
T176	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1258481852	Feb 21 03:01:30 PM PST 24	Feb 21 03:01:37 PM PST 24	2612676728 ps
T177	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3361725942	Feb 21 02:59:31 PM PST 24	Feb 21 03:00:27 PM PST 24	146044817138 ps
T90	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.916617768	Feb 21 02:59:54 PM PST 24	Feb 21 03:00:02 PM PST 24	27177529769 ps
T116	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1584667773	Feb 21 03:00:24 PM PST 24	Feb 21 03:02:18 PM PST 24	45914337210 ps
T178	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1355826185	Feb 21 03:01:50 PM PST 24	Feb 21 03:02:32 PM PST 24	52332255385 ps
T84	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.359466570	Feb 21 03:00:59 PM PST 24	Feb 21 03:01:23 PM PST 24	63695624982 ps
T200	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.1255065177	Feb 21 03:00:40 PM PST 24	Feb 21 03:05:44 PM PST 24	113668114104 ps
T201	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3437734213	Feb 21 03:01:38 PM PST 24	Feb 21 03:02:51 PM PST 24	74186674135 ps
T202	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.979864745	Feb 21 03:00:19 PM PST 24	Feb 21 03:00:22 PM PST 24	2791489566 ps
T203	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.4227679727	Feb 21 03:01:17 PM PST 24	Feb 21 03:01:25 PM PST 24	3456395168 ps
T204	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2675375493	Feb 21 02:59:55 PM PST 24	Feb 21 03:00:03 PM PST 24	2513736306 ps
T205	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.185897043	Feb 21 03:01:11 PM PST 24	Feb 21 03:01:15 PM PST 24	2521638787 ps
T206	/workspace/coverage/default/44.sysrst_ctrl_alert_test.85274586	Feb 21 03:01:22 PM PST 24	Feb 21 03:01:29 PM PST 24	2014127848 ps
T207	/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.266074762	Feb 21 03:00:59 PM PST 24	Feb 21 03:01:02 PM PST 24	2642324977 ps
T75	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.518822355	Feb 21 02:59:33 PM PST 24	Feb 21 02:59:52 PM PST 24	29037623633 ps
T397	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.35428102	Feb 21 03:01:27 PM PST 24	Feb 21 03:01:29 PM PST 24	2072154644 ps
T243	/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.423061911	Feb 21 03:01:42 PM PST 24	Feb 21 03:08:14 PM PST 24	146603356727 ps
T398	/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1277911687	Feb 21 03:01:22 PM PST 24	Feb 21 03:01:26 PM PST 24	2618639313 ps
T399	/workspace/coverage/default/33.sysrst_ctrl_smoke.2643684132	Feb 21 03:01:00 PM PST 24	Feb 21 03:01:04 PM PST 24	2122844837 ps
T400	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4222432806	Feb 21 03:01:29 PM PST 24	Feb 21 03:01:36 PM PST 24	2507678484 ps
T244	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3837568047	Feb 21 03:00:15 PM PST 24	Feb 21 03:01:26 PM PST 24	98135836333 ps
T316	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.1639062452	Feb 21 03:01:15 PM PST 24	Feb 21 03:05:37 PM PST 24	108173981475 ps
T78	/workspace/coverage/default/27.sysrst_ctrl_stress_all.1040346378	Feb 21 03:00:39 PM PST 24	Feb 21 03:01:24 PM PST 24	105626758696 ps
T107	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.1923355814	Feb 21 03:00:11 PM PST 24	Feb 21 03:00:24 PM PST 24	4531133416 ps
T108	/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.3238178743	Feb 21 03:01:13 PM PST 24	Feb 21 03:01:21 PM PST 24	2610776493 ps
T109	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3030433640	Feb 21 03:00:22 PM PST 24	Feb 21 03:00:24 PM PST 24	2514348751 ps
T110	/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3229967663	Feb 21 03:01:48 PM PST 24	Feb 21 03:01:53 PM PST 24	3536660596 ps
T111	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2722875982	Feb 21 03:00:15 PM PST 24	Feb 21 03:00:23 PM PST 24	2509754877 ps
T112	/workspace/coverage/default/26.sysrst_ctrl_smoke.664623218	Feb 21 03:00:35 PM PST 24	Feb 21 03:00:39 PM PST 24	2124940779 ps
T113	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2269665244	Feb 21 03:00:19 PM PST 24	Feb 21 03:00:33 PM PST 24	192764985276 ps
T114	/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.679659661	Feb 21 03:01:19 PM PST 24	Feb 21 03:01:26 PM PST 24	2610140868 ps
T115	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1286319621	Feb 21 03:01:30 PM PST 24	Feb 21 03:01:33 PM PST 24	2626515209 ps
T117	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2770592394	Feb 21 03:00:10 PM PST 24	Feb 21 03:05:37 PM PST 24	1315699249433 ps
T401	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.4116842757	Feb 21 03:00:17 PM PST 24	Feb 21 03:00:21 PM PST 24	2961945761 ps
T402	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2650062469	Feb 21 03:01:27 PM PST 24	Feb 21 03:01:31 PM PST 24	2107412959 ps
T179	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.3612471318	Feb 21 03:00:22 PM PST 24	Feb 21 03:00:27 PM PST 24	3135064842 ps
T337	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3804458876	Feb 21 03:01:41 PM PST 24	Feb 21 03:06:53 PM PST 24	115017297886 ps
T91	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1334823970	Feb 21 03:01:51 PM PST 24	Feb 21 03:02:59 PM PST 24	27831879367 ps
T403	/workspace/coverage/default/43.sysrst_ctrl_alert_test.747024371	Feb 21 03:01:26 PM PST 24	Feb 21 03:01:28 PM PST 24	2073006477 ps
T404	/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2468179662	Feb 21 03:01:48 PM PST 24	Feb 21 03:03:02 PM PST 24	26084457148 ps
T119	/workspace/coverage/default/12.sysrst_ctrl_stress_all.745431956	Feb 21 03:00:06 PM PST 24	Feb 21 03:00:16 PM PST 24	16307926301 ps
T180	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.540306988	Feb 21 02:59:44 PM PST 24	Feb 21 02:59:46 PM PST 24	2589647808 ps
T347	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2682374751	Feb 21 03:01:36 PM PST 24	Feb 21 03:06:41 PM PST 24	111999615552 ps
T405	/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.457440474	Feb 21 03:00:00 PM PST 24	Feb 21 03:00:03 PM PST 24	2085586257 ps
T406	/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.156641515	Feb 21 03:00:25 PM PST 24	Feb 21 03:00:28 PM PST 24	2628668300 ps
T407	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2846952349	Feb 21 03:00:49 PM PST 24	Feb 21 03:01:24 PM PST 24	25342691093 ps
T338	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3021572834	Feb 21 03:01:48 PM PST 24	Feb 21 03:04:45 PM PST 24	139663678046 ps
T344	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3914761099	Feb 21 03:00:17 PM PST 24	Feb 21 03:01:41 PM PST 24	60492391459 ps
T408	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2932769887	Feb 21 03:00:28 PM PST 24	Feb 21 03:00:44 PM PST 24	5663937606 ps
T409	/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3510214898	Feb 21 03:00:36 PM PST 24	Feb 21 03:00:39 PM PST 24	2493626704 ps
T218	/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1264602775	Feb 21 03:01:18 PM PST 24	Feb 21 03:01:36 PM PST 24	40569481653 ps
T272	/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.620153962	Feb 21 03:01:21 PM PST 24	Feb 21 03:01:28 PM PST 24	3944774429 ps
T349	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3341100978	Feb 21 02:59:58 PM PST 24	Feb 21 03:00:38 PM PST 24	116941741804 ps
T282	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2135874277	Feb 21 03:00:09 PM PST 24	Feb 21 03:00:14 PM PST 24	2469635079 ps
T410	/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1045666393	Feb 21 03:01:21 PM PST 24	Feb 21 03:01:26 PM PST 24	2517069107 ps
T283	/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.4067618300	Feb 21 03:00:23 PM PST 24	Feb 21 03:00:31 PM PST 24	2461571826 ps
T411	/workspace/coverage/default/20.sysrst_ctrl_alert_test.2993402376	Feb 21 03:00:23 PM PST 24	Feb 21 03:00:26 PM PST 24	2028430420 ps
T412	/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3652799817	Feb 21 03:00:00 PM PST 24	Feb 21 03:00:08 PM PST 24	2453862704 ps
T74	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.18512571	Feb 21 03:01:12 PM PST 24	Feb 21 03:01:37 PM PST 24	39296964779 ps
T118	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3153445674	Feb 21 02:59:44 PM PST 24	Feb 21 02:59:47 PM PST 24	8809695569 ps
T413	/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1809524413	Feb 21 03:00:15 PM PST 24	Feb 21 03:00:23 PM PST 24	2093132336 ps
T80	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2428687419	Feb 21 03:01:36 PM PST 24	Feb 21 03:04:15 PM PST 24	120790227110 ps
T125	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.487371339	Feb 21 03:01:18 PM PST 24	Feb 21 03:01:27 PM PST 24	7085749089 ps
T414	/workspace/coverage/default/17.sysrst_ctrl_alert_test.1964852331	Feb 21 03:00:06 PM PST 24	Feb 21 03:00:09 PM PST 24	2025409202 ps
T415	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1350183124	Feb 21 03:01:51 PM PST 24	Feb 21 03:02:17 PM PST 24	35239906578 ps