Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.32	99.20	95.93	100.00	94.23	98.57	99.16	94.18

Total tests in report: 913

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
58.98	58.98	76.19	76.19	66.11	66.11	92.03	92.03	17.31	17.31	78.38	78.38	68.91	68.91	13.91	13.91	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2632980354
74.11	15.13	90.22	14.03	83.66	17.55	95.90	3.87	37.82	20.51	90.81	12.43	81.27	12.36	39.04	25.13	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2291615307
82.15	8.05	92.93	2.71	86.00	2.34	95.90	0.00	58.33	20.51	93.11	2.30	89.70	8.43	59.09	20.04	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.591668429
85.92	3.77	95.42	2.48	88.65	2.65	96.81	0.91	65.38	7.05	95.02	1.91	93.54	3.84	66.61	7.53	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.151792754
88.31	2.39	96.51	1.09	90.22	1.57	96.81	0.00	78.21	12.82	96.17	1.15	93.63	0.09	66.61	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3639347276
89.71	1.40	97.34	0.83	90.98	0.76	96.81	0.00	83.33	5.13	96.87	0.70	95.60	1.97	67.03	0.42	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1829081289
90.84	1.13	97.36	0.02	91.96	0.98	97.49	0.68	83.33	0.00	96.90	0.03	95.60	0.00	73.26	6.23	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.3252452694
91.76	0.91	97.67	0.31	92.27	0.31	97.49	0.00	85.90	2.56	97.08	0.17	96.25	0.66	75.65	2.39	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4205688545
92.57	0.81	98.02	0.35	92.92	0.64	97.49	0.00	89.10	3.21	97.46	0.38	97.10	0.84	75.91	0.26	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.3481559712
93.09	0.52	98.12	0.10	93.08	0.17	97.72	0.23	89.74	0.64	97.60	0.14	97.19	0.09	78.19	2.28	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.1181976881
93.49	0.40	98.35	0.23	93.25	0.17	98.18	0.46	89.74	0.00	97.63	0.03	97.38	0.19	79.91	1.71	/workspace/coverage/default/10.sysrst_ctrl_stress_all.3389122358
93.77	0.28	98.35	0.00	93.27	0.02	99.77	1.59	89.74	0.00	97.63	0.00	97.47	0.09	80.17	0.26	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3034399554
94.05	0.28	98.39	0.03	93.35	0.07	99.77	0.00	90.38	0.64	97.67	0.03	97.57	0.09	81.26	1.09	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.11587028
94.29	0.24	98.45	0.07	93.42	0.07	99.77	0.00	91.67	1.28	97.74	0.07	97.75	0.19	81.26	0.00	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3493258544
94.52	0.23	98.49	0.03	93.42	0.00	99.77	0.00	91.67	0.00	97.81	0.07	97.85	0.09	82.66	1.40	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.4159536741
94.75	0.23	98.52	0.03	93.44	0.02	99.77	0.00	91.67	0.00	97.84	0.03	97.85	0.00	84.16	1.51	/workspace/coverage/default/25.sysrst_ctrl_stress_all.796163898
94.97	0.22	98.56	0.03	93.66	0.21	99.77	0.00	91.67	0.00	97.84	0.00	97.94	0.09	85.36	1.19	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.197478826
95.17	0.20	98.58	0.02	93.68	0.02	99.77	0.00	91.67	0.00	97.88	0.03	97.94	0.00	86.71	1.35	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3677399759
95.36	0.19	98.58	0.00	93.78	0.10	99.77	0.00	91.67	0.00	97.88	0.00	98.50	0.56	87.38	0.67	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.2306723978
95.53	0.16	98.61	0.03	93.80	0.02	99.77	0.00	92.31	0.64	97.91	0.03	98.60	0.09	87.69	0.31	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1100924795
95.69	0.16	98.77	0.16	94.40	0.60	99.77	0.00	92.31	0.00	98.19	0.28	98.69	0.09	87.69	0.00	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1938978304
95.84	0.15	98.80	0.03	94.42	0.02	99.77	0.00	92.95	0.64	98.22	0.03	98.78	0.09	87.90	0.21	/workspace/coverage/default/13.sysrst_ctrl_stress_all.991734443
95.98	0.15	98.80	0.00	95.18	0.76	99.77	0.00	92.95	0.00	98.22	0.00	98.78	0.00	88.16	0.26	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.1131018181
96.12	0.14	98.87	0.07	95.30	0.12	99.77	0.00	92.95	0.00	98.33	0.10	98.78	0.00	88.84	0.67	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2231597963
96.24	0.12	98.91	0.03	95.33	0.02	99.77	0.00	93.59	0.64	98.36	0.03	98.88	0.09	88.84	0.00	/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.446881363
96.36	0.12	98.94	0.03	95.35	0.02	99.77	0.00	94.23	0.64	98.40	0.03	98.97	0.09	88.84	0.00	/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.4043539305
96.47	0.11	99.01	0.07	95.35	0.00	99.77	0.00	94.23	0.00	98.40	0.00	98.97	0.00	89.56	0.73	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3349337843
96.56	0.09	99.01	0.00	95.35	0.00	99.77	0.00	94.23	0.00	98.40	0.00	98.97	0.00	90.19	0.62	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1565750608
96.63	0.07	99.01	0.00	95.35	0.00	99.77	0.00	94.23	0.00	98.40	0.00	98.97	0.00	90.71	0.52	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3250148676
96.69	0.05	99.01	0.00	95.42	0.07	99.77	0.00	94.23	0.00	98.40	0.00	99.06	0.09	90.91	0.21	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2063300425
96.74	0.05	99.01	0.00	95.42	0.00	99.77	0.00	94.23	0.00	98.40	0.00	99.06	0.00	91.28	0.36	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1177772211
96.79	0.05	99.06	0.05	95.49	0.07	100.00	0.23	94.23	0.00	98.40	0.00	99.06	0.00	91.28	0.00	/workspace/coverage/default/25.sysrst_ctrl_alert_test.3639233777
96.83	0.04	99.06	0.00	95.49	0.00	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	91.54	0.26	/workspace/coverage/default/11.sysrst_ctrl_stress_all.2721626509
96.86	0.04	99.06	0.00	95.49	0.00	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	91.80	0.26	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1000850498
96.90	0.04	99.06	0.00	95.49	0.00	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	92.06	0.26	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.158468271
96.93	0.03	99.06	0.00	95.52	0.02	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	92.26	0.21	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3710493094
96.96	0.03	99.06	0.00	95.52	0.00	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	92.47	0.21	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3888715720
96.99	0.03	99.06	0.00	95.52	0.00	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	92.68	0.21	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2570919572
97.02	0.03	99.06	0.00	95.71	0.19	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	92.68	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.634150282
97.05	0.03	99.10	0.03	95.71	0.00	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	92.83	0.16	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.4079207487
97.07	0.02	99.11	0.02	95.71	0.00	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	92.99	0.16	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3215790018
97.09	0.02	99.11	0.00	95.71	0.00	100.00	0.00	94.23	0.00	98.40	0.00	99.06	0.00	93.15	0.16	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1636004002
97.11	0.01	99.15	0.03	95.71	0.00	100.00	0.00	94.23	0.00	98.47	0.07	99.06	0.00	93.15	0.00	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.1330169620
97.12	0.01	99.15	0.00	95.71	0.00	100.00	0.00	94.23	0.00	98.47	0.00	99.06	0.00	93.25	0.10	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3231754078
97.14	0.01	99.15	0.00	95.71	0.00	100.00	0.00	94.23	0.00	98.47	0.00	99.06	0.00	93.35	0.10	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.263914059
97.15	0.01	99.15	0.00	95.71	0.00	100.00	0.00	94.23	0.00	98.47	0.00	99.06	0.00	93.46	0.10	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.3335540480
97.17	0.01	99.15	0.00	95.71	0.00	100.00	0.00	94.23	0.00	98.47	0.00	99.06	0.00	93.56	0.10	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1999619403
97.18	0.01	99.15	0.00	95.71	0.00	100.00	0.00	94.23	0.00	98.47	0.00	99.06	0.00	93.67	0.10	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3016162469
97.20	0.01	99.15	0.00	95.71	0.00	100.00	0.00	94.23	0.00	98.47	0.00	99.06	0.00	93.77	0.10	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2029911368
97.21	0.01	99.15	0.00	95.71	0.00	100.00	0.00	94.23	0.00	98.47	0.00	99.16	0.09	93.77	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.453772957
97.22	0.01	99.15	0.00	95.78	0.07	100.00	0.00	94.23	0.00	98.47	0.00	99.16	0.00	93.77	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.676877926
97.23	0.01	99.17	0.02	95.78	0.00	100.00	0.00	94.23	0.00	98.50	0.03	99.16	0.00	93.77	0.00	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2742904330
97.24	0.01	99.18	0.02	95.78	0.00	100.00	0.00	94.23	0.00	98.54	0.03	99.16	0.00	93.77	0.00	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.465656177
97.24	0.01	99.20	0.02	95.78	0.00	100.00	0.00	94.23	0.00	98.57	0.03	99.16	0.00	93.77	0.00	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.1402313613
97.25	0.01	99.20	0.00	95.78	0.00	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	93.82	0.05	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.1228901072
97.26	0.01	99.20	0.00	95.78	0.00	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	93.87	0.05	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3155251769
97.27	0.01	99.20	0.00	95.78	0.00	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	93.93	0.05	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.2197741592
97.27	0.01	99.20	0.00	95.78	0.00	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	93.98	0.05	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2730649143
97.28	0.01	99.20	0.00	95.78	0.00	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	94.03	0.05	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3103555004
97.29	0.01	99.20	0.00	95.78	0.00	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	94.08	0.05	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.3007571483
97.30	0.01	99.20	0.00	95.78	0.00	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	94.13	0.05	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1700370428
97.30	0.01	99.20	0.00	95.78	0.00	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	94.18	0.05	/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1517152647
97.31	0.01	99.20	0.00	95.83	0.05	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	94.18	0.00	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1341162018
97.31	0.01	99.20	0.00	95.85	0.02	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	94.18	0.00	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3861956577
97.32	0.01	99.20	0.00	95.87	0.02	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	94.18	0.00	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.87887133
97.32	0.01	99.20	0.00	95.90	0.02	100.00	0.00	94.23	0.00	98.57	0.00	99.16	0.00	94.18	0.00	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1794301458

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2930085240
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1175515679
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.700117379
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2927846825
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1924816868
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2491523723
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.466103816
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.993724975
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.852819855
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3026556458
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2792602616
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.119668607
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1413247358
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2852419959
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.527524356
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3386084044
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1286500775
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1622949528
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3321826055
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.361567522
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1384600289
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1836741012
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3967995842
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.4163714227
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.532151924
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.57153905
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2145963134
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2675245043
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.413878973
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.75689018
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1917157130
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2834873621
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2435109758
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1503289605
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2106085627
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.630595540
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2194410539
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1440455
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3891675268
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.690737620
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3218854482
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2091393928
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1593091345
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1135891426
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2353495933
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3841148940
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.220599494
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.4054156433
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.684723224
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3720538573
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.899371945
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3012803028
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.3355669567
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/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1036070460
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2500780163
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.4261910827
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3908119212
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1657398653
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.601583196
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2795613043
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2851248511
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2517237567
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.2952884924
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1613883465
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2575024092
/workspace/coverage/default/4.sysrst_ctrl_smoke.3299287754
/workspace/coverage/default/4.sysrst_ctrl_stress_all.2897221742
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3436699699
/workspace/coverage/default/40.sysrst_ctrl_alert_test.2237948227
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3174763569
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2185283834
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.164257724
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.549708694
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3594485637
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1817839749
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.309294017
/workspace/coverage/default/40.sysrst_ctrl_smoke.2352206875
/workspace/coverage/default/40.sysrst_ctrl_stress_all.3686712485
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3902184904
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2067619119
/workspace/coverage/default/41.sysrst_ctrl_alert_test.3819929768
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2848885627
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.2583751420
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.214864691
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3227005307
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.135760212
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1822412623
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.118392915
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2677147557
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2328690801
/workspace/coverage/default/41.sysrst_ctrl_smoke.2846968016
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2054502986
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3494625353
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.525218931
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3241569298
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3128635730
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1658758485
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.728039059
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.423783844
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.27699096
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1267676612
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1365098855
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3119952737
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1025872520
/workspace/coverage/default/42.sysrst_ctrl_smoke.2142779470
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.4122500617
/workspace/coverage/default/43.sysrst_ctrl_alert_test.692734073
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1245801565
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.315927659
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3693529907
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1175982143
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.4128671165
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.583932056
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3842695495
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1898922689
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2543076549
/workspace/coverage/default/43.sysrst_ctrl_smoke.177563639
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1170963629
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1180975171
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.4164194183
/workspace/coverage/default/44.sysrst_ctrl_alert_test.454962766
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3686690547
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.284250116
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3158507259
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1940108731
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.290887276
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1108817211
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.983378880
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.152965033
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2927610399
/workspace/coverage/default/44.sysrst_ctrl_smoke.1411609598
/workspace/coverage/default/44.sysrst_ctrl_stress_all.222172062
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2241828745
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3998864923
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3612862830
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2189335536
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.4256372577
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3740422457
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3972400132
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2225419873
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.300340390
/workspace/coverage/default/45.sysrst_ctrl_smoke.491083854
/workspace/coverage/default/45.sysrst_ctrl_stress_all.1707925831
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.612526268
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.4029250849
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2041041371
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2600596950
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3219858116
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.819477634
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3741927112
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1775679084
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2797783562
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3712917471
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1747216522
/workspace/coverage/default/46.sysrst_ctrl_smoke.3770421926
/workspace/coverage/default/46.sysrst_ctrl_stress_all.4091545799
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2437101528
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.4177921961
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2782689470
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.393934292
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.977531983
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1719869425
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.851494001
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3065183232
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2248118583
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1816390939
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2598739157
/workspace/coverage/default/47.sysrst_ctrl_smoke.4012576846
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2100259576
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3557756020
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.4051207091
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3247172987
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3568626503
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.946928572
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3309755823
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1046681889
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2119194214
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.414333572
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.659801051
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1923965332
/workspace/coverage/default/48.sysrst_ctrl_smoke.3294800189
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2808072741
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3449096472
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2707592199
/workspace/coverage/default/49.sysrst_ctrl_alert_test.749471151
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2681766221
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1148445310
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2795710894
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2907991545
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2022302702
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3404506230
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3451884249
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1160067033
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1477097626
/workspace/coverage/default/49.sysrst_ctrl_smoke.1173485565
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1877902966
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1658525539
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2234269131
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1361465552
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.658785155
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.86657988
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.618823411
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1069765339
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.177996574
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.59111368
/workspace/coverage/default/5.sysrst_ctrl_smoke.2805154298
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2384957355
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1784833326
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1369713022
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2654958650
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.991027441
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2812698723
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1684271148
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1884432822
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1480916350
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.784246875
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3791490227
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1764165636
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1307937311
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3847485844
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2415136071
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3406599090
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1573053112
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.835899513
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2290305137
/workspace/coverage/default/6.sysrst_ctrl_smoke.1744804110
/workspace/coverage/default/6.sysrst_ctrl_stress_all.220475304
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2191449508
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3515827970
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.932369234
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.143038946
/workspace/coverage/default/7.sysrst_ctrl_alert_test.326084866
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1443726942
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.236158067
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3459368449
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2149869627
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.151385668
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1159091254
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1476456332
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2699990215
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1102630811
/workspace/coverage/default/7.sysrst_ctrl_smoke.3655595048
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1717118512
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.422802521
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.957998537
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2481118139
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2392929397
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1363390504
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2967667059
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1917328321
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1720619183
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1211186906
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.4181101526
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1989829819
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.843854149
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.510846515
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1659664238
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.523280634
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3521799132
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3502750463
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3891154438
/workspace/coverage/default/8.sysrst_ctrl_smoke.373294500
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2077594125
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2784264862
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1803036106
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.90940126
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1570794602
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.697406362
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3575186085
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4246497122
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1613870800
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3820283705
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2854611595
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.939322623
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.4042764497
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2342014844
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3780217585
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1724122604
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2298149297
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.35898335
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1710557095
/workspace/coverage/default/9.sysrst_ctrl_smoke.943241658
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1895094592
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2501237103
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.594893051
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1322870622
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.405354807
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3330488858
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1904248153
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.52915253
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2811713149
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1038729448
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.992664615
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1026840595
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3510388207

Total test records in report: 913

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/16.sysrst_ctrl_stress_all.3163904700	Feb 29 01:43:07 PM PST 24	Feb 29 01:43:16 PM PST 24	11450662830 ps
T5	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3119952737	Feb 29 01:44:23 PM PST 24	Feb 29 01:44:27 PM PST 24	2098372940 ps
T6	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2699990215	Feb 29 01:42:51 PM PST 24	Feb 29 01:42:53 PM PST 24	2222444798 ps
T1	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2654544916	Feb 29 01:44:08 PM PST 24	Feb 29 01:49:12 PM PST 24	1075689825424 ps
T25	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1977189043	Feb 29 01:43:07 PM PST 24	Feb 29 01:43:13 PM PST 24	2462993351 ps
T2	/workspace/coverage/default/10.sysrst_ctrl_stress_all.3389122358	Feb 29 01:43:07 PM PST 24	Feb 29 01:47:48 PM PST 24	138722118822 ps
T26	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.3821718715	Feb 29 01:43:21 PM PST 24	Feb 29 01:43:23 PM PST 24	2536247674 ps
T3	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2632980354	Feb 29 01:43:38 PM PST 24	Feb 29 01:44:36 PM PST 24	85113049185 ps
T27	/workspace/coverage/default/13.sysrst_ctrl_alert_test.1284663841	Feb 29 01:43:10 PM PST 24	Feb 29 01:43:12 PM PST 24	2030323590 ps
T28	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.2069273718	Feb 29 01:43:09 PM PST 24	Feb 29 01:43:13 PM PST 24	3843107321 ps
T7	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.1181976881	Feb 29 01:43:01 PM PST 24	Feb 29 01:48:45 PM PST 24	135632814660 ps
T29	/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3021771248	Feb 29 01:43:40 PM PST 24	Feb 29 01:43:42 PM PST 24	2734009372 ps
T30	/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3584197769	Feb 29 01:43:41 PM PST 24	Feb 29 01:43:43 PM PST 24	3314582042 ps
T31	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1898922689	Feb 29 01:44:23 PM PST 24	Feb 29 01:44:25 PM PST 24	2257566361 ps
T32	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1160067033	Feb 29 01:44:31 PM PST 24	Feb 29 01:44:38 PM PST 24	2252698059 ps
T8	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1565750608	Feb 29 01:44:31 PM PST 24	Feb 29 01:47:59 PM PST 24	165690269092 ps
T51	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2848885627	Feb 29 01:44:18 PM PST 24	Feb 29 01:44:21 PM PST 24	3558073153 ps
T9	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1917328321	Feb 29 01:44:45 PM PST 24	Feb 29 01:46:56 PM PST 24	53994172809 ps
T10	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2291615307	Feb 29 01:43:42 PM PST 24	Feb 29 01:44:29 PM PST 24	94088644461 ps
T68	/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3944414641	Feb 29 01:44:07 PM PST 24	Feb 29 01:44:10 PM PST 24	2045854016 ps
T50	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3954009841	Feb 29 01:43:44 PM PST 24	Feb 29 01:43:52 PM PST 24	2460891764 ps
T52	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3459368449	Feb 29 01:42:51 PM PST 24	Feb 29 01:44:39 PM PST 24	42698007851 ps
T77	/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.3903636549	Feb 29 01:43:32 PM PST 24	Feb 29 01:43:35 PM PST 24	2628132105 ps
T61	/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3998864923	Feb 29 01:44:28 PM PST 24	Feb 29 01:44:32 PM PST 24	3551463841 ps
T74	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1168116116	Feb 29 01:42:30 PM PST 24	Feb 29 01:42:35 PM PST 24	2466965870 ps
T78	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.4023201587	Feb 29 01:43:42 PM PST 24	Feb 29 01:43:50 PM PST 24	2610617477 ps
T69	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2899487957	Feb 29 01:43:42 PM PST 24	Feb 29 01:43:46 PM PST 24	4907023929 ps
T138	/workspace/coverage/default/25.sysrst_ctrl_alert_test.3639233777	Feb 29 01:43:38 PM PST 24	Feb 29 01:43:39 PM PST 24	2087585968 ps
T11	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.3481559712	Feb 29 01:43:56 PM PST 24	Feb 29 01:44:03 PM PST 24	7689952577 ps
T33	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.90940126	Feb 29 01:44:45 PM PST 24	Feb 29 01:45:59 PM PST 24	29832234384 ps
T12	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.1107985309	Feb 29 01:43:18 PM PST 24	Feb 29 01:43:28 PM PST 24	4720641119 ps
T34	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.360443776	Feb 29 01:43:09 PM PST 24	Feb 29 01:43:17 PM PST 24	2509108472 ps
T35	/workspace/coverage/default/27.sysrst_ctrl_alert_test.1365608543	Feb 29 01:43:43 PM PST 24	Feb 29 01:43:45 PM PST 24	2032036200 ps
T36	/workspace/coverage/default/35.sysrst_ctrl_alert_test.1162948307	Feb 29 01:44:06 PM PST 24	Feb 29 01:44:10 PM PST 24	2014388177 ps
T37	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.455654841	Feb 29 01:43:14 PM PST 24	Feb 29 01:43:19 PM PST 24	2470118330 ps
T38	/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.2896261829	Feb 29 01:43:41 PM PST 24	Feb 29 01:43:44 PM PST 24	3647236828 ps
T13	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1187522361	Feb 29 01:42:29 PM PST 24	Feb 29 01:43:20 PM PST 24	81556366661 ps
T14	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3677399759	Feb 29 01:44:46 PM PST 24	Feb 29 01:46:12 PM PST 24	37800578173 ps
T15	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1784833326	Feb 29 01:42:51 PM PST 24	Feb 29 01:42:59 PM PST 24	9695864535 ps
T62	/workspace/coverage/default/27.sysrst_ctrl_stress_all.1840211609	Feb 29 01:43:39 PM PST 24	Feb 29 01:43:44 PM PST 24	7811702153 ps
T222	/workspace/coverage/default/15.sysrst_ctrl_smoke.1659925435	Feb 29 01:43:02 PM PST 24	Feb 29 01:43:05 PM PST 24	2132330741 ps
T223	/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2614263313	Feb 29 01:42:30 PM PST 24	Feb 29 01:42:34 PM PST 24	2172033669 ps
T224	/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.86657988	Feb 29 01:42:47 PM PST 24	Feb 29 01:42:54 PM PST 24	4280048137 ps
T63	/workspace/coverage/default/3.sysrst_ctrl_stress_all.1600187365	Feb 29 01:42:47 PM PST 24	Feb 29 01:42:49 PM PST 24	11271305402 ps
T39	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2133524154	Feb 29 01:43:08 PM PST 24	Feb 29 01:43:10 PM PST 24	4098682168 ps
T225	/workspace/coverage/default/17.sysrst_ctrl_alert_test.3492177616	Feb 29 01:43:09 PM PST 24	Feb 29 01:43:11 PM PST 24	2024477923 ps
T226	/workspace/coverage/default/40.sysrst_ctrl_smoke.2352206875	Feb 29 01:44:14 PM PST 24	Feb 29 01:44:15 PM PST 24	2211060399 ps
T79	/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.3501394804	Feb 29 01:43:51 PM PST 24	Feb 29 01:43:58 PM PST 24	2512136064 ps
T296	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1126757163	Feb 29 01:43:05 PM PST 24	Feb 29 01:43:10 PM PST 24	2618367849 ps
T40	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.457661977	Feb 29 01:42:31 PM PST 24	Feb 29 01:42:39 PM PST 24	2728682629 ps
T41	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3436699699	Feb 29 01:42:54 PM PST 24	Feb 29 01:43:01 PM PST 24	3889831951 ps
T59	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1904248153	Feb 29 01:44:48 PM PST 24	Feb 29 01:46:28 PM PST 24	36558675401 ps
T42	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.2162096399	Feb 29 01:43:55 PM PST 24	Feb 29 01:44:02 PM PST 24	4150480662 ps
T16	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.197478826	Feb 29 01:42:47 PM PST 24	Feb 29 01:45:14 PM PST 24	108854066955 ps
T127	/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3508013788	Feb 29 01:42:48 PM PST 24	Feb 29 01:42:51 PM PST 24	2519295707 ps
T17	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1829081289	Feb 29 01:42:47 PM PST 24	Feb 29 01:42:50 PM PST 24	3916820369 ps
T18	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.3228554075	Feb 29 01:43:38 PM PST 24	Feb 29 01:50:16 PM PST 24	160827545933 ps
T106	/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.4054010530	Feb 29 01:43:40 PM PST 24	Feb 29 01:43:45 PM PST 24	2618775977 ps
T107	/workspace/coverage/default/6.sysrst_ctrl_smoke.1744804110	Feb 29 01:42:52 PM PST 24	Feb 29 01:42:55 PM PST 24	2130569373 ps
T108	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3175909188	Feb 29 01:43:15 PM PST 24	Feb 29 01:43:18 PM PST 24	2528244604 ps
T109	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2994415804	Feb 29 01:43:07 PM PST 24	Feb 29 01:43:50 PM PST 24	59016151496 ps
T110	/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1432809694	Feb 29 01:43:20 PM PST 24	Feb 29 01:43:31 PM PST 24	4454089870 ps
T128	/workspace/coverage/default/9.sysrst_ctrl_smoke.943241658	Feb 29 01:42:58 PM PST 24	Feb 29 01:43:01 PM PST 24	2128032092 ps
T75	/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.414333572	Feb 29 01:44:28 PM PST 24	Feb 29 01:44:36 PM PST 24	2459937603 ps
T70	/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.1696067333	Feb 29 01:43:39 PM PST 24	Feb 29 01:43:42 PM PST 24	11720108808 ps
T386	/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1574566374	Feb 29 01:44:03 PM PST 24	Feb 29 01:44:09 PM PST 24	2060759175 ps
T76	/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2429508570	Feb 29 01:43:09 PM PST 24	Feb 29 01:43:16 PM PST 24	2474309465 ps
T304	/workspace/coverage/default/41.sysrst_ctrl_stress_all.2054502986	Feb 29 01:44:13 PM PST 24	Feb 29 01:44:35 PM PST 24	8817883123 ps
T64	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1036070460	Feb 29 01:42:48 PM PST 24	Feb 29 01:42:58 PM PST 24	3454368718 ps
T19	/workspace/coverage/default/35.sysrst_ctrl_stress_all.1225231039	Feb 29 01:44:08 PM PST 24	Feb 29 01:44:19 PM PST 24	14407131118 ps
T65	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3710493094	Feb 29 01:43:21 PM PST 24	Feb 29 01:44:33 PM PST 24	26851335950 ps
T300	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2328690801	Feb 29 01:44:30 PM PST 24	Feb 29 01:44:37 PM PST 24	2511519397 ps
T60	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2481118139	Feb 29 01:44:46 PM PST 24	Feb 29 01:48:22 PM PST 24	79762470116 ps
T301	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.3448565928	Feb 29 01:43:13 PM PST 24	Feb 29 01:43:20 PM PST 24	2468876045 ps
T20	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.1489084459	Feb 29 01:43:13 PM PST 24	Feb 29 01:43:59 PM PST 24	35132140676 ps
T227	/workspace/coverage/default/44.sysrst_ctrl_alert_test.454962766	Feb 29 01:44:27 PM PST 24	Feb 29 01:44:30 PM PST 24	2024003423 ps
T228	/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1267676612	Feb 29 01:44:19 PM PST 24	Feb 29 01:44:27 PM PST 24	2612122663 ps
T90	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.1273252748	Feb 29 01:43:41 PM PST 24	Feb 29 01:46:51 PM PST 24	155910600358 ps
T21	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.2430752964	Feb 29 01:43:07 PM PST 24	Feb 29 01:43:09 PM PST 24	4140132326 ps
T66	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.53561242	Feb 29 01:43:14 PM PST 24	Feb 29 01:44:38 PM PST 24	110353846022 ps
T105	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3754040280	Feb 29 01:43:40 PM PST 24	Feb 29 01:43:45 PM PST 24	3203020600 ps
T22	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3250148676	Feb 29 01:44:03 PM PST 24	Feb 29 01:45:21 PM PST 24	63605233068 ps
T162	/workspace/coverage/default/7.sysrst_ctrl_smoke.3655595048	Feb 29 01:42:50 PM PST 24	Feb 29 01:42:54 PM PST 24	2118670882 ps
T163	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1920072179	Feb 29 01:43:10 PM PST 24	Feb 29 01:43:11 PM PST 24	4981336338 ps
T43	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.151792754	Feb 29 01:44:08 PM PST 24	Feb 29 01:45:00 PM PST 24	122426357321 ps
T164	/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2907991545	Feb 29 01:44:28 PM PST 24	Feb 29 01:44:31 PM PST 24	3291524131 ps
T165	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3557756020	Feb 29 01:44:29 PM PST 24	Feb 29 01:44:53 PM PST 24	36212958250 ps
T166	/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1575377059	Feb 29 01:44:14 PM PST 24	Feb 29 01:44:22 PM PST 24	2511240994 ps
T167	/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3568626503	Feb 29 01:44:29 PM PST 24	Feb 29 01:44:32 PM PST 24	3396811812 ps
T168	/workspace/coverage/default/0.sysrst_ctrl_stress_all.1726128897	Feb 29 01:42:33 PM PST 24	Feb 29 01:42:44 PM PST 24	11320448652 ps
T169	/workspace/coverage/default/49.sysrst_ctrl_smoke.1173485565	Feb 29 01:44:33 PM PST 24	Feb 29 01:44:35 PM PST 24	2137549960 ps
T67	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1227925383	Feb 29 01:44:08 PM PST 24	Feb 29 01:46:50 PM PST 24	60709355365 ps
T314	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2863905050	Feb 29 01:44:03 PM PST 24	Feb 29 01:44:09 PM PST 24	2484323256 ps
T80	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1363390504	Feb 29 01:44:46 PM PST 24	Feb 29 01:45:21 PM PST 24	25839883480 ps
T81	/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2392929397	Feb 29 01:44:44 PM PST 24	Feb 29 01:48:27 PM PST 24	162031263954 ps
T305	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.3683290962	Feb 29 01:43:55 PM PST 24	Feb 29 01:43:56 PM PST 24	2544449132 ps
T307	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2598739157	Feb 29 01:44:28 PM PST 24	Feb 29 01:44:30 PM PST 24	2573398515 ps
T111	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3988676505	Feb 29 01:43:28 PM PST 24	Feb 29 01:45:26 PM PST 24	46443813006 ps
T387	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3227005307	Feb 29 01:44:22 PM PST 24	Feb 29 01:44:28 PM PST 24	3751866269 ps
T23	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.2230542512	Feb 29 01:43:06 PM PST 24	Feb 29 01:43:13 PM PST 24	2731284743 ps
T302	/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.784121940	Feb 29 01:43:56 PM PST 24	Feb 29 01:44:07 PM PST 24	3634254652 ps
T388	/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2718982993	Feb 29 01:43:39 PM PST 24	Feb 29 01:43:44 PM PST 24	2055413433 ps
T303	/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1172951704	Feb 29 01:43:28 PM PST 24	Feb 29 01:43:39 PM PST 24	4223587506 ps
T389	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1493875084	Feb 29 01:42:30 PM PST 24	Feb 29 01:42:34 PM PST 24	2161014304 ps
T264	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.3332533913	Feb 29 01:44:05 PM PST 24	Feb 29 01:45:00 PM PST 24	147143798398 ps
T390	/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.683630488	Feb 29 01:43:28 PM PST 24	Feb 29 01:43:32 PM PST 24	2465464716 ps
T391	/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2837505435	Feb 29 01:43:04 PM PST 24	Feb 29 01:43:12 PM PST 24	2612901750 ps
T392	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3957744197	Feb 29 01:43:56 PM PST 24	Feb 29 01:44:04 PM PST 24	2612131142 ps
T393	/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2044608292	Feb 29 01:43:21 PM PST 24	Feb 29 01:43:29 PM PST 24	2609239433 ps
T394	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.3761798338	Feb 29 01:43:07 PM PST 24	Feb 29 01:43:14 PM PST 24	2455084677 ps
T395	/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1597258048	Feb 29 01:43:14 PM PST 24	Feb 29 01:43:18 PM PST 24	2618288577 ps
T268	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2448932205	Feb 29 01:42:48 PM PST 24	Feb 29 01:43:08 PM PST 24	22037424994 ps
T112	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1322870622	Feb 29 01:44:48 PM PST 24	Feb 29 01:45:22 PM PST 24	22834690177 ps
T286	/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3974836257	Feb 29 01:43:06 PM PST 24	Feb 29 01:43:12 PM PST 24	2941906634 ps
T287	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.152965033	Feb 29 01:44:23 PM PST 24	Feb 29 01:44:27 PM PST 24	2122135349 ps
T44	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.937230813	Feb 29 01:43:44 PM PST 24	Feb 29 01:43:49 PM PST 24	8380218528 ps
T24	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2817280335	Feb 29 01:43:55 PM PST 24	Feb 29 01:44:59 PM PST 24	25449514290 ps
T288	/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3531566703	Feb 29 01:44:07 PM PST 24	Feb 29 01:44:11 PM PST 24	2727257542 ps
T289	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1724122604	Feb 29 01:42:55 PM PST 24	Feb 29 01:43:03 PM PST 24	2612408766 ps
T290	/workspace/coverage/default/1.sysrst_ctrl_smoke.1040405895	Feb 29 01:42:25 PM PST 24	Feb 29 01:42:28 PM PST 24	2134975330 ps
T73	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.4261910827	Feb 29 01:42:48 PM PST 24	Feb 29 01:42:52 PM PST 24	2413735719 ps
T297	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2627129500	Feb 29 01:44:13 PM PST 24	Feb 29 01:45:24 PM PST 24	105188176012 ps
T312	/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1348241217	Feb 29 01:43:07 PM PST 24	Feb 29 01:43:10 PM PST 24	2626602003 ps
T53	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.1618479290	Feb 29 01:42:49 PM PST 24	Feb 29 01:42:52 PM PST 24	2932680034 ps
T291	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3336253423	Feb 29 01:42:27 PM PST 24	Feb 29 01:43:23 PM PST 24	19670902809 ps
T56	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.2999673438	Feb 29 01:43:13 PM PST 24	Feb 29 01:43:15 PM PST 24	4577394177 ps
T113	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.728039059	Feb 29 01:44:17 PM PST 24	Feb 29 01:45:04 PM PST 24	29336024756 ps
T396	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1025872520	Feb 29 01:44:22 PM PST 24	Feb 29 01:44:30 PM PST 24	2510188290 ps
T71	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.422802521	Feb 29 01:42:51 PM PST 24	Feb 29 01:42:58 PM PST 24	5412380673 ps
T397	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2242515805	Feb 29 01:44:08 PM PST 24	Feb 29 01:44:10 PM PST 24	2605248786 ps
T242	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2063300425	Feb 29 01:44:45 PM PST 24	Feb 29 01:46:06 PM PST 24	133517986112 ps
T259	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.1649223348	Feb 29 01:43:53 PM PST 24	Feb 29 01:44:30 PM PST 24	28347125555 ps
T269	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3034399554	Feb 29 01:42:32 PM PST 24	Feb 29 01:42:46 PM PST 24	42232148244 ps
T96	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4205688545	Feb 29 01:44:47 PM PST 24	Feb 29 01:45:39 PM PST 24	98616805151 ps
T398	/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.2116712925	Feb 29 01:43:03 PM PST 24	Feb 29 01:43:05 PM PST 24	2147308581 ps
T58	/workspace/coverage/default/38.sysrst_ctrl_edge_detect.1507700399	Feb 29 01:44:08 PM PST 24	Feb 29 01:44:10 PM PST 24	3694392364 ps
T201	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1159091254	Feb 29 01:42:50 PM PST 24	Feb 29 01:42:54 PM PST 24	2616401172 ps
T202	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3215790018	Feb 29 01:44:09 PM PST 24	Feb 29 01:45:13 PM PST 24	93795181726 ps
T203	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.549708694	Feb 29 01:44:14 PM PST 24	Feb 29 01:44:22 PM PST 24	2609621908 ps
T204	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1004181620	Feb 29 01:42:29 PM PST 24	Feb 29 01:42:33 PM PST 24	2531452851 ps
T45	/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2154912443	Feb 29 01:43:09 PM PST 24	Feb 29 01:43:11 PM PST 24	5542021720 ps
T205	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2290305137	Feb 29 01:42:49 PM PST 24	Feb 29 01:42:52 PM PST 24	2533964592 ps
T57	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.465656177	Feb 29 01:43:53 PM PST 24	Feb 29 01:43:56 PM PST 24	3002270880 ps
T206	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.2108416662	Feb 29 01:42:49 PM PST 24	Feb 29 01:42:51 PM PST 24	2434053968 ps
T84	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2231597963	Feb 29 01:44:10 PM PST 24	Feb 29 01:45:42 PM PST 24	154945074006 ps
T399	/workspace/coverage/default/22.sysrst_ctrl_stress_all.826015738	Feb 29 01:43:33 PM PST 24	Feb 29 01:43:42 PM PST 24	12725027442 ps
T400	/workspace/coverage/default/25.sysrst_ctrl_smoke.1391691730	Feb 29 01:43:24 PM PST 24	Feb 29 01:43:30 PM PST 24	2109805237 ps
T401	/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3072929083	Feb 29 01:44:04 PM PST 24	Feb 29 01:44:06 PM PST 24	2273780355 ps
T402	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3638565877	Feb 29 01:43:39 PM PST 24	Feb 29 01:43:42 PM PST 24	2167292519 ps
T403	/workspace/coverage/default/36.sysrst_ctrl_smoke.3719144054	Feb 29 01:44:08 PM PST 24	Feb 29 01:44:11 PM PST 24	2121708744 ps
T404	/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1548739006	Feb 29 01:42:30 PM PST 24	Feb 29 01:42:37 PM PST 24	2468809750 ps
T405	/workspace/coverage/default/6.sysrst_ctrl_stress_all.220475304	Feb 29 01:42:51 PM PST 24	Feb 29 01:43:05 PM PST 24	11177255936 ps
T406	/workspace/coverage/default/31.sysrst_ctrl_alert_test.3056541431	Feb 29 01:43:54 PM PST 24	Feb 29 01:43:57 PM PST 24	2024609474 ps
T407	/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.2050299819	Feb 29 01:43:52 PM PST 24	Feb 29 01:43:54 PM PST 24	2100076709 ps
T154	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2367503909	Feb 29 01:43:54 PM PST 24	Feb 29 01:44:38 PM PST 24	62165799448 ps
T408	/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2806037161	Feb 29 01:44:04 PM PST 24	Feb 29 01:44:13 PM PST 24	3763456269 ps
T409	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.601583196	Feb 29 01:42:51 PM PST 24	Feb 29 01:42:57 PM PST 24	3862002558 ps
T260	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.924538872	Feb 29 01:44:09 PM PST 24	Feb 29 01:45:22 PM PST 24	98770359205 ps
T410	/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1252260013	Feb 29 01:43:43 PM PST 24	Feb 29 01:43:45 PM PST 24	2466940463 ps
T139	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2203667952	Feb 29 01:43:39 PM PST 24	Feb 29 01:43:46 PM PST 24	7059221825 ps
T155	/workspace/coverage/default/12.sysrst_ctrl_stress_all.4160063185	Feb 29 01:43:08 PM PST 24	Feb 29 01:43:37 PM PST 24	11749494966 ps
T411	/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.3711729351	Feb 29 01:44:09 PM PST 24	Feb 29 01:44:11 PM PST 24	2671411137 ps
T412	/workspace/coverage/default/43.sysrst_ctrl_alert_test.692734073	Feb 29 01:44:24 PM PST 24	Feb 29 01:44:30 PM PST 24	2011222227 ps
T413	/workspace/coverage/default/18.sysrst_ctrl_alert_test.1148610328	Feb 29 01:43:14 PM PST 24	Feb 29 01:43:17 PM PST 24	2022941554 ps
T414	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1822412623	Feb 29 01:44:16 PM PST 24	Feb 29 01:44:18 PM PST 24	2635104506 ps
T415	/workspace/coverage/default/9.sysrst_ctrl_alert_test.3820283705	Feb 29 01:42:48 PM PST 24	Feb 29 01:42:54 PM PST 24	2012533092 ps
T140	/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2125532269	Feb 29 01:42:31 PM PST 24	Feb 29 01:42:38 PM PST 24	3816477063 ps
T416	/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2600596950	Feb 29 01:44:28 PM PST 24	Feb 29 01:44:34 PM PST 24	3537170872 ps
T417	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.499215057	Feb 29 01:42:30 PM PST 24	Feb 29 01:42:33 PM PST 24	2344744422 ps
T383	/workspace/coverage/default/30.sysrst_ctrl_stress_all.1099577018	Feb 29 01:43:50 PM PST 24	Feb 29 01:56:30 PM PST 24	1258774713396 ps
T418	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1175982143	Feb 29 01:44:18 PM PST 24	Feb 29 01:44:21 PM PST 24	3175468514 ps
T419	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1102630811	Feb 29 01:42:53 PM PST 24	Feb 29 01:42:57 PM PST 24	2516206014 ps
T420	/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3289139528	Feb 29 01:43:24 PM PST 24	Feb 29 01:43:30 PM PST 24	2130738957 ps
T261	/workspace/coverage/default/7.sysrst_ctrl_stress_all.1717118512	Feb 29 01:42:52 PM PST 24	Feb 29 01:45:59 PM PST 24	285849017440 ps
T421	/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3065183232	Feb 29 01:44:29 PM PST 24	Feb 29 01:44:37 PM PST 24	2611567092 ps
T306	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1573053112	Feb 29 01:42:49 PM PST 24	Feb 29 01:42:51 PM PST 24	2495475739 ps
T252	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3902184904	Feb 29 01:44:12 PM PST 24	Feb 29 01:44:53 PM PST 24	46810986081 ps
T422	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.175556371	Feb 29 01:43:07 PM PST 24	Feb 29 01:43:13 PM PST 24	2150632030 ps
T114	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3141760005	Feb 29 01:43:42 PM PST 24	Feb 29 01:44:22 PM PST 24	26588222169 ps
T423	/workspace/coverage/default/3.sysrst_ctrl_smoke.2866999210	Feb 29 01:42:50 PM PST 24	Feb 29 01:42:56 PM PST 24	2109144049 ps
T424	/workspace/coverage/default/20.sysrst_ctrl_stress_all.3013782993	Feb 29 01:43:16 PM PST 24	Feb 29 01:43:47 PM PST 24	12004357045 ps
T425	/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1719869425	Feb 29 01:44:27 PM PST 24	Feb 29 01:44:36 PM PST 24	3575764308 ps
T426	/workspace/coverage/default/19.sysrst_ctrl_alert_test.3264597632	Feb 29 01:43:16 PM PST 24	Feb 29 01:43:20 PM PST 24	2020584727 ps
T427	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.4223643387	Feb 29 01:43:07 PM PST 24	Feb 29 01:43:14 PM PST 24	4354198640 ps
T428	/workspace/coverage/default/8.sysrst_ctrl_alert_test.1211186906	Feb 29 01:42:52 PM PST 24	Feb 29 01:42:54 PM PST 24	2023890054 ps
T429	/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.22234879	Feb 29 01:43:08 PM PST 24	Feb 29 01:43:14 PM PST 24	2445045705 ps
T251	/workspace/coverage/default/47.sysrst_ctrl_stress_all.2100259576	Feb 29 01:44:30 PM PST 24	Feb 29 01:44:52 PM PST 24	128423074578 ps
T430	/workspace/coverage/default/18.sysrst_ctrl_stress_all.1292597599	Feb 29 01:43:29 PM PST 24	Feb 29 01:43:38 PM PST 24	6780430894 ps
T431	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1007769848	Feb 29 01:44:06 PM PST 24	Feb 29 01:44:08 PM PST 24	2632064065 ps
T432	/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1764165636	Feb 29 01:42:53 PM PST 24	Feb 29 01:43:01 PM PST 24	3296665411 ps
T433	/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.906145211	Feb 29 01:43:56 PM PST 24	Feb 29 01:43:58 PM PST 24	2525970657 ps
T434	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.612526268	Feb 29 01:44:28 PM PST 24	Feb 29 01:44:43 PM PST 24	20060134934 ps
T141	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.1448144358	Feb 29 01:43:02 PM PST 24	Feb 29 01:43:09 PM PST 24	11722482251 ps
T435	/workspace/coverage/default/15.sysrst_ctrl_alert_test.2445173401	Feb 29 01:43:06 PM PST 24	Feb 29 01:43:07 PM PST 24	2041018888 ps
T183	/workspace/coverage/default/19.sysrst_ctrl_stress_all.3364315488	Feb 29 01:43:15 PM PST 24	Feb 29 01:43:45 PM PST 24	10818682856 ps
T436	/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.4229011566	Feb 29 01:44:12 PM PST 24	Feb 29 01:44:19 PM PST 24	2609617351 ps
T437	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2540491570	Feb 29 01:43:09 PM PST 24	Feb 29 01:43:43 PM PST 24	16274320153 ps
T438	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.3214865623	Feb 29 01:43:05 PM PST 24	Feb 29 01:43:10 PM PST 24	3604988888 ps
T439	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.2973623777	Feb 29 01:44:05 PM PST 24	Feb 29 01:44:07 PM PST 24	2664867095 ps
T440	/workspace/coverage/default/34.sysrst_ctrl_smoke.4173714779	Feb 29 01:43:54 PM PST 24	Feb 29 01:43:56 PM PST 24	2136286249 ps
T54	/workspace/coverage/default/29.sysrst_ctrl_stress_all.2040360175	Feb 29 01:43:40 PM PST 24	Feb 29 01:48:45 PM PST 24	120908783590 ps
T243	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3155251769	Feb 29 01:43:04 PM PST 24	Feb 29 01:44:22 PM PST 24	60745164019 ps
T441	/workspace/coverage/default/45.sysrst_ctrl_alert_test.2241828745	Feb 29 01:44:33 PM PST 24	Feb 29 01:44:38 PM PST 24	2013411610 ps
T442	/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.212763943	Feb 29 01:42:45 PM PST 24	Feb 29 01:42:51 PM PST 24	2124348167 ps
T443	/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3972400132	Feb 29 01:44:25 PM PST 24	Feb 29 01:44:32 PM PST 24	2456647208 ps
T270	/workspace/coverage/default/2.sysrst_ctrl_sec_cm.3852514763	Feb 29 01:42:52 PM PST 24	Feb 29 01:43:08 PM PST 24	22081393385 ps
T142	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.1953359628	Feb 29 01:43:32 PM PST 24	Feb 29 01:43:40 PM PST 24	5768001327 ps
T310	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1359842995	Feb 29 01:43:13 PM PST 24	Feb 29 01:43:21 PM PST 24	7564440604 ps
T55	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2795613043	Feb 29 01:42:50 PM PST 24	Feb 29 01:42:59 PM PST 24	2971578809 ps
T199	/workspace/coverage/default/25.sysrst_ctrl_stress_all.796163898	Feb 29 01:43:40 PM PST 24	Feb 29 01:47:06 PM PST 24	153440147805 ps
T444	/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.144824484	Feb 29 01:43:35 PM PST 24	Feb 29 01:43:38 PM PST 24	2617666368 ps
T200	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1046681889	Feb 29 01:44:33 PM PST 24	Feb 29 01:44:34 PM PST 24	2724607291 ps
T445	/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3724240816	Feb 29 01:43:14 PM PST 24	Feb 29 01:43:16 PM PST 24	2213664078 ps
T446	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.260840263	Feb 29 01:43:23 PM PST 24	Feb 29 01:43:25 PM PST 24	3341140298 ps
T447	/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.35898335	Feb 29 01:42:55 PM PST 24	Feb 29 01:42:57 PM PST 24	2170408773 ps
T448	/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.309294017	Feb 29 01:44:08 PM PST 24	Feb 29 01:44:10 PM PST 24	2537337552 ps
T449	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.983378880	Feb 29 01:44:21 PM PST 24	Feb 29 01:44:29 PM PST 24	2437163765 ps
T450	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2181992428	Feb 29 01:42:31 PM PST 24	Feb 29 01:42:33 PM PST 24	2220396009 ps
T83	/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.2851371624	Feb 29 01:43:30 PM PST 24	Feb 29 01:43:33 PM PST 24	6478882775 ps
T115	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.11587028	Feb 29 01:43:55 PM PST 24	Feb 29 01:45:17 PM PST 24	117465788921 ps
T451	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3230941689	Feb 29 01:43:17 PM PST 24	Feb 29 01:43:20 PM PST 24	2618810125 ps
T257	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3349337843	Feb 29 01:44:48 PM PST 24	Feb 29 01:48:57 PM PST 24	105615104699 ps
T452	/workspace/coverage/default/32.sysrst_ctrl_stress_all.150639793	Feb 29 01:43:54 PM PST 24	Feb 29 01:44:16 PM PST 24	15195034284 ps
T453	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3614577806	Feb 29 01:42:34 PM PST 24	Feb 29 01:42:38 PM PST 24	2203541120 ps
T454	/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.231111414	Feb 29 01:43:16 PM PST 24	Feb 29 01:43:19 PM PST 24	2473227778 ps
T455	/workspace/coverage/default/5.sysrst_ctrl_alert_test.2234269131	Feb 29 01:42:49 PM PST 24	Feb 29 01:42:53 PM PST 24	2013394566 ps
T258	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1480916350	Feb 29 01:44:46 PM PST 24	Feb 29 01:49:47 PM PST 24	113182654643 ps
T333	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1989829819	Feb 29 01:42:50 PM PST 24	Feb 29 01:49:37 PM PST 24	173457249282 ps
T456	/workspace/coverage/default/10.sysrst_ctrl_alert_test.3317973666	Feb 29 01:43:03 PM PST 24	Feb 29 01:43:05 PM PST 24	2030043675 ps
T457	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3908119212	Feb 29 01:42:48 PM PST 24	Feb 29 01:42:50 PM PST 24	2341877315 ps
T93	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.591668429	Feb 29 01:44:21 PM PST 24	Feb 29 01:45:28 PM PST 24	104510822460 ps
T198	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2988025102	Feb 29 01:44:09 PM PST 24	Feb 29 01:46:38 PM PST 24	1729605750252 ps
T181	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3741927112	Feb 29 01:44:25 PM PST 24	Feb 29 01:44:30 PM PST 24	5133524662 ps
T182	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3494625353	Feb 29 01:44:29 PM PST 24	Feb 29 01:46:14 PM PST 24	44692566591 ps
T208	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1369713022	Feb 29 01:44:45 PM PST 24	Feb 29 01:45:35 PM PST 24	66206115909 ps
T209	/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1747216522	Feb 29 01:44:29 PM PST 24	Feb 29 01:44:32 PM PST 24	2537944372 ps
T210	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1816390939	Feb 29 01:44:31 PM PST 24	Feb 29 01:44:35 PM PST 24	2081434963 ps
T211	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3404506230	Feb 29 01:44:33 PM PST 24	Feb 29 01:44:37 PM PST 24	2616919526 ps
T212	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3861956577	Feb 29 01:43:16 PM PST 24	Feb 29 01:43:20 PM PST 24	4393810995 ps
T156	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3780217585	Feb 29 01:42:49 PM PST 24	Feb 29 01:42:52 PM PST 24	2466059005 ps
T458	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2342014844	Feb 29 01:42:50 PM PST 24	Feb 29 01:42:53 PM PST 24	4190298171 ps
T94	/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.4043539305	Feb 29 01:44:11 PM PST 24	Feb 29 01:46:16 PM PST 24	48268726359 ps
T189	/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2412076036	Feb 29 01:44:11 PM PST 24	Feb 29 01:44:17 PM PST 24	10612704590 ps
T190	/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3309755823	Feb 29 01:44:31 PM PST 24	Feb 29 01:44:34 PM PST 24	4898434878 ps
T191	/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.2000667546	Feb 29 01:43:51 PM PST 24	Feb 29 01:43:58 PM PST 24	2612031913 ps
T192	/workspace/coverage/default/29.sysrst_ctrl_smoke.3874191462	Feb 29 01:43:41 PM PST 24	Feb 29 01:43:42 PM PST 24	2154110044 ps
T193	/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.819477634	Feb 29 01:44:27 PM PST 24	Feb 29 01:44:35 PM PST 24	2750037998 ps
T194	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1940108731	Feb 29 01:44:23 PM PST 24	Feb 29 01:44:28 PM PST 24	3696946377 ps
T195	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1235024778	Feb 29 01:44:14 PM PST 24	Feb 29 01:44:22 PM PST 24	3330538640 ps
T196	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1143098302	Feb 29 01:42:50 PM PST 24	Feb 29 01:42:52 PM PST 24	2466603207 ps