| T381 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1242000474 |
|
|
Mar 03 02:26:22 PM PST 24 |
Mar 03 02:30:21 PM PST 24 |
204284031215 ps |
| T463 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.4266936154 |
|
|
Mar 03 02:25:42 PM PST 24 |
Mar 03 02:25:48 PM PST 24 |
2111819721 ps |
| T464 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.289401421 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2032696294 ps |
| T465 |
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.41766651 |
|
|
Mar 03 02:25:30 PM PST 24 |
Mar 03 02:25:33 PM PST 24 |
3404991642 ps |
| T81 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.473386060 |
|
|
Mar 03 02:25:48 PM PST 24 |
Mar 03 02:27:06 PM PST 24 |
434818537170 ps |
| T202 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2428517222 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
2442866972 ps |
| T203 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.2177442967 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:22 PM PST 24 |
2419146476 ps |
| T204 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2970944309 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
2472681795 ps |
| T205 |
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3908982956 |
|
|
Mar 03 02:26:03 PM PST 24 |
Mar 03 02:26:06 PM PST 24 |
2123025281 ps |
| T206 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1697743427 |
|
|
Mar 03 02:27:01 PM PST 24 |
Mar 03 02:27:06 PM PST 24 |
3460512605 ps |
| T207 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.1749773964 |
|
|
Mar 03 02:26:05 PM PST 24 |
Mar 03 02:26:55 PM PST 24 |
105383543477 ps |
| T208 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3423715497 |
|
|
Mar 03 02:26:19 PM PST 24 |
Mar 03 02:27:37 PM PST 24 |
29636388439 ps |
| T209 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2518153775 |
|
|
Mar 03 02:25:12 PM PST 24 |
Mar 03 02:25:14 PM PST 24 |
2644415085 ps |
| T210 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.95600380 |
|
|
Mar 03 02:27:01 PM PST 24 |
Mar 03 02:27:45 PM PST 24 |
53952089465 ps |
| T132 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1922644795 |
|
|
Mar 03 02:26:11 PM PST 24 |
Mar 03 02:26:13 PM PST 24 |
3846628685 ps |
| T153 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.431561175 |
|
|
Mar 03 02:26:15 PM PST 24 |
Mar 03 02:26:59 PM PST 24 |
18299058512 ps |
| T466 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3710150173 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:28 PM PST 24 |
3698738866 ps |
| T467 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1585506224 |
|
|
Mar 03 02:26:40 PM PST 24 |
Mar 03 02:26:45 PM PST 24 |
2910236614 ps |
| T377 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1601352508 |
|
|
Mar 03 02:26:59 PM PST 24 |
Mar 03 02:29:34 PM PST 24 |
55938070080 ps |
| T468 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.4117550094 |
|
|
Mar 03 02:26:15 PM PST 24 |
Mar 03 02:26:18 PM PST 24 |
3424584136 ps |
| T142 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2231273591 |
|
|
Mar 03 02:26:45 PM PST 24 |
Mar 03 02:27:08 PM PST 24 |
9117924939 ps |
| T469 |
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3646672524 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:13 PM PST 24 |
3251950465 ps |
| T470 |
/workspace/coverage/default/34.sysrst_ctrl_smoke.859335256 |
|
|
Mar 03 02:26:13 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
2111294011 ps |
| T302 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2956433737 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:32 PM PST 24 |
8778949479 ps |
| T303 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3389326595 |
|
|
Mar 03 02:25:59 PM PST 24 |
Mar 03 02:26:07 PM PST 24 |
2510847761 ps |
| T471 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2617183131 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:24 PM PST 24 |
2609662935 ps |
| T155 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.1100304959 |
|
|
Mar 03 02:25:53 PM PST 24 |
Mar 03 02:25:55 PM PST 24 |
2603469553 ps |
| T388 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3004236559 |
|
|
Mar 03 02:26:51 PM PST 24 |
Mar 03 02:34:58 PM PST 24 |
221469543170 ps |
| T169 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.3828263946 |
|
|
Mar 03 02:25:55 PM PST 24 |
Mar 03 02:25:59 PM PST 24 |
3147105933 ps |
| T472 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.2434808714 |
|
|
Mar 03 02:26:05 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
2011326651 ps |
| T304 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.2299964185 |
|
|
Mar 03 02:25:43 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
10401319125 ps |
| T178 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.800826264 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:13 PM PST 24 |
3091039208 ps |
| T90 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1615368296 |
|
|
Mar 03 02:25:33 PM PST 24 |
Mar 03 02:26:30 PM PST 24 |
81403662774 ps |
| T473 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.2359489153 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
2028536307 ps |
| T474 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.4147910485 |
|
|
Mar 03 02:26:21 PM PST 24 |
Mar 03 02:26:23 PM PST 24 |
2085267967 ps |
| T379 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3894026407 |
|
|
Mar 03 02:26:01 PM PST 24 |
Mar 03 02:32:57 PM PST 24 |
176129664246 ps |
| T393 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2170936159 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:26 PM PST 24 |
14187859742 ps |
| T133 |
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2007771018 |
|
|
Mar 03 02:26:36 PM PST 24 |
Mar 03 02:26:39 PM PST 24 |
5858462404 ps |
| T308 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.2202541203 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:10 PM PST 24 |
3008626013 ps |
| T475 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all.1798900359 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:29:47 PM PST 24 |
555279397848 ps |
| T476 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1583608783 |
|
|
Mar 03 02:26:01 PM PST 24 |
Mar 03 02:26:03 PM PST 24 |
2073459644 ps |
| T477 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.594771471 |
|
|
Mar 03 02:26:01 PM PST 24 |
Mar 03 02:26:05 PM PST 24 |
2516332494 ps |
| T355 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.1033358843 |
|
|
Mar 03 02:26:18 PM PST 24 |
Mar 03 02:27:22 PM PST 24 |
96648343846 ps |
| T478 |
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1692325188 |
|
|
Mar 03 02:26:14 PM PST 24 |
Mar 03 02:26:22 PM PST 24 |
2609811892 ps |
| T479 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3625102310 |
|
|
Mar 03 02:25:58 PM PST 24 |
Mar 03 02:26:00 PM PST 24 |
2642931640 ps |
| T480 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.1652369718 |
|
|
Mar 03 02:26:03 PM PST 24 |
Mar 03 02:26:05 PM PST 24 |
2045088131 ps |
| T481 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.605484029 |
|
|
Mar 03 02:25:05 PM PST 24 |
Mar 03 02:25:10 PM PST 24 |
2520189843 ps |
| T278 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3827115747 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
2981646297 ps |
| T482 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.2571532052 |
|
|
Mar 03 02:25:22 PM PST 24 |
Mar 03 02:25:33 PM PST 24 |
3630951673 ps |
| T363 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1945859217 |
|
|
Mar 03 02:26:58 PM PST 24 |
Mar 03 02:32:00 PM PST 24 |
107985856082 ps |
| T483 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3979579753 |
|
|
Mar 03 02:26:43 PM PST 24 |
Mar 03 02:26:47 PM PST 24 |
2024010669 ps |
| T484 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3198042713 |
|
|
Mar 03 02:25:11 PM PST 24 |
Mar 03 02:25:44 PM PST 24 |
11740635982 ps |
| T485 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.118893896 |
|
|
Mar 03 02:25:12 PM PST 24 |
Mar 03 02:25:14 PM PST 24 |
2043453716 ps |
| T390 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.1256070934 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:33 PM PST 24 |
786877036723 ps |
| T486 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.4048180043 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:06 PM PST 24 |
2120172431 ps |
| T487 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.3993299737 |
|
|
Mar 03 02:25:52 PM PST 24 |
Mar 03 02:25:59 PM PST 24 |
2608085415 ps |
| T488 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.588233189 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
2242091662 ps |
| T143 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.362384463 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:24 PM PST 24 |
4315954937 ps |
| T279 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.617681330 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:07 PM PST 24 |
3158134688 ps |
| T489 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3756680330 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:15 PM PST 24 |
2451482066 ps |
| T490 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.1255780053 |
|
|
Mar 03 02:25:46 PM PST 24 |
Mar 03 02:25:52 PM PST 24 |
2014065591 ps |
| T491 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.2838661152 |
|
|
Mar 03 02:26:11 PM PST 24 |
Mar 03 02:26:13 PM PST 24 |
2131213302 ps |
| T280 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.339091992 |
|
|
Mar 03 02:26:43 PM PST 24 |
Mar 03 02:26:47 PM PST 24 |
3187638851 ps |
| T492 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.1909070650 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:34 PM PST 24 |
11172645256 ps |
| T493 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2153730880 |
|
|
Mar 03 02:26:13 PM PST 24 |
Mar 03 02:27:35 PM PST 24 |
58080529495 ps |
| T494 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2216887828 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
3441063194 ps |
| T281 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3673965154 |
|
|
Mar 03 02:25:24 PM PST 24 |
Mar 03 02:25:27 PM PST 24 |
3397994004 ps |
| T375 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.643761259 |
|
|
Mar 03 02:26:55 PM PST 24 |
Mar 03 02:29:35 PM PST 24 |
58854818209 ps |
| T495 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.896182694 |
|
|
Mar 03 02:26:37 PM PST 24 |
Mar 03 02:27:00 PM PST 24 |
22848844468 ps |
| T496 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2419695137 |
|
|
Mar 03 02:26:39 PM PST 24 |
Mar 03 02:26:41 PM PST 24 |
2090014774 ps |
| T134 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1105051549 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:23 PM PST 24 |
8802984352 ps |
| T497 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.3096456014 |
|
|
Mar 03 02:25:57 PM PST 24 |
Mar 03 02:25:59 PM PST 24 |
2130208679 ps |
| T498 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3323389884 |
|
|
Mar 03 02:25:33 PM PST 24 |
Mar 03 02:25:35 PM PST 24 |
2518856589 ps |
| T499 |
/workspace/coverage/default/13.sysrst_ctrl_alert_test.1017083687 |
|
|
Mar 03 02:25:19 PM PST 24 |
Mar 03 02:25:22 PM PST 24 |
2025811192 ps |
| T500 |
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.467266644 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
2937558656 ps |
| T501 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.956467404 |
|
|
Mar 03 02:25:45 PM PST 24 |
Mar 03 02:25:47 PM PST 24 |
2545063301 ps |
| T502 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2333461088 |
|
|
Mar 03 02:25:28 PM PST 24 |
Mar 03 02:25:35 PM PST 24 |
2610733333 ps |
| T156 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2284358978 |
|
|
Mar 03 02:25:53 PM PST 24 |
Mar 03 02:28:23 PM PST 24 |
56326091205 ps |
| T503 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1639713958 |
|
|
Mar 03 02:25:46 PM PST 24 |
Mar 03 02:25:51 PM PST 24 |
2621235165 ps |
| T504 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3797502396 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
2687098198 ps |
| T505 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.1839361295 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
2015759967 ps |
| T219 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.2190305252 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:17 PM PST 24 |
3057479076 ps |
| T96 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.4215886380 |
|
|
Mar 03 02:25:25 PM PST 24 |
Mar 03 02:27:24 PM PST 24 |
46436773785 ps |
| T84 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.152061030 |
|
|
Mar 03 02:25:11 PM PST 24 |
Mar 03 02:26:52 PM PST 24 |
40623301462 ps |
| T179 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.152435665 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:35:27 PM PST 24 |
208818159917 ps |
| T506 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3358959065 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:13 PM PST 24 |
2612003198 ps |
| T507 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1745701597 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
2191521772 ps |
| T135 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3289822204 |
|
|
Mar 03 02:25:20 PM PST 24 |
Mar 03 02:25:24 PM PST 24 |
7915960915 ps |
| T508 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1646094918 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:20 PM PST 24 |
2632623494 ps |
| T509 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.2280305040 |
|
|
Mar 03 02:26:17 PM PST 24 |
Mar 03 02:26:21 PM PST 24 |
2115772592 ps |
| T510 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.4006375132 |
|
|
Mar 03 02:25:36 PM PST 24 |
Mar 03 02:25:43 PM PST 24 |
2612717703 ps |
| T127 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1796551120 |
|
|
Mar 03 02:26:15 PM PST 24 |
Mar 03 02:27:59 PM PST 24 |
692785510006 ps |
| T97 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.4153621096 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:32 PM PST 24 |
27840472290 ps |
| T292 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3022967359 |
|
|
Mar 03 02:25:22 PM PST 24 |
Mar 03 02:25:24 PM PST 24 |
2848903730 ps |
| T511 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.2174508030 |
|
|
Mar 03 02:26:13 PM PST 24 |
Mar 03 02:26:16 PM PST 24 |
2019855776 ps |
| T512 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3936495203 |
|
|
Mar 03 02:25:54 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
6007988627 ps |
| T513 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.472913724 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:16 PM PST 24 |
4652780491 ps |
| T254 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.2542151949 |
|
|
Mar 03 02:25:44 PM PST 24 |
Mar 03 02:25:55 PM PST 24 |
69831014293 ps |
| T514 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3312158107 |
|
|
Mar 03 02:26:03 PM PST 24 |
Mar 03 02:26:13 PM PST 24 |
3439804814 ps |
| T515 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.730645977 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
2685821293 ps |
| T220 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.566563568 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:08 PM PST 24 |
4545840104 ps |
| T516 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect.3464765038 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:28:10 PM PST 24 |
98547680682 ps |
| T193 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1901952056 |
|
|
Mar 03 02:26:57 PM PST 24 |
Mar 03 02:28:24 PM PST 24 |
236995015293 ps |
| T517 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3896790246 |
|
|
Mar 03 02:26:45 PM PST 24 |
Mar 03 02:26:49 PM PST 24 |
2622247425 ps |
| T518 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3535104824 |
|
|
Mar 03 02:26:47 PM PST 24 |
Mar 03 02:26:55 PM PST 24 |
2613341141 ps |
| T136 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1122809930 |
|
|
Mar 03 02:25:31 PM PST 24 |
Mar 03 02:25:40 PM PST 24 |
6732931099 ps |
| T519 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.1656541337 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2135199951 ps |
| T520 |
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.4107853618 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:13 PM PST 24 |
2454738047 ps |
| T144 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3201883672 |
|
|
Mar 03 02:26:38 PM PST 24 |
Mar 03 02:27:45 PM PST 24 |
28965205515 ps |
| T321 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.574720326 |
|
|
Mar 03 02:25:42 PM PST 24 |
Mar 03 02:25:49 PM PST 24 |
2511089666 ps |
| T128 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1000033697 |
|
|
Mar 03 02:26:58 PM PST 24 |
Mar 03 02:27:02 PM PST 24 |
3654649309 ps |
| T222 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.1006560369 |
|
|
Mar 03 02:26:05 PM PST 24 |
Mar 03 02:26:32 PM PST 24 |
9523151570 ps |
| T322 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1255101271 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:24 PM PST 24 |
28848927505 ps |
| T323 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.946067899 |
|
|
Mar 03 02:26:23 PM PST 24 |
Mar 03 02:34:47 PM PST 24 |
187242377901 ps |
| T324 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3264901063 |
|
|
Mar 03 02:25:19 PM PST 24 |
Mar 03 02:25:30 PM PST 24 |
3714645291 ps |
| T325 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1705551750 |
|
|
Mar 03 02:26:05 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
2617952006 ps |
| T180 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.1371875675 |
|
|
Mar 03 02:25:50 PM PST 24 |
Mar 03 02:25:57 PM PST 24 |
3208734920 ps |
| T234 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.98709530 |
|
|
Mar 03 02:26:47 PM PST 24 |
Mar 03 02:27:46 PM PST 24 |
22578905159 ps |
| T154 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.2925798769 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
3022797603 ps |
| T170 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.2958597055 |
|
|
Mar 03 02:26:31 PM PST 24 |
Mar 03 02:26:37 PM PST 24 |
2110131506 ps |
| T171 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3998350491 |
|
|
Mar 03 02:27:03 PM PST 24 |
Mar 03 02:27:50 PM PST 24 |
64363728580 ps |
| T172 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.2423204715 |
|
|
Mar 03 02:25:41 PM PST 24 |
Mar 03 02:25:45 PM PST 24 |
2119387505 ps |
| T173 |
/workspace/coverage/default/46.sysrst_ctrl_smoke.1192627035 |
|
|
Mar 03 02:26:33 PM PST 24 |
Mar 03 02:26:34 PM PST 24 |
2141653887 ps |
| T174 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1185369298 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:31 PM PST 24 |
37999446725 ps |
| T175 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1311365822 |
|
|
Mar 03 02:26:53 PM PST 24 |
Mar 03 02:29:09 PM PST 24 |
53952690046 ps |
| T176 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1719633271 |
|
|
Mar 03 02:26:41 PM PST 24 |
Mar 03 02:26:43 PM PST 24 |
2087016484 ps |
| T177 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.622955696 |
|
|
Mar 03 02:25:47 PM PST 24 |
Mar 03 02:25:49 PM PST 24 |
2036863714 ps |
| T145 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.3342629635 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:19 PM PST 24 |
3498098273 ps |
| T244 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.4001826829 |
|
|
Mar 03 02:25:18 PM PST 24 |
Mar 03 02:25:42 PM PST 24 |
87040418601 ps |
| T157 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1929286062 |
|
|
Mar 03 02:26:41 PM PST 24 |
Mar 03 02:26:47 PM PST 24 |
5043364947 ps |
| T521 |
/workspace/coverage/default/43.sysrst_ctrl_smoke.2102426543 |
|
|
Mar 03 02:26:23 PM PST 24 |
Mar 03 02:26:24 PM PST 24 |
2164930596 ps |
| T522 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.767204118 |
|
|
Mar 03 02:25:55 PM PST 24 |
Mar 03 02:26:01 PM PST 24 |
2110556443 ps |
| T523 |
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2920817088 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2241440895 ps |
| T524 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2425550656 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:30:58 PM PST 24 |
117425693362 ps |
| T525 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.936878175 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:41 PM PST 24 |
14063481957 ps |
| T361 |
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1592410542 |
|
|
Mar 03 02:26:58 PM PST 24 |
Mar 03 02:27:25 PM PST 24 |
146716698201 ps |
| T526 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.714909786 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:20 PM PST 24 |
2542252055 ps |
| T527 |
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.2595271805 |
|
|
Mar 03 02:26:13 PM PST 24 |
Mar 03 02:26:23 PM PST 24 |
3564315302 ps |
| T528 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.360376239 |
|
|
Mar 03 02:25:21 PM PST 24 |
Mar 03 02:25:28 PM PST 24 |
2451524347 ps |
| T529 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.2862426097 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2185910486 ps |
| T374 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1766824701 |
|
|
Mar 03 02:26:40 PM PST 24 |
Mar 03 02:35:14 PM PST 24 |
204669220487 ps |
| T235 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2723143122 |
|
|
Mar 03 02:25:11 PM PST 24 |
Mar 03 02:26:15 PM PST 24 |
22830552062 ps |
| T373 |
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2040073220 |
|
|
Mar 03 02:26:52 PM PST 24 |
Mar 03 02:27:26 PM PST 24 |
50115320095 ps |
| T85 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2240736272 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:30 PM PST 24 |
34004311531 ps |
| T530 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.3442656748 |
|
|
Mar 03 02:25:18 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
2501868219 ps |
| T531 |
/workspace/coverage/default/17.sysrst_ctrl_smoke.3656600738 |
|
|
Mar 03 02:25:43 PM PST 24 |
Mar 03 02:25:45 PM PST 24 |
2146765301 ps |
| T532 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2834082992 |
|
|
Mar 03 02:25:18 PM PST 24 |
Mar 03 02:25:23 PM PST 24 |
2986025694 ps |
| T146 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.344807847 |
|
|
Mar 03 02:26:05 PM PST 24 |
Mar 03 02:26:18 PM PST 24 |
471312088591 ps |
| T533 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3861806570 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
3483798363 ps |
| T147 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.2065947973 |
|
|
Mar 03 02:25:58 PM PST 24 |
Mar 03 02:28:38 PM PST 24 |
72293104717 ps |
| T534 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2102581445 |
|
|
Mar 03 02:27:04 PM PST 24 |
Mar 03 02:30:00 PM PST 24 |
63097518712 ps |
| T535 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2584332630 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
2527229164 ps |
| T350 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.4160494787 |
|
|
Mar 03 02:26:16 PM PST 24 |
Mar 03 02:26:24 PM PST 24 |
8182980963 ps |
| T536 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1624667861 |
|
|
Mar 03 02:26:58 PM PST 24 |
Mar 03 02:27:18 PM PST 24 |
25352702965 ps |
| T255 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.3342907686 |
|
|
Mar 03 02:26:13 PM PST 24 |
Mar 03 02:28:02 PM PST 24 |
145746629432 ps |
| T537 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.136955584 |
|
|
Mar 03 02:25:31 PM PST 24 |
Mar 03 02:25:36 PM PST 24 |
3492947628 ps |
| T538 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3677853927 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
2023313210 ps |
| T539 |
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.300628375 |
|
|
Mar 03 02:26:01 PM PST 24 |
Mar 03 02:26:07 PM PST 24 |
2082849347 ps |
| T245 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3062652490 |
|
|
Mar 03 02:25:11 PM PST 24 |
Mar 03 02:26:45 PM PST 24 |
122183782922 ps |
| T232 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1635362038 |
|
|
Mar 03 02:25:18 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
5343104903 ps |
| T378 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3531943378 |
|
|
Mar 03 02:26:05 PM PST 24 |
Mar 03 02:26:26 PM PST 24 |
39837264075 ps |
| T540 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.2895249164 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
2773432263 ps |
| T541 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.1687055393 |
|
|
Mar 03 02:25:22 PM PST 24 |
Mar 03 02:25:29 PM PST 24 |
2111880188 ps |
| T542 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2717226601 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:16 PM PST 24 |
2083044368 ps |
| T192 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2329394670 |
|
|
Mar 03 02:26:14 PM PST 24 |
Mar 03 02:26:15 PM PST 24 |
4005361689 ps |
| T366 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2440076305 |
|
|
Mar 03 02:26:58 PM PST 24 |
Mar 03 02:29:55 PM PST 24 |
136496185465 ps |
| T148 |
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.3675226556 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
3108135859 ps |
| T543 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.818807128 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:27 PM PST 24 |
8168298218 ps |
| T259 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2691063515 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:28 PM PST 24 |
42372419474 ps |
| T291 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.2741277234 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:34:31 PM PST 24 |
184826406845 ps |
| T544 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3946525832 |
|
|
Mar 03 02:25:18 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
2101809106 ps |
| T545 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.394414717 |
|
|
Mar 03 02:26:45 PM PST 24 |
Mar 03 02:26:53 PM PST 24 |
2472535794 ps |
| T246 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.3676626377 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:39 PM PST 24 |
58681799772 ps |
| T309 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.769449403 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
3260587630 ps |
| T194 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.4201207900 |
|
|
Mar 03 02:25:19 PM PST 24 |
Mar 03 02:25:23 PM PST 24 |
5325426409 ps |
| T546 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.684370805 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
2499975522 ps |
| T547 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.3282274601 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:22 PM PST 24 |
3484638494 ps |
| T391 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2832653406 |
|
|
Mar 03 02:26:27 PM PST 24 |
Mar 03 02:30:55 PM PST 24 |
697245283882 ps |
| T548 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2498563627 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:18 PM PST 24 |
3831534465 ps |
| T247 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.4048163830 |
|
|
Mar 03 02:25:08 PM PST 24 |
Mar 03 02:25:40 PM PST 24 |
46557816480 ps |
| T549 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.683600297 |
|
|
Mar 03 02:25:50 PM PST 24 |
Mar 03 02:25:52 PM PST 24 |
2411233541 ps |
| T550 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.1309694275 |
|
|
Mar 03 02:25:52 PM PST 24 |
Mar 03 02:25:55 PM PST 24 |
2123407266 ps |
| T392 |
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3072560910 |
|
|
Mar 03 02:26:12 PM PST 24 |
Mar 03 02:28:26 PM PST 24 |
417215374538 ps |
| T551 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.1699415142 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:16 PM PST 24 |
2041770697 ps |
| T552 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.140579985 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
2521105919 ps |
| T553 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3769419178 |
|
|
Mar 03 02:25:11 PM PST 24 |
Mar 03 02:25:14 PM PST 24 |
2639364534 ps |
| T554 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1420225344 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:20 PM PST 24 |
3540028945 ps |
| T555 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.2034032985 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:32:21 PM PST 24 |
144479770196 ps |
| T260 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2109460868 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:27:06 PM PST 24 |
42013876176 ps |
| T556 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1043076852 |
|
|
Mar 03 02:26:05 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2511221151 ps |
| T273 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.192382157 |
|
|
Mar 03 02:25:12 PM PST 24 |
Mar 03 02:25:29 PM PST 24 |
22061573884 ps |
| T557 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1427536092 |
|
|
Mar 03 02:26:44 PM PST 24 |
Mar 03 02:26:46 PM PST 24 |
2526227824 ps |
| T558 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.3168991717 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:14 PM PST 24 |
2020795061 ps |
| T98 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.4006669846 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:53 PM PST 24 |
98669701638 ps |
| T559 |
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2338540476 |
|
|
Mar 03 02:26:44 PM PST 24 |
Mar 03 02:26:46 PM PST 24 |
2658997848 ps |
| T560 |
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3432292096 |
|
|
Mar 03 02:26:18 PM PST 24 |
Mar 03 02:26:22 PM PST 24 |
11650288827 ps |
| T561 |
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.326725568 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:22 PM PST 24 |
3208337483 ps |
| T562 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3227939609 |
|
|
Mar 03 02:26:45 PM PST 24 |
Mar 03 02:26:55 PM PST 24 |
3626396305 ps |
| T563 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.708312849 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:50 PM PST 24 |
12883138498 ps |
| T320 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.3957741185 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:27:06 PM PST 24 |
45913870195 ps |
| T564 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.697278383 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:10 PM PST 24 |
2628681033 ps |
| T565 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.1636017154 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:06 PM PST 24 |
2034140860 ps |
| T566 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1801894544 |
|
|
Mar 03 02:26:27 PM PST 24 |
Mar 03 02:26:31 PM PST 24 |
2140974149 ps |
| T567 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.992279456 |
|
|
Mar 03 02:26:56 PM PST 24 |
Mar 03 02:27:38 PM PST 24 |
68952055620 ps |
| T568 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2600672458 |
|
|
Mar 03 02:26:45 PM PST 24 |
Mar 03 02:26:49 PM PST 24 |
2617410547 ps |
| T569 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3131338858 |
|
|
Mar 03 02:26:12 PM PST 24 |
Mar 03 02:26:19 PM PST 24 |
2142193297 ps |
| T251 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1984186582 |
|
|
Mar 03 02:25:20 PM PST 24 |
Mar 03 02:25:53 PM PST 24 |
177770231019 ps |
| T570 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.686289342 |
|
|
Mar 03 02:26:38 PM PST 24 |
Mar 03 02:26:40 PM PST 24 |
2623744653 ps |
| T571 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.1415507334 |
|
|
Mar 03 02:26:13 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
2114180884 ps |
| T572 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.4154390223 |
|
|
Mar 03 02:25:43 PM PST 24 |
Mar 03 02:25:45 PM PST 24 |
2633257377 ps |
| T573 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.102318339 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
2123180175 ps |
| T574 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2740976223 |
|
|
Mar 03 02:25:06 PM PST 24 |
Mar 03 02:26:23 PM PST 24 |
53832330905 ps |
| T575 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.2431653407 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:18 PM PST 24 |
3850217103 ps |
| T576 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.1085825902 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
5053977714 ps |
| T577 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1673485892 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:27:26 PM PST 24 |
32695555747 ps |
| T578 |
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1211029234 |
|
|
Mar 03 02:26:44 PM PST 24 |
Mar 03 02:26:49 PM PST 24 |
5875215169 ps |
| T579 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.734665739 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:10 PM PST 24 |
2515196230 ps |
| T580 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.4059822162 |
|
|
Mar 03 02:26:46 PM PST 24 |
Mar 03 02:26:49 PM PST 24 |
2927431019 ps |
| T581 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.3659909554 |
|
|
Mar 03 02:25:32 PM PST 24 |
Mar 03 02:25:40 PM PST 24 |
8450589113 ps |
| T137 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2348275249 |
|
|
Mar 03 02:26:39 PM PST 24 |
Mar 03 02:28:40 PM PST 24 |
53281356309 ps |
| T310 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.3848035191 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:40 PM PST 24 |
11940113880 ps |
| T326 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.741693269 |
|
|
Mar 03 02:25:19 PM PST 24 |
Mar 03 02:25:23 PM PST 24 |
2019747452 ps |
| T327 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3568932029 |
|
|
Mar 03 02:26:31 PM PST 24 |
Mar 03 02:26:36 PM PST 24 |
2516568065 ps |
| T328 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.835385636 |
|
|
Mar 03 02:26:57 PM PST 24 |
Mar 03 02:30:47 PM PST 24 |
90191169290 ps |
| T195 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2796787439 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:26:06 PM PST 24 |
44058773492 ps |
| T329 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.290421712 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
3357135690 ps |
| T116 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.99031835 |
|
|
Mar 03 02:25:55 PM PST 24 |
Mar 03 02:26:02 PM PST 24 |
5525765914 ps |
| T330 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.557309724 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:27 PM PST 24 |
9040608214 ps |
| T331 |
/workspace/coverage/default/15.sysrst_ctrl_alert_test.2566074206 |
|
|
Mar 03 02:25:33 PM PST 24 |
Mar 03 02:25:34 PM PST 24 |
2083611228 ps |
| T332 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.486171085 |
|
|
Mar 03 02:26:38 PM PST 24 |
Mar 03 02:26:42 PM PST 24 |
4111248980 ps |
| T582 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2988022734 |
|
|
Mar 03 02:25:18 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
2164469473 ps |
| T583 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3831867452 |
|
|
Mar 03 02:26:57 PM PST 24 |
Mar 03 02:27:05 PM PST 24 |
510784903452 ps |
| T138 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1907174180 |
|
|
Mar 03 02:25:03 PM PST 24 |
Mar 03 02:25:30 PM PST 24 |
34776755467 ps |
| T584 |
/workspace/coverage/default/42.sysrst_ctrl_smoke.1080344379 |
|
|
Mar 03 02:26:39 PM PST 24 |
Mar 03 02:26:42 PM PST 24 |
2127760311 ps |
| T585 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.335547598 |
|
|
Mar 03 02:25:21 PM PST 24 |
Mar 03 02:25:49 PM PST 24 |
38399542649 ps |
| T586 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3816507474 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
7444044525 ps |
| T587 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2297112963 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2461580493 ps |
| T588 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2546180504 |
|
|
Mar 03 02:26:49 PM PST 24 |
Mar 03 02:28:07 PM PST 24 |
31253525773 ps |
| T589 |
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.338802681 |
|
|
Mar 03 02:25:50 PM PST 24 |
Mar 03 02:25:56 PM PST 24 |
3372111308 ps |
| T590 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3225138770 |
|
|
Mar 03 02:25:12 PM PST 24 |
Mar 03 02:25:15 PM PST 24 |
2481728435 ps |
| T591 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.2071963967 |
|
|
Mar 03 02:26:02 PM PST 24 |
Mar 03 02:26:05 PM PST 24 |
2118436509 ps |
| T592 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3719505844 |
|
|
Mar 03 02:25:22 PM PST 24 |
Mar 03 02:27:30 PM PST 24 |
764616694278 ps |
| T593 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3577702436 |
|
|
Mar 03 02:25:50 PM PST 24 |
Mar 03 02:25:58 PM PST 24 |
5353433756 ps |
| T594 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2310617734 |
|
|
Mar 03 02:26:13 PM PST 24 |
Mar 03 02:26:20 PM PST 24 |
2466604109 ps |
| T595 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.3744163713 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:23 PM PST 24 |
2048119764 ps |
| T596 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3472601340 |
|
|
Mar 03 02:25:47 PM PST 24 |
Mar 03 02:26:30 PM PST 24 |
69153224093 ps |
| T597 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.425288991 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:13 PM PST 24 |
5130430579 ps |
| T598 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.702582233 |
|
|
Mar 03 02:26:02 PM PST 24 |
Mar 03 02:26:05 PM PST 24 |
2275143183 ps |
| T599 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all.2069369920 |
|
|
Mar 03 02:26:05 PM PST 24 |
Mar 03 02:26:15 PM PST 24 |
17171030927 ps |
| T600 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.3113233169 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:15 PM PST 24 |
2130592828 ps |