| T601 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.731891742 |
|
|
Mar 03 02:25:20 PM PST 24 |
Mar 03 02:25:26 PM PST 24 |
2112636467 ps |
| T602 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.4121848622 |
|
|
Mar 03 02:25:20 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
2546560840 ps |
| T99 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.771812661 |
|
|
Mar 03 02:25:33 PM PST 24 |
Mar 03 02:26:43 PM PST 24 |
53322548323 ps |
| T603 |
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2571988251 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:22 PM PST 24 |
2477488962 ps |
| T365 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.272114241 |
|
|
Mar 03 02:26:59 PM PST 24 |
Mar 03 02:29:10 PM PST 24 |
49301612275 ps |
| T604 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.751985114 |
|
|
Mar 03 02:25:55 PM PST 24 |
Mar 03 02:25:59 PM PST 24 |
2517931788 ps |
| T605 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2583564445 |
|
|
Mar 03 02:26:56 PM PST 24 |
Mar 03 02:27:01 PM PST 24 |
2517792262 ps |
| T606 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1207908583 |
|
|
Mar 03 02:25:46 PM PST 24 |
Mar 03 02:25:50 PM PST 24 |
4528492727 ps |
| T607 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3383493290 |
|
|
Mar 03 02:26:35 PM PST 24 |
Mar 03 02:26:43 PM PST 24 |
2716564720 ps |
| T608 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.379713762 |
|
|
Mar 03 02:26:01 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
3760905493 ps |
| T609 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.4060181464 |
|
|
Mar 03 02:25:08 PM PST 24 |
Mar 03 02:25:11 PM PST 24 |
2670240089 ps |
| T610 |
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.24023170 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
2261472138 ps |
| T611 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1063262460 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
2955495825 ps |
| T612 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1149227336 |
|
|
Mar 03 02:26:02 PM PST 24 |
Mar 03 02:26:04 PM PST 24 |
3250246999 ps |
| T613 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.4032683363 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:17 PM PST 24 |
2430379245 ps |
| T614 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.427273156 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:19 PM PST 24 |
3655780510 ps |
| T615 |
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.4079963899 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:11 PM PST 24 |
2199242621 ps |
| T616 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1864916225 |
|
|
Mar 03 02:26:51 PM PST 24 |
Mar 03 02:27:25 PM PST 24 |
24949717692 ps |
| T617 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.3728657110 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:20 PM PST 24 |
4110471264 ps |
| T618 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.657682515 |
|
|
Mar 03 02:26:35 PM PST 24 |
Mar 03 02:26:41 PM PST 24 |
2075276715 ps |
| T619 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4041142220 |
|
|
Mar 03 02:26:56 PM PST 24 |
Mar 03 02:31:53 PM PST 24 |
111661743113 ps |
| T620 |
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.478249609 |
|
|
Mar 03 02:27:01 PM PST 24 |
Mar 03 02:28:55 PM PST 24 |
52225316621 ps |
| T621 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3622810329 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:07 PM PST 24 |
2475317139 ps |
| T129 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3219548616 |
|
|
Mar 03 02:26:40 PM PST 24 |
Mar 03 02:26:48 PM PST 24 |
14241161901 ps |
| T622 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1423482388 |
|
|
Mar 03 02:25:19 PM PST 24 |
Mar 03 02:25:34 PM PST 24 |
10171662406 ps |
| T623 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2065363745 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:23 PM PST 24 |
2013252856 ps |
| T624 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.80240390 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
4441353507 ps |
| T625 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.455134219 |
|
|
Mar 03 02:26:47 PM PST 24 |
Mar 03 02:26:55 PM PST 24 |
2477475749 ps |
| T626 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.3981624290 |
|
|
Mar 03 02:26:13 PM PST 24 |
Mar 03 02:26:18 PM PST 24 |
2015196507 ps |
| T627 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.1677384319 |
|
|
Mar 03 02:26:15 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
2132704553 ps |
| T628 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3224567541 |
|
|
Mar 03 02:26:43 PM PST 24 |
Mar 03 02:26:52 PM PST 24 |
2906062251 ps |
| T629 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.512240639 |
|
|
Mar 03 02:25:46 PM PST 24 |
Mar 03 02:25:49 PM PST 24 |
3534612947 ps |
| T630 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all.706405472 |
|
|
Mar 03 02:26:48 PM PST 24 |
Mar 03 02:26:54 PM PST 24 |
6777483466 ps |
| T100 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.3923339190 |
|
|
Mar 03 02:25:25 PM PST 24 |
Mar 03 02:31:50 PM PST 24 |
160864744112 ps |
| T631 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2371077195 |
|
|
Mar 03 02:25:26 PM PST 24 |
Mar 03 02:25:28 PM PST 24 |
2486832413 ps |
| T632 |
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3049612227 |
|
|
Mar 03 02:25:35 PM PST 24 |
Mar 03 02:25:39 PM PST 24 |
2474509369 ps |
| T633 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2200410384 |
|
|
Mar 03 02:25:20 PM PST 24 |
Mar 03 02:25:26 PM PST 24 |
2256518070 ps |
| T634 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3053848874 |
|
|
Mar 03 02:26:23 PM PST 24 |
Mar 03 02:26:30 PM PST 24 |
2012356569 ps |
| T635 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3812013952 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:19 PM PST 24 |
3385028964 ps |
| T636 |
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2659705014 |
|
|
Mar 03 02:25:20 PM PST 24 |
Mar 03 02:25:27 PM PST 24 |
2611787026 ps |
| T637 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2612387804 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:22 PM PST 24 |
2903722420 ps |
| T638 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.3144505083 |
|
|
Mar 03 02:25:22 PM PST 24 |
Mar 03 02:25:28 PM PST 24 |
3439055000 ps |
| T387 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.345037920 |
|
|
Mar 03 02:26:34 PM PST 24 |
Mar 03 02:30:41 PM PST 24 |
96431726246 ps |
| T639 |
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.67096376 |
|
|
Mar 03 02:26:22 PM PST 24 |
Mar 03 02:26:38 PM PST 24 |
4199259453 ps |
| T640 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2216101912 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
2516258381 ps |
| T252 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.1960829922 |
|
|
Mar 03 02:26:01 PM PST 24 |
Mar 03 02:26:40 PM PST 24 |
42792554299 ps |
| T641 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3214287820 |
|
|
Mar 03 02:25:44 PM PST 24 |
Mar 03 02:25:47 PM PST 24 |
2484061118 ps |
| T642 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2043285343 |
|
|
Mar 03 02:25:07 PM PST 24 |
Mar 03 02:25:11 PM PST 24 |
2085025843 ps |
| T643 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3262177408 |
|
|
Mar 03 02:26:20 PM PST 24 |
Mar 03 02:26:27 PM PST 24 |
2457603786 ps |
| T644 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2239754426 |
|
|
Mar 03 02:26:49 PM PST 24 |
Mar 03 02:26:52 PM PST 24 |
3732050934 ps |
| T645 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.2531968741 |
|
|
Mar 03 02:26:00 PM PST 24 |
Mar 03 02:26:02 PM PST 24 |
2621532505 ps |
| T646 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.2414849163 |
|
|
Mar 03 02:26:03 PM PST 24 |
Mar 03 02:26:05 PM PST 24 |
2036449142 ps |
| T647 |
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2620392881 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
8975426679 ps |
| T648 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.4054783587 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
2466876158 ps |
| T649 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.2525387549 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:51 PM PST 24 |
14670859035 ps |
| T362 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.242374910 |
|
|
Mar 03 02:25:19 PM PST 24 |
Mar 03 02:26:00 PM PST 24 |
103663538819 ps |
| T650 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.727373904 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:16 PM PST 24 |
2132302213 ps |
| T651 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4179679930 |
|
|
Mar 03 02:26:40 PM PST 24 |
Mar 03 02:26:43 PM PST 24 |
2524457096 ps |
| T652 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1783907625 |
|
|
Mar 03 02:26:19 PM PST 24 |
Mar 03 02:26:23 PM PST 24 |
2513883049 ps |
| T89 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.1162176675 |
|
|
Mar 03 02:25:30 PM PST 24 |
Mar 03 02:25:34 PM PST 24 |
6342463801 ps |
| T183 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.694952554 |
|
|
Mar 03 02:26:13 PM PST 24 |
Mar 03 02:34:55 PM PST 24 |
205390977444 ps |
| T184 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.4077290300 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
2620683032 ps |
| T185 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.2648229620 |
|
|
Mar 03 02:25:47 PM PST 24 |
Mar 03 02:25:49 PM PST 24 |
4686091073 ps |
| T186 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.3754860610 |
|
|
Mar 03 02:25:39 PM PST 24 |
Mar 03 02:31:07 PM PST 24 |
127484065916 ps |
| T187 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3709196721 |
|
|
Mar 03 02:25:25 PM PST 24 |
Mar 03 02:27:23 PM PST 24 |
408889130030 ps |
| T188 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3608594780 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
3507963595 ps |
| T189 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.389401593 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:10 PM PST 24 |
3191007341 ps |
| T190 |
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3054347051 |
|
|
Mar 03 02:25:36 PM PST 24 |
Mar 03 02:25:41 PM PST 24 |
2520167982 ps |
| T191 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1798401311 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:22 PM PST 24 |
3934951464 ps |
| T653 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.1872902840 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:10 PM PST 24 |
2033470788 ps |
| T233 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2837955689 |
|
|
Mar 03 02:26:39 PM PST 24 |
Mar 03 02:26:48 PM PST 24 |
3211482964 ps |
| T654 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.2900741946 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:26:05 PM PST 24 |
72114028793 ps |
| T140 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1671625952 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:26:28 PM PST 24 |
56873578576 ps |
| T384 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.4144086661 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:30:17 PM PST 24 |
94314522697 ps |
| T655 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3051239563 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
2489302080 ps |
| T656 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.749776981 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:15 PM PST 24 |
2589476173 ps |
| T657 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1500238674 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:08 PM PST 24 |
4614145633 ps |
| T658 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2834114490 |
|
|
Mar 03 02:25:38 PM PST 24 |
Mar 03 02:25:44 PM PST 24 |
2450613560 ps |
| T370 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1120284952 |
|
|
Mar 03 02:26:55 PM PST 24 |
Mar 03 02:28:03 PM PST 24 |
100129289981 ps |
| T659 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.2512607514 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
2987496914 ps |
| T660 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.956818413 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:14 PM PST 24 |
2014142432 ps |
| T661 |
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3512510120 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:06 PM PST 24 |
2535713096 ps |
| T662 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.87701351 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:23 PM PST 24 |
3779513563 ps |
| T663 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.533788058 |
|
|
Mar 03 02:26:59 PM PST 24 |
Mar 03 02:28:09 PM PST 24 |
100556546565 ps |
| T664 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1259366594 |
|
|
Mar 03 02:26:50 PM PST 24 |
Mar 03 02:26:56 PM PST 24 |
2018903244 ps |
| T665 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.994927836 |
|
|
Mar 03 02:26:46 PM PST 24 |
Mar 03 02:26:49 PM PST 24 |
3037110597 ps |
| T666 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.2607159716 |
|
|
Mar 03 02:25:21 PM PST 24 |
Mar 03 02:25:24 PM PST 24 |
2208342158 ps |
| T667 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.4069637651 |
|
|
Mar 03 02:26:35 PM PST 24 |
Mar 03 02:26:37 PM PST 24 |
2513820587 ps |
| T668 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.4098877589 |
|
|
Mar 03 02:25:12 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
2509346757 ps |
| T669 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2896750876 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:16 PM PST 24 |
2024423771 ps |
| T670 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.380188489 |
|
|
Mar 03 02:26:57 PM PST 24 |
Mar 03 02:27:53 PM PST 24 |
82364540747 ps |
| T248 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.667995962 |
|
|
Mar 03 02:26:16 PM PST 24 |
Mar 03 02:29:26 PM PST 24 |
74106990488 ps |
| T671 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.150281925 |
|
|
Mar 03 02:25:52 PM PST 24 |
Mar 03 02:28:58 PM PST 24 |
70435736639 ps |
| T672 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.17431479 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
2136382756 ps |
| T673 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.252901772 |
|
|
Mar 03 02:26:40 PM PST 24 |
Mar 03 02:26:46 PM PST 24 |
2014552303 ps |
| T674 |
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1688675440 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:23 PM PST 24 |
2610655637 ps |
| T675 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.623331048 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2161003593 ps |
| T676 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.24528280 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2521402645 ps |
| T139 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1428175261 |
|
|
Mar 03 02:26:17 PM PST 24 |
Mar 03 02:26:25 PM PST 24 |
7785868093 ps |
| T394 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.562156915 |
|
|
Mar 03 02:25:59 PM PST 24 |
Mar 03 02:27:10 PM PST 24 |
50606094096 ps |
| T677 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.659721987 |
|
|
Mar 03 02:26:05 PM PST 24 |
Mar 03 02:26:15 PM PST 24 |
2012871625 ps |
| T678 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2588418641 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
3176732039 ps |
| T679 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1841089885 |
|
|
Mar 03 02:26:15 PM PST 24 |
Mar 03 02:26:22 PM PST 24 |
2463607440 ps |
| T680 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.4159003154 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:30:22 PM PST 24 |
92954452251 ps |
| T681 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1718293294 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:26:24 PM PST 24 |
115865558773 ps |
| T211 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3915424102 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:17 PM PST 24 |
14478031878 ps |
| T682 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.244299668 |
|
|
Mar 03 02:25:37 PM PST 24 |
Mar 03 02:25:44 PM PST 24 |
2614074622 ps |
| T683 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.4171633633 |
|
|
Mar 03 02:26:02 PM PST 24 |
Mar 03 02:26:06 PM PST 24 |
2013237487 ps |
| T684 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1766680536 |
|
|
Mar 03 02:27:01 PM PST 24 |
Mar 03 02:28:12 PM PST 24 |
70360385768 ps |
| T685 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.4245885802 |
|
|
Mar 03 02:25:27 PM PST 24 |
Mar 03 02:25:35 PM PST 24 |
2115499852 ps |
| T686 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3793406021 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:31 PM PST 24 |
104589075782 ps |
| T687 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3233169309 |
|
|
Mar 03 02:25:20 PM PST 24 |
Mar 03 02:25:25 PM PST 24 |
9601887105 ps |
| T688 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2416066782 |
|
|
Mar 03 02:26:55 PM PST 24 |
Mar 03 02:26:57 PM PST 24 |
2047683208 ps |
| T689 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.3677695700 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:20 PM PST 24 |
2613728328 ps |
| T364 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3288383828 |
|
|
Mar 03 02:27:07 PM PST 24 |
Mar 03 02:29:06 PM PST 24 |
179214383173 ps |
| T690 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.780534252 |
|
|
Mar 03 02:26:11 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
4014402157 ps |
| T87 |
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1502283311 |
|
|
Mar 03 02:26:50 PM PST 24 |
Mar 03 02:30:31 PM PST 24 |
85099562393 ps |
| T691 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2581335277 |
|
|
Mar 03 02:26:59 PM PST 24 |
Mar 03 02:27:41 PM PST 24 |
57300507821 ps |
| T692 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.152563708 |
|
|
Mar 03 02:25:12 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
2110087065 ps |
| T130 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.3990382901 |
|
|
Mar 03 02:26:12 PM PST 24 |
Mar 03 02:28:21 PM PST 24 |
54235770570 ps |
| T693 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2328298944 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
3315717418 ps |
| T694 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3013470851 |
|
|
Mar 03 02:26:47 PM PST 24 |
Mar 03 02:26:49 PM PST 24 |
2645824198 ps |
| T695 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.250955437 |
|
|
Mar 03 02:26:47 PM PST 24 |
Mar 03 02:29:40 PM PST 24 |
67358066608 ps |
| T696 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.572738827 |
|
|
Mar 03 02:26:40 PM PST 24 |
Mar 03 02:26:44 PM PST 24 |
2515579277 ps |
| T697 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.1122474810 |
|
|
Mar 03 02:25:10 PM PST 24 |
Mar 03 02:25:13 PM PST 24 |
2120347639 ps |
| T698 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.4178749060 |
|
|
Mar 03 02:26:58 PM PST 24 |
Mar 03 02:27:25 PM PST 24 |
43282545880 ps |
| T699 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.1946464075 |
|
|
Mar 03 02:25:49 PM PST 24 |
Mar 03 02:25:52 PM PST 24 |
3746288703 ps |
| T700 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.528565640 |
|
|
Mar 03 02:25:52 PM PST 24 |
Mar 03 02:25:56 PM PST 24 |
4425717952 ps |
| T701 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.889995038 |
|
|
Mar 03 02:25:15 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
2022720239 ps |
| T702 |
/workspace/coverage/default/3.sysrst_ctrl_smoke.3980809088 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:19 PM PST 24 |
2113433544 ps |
| T101 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2003164663 |
|
|
Mar 03 02:26:34 PM PST 24 |
Mar 03 02:26:58 PM PST 24 |
35729990099 ps |
| T703 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.2275748218 |
|
|
Mar 03 02:25:21 PM PST 24 |
Mar 03 02:25:26 PM PST 24 |
2013620202 ps |
| T117 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1466881197 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
3905874840 ps |
| T158 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.4074212956 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
5177737775 ps |
| T704 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.1908145428 |
|
|
Mar 03 02:25:19 PM PST 24 |
Mar 03 02:25:22 PM PST 24 |
2136093247 ps |
| T311 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1474923052 |
|
|
Mar 03 02:26:09 PM PST 24 |
Mar 03 02:26:58 PM PST 24 |
34179531376 ps |
| T376 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.914379057 |
|
|
Mar 03 02:26:51 PM PST 24 |
Mar 03 02:27:14 PM PST 24 |
52590776808 ps |
| T287 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3181318295 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:55 PM PST 24 |
14391280913 ps |
| T705 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.4172665090 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
2128050023 ps |
| T706 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.722973426 |
|
|
Mar 03 02:25:44 PM PST 24 |
Mar 03 02:25:48 PM PST 24 |
2456542594 ps |
| T707 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.759208734 |
|
|
Mar 03 02:26:11 PM PST 24 |
Mar 03 02:26:16 PM PST 24 |
3117138181 ps |
| T159 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.1453260382 |
|
|
Mar 03 02:26:12 PM PST 24 |
Mar 03 02:26:34 PM PST 24 |
10662938990 ps |
| T102 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2057888906 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:28:35 PM PST 24 |
550914334971 ps |
| T708 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.481742463 |
|
|
Mar 03 02:26:50 PM PST 24 |
Mar 03 02:26:52 PM PST 24 |
3870420801 ps |
| T357 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.993853043 |
|
|
Mar 03 02:25:43 PM PST 24 |
Mar 03 02:30:55 PM PST 24 |
120402874421 ps |
| T223 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.803826606 |
|
|
Mar 03 02:26:55 PM PST 24 |
Mar 03 02:26:58 PM PST 24 |
3233773975 ps |
| T358 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.3795051584 |
|
|
Mar 03 02:25:23 PM PST 24 |
Mar 03 02:27:53 PM PST 24 |
255334199890 ps |
| T709 |
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1416685616 |
|
|
Mar 03 02:26:58 PM PST 24 |
Mar 03 02:27:01 PM PST 24 |
2568439750 ps |
| T710 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2474041626 |
|
|
Mar 03 02:26:38 PM PST 24 |
Mar 03 02:26:53 PM PST 24 |
9263699946 ps |
| T711 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.3623083671 |
|
|
Mar 03 02:25:22 PM PST 24 |
Mar 03 02:25:50 PM PST 24 |
67838686799 ps |
| T712 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.3774057287 |
|
|
Mar 03 02:25:53 PM PST 24 |
Mar 03 02:25:55 PM PST 24 |
2533404999 ps |
| T713 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.3622450764 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
2527354954 ps |
| T714 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3003204079 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
792936857429 ps |
| T715 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.2012585916 |
|
|
Mar 03 02:25:56 PM PST 24 |
Mar 03 02:26:06 PM PST 24 |
3565291114 ps |
| T716 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.461220544 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:30:52 PM PST 24 |
134736195840 ps |
| T288 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.4104484081 |
|
|
Mar 03 02:26:42 PM PST 24 |
Mar 03 02:27:42 PM PST 24 |
24371714461 ps |
| T717 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2048453586 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:28:56 PM PST 24 |
89684292004 ps |
| T718 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all.2074781909 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:41 PM PST 24 |
11220365741 ps |
| T719 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.2285423645 |
|
|
Mar 03 02:25:47 PM PST 24 |
Mar 03 02:29:30 PM PST 24 |
90968881730 ps |
| T720 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2455631656 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:26 PM PST 24 |
3041541946 ps |
| T721 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.2871657269 |
|
|
Mar 03 02:25:44 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
14650178948 ps |
| T722 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.4017466399 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:23 PM PST 24 |
2453711154 ps |
| T274 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.3723058825 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
22011046916 ps |
| T723 |
/workspace/coverage/default/21.sysrst_ctrl_alert_test.2137434036 |
|
|
Mar 03 02:25:44 PM PST 24 |
Mar 03 02:25:49 PM PST 24 |
2014649725 ps |
| T160 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.2636213814 |
|
|
Mar 03 02:26:01 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
3415368528 ps |
| T724 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1270987970 |
|
|
Mar 03 02:25:31 PM PST 24 |
Mar 03 02:25:34 PM PST 24 |
2624866534 ps |
| T725 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1689683189 |
|
|
Mar 03 02:25:19 PM PST 24 |
Mar 03 02:25:25 PM PST 24 |
2015524959 ps |
| T726 |
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.864096486 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
2475663575 ps |
| T727 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.847784173 |
|
|
Mar 03 02:25:55 PM PST 24 |
Mar 03 02:26:05 PM PST 24 |
3719259099 ps |
| T728 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3968405136 |
|
|
Mar 03 02:26:33 PM PST 24 |
Mar 03 02:26:35 PM PST 24 |
2499569057 ps |
| T729 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.1737403128 |
|
|
Mar 03 02:25:50 PM PST 24 |
Mar 03 02:26:09 PM PST 24 |
7027738243 ps |
| T385 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1267003803 |
|
|
Mar 03 02:26:58 PM PST 24 |
Mar 03 02:28:36 PM PST 24 |
107076879309 ps |
| T730 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2785770073 |
|
|
Mar 03 02:26:32 PM PST 24 |
Mar 03 02:26:36 PM PST 24 |
5738358100 ps |
| T731 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3450562794 |
|
|
Mar 03 02:26:08 PM PST 24 |
Mar 03 02:26:10 PM PST 24 |
2626824787 ps |
| T732 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.423129723 |
|
|
Mar 03 02:25:53 PM PST 24 |
Mar 03 02:25:55 PM PST 24 |
2214398067 ps |
| T733 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.739982968 |
|
|
Mar 03 02:26:32 PM PST 24 |
Mar 03 02:26:36 PM PST 24 |
4334951770 ps |
| T734 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.3121936676 |
|
|
Mar 03 02:25:54 PM PST 24 |
Mar 03 02:25:56 PM PST 24 |
2178696922 ps |
| T735 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3732367338 |
|
|
Mar 03 02:26:52 PM PST 24 |
Mar 03 02:27:54 PM PST 24 |
104863522943 ps |
| T736 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3625076270 |
|
|
Mar 03 02:25:24 PM PST 24 |
Mar 03 02:25:31 PM PST 24 |
2510677618 ps |
| T737 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2129164456 |
|
|
Mar 03 02:26:31 PM PST 24 |
Mar 03 02:31:48 PM PST 24 |
125070850256 ps |
| T738 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2845999518 |
|
|
Mar 03 02:25:18 PM PST 24 |
Mar 03 02:27:14 PM PST 24 |
105078464770 ps |
| T739 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1808173292 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:08 PM PST 24 |
2675274031 ps |
| T740 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.2318486833 |
|
|
Mar 03 02:26:11 PM PST 24 |
Mar 03 02:30:52 PM PST 24 |
110552321754 ps |
| T741 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.954320400 |
|
|
Mar 03 02:25:50 PM PST 24 |
Mar 03 02:25:56 PM PST 24 |
2010620184 ps |
| T742 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1414293269 |
|
|
Mar 03 02:26:57 PM PST 24 |
Mar 03 02:27:04 PM PST 24 |
26688024395 ps |
| T743 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.109468692 |
|
|
Mar 03 02:25:10 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
2610047319 ps |
| T744 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.3805291006 |
|
|
Mar 03 02:26:10 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
436610045959 ps |
| T745 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1963380786 |
|
|
Mar 03 02:26:57 PM PST 24 |
Mar 03 02:27:02 PM PST 24 |
2480294147 ps |
| T746 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3774187411 |
|
|
Mar 03 02:26:49 PM PST 24 |
Mar 03 02:27:59 PM PST 24 |
27078950053 ps |
| T356 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.1216851830 |
|
|
Mar 03 02:26:14 PM PST 24 |
Mar 03 02:27:16 PM PST 24 |
103601947866 ps |
| T118 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3238713593 |
|
|
Mar 03 02:26:06 PM PST 24 |
Mar 03 02:26:08 PM PST 24 |
8087523424 ps |
| T161 |
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.2255877648 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:16 PM PST 24 |
3923958677 ps |
| T103 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.32656698 |
|
|
Mar 03 02:25:29 PM PST 24 |
Mar 03 02:25:50 PM PST 24 |
29414798067 ps |
| T747 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2788207506 |
|
|
Mar 03 02:25:12 PM PST 24 |
Mar 03 02:25:20 PM PST 24 |
2609876333 ps |
| T162 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.193201144 |
|
|
Mar 03 02:26:11 PM PST 24 |
Mar 03 02:26:13 PM PST 24 |
3386280290 ps |
| T748 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1945562304 |
|
|
Mar 03 02:26:33 PM PST 24 |
Mar 03 02:26:39 PM PST 24 |
2142983490 ps |
| T749 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.168472269 |
|
|
Mar 03 02:26:12 PM PST 24 |
Mar 03 02:26:18 PM PST 24 |
2111284432 ps |
| T383 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.95271886 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:30:47 PM PST 24 |
202067408869 ps |
| T750 |
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3825484385 |
|
|
Mar 03 02:26:45 PM PST 24 |
Mar 03 02:26:48 PM PST 24 |
2235142118 ps |
| T141 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1422822537 |
|
|
Mar 03 02:26:42 PM PST 24 |
Mar 03 02:27:02 PM PST 24 |
97945203489 ps |
| T751 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.335550795 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:59 PM PST 24 |
80015680268 ps |
| T752 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all.3721899015 |
|
|
Mar 03 02:26:03 PM PST 24 |
Mar 03 02:26:08 PM PST 24 |
7004080838 ps |
| T753 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2661833621 |
|
|
Mar 03 02:26:18 PM PST 24 |
Mar 03 02:26:25 PM PST 24 |
2511269945 ps |
| T754 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.3076207321 |
|
|
Mar 03 02:25:12 PM PST 24 |
Mar 03 02:25:16 PM PST 24 |
2461272788 ps |
| T755 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.1420439 |
|
|
Mar 03 02:25:12 PM PST 24 |
Mar 03 02:25:14 PM PST 24 |
2135668591 ps |
| T756 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1179719800 |
|
|
Mar 03 02:25:47 PM PST 24 |
Mar 03 02:25:56 PM PST 24 |
3092854400 ps |
| T757 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1037689373 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:20 PM PST 24 |
2294250425 ps |
| T758 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2314170552 |
|
|
Mar 03 02:26:22 PM PST 24 |
Mar 03 02:26:23 PM PST 24 |
2501373156 ps |
| T759 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.2380312800 |
|
|
Mar 03 02:25:27 PM PST 24 |
Mar 03 02:25:29 PM PST 24 |
3448899895 ps |
| T760 |
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.2456465569 |
|
|
Mar 03 02:26:02 PM PST 24 |
Mar 03 02:26:04 PM PST 24 |
2090441143 ps |
| T371 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3652678803 |
|
|
Mar 03 02:26:18 PM PST 24 |
Mar 03 02:28:25 PM PST 24 |
93255564575 ps |
| T181 |
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3213037985 |
|
|
Mar 03 02:26:38 PM PST 24 |
Mar 03 02:26:41 PM PST 24 |
3062339063 ps |
| T761 |
/workspace/coverage/default/40.sysrst_ctrl_alert_test.2334682743 |
|
|
Mar 03 02:26:43 PM PST 24 |
Mar 03 02:26:50 PM PST 24 |
2010746232 ps |
| T762 |
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3587933355 |
|
|
Mar 03 02:26:12 PM PST 24 |
Mar 03 02:39:10 PM PST 24 |
287929503660 ps |
| T763 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.1971790067 |
|
|
Mar 03 02:25:26 PM PST 24 |
Mar 03 02:26:25 PM PST 24 |
21830435287 ps |
| T182 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1569947319 |
|
|
Mar 03 02:26:59 PM PST 24 |
Mar 03 02:28:01 PM PST 24 |
45121556223 ps |
| T764 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.384013027 |
|
|
Mar 03 02:26:47 PM PST 24 |
Mar 03 02:26:53 PM PST 24 |
2014900771 ps |
| T312 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.4070200552 |
|
|
Mar 03 02:26:01 PM PST 24 |
Mar 03 02:26:49 PM PST 24 |
79341992548 ps |
| T765 |
/workspace/coverage/default/11.sysrst_ctrl_smoke.2873591420 |
|
|
Mar 03 02:25:20 PM PST 24 |
Mar 03 02:25:27 PM PST 24 |
2110035649 ps |
| T766 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.943995901 |
|
|
Mar 03 02:25:21 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
49827189601 ps |
| T221 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.2732265985 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:20 PM PST 24 |
2749057612 ps |
| T767 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.2349183793 |
|
|
Mar 03 02:26:11 PM PST 24 |
Mar 03 02:33:00 PM PST 24 |
156199778393 ps |
| T768 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3276913349 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2620961670 ps |
| T769 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.3601090169 |
|
|
Mar 03 02:25:48 PM PST 24 |
Mar 03 02:25:50 PM PST 24 |
3944197264 ps |
| T770 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.1192665231 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:18 PM PST 24 |
3260214155 ps |
| T119 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3813582624 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
5468993652 ps |
| T104 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3620009435 |
|
|
Mar 03 02:26:39 PM PST 24 |
Mar 03 02:26:48 PM PST 24 |
3286953663 ps |
| T771 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.329150292 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:12 PM PST 24 |
2517081235 ps |
| T772 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2103381476 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:26:26 PM PST 24 |
28079141090 ps |
| T773 |
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2087031075 |
|
|
Mar 03 02:26:07 PM PST 24 |
Mar 03 02:26:14 PM PST 24 |
2466480568 ps |
| T774 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.2026580301 |
|
|
Mar 03 02:26:01 PM PST 24 |
Mar 03 02:26:08 PM PST 24 |
2111882449 ps |
| T386 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.498235065 |
|
|
Mar 03 02:26:16 PM PST 24 |
Mar 03 02:27:56 PM PST 24 |
36315339288 ps |
| T775 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.390435055 |
|
|
Mar 03 02:26:04 PM PST 24 |
Mar 03 02:26:17 PM PST 24 |
2630661928 ps |
| T776 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1799392419 |
|
|
Mar 03 02:26:02 PM PST 24 |
Mar 03 02:26:03 PM PST 24 |
2760861889 ps |
| T777 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.615476438 |
|
|
Mar 03 02:27:00 PM PST 24 |
Mar 03 02:27:28 PM PST 24 |
23847866273 ps |
| T778 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3251248668 |
|
|
Mar 03 02:25:13 PM PST 24 |
Mar 03 02:25:35 PM PST 24 |
1303547021165 ps |
| T779 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.558450173 |
|
|
Mar 03 02:25:16 PM PST 24 |
Mar 03 02:25:27 PM PST 24 |
3336488798 ps |
| T780 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.3817333296 |
|
|
Mar 03 02:25:50 PM PST 24 |
Mar 03 02:25:52 PM PST 24 |
2635543308 ps |
| T781 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.2600545643 |
|
|
Mar 03 02:25:14 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
2095032937 ps |
| T782 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2042078823 |
|
|
Mar 03 02:25:17 PM PST 24 |
Mar 03 02:25:21 PM PST 24 |
3588315727 ps |
| T783 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2432002663 |
|
|
Mar 03 02:25:54 PM PST 24 |
Mar 03 02:26:02 PM PST 24 |
2613188583 ps |
| T784 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.2342576366 |
|
|
Mar 03 02:26:18 PM PST 24 |
Mar 03 02:26:22 PM PST 24 |
2612199435 ps |
| T44 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.3031049957 |
|
|
Mar 03 04:05:36 PM PST 24 |
Mar 03 04:05:38 PM PST 24 |
2389686299 ps |
| T45 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2101514846 |
|
|
Mar 03 04:06:21 PM PST 24 |
Mar 03 04:06:23 PM PST 24 |
2094042042 ps |
| T46 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2930346104 |
|
|
Mar 03 04:06:20 PM PST 24 |
Mar 03 04:06:21 PM PST 24 |
5371417870 ps |
| T785 |
/workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.2741168031 |
|
|
Mar 03 04:07:06 PM PST 24 |
Mar 03 04:07:09 PM PST 24 |
2053616154 ps |
| T786 |
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_intr_test.683371284 |
|
|
Mar 03 04:05:45 PM PST 24 |
Mar 03 04:05:47 PM PST 24 |
2031632130 ps |
| T47 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2048200014 |
|
|
Mar 03 04:06:15 PM PST 24 |
Mar 03 04:08:18 PM PST 24 |
42378004024 ps |
| T261 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.189895625 |
|
|
Mar 03 04:04:49 PM PST 24 |
Mar 03 04:05:56 PM PST 24 |
22237011200 ps |
| T257 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2826727734 |
|
|
Mar 03 04:06:40 PM PST 24 |
Mar 03 04:08:40 PM PST 24 |
42386500505 ps |