| T477 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3292849224 |
|
|
Mar 07 01:59:45 PM PST 24 |
Mar 07 01:59:49 PM PST 24 |
2025759515 ps |
| T478 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1905901468 |
|
|
Mar 07 02:02:04 PM PST 24 |
Mar 07 02:02:07 PM PST 24 |
3706732392 ps |
| T357 |
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1244537641 |
|
|
Mar 07 02:02:14 PM PST 24 |
Mar 07 02:02:51 PM PST 24 |
163172152220 ps |
| T479 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.825594550 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:01:16 PM PST 24 |
2509497543 ps |
| T480 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3557712795 |
|
|
Mar 07 01:58:56 PM PST 24 |
Mar 07 01:59:01 PM PST 24 |
2329820673 ps |
| T242 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all.3174427183 |
|
|
Mar 07 01:59:42 PM PST 24 |
Mar 07 02:03:29 PM PST 24 |
345434169034 ps |
| T481 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3892470685 |
|
|
Mar 07 01:58:50 PM PST 24 |
Mar 07 01:58:52 PM PST 24 |
2501874971 ps |
| T243 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.3514073397 |
|
|
Mar 07 01:59:57 PM PST 24 |
Mar 07 02:02:16 PM PST 24 |
53600639774 ps |
| T482 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.2101749437 |
|
|
Mar 07 02:00:24 PM PST 24 |
Mar 07 02:00:26 PM PST 24 |
2125155015 ps |
| T131 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2431762498 |
|
|
Mar 07 02:02:11 PM PST 24 |
Mar 07 02:02:13 PM PST 24 |
7618922574 ps |
| T483 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2634960366 |
|
|
Mar 07 02:01:24 PM PST 24 |
Mar 07 02:01:28 PM PST 24 |
2615270506 ps |
| T484 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1313559816 |
|
|
Mar 07 02:01:57 PM PST 24 |
Mar 07 02:02:00 PM PST 24 |
3204111241 ps |
| T181 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.1899004117 |
|
|
Mar 07 01:59:44 PM PST 24 |
Mar 07 01:59:57 PM PST 24 |
5744080419 ps |
| T485 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.210031605 |
|
|
Mar 07 01:59:58 PM PST 24 |
Mar 07 02:00:01 PM PST 24 |
3765859962 ps |
| T486 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.4044875276 |
|
|
Mar 07 01:58:46 PM PST 24 |
Mar 07 02:00:49 PM PST 24 |
47401485424 ps |
| T191 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1334863499 |
|
|
Mar 07 02:02:04 PM PST 24 |
Mar 07 02:03:10 PM PST 24 |
143332027980 ps |
| T203 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1999576133 |
|
|
Mar 07 02:02:03 PM PST 24 |
Mar 07 02:02:15 PM PST 24 |
16993825099 ps |
| T142 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.1074625404 |
|
|
Mar 07 01:59:56 PM PST 24 |
Mar 07 02:00:08 PM PST 24 |
4090452590 ps |
| T487 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1334634633 |
|
|
Mar 07 02:01:23 PM PST 24 |
Mar 07 02:01:25 PM PST 24 |
2115740624 ps |
| T488 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4019859234 |
|
|
Mar 07 02:02:00 PM PST 24 |
Mar 07 02:02:08 PM PST 24 |
2513244227 ps |
| T489 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2462674092 |
|
|
Mar 07 01:59:17 PM PST 24 |
Mar 07 01:59:19 PM PST 24 |
2634046123 ps |
| T205 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1619911517 |
|
|
Mar 07 02:02:16 PM PST 24 |
Mar 07 02:02:27 PM PST 24 |
6058605170 ps |
| T490 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2843682295 |
|
|
Mar 07 02:02:07 PM PST 24 |
Mar 07 02:02:28 PM PST 24 |
26100387286 ps |
| T491 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.4264473767 |
|
|
Mar 07 01:58:35 PM PST 24 |
Mar 07 01:58:43 PM PST 24 |
2613024163 ps |
| T492 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.520855886 |
|
|
Mar 07 01:58:39 PM PST 24 |
Mar 07 01:58:45 PM PST 24 |
2114391033 ps |
| T493 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1908114580 |
|
|
Mar 07 02:02:06 PM PST 24 |
Mar 07 02:02:13 PM PST 24 |
2508451249 ps |
| T494 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3738640349 |
|
|
Mar 07 02:01:10 PM PST 24 |
Mar 07 02:01:17 PM PST 24 |
4727699280 ps |
| T300 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1933355009 |
|
|
Mar 07 02:01:09 PM PST 24 |
Mar 07 02:01:16 PM PST 24 |
2509600025 ps |
| T495 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1230616776 |
|
|
Mar 07 02:01:40 PM PST 24 |
Mar 07 02:01:43 PM PST 24 |
2474447797 ps |
| T496 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.402388902 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:01:13 PM PST 24 |
2482546168 ps |
| T497 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.2997586964 |
|
|
Mar 07 01:59:58 PM PST 24 |
Mar 07 01:59:59 PM PST 24 |
2939598249 ps |
| T498 |
/workspace/coverage/default/21.sysrst_ctrl_alert_test.81932515 |
|
|
Mar 07 02:00:26 PM PST 24 |
Mar 07 02:00:32 PM PST 24 |
2014915728 ps |
| T499 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3215367913 |
|
|
Mar 07 02:02:07 PM PST 24 |
Mar 07 02:02:13 PM PST 24 |
2011201890 ps |
| T500 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.162518542 |
|
|
Mar 07 02:01:57 PM PST 24 |
Mar 07 02:02:04 PM PST 24 |
2187768111 ps |
| T301 |
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3718158897 |
|
|
Mar 07 02:01:23 PM PST 24 |
Mar 07 02:01:25 PM PST 24 |
2525223048 ps |
| T501 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.3496798371 |
|
|
Mar 07 02:01:06 PM PST 24 |
Mar 07 02:01:11 PM PST 24 |
2013591836 ps |
| T502 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3334591141 |
|
|
Mar 07 02:01:18 PM PST 24 |
Mar 07 02:01:30 PM PST 24 |
4595827430 ps |
| T503 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.2950714386 |
|
|
Mar 07 02:01:09 PM PST 24 |
Mar 07 02:01:11 PM PST 24 |
2620872852 ps |
| T244 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.868857987 |
|
|
Mar 07 02:01:18 PM PST 24 |
Mar 07 02:04:32 PM PST 24 |
73133534718 ps |
| T504 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.2269087445 |
|
|
Mar 07 02:01:24 PM PST 24 |
Mar 07 02:01:26 PM PST 24 |
2125052866 ps |
| T505 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2736017342 |
|
|
Mar 07 01:59:10 PM PST 24 |
Mar 07 01:59:12 PM PST 24 |
2538847932 ps |
| T506 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.2915337064 |
|
|
Mar 07 01:58:47 PM PST 24 |
Mar 07 01:58:50 PM PST 24 |
2032114874 ps |
| T507 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.2089733503 |
|
|
Mar 07 02:01:25 PM PST 24 |
Mar 07 02:01:32 PM PST 24 |
2447932364 ps |
| T508 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.1883757296 |
|
|
Mar 07 01:59:44 PM PST 24 |
Mar 07 01:59:57 PM PST 24 |
18446162184 ps |
| T509 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2177177478 |
|
|
Mar 07 02:01:58 PM PST 24 |
Mar 07 02:02:00 PM PST 24 |
2485044992 ps |
| T363 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.931592957 |
|
|
Mar 07 02:02:04 PM PST 24 |
Mar 07 02:03:51 PM PST 24 |
145270822438 ps |
| T510 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1847781758 |
|
|
Mar 07 02:01:57 PM PST 24 |
Mar 07 02:02:00 PM PST 24 |
2933181163 ps |
| T511 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.1540860643 |
|
|
Mar 07 02:01:19 PM PST 24 |
Mar 07 02:01:23 PM PST 24 |
2519038927 ps |
| T207 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.2225223495 |
|
|
Mar 07 01:59:30 PM PST 24 |
Mar 07 01:59:36 PM PST 24 |
4848426947 ps |
| T512 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.3719794634 |
|
|
Mar 07 02:01:20 PM PST 24 |
Mar 07 02:01:22 PM PST 24 |
2227222726 ps |
| T397 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1010764276 |
|
|
Mar 07 01:59:58 PM PST 24 |
Mar 07 02:03:29 PM PST 24 |
1798816058515 ps |
| T513 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.2252192220 |
|
|
Mar 07 01:58:57 PM PST 24 |
Mar 07 01:59:29 PM PST 24 |
11995621599 ps |
| T514 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.2407496296 |
|
|
Mar 07 02:01:56 PM PST 24 |
Mar 07 02:02:00 PM PST 24 |
2022105635 ps |
| T515 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.4224588723 |
|
|
Mar 07 02:01:09 PM PST 24 |
Mar 07 02:01:53 PM PST 24 |
31851909717 ps |
| T516 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.1922222176 |
|
|
Mar 07 02:02:06 PM PST 24 |
Mar 07 02:02:09 PM PST 24 |
2142440530 ps |
| T293 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.4100821213 |
|
|
Mar 07 02:01:58 PM PST 24 |
Mar 07 02:03:05 PM PST 24 |
446257335881 ps |
| T517 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.2829560651 |
|
|
Mar 07 02:00:26 PM PST 24 |
Mar 07 02:00:29 PM PST 24 |
2113810168 ps |
| T518 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.2898437551 |
|
|
Mar 07 01:58:36 PM PST 24 |
Mar 07 01:58:39 PM PST 24 |
2265632372 ps |
| T90 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3834583185 |
|
|
Mar 07 02:01:57 PM PST 24 |
Mar 07 02:03:24 PM PST 24 |
74710354113 ps |
| T196 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.1665153154 |
|
|
Mar 07 01:59:33 PM PST 24 |
Mar 07 01:59:35 PM PST 24 |
2031159816 ps |
| T197 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.4146374447 |
|
|
Mar 07 02:02:37 PM PST 24 |
Mar 07 02:02:45 PM PST 24 |
2511983131 ps |
| T198 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2511418839 |
|
|
Mar 07 01:58:45 PM PST 24 |
Mar 07 01:58:49 PM PST 24 |
2177249969 ps |
| T199 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1100672276 |
|
|
Mar 07 01:59:59 PM PST 24 |
Mar 07 02:00:02 PM PST 24 |
2101742294 ps |
| T146 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.1753021302 |
|
|
Mar 07 02:01:30 PM PST 24 |
Mar 07 02:01:37 PM PST 24 |
4337296759 ps |
| T123 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.931894776 |
|
|
Mar 07 02:02:07 PM PST 24 |
Mar 07 02:02:11 PM PST 24 |
3807337829 ps |
| T200 |
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2957675269 |
|
|
Mar 07 01:59:43 PM PST 24 |
Mar 07 01:59:47 PM PST 24 |
2209988840 ps |
| T201 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2620752488 |
|
|
Mar 07 01:59:41 PM PST 24 |
Mar 07 01:59:48 PM PST 24 |
2472825074 ps |
| T202 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2866830007 |
|
|
Mar 07 01:59:52 PM PST 24 |
Mar 07 02:00:07 PM PST 24 |
5353421150 ps |
| T519 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.962754286 |
|
|
Mar 07 01:59:04 PM PST 24 |
Mar 07 01:59:07 PM PST 24 |
2134826667 ps |
| T520 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.3013868841 |
|
|
Mar 07 01:59:31 PM PST 24 |
Mar 07 01:59:35 PM PST 24 |
2623519725 ps |
| T194 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.3237730667 |
|
|
Mar 07 02:01:17 PM PST 24 |
Mar 07 02:01:26 PM PST 24 |
3154003717 ps |
| T124 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3641838072 |
|
|
Mar 07 02:01:54 PM PST 24 |
Mar 07 02:02:01 PM PST 24 |
5134280508 ps |
| T521 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3857704080 |
|
|
Mar 07 02:02:05 PM PST 24 |
Mar 07 02:02:07 PM PST 24 |
7131865424 ps |
| T522 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.2241422465 |
|
|
Mar 07 02:00:25 PM PST 24 |
Mar 07 02:00:34 PM PST 24 |
3127835641 ps |
| T523 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.55755564 |
|
|
Mar 07 01:59:33 PM PST 24 |
Mar 07 01:59:43 PM PST 24 |
3272077402 ps |
| T524 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2958045858 |
|
|
Mar 07 02:00:25 PM PST 24 |
Mar 07 02:00:27 PM PST 24 |
2525430633 ps |
| T525 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3291687589 |
|
|
Mar 07 02:00:14 PM PST 24 |
Mar 07 02:00:21 PM PST 24 |
2509944475 ps |
| T345 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2813508901 |
|
|
Mar 07 02:02:25 PM PST 24 |
Mar 07 02:08:42 PM PST 24 |
157483868117 ps |
| T132 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.612276466 |
|
|
Mar 07 02:01:59 PM PST 24 |
Mar 07 02:04:12 PM PST 24 |
578554768060 ps |
| T526 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.4046509503 |
|
|
Mar 07 02:01:12 PM PST 24 |
Mar 07 02:01:16 PM PST 24 |
2828892142 ps |
| T189 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1008317596 |
|
|
Mar 07 01:59:19 PM PST 24 |
Mar 07 01:59:28 PM PST 24 |
4176726225 ps |
| T527 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.386303094 |
|
|
Mar 07 01:59:18 PM PST 24 |
Mar 07 01:59:20 PM PST 24 |
2225427006 ps |
| T528 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.1959414261 |
|
|
Mar 07 01:58:56 PM PST 24 |
Mar 07 02:00:34 PM PST 24 |
45409366996 ps |
| T529 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3260284834 |
|
|
Mar 07 01:59:56 PM PST 24 |
Mar 07 02:00:00 PM PST 24 |
2473652789 ps |
| T530 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.665846328 |
|
|
Mar 07 01:58:49 PM PST 24 |
Mar 07 01:58:56 PM PST 24 |
2445186600 ps |
| T531 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.2150242668 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:01:10 PM PST 24 |
2471207453 ps |
| T143 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3287380425 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:01:17 PM PST 24 |
3543620360 ps |
| T93 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1226619686 |
|
|
Mar 07 01:59:42 PM PST 24 |
Mar 07 02:04:47 PM PST 24 |
1525123733516 ps |
| T382 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.3238461420 |
|
|
Mar 07 01:58:51 PM PST 24 |
Mar 07 02:00:45 PM PST 24 |
107955051377 ps |
| T91 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.479859890 |
|
|
Mar 07 01:59:42 PM PST 24 |
Mar 07 02:00:26 PM PST 24 |
100002767677 ps |
| T396 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3309938421 |
|
|
Mar 07 02:01:57 PM PST 24 |
Mar 07 02:27:07 PM PST 24 |
575333284218 ps |
| T532 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3691925943 |
|
|
Mar 07 02:02:03 PM PST 24 |
Mar 07 02:02:22 PM PST 24 |
6560180323 ps |
| T533 |
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3638125554 |
|
|
Mar 07 02:00:02 PM PST 24 |
Mar 07 02:00:09 PM PST 24 |
2513026351 ps |
| T534 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.14279766 |
|
|
Mar 07 01:59:44 PM PST 24 |
Mar 07 01:59:47 PM PST 24 |
3249983129 ps |
| T535 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.2411700991 |
|
|
Mar 07 01:58:36 PM PST 24 |
Mar 07 01:58:39 PM PST 24 |
2530250812 ps |
| T536 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.2484716912 |
|
|
Mar 07 02:01:11 PM PST 24 |
Mar 07 02:01:15 PM PST 24 |
2013731787 ps |
| T537 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.1134482622 |
|
|
Mar 07 01:59:28 PM PST 24 |
Mar 07 01:59:33 PM PST 24 |
2107049451 ps |
| T538 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3604478222 |
|
|
Mar 07 02:00:23 PM PST 24 |
Mar 07 02:00:30 PM PST 24 |
2508237785 ps |
| T154 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.413680208 |
|
|
Mar 07 02:02:07 PM PST 24 |
Mar 07 02:02:18 PM PST 24 |
3211034190 ps |
| T539 |
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.4016960065 |
|
|
Mar 07 02:00:24 PM PST 24 |
Mar 07 02:00:33 PM PST 24 |
3426464876 ps |
| T373 |
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2780309314 |
|
|
Mar 07 02:02:16 PM PST 24 |
Mar 07 02:02:50 PM PST 24 |
40243482884 ps |
| T540 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.2522076827 |
|
|
Mar 07 01:59:57 PM PST 24 |
Mar 07 02:00:00 PM PST 24 |
4061224184 ps |
| T358 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.934831168 |
|
|
Mar 07 02:02:17 PM PST 24 |
Mar 07 02:03:11 PM PST 24 |
83627250709 ps |
| T541 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3700103817 |
|
|
Mar 07 01:59:29 PM PST 24 |
Mar 07 01:59:36 PM PST 24 |
2031952545 ps |
| T394 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3023737982 |
|
|
Mar 07 02:02:07 PM PST 24 |
Mar 07 02:03:54 PM PST 24 |
43313166451 ps |
| T542 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1651495139 |
|
|
Mar 07 02:01:33 PM PST 24 |
Mar 07 02:01:43 PM PST 24 |
3309327810 ps |
| T379 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.724743494 |
|
|
Mar 07 01:59:32 PM PST 24 |
Mar 07 02:00:27 PM PST 24 |
92461825480 ps |
| T543 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1091545100 |
|
|
Mar 07 02:01:58 PM PST 24 |
Mar 07 02:02:43 PM PST 24 |
33388076218 ps |
| T392 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3745468876 |
|
|
Mar 07 01:59:27 PM PST 24 |
Mar 07 02:00:42 PM PST 24 |
33734776798 ps |
| T544 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3091487283 |
|
|
Mar 07 01:59:30 PM PST 24 |
Mar 07 01:59:36 PM PST 24 |
2009548089 ps |
| T125 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2863637352 |
|
|
Mar 07 02:01:57 PM PST 24 |
Mar 07 02:02:38 PM PST 24 |
115716509400 ps |
| T545 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.213727702 |
|
|
Mar 07 02:01:18 PM PST 24 |
Mar 07 02:01:21 PM PST 24 |
2631599155 ps |
| T546 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3629693366 |
|
|
Mar 07 02:01:24 PM PST 24 |
Mar 07 02:08:13 PM PST 24 |
144987635104 ps |
| T381 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.215248313 |
|
|
Mar 07 02:01:17 PM PST 24 |
Mar 07 02:04:18 PM PST 24 |
72471359273 ps |
| T547 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.450684387 |
|
|
Mar 07 01:59:18 PM PST 24 |
Mar 07 01:59:24 PM PST 24 |
2008902384 ps |
| T548 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1068413434 |
|
|
Mar 07 02:00:23 PM PST 24 |
Mar 07 02:00:30 PM PST 24 |
2613413808 ps |
| T141 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2831394668 |
|
|
Mar 07 02:02:07 PM PST 24 |
Mar 07 02:02:16 PM PST 24 |
243790267830 ps |
| T549 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.3348772720 |
|
|
Mar 07 02:01:05 PM PST 24 |
Mar 07 02:01:16 PM PST 24 |
14384301940 ps |
| T550 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.3049355187 |
|
|
Mar 07 02:00:11 PM PST 24 |
Mar 07 02:00:18 PM PST 24 |
2509735885 ps |
| T551 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.936980364 |
|
|
Mar 07 01:59:56 PM PST 24 |
Mar 07 01:59:58 PM PST 24 |
2122672671 ps |
| T552 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.3224426083 |
|
|
Mar 07 02:01:31 PM PST 24 |
Mar 07 02:01:38 PM PST 24 |
2480250750 ps |
| T553 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.343864496 |
|
|
Mar 07 01:58:49 PM PST 24 |
Mar 07 01:58:51 PM PST 24 |
2126638467 ps |
| T195 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3168715055 |
|
|
Mar 07 02:02:08 PM PST 24 |
Mar 07 02:02:21 PM PST 24 |
5676830878 ps |
| T554 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2350407522 |
|
|
Mar 07 01:59:29 PM PST 24 |
Mar 07 02:02:41 PM PST 24 |
262876765186 ps |
| T555 |
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.1254622000 |
|
|
Mar 07 02:00:24 PM PST 24 |
Mar 07 02:00:32 PM PST 24 |
2611461018 ps |
| T556 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.2800006569 |
|
|
Mar 07 01:59:29 PM PST 24 |
Mar 07 01:59:37 PM PST 24 |
6438170348 ps |
| T557 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2283628837 |
|
|
Mar 07 01:58:51 PM PST 24 |
Mar 07 01:58:55 PM PST 24 |
2617173089 ps |
| T558 |
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3705811230 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:01:11 PM PST 24 |
2529899183 ps |
| T559 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3066630686 |
|
|
Mar 07 02:01:56 PM PST 24 |
Mar 07 02:01:58 PM PST 24 |
2627181356 ps |
| T560 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.728277587 |
|
|
Mar 07 01:59:43 PM PST 24 |
Mar 07 01:59:45 PM PST 24 |
2536468636 ps |
| T561 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2684032059 |
|
|
Mar 07 01:58:49 PM PST 24 |
Mar 07 01:58:52 PM PST 24 |
3504108967 ps |
| T562 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1329036159 |
|
|
Mar 07 02:02:10 PM PST 24 |
Mar 07 02:02:13 PM PST 24 |
2463480217 ps |
| T563 |
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1590350093 |
|
|
Mar 07 02:02:05 PM PST 24 |
Mar 07 02:02:11 PM PST 24 |
4763988442 ps |
| T564 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all.1935009252 |
|
|
Mar 07 01:58:48 PM PST 24 |
Mar 07 01:58:59 PM PST 24 |
14679292409 ps |
| T565 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3450325118 |
|
|
Mar 07 02:00:11 PM PST 24 |
Mar 07 02:00:17 PM PST 24 |
3800644937 ps |
| T566 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2226186776 |
|
|
Mar 07 02:02:08 PM PST 24 |
Mar 07 02:02:49 PM PST 24 |
168580648322 ps |
| T567 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.3810732792 |
|
|
Mar 07 02:00:07 PM PST 24 |
Mar 07 02:00:10 PM PST 24 |
2061272821 ps |
| T340 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.527265167 |
|
|
Mar 07 01:59:31 PM PST 24 |
Mar 07 02:05:05 PM PST 24 |
125201162351 ps |
| T341 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.555040533 |
|
|
Mar 07 02:01:57 PM PST 24 |
Mar 07 02:04:36 PM PST 24 |
126003207312 ps |
| T568 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3638998619 |
|
|
Mar 07 02:02:05 PM PST 24 |
Mar 07 02:02:11 PM PST 24 |
4764582470 ps |
| T569 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2542762029 |
|
|
Mar 07 01:59:42 PM PST 24 |
Mar 07 01:59:44 PM PST 24 |
2530887380 ps |
| T570 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2487049347 |
|
|
Mar 07 01:59:06 PM PST 24 |
Mar 07 01:59:09 PM PST 24 |
3410814557 ps |
| T571 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2499988187 |
|
|
Mar 07 01:59:08 PM PST 24 |
Mar 07 01:59:23 PM PST 24 |
4837407788 ps |
| T339 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3863350637 |
|
|
Mar 07 01:59:29 PM PST 24 |
Mar 07 02:03:29 PM PST 24 |
88837175208 ps |
| T572 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1894942238 |
|
|
Mar 07 01:58:47 PM PST 24 |
Mar 07 01:58:55 PM PST 24 |
2416259808 ps |
| T573 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2686313766 |
|
|
Mar 07 02:02:09 PM PST 24 |
Mar 07 02:02:15 PM PST 24 |
13523971602 ps |
| T574 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3129438254 |
|
|
Mar 07 02:01:58 PM PST 24 |
Mar 07 02:02:00 PM PST 24 |
2074980612 ps |
| T391 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.662918984 |
|
|
Mar 07 01:58:45 PM PST 24 |
Mar 07 01:59:03 PM PST 24 |
31641961302 ps |
| T575 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.4029816647 |
|
|
Mar 07 02:02:55 PM PST 24 |
Mar 07 02:03:01 PM PST 24 |
4036391817 ps |
| T359 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3112906335 |
|
|
Mar 07 01:58:47 PM PST 24 |
Mar 07 02:03:06 PM PST 24 |
194988180799 ps |
| T576 |
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2136190137 |
|
|
Mar 07 02:00:25 PM PST 24 |
Mar 07 02:00:32 PM PST 24 |
2472216809 ps |
| T577 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.2071541895 |
|
|
Mar 07 02:00:27 PM PST 24 |
Mar 07 02:00:29 PM PST 24 |
2023098712 ps |
| T578 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.471705753 |
|
|
Mar 07 01:59:29 PM PST 24 |
Mar 07 01:59:33 PM PST 24 |
4893491666 ps |
| T290 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2620420361 |
|
|
Mar 07 02:00:04 PM PST 24 |
Mar 07 02:00:50 PM PST 24 |
38740761638 ps |
| T579 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1061362275 |
|
|
Mar 07 01:58:48 PM PST 24 |
Mar 07 01:58:57 PM PST 24 |
2720769298 ps |
| T190 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.2955284122 |
|
|
Mar 07 02:00:23 PM PST 24 |
Mar 07 02:00:26 PM PST 24 |
2765460896 ps |
| T218 |
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2761448683 |
|
|
Mar 07 02:02:06 PM PST 24 |
Mar 07 02:02:10 PM PST 24 |
4196262355 ps |
| T219 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2859178672 |
|
|
Mar 07 02:01:05 PM PST 24 |
Mar 07 02:05:04 PM PST 24 |
89321456137 ps |
| T220 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.1023733518 |
|
|
Mar 07 02:01:10 PM PST 24 |
Mar 07 02:12:58 PM PST 24 |
275715982683 ps |
| T221 |
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1839758932 |
|
|
Mar 07 02:00:24 PM PST 24 |
Mar 07 02:00:27 PM PST 24 |
3572081546 ps |
| T222 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2962669844 |
|
|
Mar 07 02:02:01 PM PST 24 |
Mar 07 02:02:07 PM PST 24 |
2012657831 ps |
| T223 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1673108142 |
|
|
Mar 07 02:02:11 PM PST 24 |
Mar 07 02:02:13 PM PST 24 |
2042853796 ps |
| T224 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.569465943 |
|
|
Mar 07 02:01:20 PM PST 24 |
Mar 07 02:03:08 PM PST 24 |
83389367523 ps |
| T101 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.1047750562 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:03:38 PM PST 24 |
58717239030 ps |
| T217 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.82907835 |
|
|
Mar 07 02:01:59 PM PST 24 |
Mar 07 02:02:12 PM PST 24 |
10645585486 ps |
| T580 |
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.1625294322 |
|
|
Mar 07 02:00:25 PM PST 24 |
Mar 07 02:00:29 PM PST 24 |
2085068414 ps |
| T581 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.2957603350 |
|
|
Mar 07 01:59:32 PM PST 24 |
Mar 07 01:59:34 PM PST 24 |
2129899909 ps |
| T582 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1849590530 |
|
|
Mar 07 02:02:15 PM PST 24 |
Mar 07 02:03:27 PM PST 24 |
71567519556 ps |
| T583 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.205099614 |
|
|
Mar 07 01:59:58 PM PST 24 |
Mar 07 02:00:01 PM PST 24 |
2122053881 ps |
| T584 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3407173682 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:01:14 PM PST 24 |
2510474791 ps |
| T585 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3458728817 |
|
|
Mar 07 02:02:09 PM PST 24 |
Mar 07 02:02:13 PM PST 24 |
2615988748 ps |
| T586 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1321291498 |
|
|
Mar 07 02:02:16 PM PST 24 |
Mar 07 02:05:07 PM PST 24 |
67409296790 ps |
| T587 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3055230581 |
|
|
Mar 07 01:59:18 PM PST 24 |
Mar 07 01:59:56 PM PST 24 |
15683907409 ps |
| T588 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.1983574417 |
|
|
Mar 07 02:01:18 PM PST 24 |
Mar 07 02:01:19 PM PST 24 |
2129999307 ps |
| T367 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.95532896 |
|
|
Mar 07 01:59:18 PM PST 24 |
Mar 07 02:03:33 PM PST 24 |
98182441558 ps |
| T589 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.3512831778 |
|
|
Mar 07 02:02:18 PM PST 24 |
Mar 07 02:02:26 PM PST 24 |
2110804098 ps |
| T590 |
/workspace/coverage/default/17.sysrst_ctrl_alert_test.2843636928 |
|
|
Mar 07 02:00:03 PM PST 24 |
Mar 07 02:00:08 PM PST 24 |
2013923600 ps |
| T591 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2160663749 |
|
|
Mar 07 01:59:33 PM PST 24 |
Mar 07 01:59:40 PM PST 24 |
2132433600 ps |
| T161 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.2007101908 |
|
|
Mar 07 01:58:45 PM PST 24 |
Mar 07 01:58:54 PM PST 24 |
3642365376 ps |
| T248 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3067209604 |
|
|
Mar 07 02:02:24 PM PST 24 |
Mar 07 02:02:45 PM PST 24 |
75402321346 ps |
| T206 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3971261923 |
|
|
Mar 07 02:02:05 PM PST 24 |
Mar 07 02:03:11 PM PST 24 |
97411085123 ps |
| T592 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.3422183101 |
|
|
Mar 07 02:02:37 PM PST 24 |
Mar 07 02:02:39 PM PST 24 |
2038036881 ps |
| T593 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.2862623966 |
|
|
Mar 07 02:00:09 PM PST 24 |
Mar 07 02:00:11 PM PST 24 |
2159602443 ps |
| T251 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3643892840 |
|
|
Mar 07 01:59:44 PM PST 24 |
Mar 07 02:02:37 PM PST 24 |
131854343280 ps |
| T594 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1539698837 |
|
|
Mar 07 02:02:08 PM PST 24 |
Mar 07 02:02:18 PM PST 24 |
3568243585 ps |
| T595 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.2399234982 |
|
|
Mar 07 02:01:09 PM PST 24 |
Mar 07 02:01:12 PM PST 24 |
2123088498 ps |
| T102 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1017373762 |
|
|
Mar 07 02:00:26 PM PST 24 |
Mar 07 02:02:53 PM PST 24 |
61052170923 ps |
| T596 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.833611716 |
|
|
Mar 07 02:02:35 PM PST 24 |
Mar 07 02:03:37 PM PST 24 |
22829204652 ps |
| T597 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1258623995 |
|
|
Mar 07 02:02:07 PM PST 24 |
Mar 07 02:02:11 PM PST 24 |
2496069653 ps |
| T598 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2686373514 |
|
|
Mar 07 02:01:12 PM PST 24 |
Mar 07 02:01:20 PM PST 24 |
2455899343 ps |
| T599 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1773158943 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:01:11 PM PST 24 |
3154132988 ps |
| T257 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.769230942 |
|
|
Mar 07 01:58:53 PM PST 24 |
Mar 07 01:59:17 PM PST 24 |
42163087446 ps |
| T235 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.845977473 |
|
|
Mar 07 01:59:30 PM PST 24 |
Mar 07 01:59:34 PM PST 24 |
5240320222 ps |
| T273 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.1155313774 |
|
|
Mar 07 02:01:07 PM PST 24 |
Mar 07 02:01:14 PM PST 24 |
2612087106 ps |
| T274 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.402518697 |
|
|
Mar 07 01:58:48 PM PST 24 |
Mar 07 01:58:55 PM PST 24 |
2042339466 ps |
| T275 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1709950235 |
|
|
Mar 07 01:58:48 PM PST 24 |
Mar 07 01:58:52 PM PST 24 |
2323572802 ps |
| T276 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1424364660 |
|
|
Mar 07 02:02:15 PM PST 24 |
Mar 07 02:05:19 PM PST 24 |
139362618580 ps |
| T277 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.262552585 |
|
|
Mar 07 02:02:07 PM PST 24 |
Mar 07 02:02:10 PM PST 24 |
2026671860 ps |
| T278 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.4293625471 |
|
|
Mar 07 01:59:31 PM PST 24 |
Mar 07 01:59:32 PM PST 24 |
6854138916 ps |
| T279 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3416823565 |
|
|
Mar 07 02:01:21 PM PST 24 |
Mar 07 02:01:24 PM PST 24 |
3670221146 ps |
| T280 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1620210814 |
|
|
Mar 07 02:02:08 PM PST 24 |
Mar 07 02:03:14 PM PST 24 |
24582226845 ps |
| T388 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.311832253 |
|
|
Mar 07 02:02:35 PM PST 24 |
Mar 07 02:02:47 PM PST 24 |
25616669095 ps |
| T209 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.3866742709 |
|
|
Mar 07 02:01:40 PM PST 24 |
Mar 07 02:01:46 PM PST 24 |
7628176222 ps |
| T600 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.4004182495 |
|
|
Mar 07 02:00:23 PM PST 24 |
Mar 07 02:00:25 PM PST 24 |
3074088806 ps |
| T601 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1119657308 |
|
|
Mar 07 01:59:30 PM PST 24 |
Mar 07 02:00:40 PM PST 24 |
26331300799 ps |
| T602 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1748876783 |
|
|
Mar 07 01:59:17 PM PST 24 |
Mar 07 01:59:25 PM PST 24 |
2608602188 ps |
| T603 |
/workspace/coverage/default/15.sysrst_ctrl_smoke.440758403 |
|
|
Mar 07 01:59:44 PM PST 24 |
Mar 07 01:59:48 PM PST 24 |
2118007847 ps |
| T604 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1572735460 |
|
|
Mar 07 01:58:46 PM PST 24 |
Mar 07 01:58:49 PM PST 24 |
4318045387 ps |
| T605 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.4044019137 |
|
|
Mar 07 02:01:58 PM PST 24 |
Mar 07 02:02:00 PM PST 24 |
2643285900 ps |
| T606 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.162185559 |
|
|
Mar 07 02:01:09 PM PST 24 |
Mar 07 02:01:11 PM PST 24 |
8708297058 ps |
| T376 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1910867470 |
|
|
Mar 07 02:02:14 PM PST 24 |
Mar 07 02:05:41 PM PST 24 |
158785223285 ps |
| T77 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.4036245340 |
|
|
Mar 07 02:01:09 PM PST 24 |
Mar 07 02:01:14 PM PST 24 |
646536894983 ps |
| T607 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.746915617 |
|
|
Mar 07 01:59:43 PM PST 24 |
Mar 07 01:59:45 PM PST 24 |
3216428304 ps |
| T291 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1613684569 |
|
|
Mar 07 01:59:29 PM PST 24 |
Mar 07 01:59:58 PM PST 24 |
57595071392 ps |
| T608 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.947849257 |
|
|
Mar 07 01:59:01 PM PST 24 |
Mar 07 01:59:08 PM PST 24 |
2190525017 ps |
| T609 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2030398673 |
|
|
Mar 07 02:00:06 PM PST 24 |
Mar 07 02:00:08 PM PST 24 |
2640489415 ps |
| T610 |
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2012824130 |
|
|
Mar 07 02:02:04 PM PST 24 |
Mar 07 02:02:09 PM PST 24 |
2515113351 ps |
| T611 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.3148822983 |
|
|
Mar 07 01:59:43 PM PST 24 |
Mar 07 01:59:44 PM PST 24 |
2129828748 ps |
| T612 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.1678488646 |
|
|
Mar 07 02:00:24 PM PST 24 |
Mar 07 02:01:42 PM PST 24 |
123417205603 ps |
| T613 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.2114899956 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:01:14 PM PST 24 |
2108373171 ps |
| T614 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3230143103 |
|
|
Mar 07 02:01:06 PM PST 24 |
Mar 07 02:26:07 PM PST 24 |
564951716572 ps |
| T615 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1692023830 |
|
|
Mar 07 01:59:59 PM PST 24 |
Mar 07 02:00:03 PM PST 24 |
2235214948 ps |
| T616 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.448568039 |
|
|
Mar 07 01:58:58 PM PST 24 |
Mar 07 01:59:06 PM PST 24 |
3108123670 ps |
| T617 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.3208282700 |
|
|
Mar 07 02:01:18 PM PST 24 |
Mar 07 02:01:19 PM PST 24 |
3704687420 ps |
| T378 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2604125859 |
|
|
Mar 07 02:01:09 PM PST 24 |
Mar 07 02:06:40 PM PST 24 |
127817106143 ps |
| T618 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2453368968 |
|
|
Mar 07 02:01:58 PM PST 24 |
Mar 07 02:02:02 PM PST 24 |
2464393114 ps |
| T619 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.2604904731 |
|
|
Mar 07 02:01:40 PM PST 24 |
Mar 07 02:01:47 PM PST 24 |
2010349701 ps |
| T620 |
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.577824395 |
|
|
Mar 07 01:59:00 PM PST 24 |
Mar 07 01:59:03 PM PST 24 |
2157007536 ps |
| T621 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1710217576 |
|
|
Mar 07 01:59:41 PM PST 24 |
Mar 07 01:59:44 PM PST 24 |
3391111254 ps |
| T622 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2236211699 |
|
|
Mar 07 02:02:08 PM PST 24 |
Mar 07 02:02:30 PM PST 24 |
15438896182 ps |
| T623 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.1580587418 |
|
|
Mar 07 02:01:04 PM PST 24 |
Mar 07 02:01:06 PM PST 24 |
2128644599 ps |
| T624 |
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.863004969 |
|
|
Mar 07 01:59:58 PM PST 24 |
Mar 07 02:00:02 PM PST 24 |
2460880924 ps |
| T625 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.2264678893 |
|
|
Mar 07 02:01:20 PM PST 24 |
Mar 07 02:01:26 PM PST 24 |
2114977069 ps |
| T245 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2570277917 |
|
|
Mar 07 01:59:17 PM PST 24 |
Mar 07 01:59:36 PM PST 24 |
26682848610 ps |
| T626 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.438868400 |
|
|
Mar 07 02:01:21 PM PST 24 |
Mar 07 02:02:33 PM PST 24 |
27832427396 ps |
| T627 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3808582797 |
|
|
Mar 07 02:02:25 PM PST 24 |
Mar 07 02:03:37 PM PST 24 |
26833414934 ps |
| T628 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3632669372 |
|
|
Mar 07 01:58:49 PM PST 24 |
Mar 07 01:58:58 PM PST 24 |
2514503230 ps |
| T368 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3934633166 |
|
|
Mar 07 01:59:44 PM PST 24 |
Mar 07 02:00:22 PM PST 24 |
78077458686 ps |
| T84 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.3051760435 |
|
|
Mar 07 02:01:07 PM PST 24 |
Mar 07 02:01:52 PM PST 24 |
66263136844 ps |
| T147 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1273238053 |
|
|
Mar 07 02:01:57 PM PST 24 |
Mar 07 02:02:01 PM PST 24 |
2516630741 ps |
| T148 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.4048730925 |
|
|
Mar 07 01:59:18 PM PST 24 |
Mar 07 01:59:22 PM PST 24 |
2464344789 ps |
| T149 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.937497040 |
|
|
Mar 07 02:01:08 PM PST 24 |
Mar 07 02:01:10 PM PST 24 |
3445742333 ps |
| T150 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.1367203626 |
|
|
Mar 07 01:58:52 PM PST 24 |
Mar 07 01:58:55 PM PST 24 |
2026416298 ps |
| T103 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.126486676 |
|
|
Mar 07 02:02:09 PM PST 24 |
Mar 07 02:02:26 PM PST 24 |
83513894940 ps |
| T151 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2441471820 |
|
|
Mar 07 02:02:37 PM PST 24 |
Mar 07 02:11:54 PM PST 24 |
219753836310 ps |
| T152 |
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1130870799 |
|
|
Mar 07 02:01:58 PM PST 24 |
Mar 07 02:02:05 PM PST 24 |
2224620425 ps |
| T153 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.781852977 |
|
|
Mar 07 02:01:11 PM PST 24 |
Mar 07 02:02:17 PM PST 24 |
30089739002 ps |
| T85 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.320463197 |
|
|
Mar 07 01:59:06 PM PST 24 |
Mar 07 02:00:25 PM PST 24 |
95971446240 ps |
| T629 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.1473063145 |
|
|
Mar 07 02:01:10 PM PST 24 |
Mar 07 02:01:16 PM PST 24 |
2013714967 ps |
| T630 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.2148743350 |
|
|
Mar 07 02:01:04 PM PST 24 |
Mar 07 02:01:15 PM PST 24 |
3789721883 ps |