Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.84 99.34 96.33 100.00 96.79 98.71 99.53 94.16


Total tests in report: 910
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
43.49 43.49 60.70 60.70 45.70 45.70 82.12 82.12 0.00 0.00 65.82 65.82 48.50 48.50 1.58 1.58 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3638428089
73.09 29.60 87.60 26.90 77.99 32.29 90.32 8.20 47.44 47.44 87.40 21.58 79.31 30.81 41.59 40.01 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2304644249
83.80 10.71 95.88 8.28 89.74 11.76 92.37 2.05 78.85 31.41 95.02 7.62 89.79 10.49 44.95 3.36 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.193186540
86.62 2.81 96.68 0.80 90.46 0.72 93.74 1.37 85.26 6.41 95.58 0.56 91.39 1.59 53.21 8.25 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2723681528
88.51 1.89 96.91 0.23 90.89 0.43 93.74 0.00 85.26 0.00 95.86 0.28 91.67 0.28 65.25 12.04 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.920290573
89.85 1.34 97.17 0.26 91.41 0.52 93.74 0.00 86.54 1.28 96.07 0.21 95.69 4.03 68.35 3.10 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1424891576
91.08 1.23 97.24 0.07 92.68 1.26 94.42 0.68 86.54 0.00 96.17 0.10 95.69 0.00 74.82 6.47 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1272556253
91.93 0.86 97.90 0.66 92.94 0.26 98.18 3.76 86.54 0.00 97.32 1.15 95.69 0.00 74.97 0.16 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.4134864105
92.69 0.76 98.21 0.31 93.23 0.29 98.18 0.00 89.10 2.56 97.56 0.24 96.54 0.84 76.03 1.05 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3834583185
93.35 0.65 98.47 0.26 93.39 0.17 98.18 0.00 91.67 2.56 97.81 0.24 97.19 0.66 76.71 0.68 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.253071558
93.85 0.50 98.49 0.02 93.42 0.02 98.18 0.00 91.67 0.00 97.84 0.03 97.28 0.09 80.07 3.36 /workspace/coverage/default/23.sysrst_ctrl_stress_all.3787359699
94.25 0.40 98.63 0.14 93.44 0.02 98.18 0.00 91.67 0.00 97.84 0.00 97.28 0.00 82.70 2.63 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2969710973
94.59 0.34 98.66 0.03 93.47 0.02 98.18 0.00 92.31 0.64 97.88 0.03 97.38 0.09 84.28 1.58 /workspace/coverage/default/17.sysrst_ctrl_stress_all.4184010568
94.89 0.30 98.72 0.05 93.51 0.05 98.18 0.00 92.95 0.64 97.95 0.07 97.75 0.37 85.17 0.89 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.3051760435
95.13 0.24 98.77 0.05 93.58 0.07 99.54 1.37 92.95 0.00 97.95 0.00 97.75 0.00 85.33 0.16 /workspace/coverage/default/15.sysrst_ctrl_alert_test.4051782560
95.35 0.22 98.77 0.00 93.61 0.02 99.54 0.00 92.95 0.00 97.95 0.00 97.75 0.00 86.86 1.52 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.1400485870
95.55 0.20 98.80 0.03 93.61 0.00 99.54 0.00 92.95 0.00 97.95 0.00 97.75 0.00 88.22 1.37 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1532660976
95.74 0.19 98.94 0.14 94.32 0.72 99.54 0.00 92.95 0.00 98.22 0.28 97.94 0.19 88.22 0.00 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_same_csr_outstanding.2312559109
95.89 0.16 98.94 0.00 94.32 0.00 99.54 0.00 92.95 0.00 98.22 0.00 98.50 0.56 88.75 0.53 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3351661025
96.03 0.14 98.98 0.03 94.35 0.02 99.54 0.00 93.59 0.64 98.26 0.03 98.60 0.09 88.91 0.16 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.4182108346
96.17 0.14 98.98 0.00 95.28 0.93 99.54 0.00 93.59 0.00 98.26 0.00 98.60 0.00 88.96 0.05 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2747732128
96.30 0.13 99.01 0.03 95.30 0.02 99.54 0.00 94.23 0.64 98.29 0.03 98.69 0.09 89.01 0.05 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2170854230
96.42 0.13 99.06 0.05 95.33 0.02 99.54 0.00 94.87 0.64 98.36 0.07 98.78 0.09 89.01 0.00 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.2673168883
96.55 0.13 99.11 0.05 95.35 0.02 99.54 0.00 95.51 0.64 98.43 0.07 98.88 0.09 89.01 0.00 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.2955284122
96.67 0.12 99.15 0.03 95.37 0.02 99.54 0.00 96.15 0.64 98.47 0.03 98.97 0.09 89.01 0.00 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.4093872487
96.79 0.12 99.18 0.03 95.40 0.02 99.54 0.00 96.79 0.64 98.50 0.03 99.06 0.09 89.01 0.00 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.133191758
96.90 0.11 99.20 0.02 95.44 0.05 99.54 0.00 96.79 0.00 98.50 0.00 99.16 0.09 89.64 0.63 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3104409177
97.00 0.10 99.20 0.00 95.44 0.00 99.54 0.00 96.79 0.00 98.50 0.00 99.16 0.00 90.33 0.68 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2813508901
97.09 0.10 99.20 0.00 95.47 0.02 100.00 0.46 96.79 0.00 98.50 0.00 99.25 0.09 90.43 0.11 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2231648181
97.15 0.06 99.20 0.00 95.47 0.00 100.00 0.00 96.79 0.00 98.50 0.00 99.25 0.00 90.85 0.42 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2071492916
97.21 0.06 99.20 0.00 95.78 0.31 100.00 0.00 96.79 0.00 98.50 0.00 99.34 0.09 90.85 0.00 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1477196662
97.27 0.06 99.22 0.02 96.16 0.38 100.00 0.00 96.79 0.00 98.50 0.00 99.34 0.00 90.85 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.3162584150
97.32 0.06 99.22 0.00 96.18 0.02 100.00 0.00 96.79 0.00 98.50 0.00 99.34 0.00 91.22 0.37 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.1869041408
97.38 0.05 99.22 0.00 96.21 0.02 100.00 0.00 96.79 0.00 98.50 0.00 99.44 0.09 91.48 0.26 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2587541603
97.42 0.05 99.22 0.00 96.21 0.00 100.00 0.00 96.79 0.00 98.50 0.00 99.44 0.00 91.80 0.32 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1244537641
97.46 0.03 99.24 0.02 96.23 0.02 100.00 0.00 96.79 0.00 98.50 0.00 99.53 0.09 91.90 0.11 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.64516671
97.49 0.03 99.24 0.00 96.23 0.00 100.00 0.00 96.79 0.00 98.50 0.00 99.53 0.00 92.11 0.21 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3863350637
97.52 0.03 99.24 0.00 96.23 0.00 100.00 0.00 96.79 0.00 98.50 0.00 99.53 0.00 92.32 0.21 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3715172762
97.54 0.02 99.24 0.00 96.23 0.00 100.00 0.00 96.79 0.00 98.50 0.00 99.53 0.00 92.48 0.16 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3112906335
97.56 0.02 99.24 0.00 96.23 0.00 100.00 0.00 96.79 0.00 98.50 0.00 99.53 0.00 92.64 0.16 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.979398609
97.58 0.02 99.24 0.00 96.23 0.00 100.00 0.00 96.79 0.00 98.50 0.00 99.53 0.00 92.80 0.16 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.95532896
97.61 0.02 99.29 0.05 96.23 0.00 100.00 0.00 96.79 0.00 98.61 0.10 99.53 0.00 92.80 0.00 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3003324670
97.63 0.02 99.29 0.00 96.28 0.05 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 92.90 0.11 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.755277201
97.65 0.02 99.29 0.00 96.30 0.02 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.01 0.11 /workspace/coverage/default/18.sysrst_ctrl_stress_all.2357079766
97.66 0.02 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.11 0.11 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.4036245340
97.68 0.02 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.22 0.11 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.2034293717
97.69 0.02 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.32 0.11 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1910867470
97.70 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.38 0.05 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1089950587
97.71 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.43 0.05 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3898754796
97.72 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.48 0.05 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2475438147
97.72 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.53 0.05 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.662918984
97.73 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.59 0.05 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3947402660
97.74 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.64 0.05 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.3413214130
97.75 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.69 0.05 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.3643892840
97.75 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.74 0.05 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3515140426
97.76 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.80 0.05 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.2746032390
97.77 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.85 0.05 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2711443653
97.78 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.90 0.05 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2604125859
97.78 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 93.95 0.05 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1250097252
97.79 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 94.01 0.05 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.3071072225
97.80 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 94.06 0.05 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2662113535
97.81 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 94.11 0.05 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1354376214
97.81 0.01 99.29 0.00 96.30 0.00 100.00 0.00 96.79 0.00 98.61 0.00 99.53 0.00 94.16 0.05 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2441471820
97.82 0.01 99.31 0.02 96.30 0.00 100.00 0.00 96.79 0.00 98.64 0.03 99.53 0.00 94.16 0.00 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.2007101908
97.83 0.01 99.32 0.02 96.30 0.00 100.00 0.00 96.79 0.00 98.68 0.03 99.53 0.00 94.16 0.00 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3644295968
97.84 0.01 99.34 0.02 96.30 0.00 100.00 0.00 96.79 0.00 98.71 0.03 99.53 0.00 94.16 0.00 /workspace/coverage/default/5.sysrst_ctrl_stress_all.320463197

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.26172003
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.774096255
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2983548715
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.4084697363
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.273087802
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3262801763
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2354703553
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2861229756
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.4251239939
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2902680489
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1953598896
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3047864153
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.597099899
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2495660447
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3245598138
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3583120829
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2741205117
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2415461266
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2361325373
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3030060073
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4112127110
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.971508329
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.4126695571
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1532611396
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1953434954
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.424595845
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.199892532
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1242354318
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2524361199
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2450196123
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1571970162
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.4049189704
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1773798987
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3645670183
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.4247137494
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3510727370
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.3846320281
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.930787117
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1332859773
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1832384258
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1976066589
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3133898078
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.760767355
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.439549567
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3078057928
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2323139974
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.875061909
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.685601798
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.734609723
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2742335070
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2758035912
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2749322071
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.95678440
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.400326547
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3639758750
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.526962738
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1623828446
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2622371215
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2853131248
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.4169841416
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.312332251
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.3555912279
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2906149716
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3787999155
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.4276452873
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.1750124477
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3095552610
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.943961996
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2532021674
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.2238544772
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.1693413230
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2919065593
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3851386464
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.3693690094
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.3586826624
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1385472908
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1281817127
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2638510033
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.2792362531
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.3227280534
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.201444618
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.2925789943
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.185660820
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.1538131158
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.3072975876
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.3302049589
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/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1847781758
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3022133636
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3066630686
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2177177478
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1130870799
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1273238053
/workspace/coverage/default/42.sysrst_ctrl_smoke.871323887
/workspace/coverage/default/42.sysrst_ctrl_stress_all.943187895
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3641838072
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3215367913
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1966040344
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.319147246
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.931592957
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.829744395
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3735446232
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1012079323
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2453368968
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3128904988
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4019859234
/workspace/coverage/default/43.sysrst_ctrl_smoke.10951560
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3691925943
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4063247521
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1590350093
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2962669844
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1949425156
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2497090461
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1746582992
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.4283193870
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.319466258
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3225535792
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1547803569
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4253966427
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2012824130
/workspace/coverage/default/44.sysrst_ctrl_smoke.678911578
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1878911256
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2966969676
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1905901468
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2090879744
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1318128272
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2761448683
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4240133586
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1258623995
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.262552585
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2899322860
/workspace/coverage/default/45.sysrst_ctrl_smoke.1922222176
/workspace/coverage/default/45.sysrst_ctrl_stress_all.1902447323
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1334863499
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.931894776
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3046290836
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2226186776
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.903070589
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1620210814
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1623467971
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2160338628
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2753541331
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1226851967
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2123399122
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1908114580
/workspace/coverage/default/46.sysrst_ctrl_smoke.3940049811
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1999576133
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3971261923
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3638998619
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3300275202
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1321256967
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.126486676
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2843682295
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.789506484
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3168715055
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.4234794936
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2388494527
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2378442527
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1125027638
/workspace/coverage/default/47.sysrst_ctrl_smoke.1822614681
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2686313766
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2236211699
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3857704080
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1673108142
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1539698837
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2601590696
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3023737982
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.220573343
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.413680208
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3458728817
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1329036159
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3164232326
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3058045199
/workspace/coverage/default/48.sysrst_ctrl_smoke.2829648701
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3261877615
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2320238646
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2831394668
/workspace/coverage/default/49.sysrst_ctrl_alert_test.354241113
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.213320973
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1849590530
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1150349527
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1619911517
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1676282661
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.246998634
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2562374550
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2838398751
/workspace/coverage/default/49.sysrst_ctrl_smoke.3512831778
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1324264007
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.984938801
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2431762498
/workspace/coverage/default/5.sysrst_ctrl_alert_test.239604228
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1002230657
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2627660537
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3509709955
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1249187562
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1873728362
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1568965762
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.577824395
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2389027492
/workspace/coverage/default/5.sysrst_ctrl_smoke.3776431240
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3697796930
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4038963842
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2780309314
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3014230563
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1352901248
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1424364660
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1321291498
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1087151535
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.34943163
/workspace/coverage/default/6.sysrst_ctrl_alert_test.790213784
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2487049347
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3361905714
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.4200564147
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2499988187
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3334243195
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.983903644
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3858991592
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1329239377
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2736017342
/workspace/coverage/default/6.sysrst_ctrl_smoke.962754286
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3055230581
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1312984156
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.4034442697
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.934831168
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2950324572
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.861804370
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.4265828092
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2813171791
/workspace/coverage/default/7.sysrst_ctrl_alert_test.450684387
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1443172428
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2570277917
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2317522224
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1008317596
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2462674092
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.4048730925
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.386303094
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3629741174
/workspace/coverage/default/7.sysrst_ctrl_smoke.1442981687
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1571670297
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.4123297211
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1078411039
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3808582797
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1671557153
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2617382745
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3930639936
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3875398368
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3358403630
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3091487283
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1746850486
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.69627942
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3621493032
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1194514161
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3338818676
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1748876783
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2613839551
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2955581325
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1532253285
/workspace/coverage/default/8.sysrst_ctrl_smoke.1905251897
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1613684569
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1730869905
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3067209604
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.844037909
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1376047129
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3699758177
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2476439628
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4207494934
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2348686862
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3165949936
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3100199698
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.817155574
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1119657308
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3232273158
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.845977473
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2713997941
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.805035596
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2528245514
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.264742498
/workspace/coverage/default/9.sysrst_ctrl_smoke.1900699967
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3745468876
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.470328529
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.311832253
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.4081820489
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.833611716
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4164132543
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.288499701
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2409932681
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.740206706
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.881505084
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.632554147



Total test records in report: 910
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.545922704 Mar 07 02:01:57 PM PST 24 Mar 07 02:01:59 PM PST 24 2857682778 ps
T5 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.840125730 Mar 07 01:58:49 PM PST 24 Mar 07 01:59:02 PM PST 24 4458905810 ps
T6 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3638428089 Mar 07 02:01:09 PM PST 24 Mar 07 02:01:16 PM PST 24 2608140183 ps
T42 /workspace/coverage/default/40.sysrst_ctrl_smoke.739935703 Mar 07 02:01:59 PM PST 24 Mar 07 02:02:01 PM PST 24 2136422672 ps
T43 /workspace/coverage/default/21.sysrst_ctrl_smoke.726217221 Mar 07 02:00:08 PM PST 24 Mar 07 02:00:10 PM PST 24 2159997593 ps
T44 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3509709955 Mar 07 01:59:05 PM PST 24 Mar 07 01:59:13 PM PST 24 2847079566 ps
T45 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.785570254 Mar 07 02:02:37 PM PST 24 Mar 07 02:02:40 PM PST 24 5080180796 ps
T46 /workspace/coverage/default/33.sysrst_ctrl_stress_all.1001687759 Mar 07 02:01:07 PM PST 24 Mar 07 02:01:15 PM PST 24 10881761435 ps
T47 /workspace/coverage/default/28.sysrst_ctrl_smoke.3203413517 Mar 07 02:01:05 PM PST 24 Mar 07 02:01:07 PM PST 24 2119922676 ps
T48 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2460181592 Mar 07 02:01:24 PM PST 24 Mar 07 02:01:32 PM PST 24 3043800204 ps
T71 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.714906110 Mar 07 01:58:58 PM PST 24 Mar 07 01:59:09 PM PST 24 3580682940 ps
T55 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.4134864105 Mar 07 02:01:05 PM PST 24 Mar 07 02:01:07 PM PST 24 2492561990 ps
T72 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.1679987950 Mar 07 02:01:09 PM PST 24 Mar 07 02:01:12 PM PST 24 2188963141 ps
T54 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.4081820489 Mar 07 02:02:35 PM PST 24 Mar 07 02:03:41 PM PST 24 23829763011 ps
T57 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.2037693421 Mar 07 02:01:06 PM PST 24 Mar 07 02:01:09 PM PST 24 3727539771 ps
T56 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1483857642 Mar 07 01:59:42 PM PST 24 Mar 07 01:59:47 PM PST 24 2614433252 ps
T1 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.740206706 Mar 07 02:02:36 PM PST 24 Mar 07 02:04:51 PM PST 24 101510275754 ps
T25 /workspace/coverage/default/8.sysrst_ctrl_smoke.1905251897 Mar 07 01:59:17 PM PST 24 Mar 07 01:59:24 PM PST 24 2111844841 ps
T2 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.1535729956 Mar 07 02:01:07 PM PST 24 Mar 07 02:01:10 PM PST 24 2502797974 ps
T26 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.2497090461 Mar 07 02:02:05 PM PST 24 Mar 07 02:03:59 PM PST 24 88377871228 ps
T3 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3104409177 Mar 07 02:02:16 PM PST 24 Mar 07 02:05:00 PM PST 24 63379366511 ps
T27 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1563688312 Mar 07 02:01:12 PM PST 24 Mar 07 02:01:14 PM PST 24 2496600384 ps
T28 /workspace/coverage/default/25.sysrst_ctrl_stress_all.1182202013 Mar 07 02:01:07 PM PST 24 Mar 07 02:01:24 PM PST 24 6474953086 ps
T29 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2863736801 Mar 07 02:01:17 PM PST 24 Mar 07 02:01:24 PM PST 24 2613394435 ps
T30 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1278564557 Mar 07 01:59:30 PM PST 24 Mar 07 01:59:32 PM PST 24 2663447188 ps
T31 /workspace/coverage/default/16.sysrst_ctrl_alert_test.2328377968 Mar 07 01:59:57 PM PST 24 Mar 07 01:59:59 PM PST 24 2044548117 ps
T32 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.193186540 Mar 07 01:58:47 PM PST 24 Mar 07 01:59:12 PM PST 24 34237555625 ps
T7 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2348381297 Mar 07 02:01:12 PM PST 24 Mar 07 02:01:20 PM PST 24 7913279184 ps
T33 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.3624695506 Mar 07 02:01:11 PM PST 24 Mar 07 02:01:18 PM PST 24 2436377443 ps
T34 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.434921743 Mar 07 01:58:48 PM PST 24 Mar 07 01:58:51 PM PST 24 5176907972 ps
T8 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2723681528 Mar 07 01:58:59 PM PST 24 Mar 07 02:00:38 PM PST 24 141790340314 ps
T35 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.1551332465 Mar 07 02:00:11 PM PST 24 Mar 07 02:00:15 PM PST 24 2470033713 ps
T9 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2304644249 Mar 07 02:01:23 PM PST 24 Mar 07 02:03:54 PM PST 24 126703248114 ps
T36 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1323052596 Mar 07 02:01:57 PM PST 24 Mar 07 02:02:01 PM PST 24 2619471793 ps
T10 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1120192233 Mar 07 02:01:08 PM PST 24 Mar 07 02:02:58 PM PST 24 41588595646 ps
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T288 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1484442610 Mar 07 02:01:58 PM PST 24 Mar 07 02:02:01 PM PST 24 3018012652 ps
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T473 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.521659750 Mar 07 01:58:57 PM PST 24 Mar 07 01:59:04 PM PST 24 2510385232 ps
T474 /workspace/coverage/default/0.sysrst_ctrl_stress_all.2605226396 Mar 07 01:58:47 PM PST 24 Mar 07 01:59:04 PM PST 24 6224102248 ps
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T476 /workspace/coverage/default/4.sysrst_ctrl_stress_all.202868703 Mar 07 01:58:58 PM PST 24 Mar 07 01:59:15 PM PST 24 11766112912 ps
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