| T429 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1418350500 |
|
|
Mar 10 01:58:40 PM PDT 24 |
Mar 10 01:58:43 PM PDT 24 |
2627573672 ps |
| T327 |
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3541917699 |
|
|
Mar 10 02:00:15 PM PDT 24 |
Mar 10 02:02:25 PM PDT 24 |
95874445372 ps |
| T430 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.2768807458 |
|
|
Mar 10 01:59:18 PM PDT 24 |
Mar 10 01:59:27 PM PDT 24 |
11440660595 ps |
| T431 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.4036113557 |
|
|
Mar 10 01:59:19 PM PDT 24 |
Mar 10 01:59:27 PM PDT 24 |
2613422240 ps |
| T432 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.3833529165 |
|
|
Mar 10 01:59:32 PM PDT 24 |
Mar 10 01:59:53 PM PDT 24 |
360241093365 ps |
| T433 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.773917141 |
|
|
Mar 10 01:58:28 PM PDT 24 |
Mar 10 01:58:34 PM PDT 24 |
2613256257 ps |
| T434 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1167102403 |
|
|
Mar 10 02:00:01 PM PDT 24 |
Mar 10 02:00:07 PM PDT 24 |
2612011844 ps |
| T349 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1313064995 |
|
|
Mar 10 02:00:24 PM PDT 24 |
Mar 10 02:05:04 PM PDT 24 |
105811285137 ps |
| T435 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3598156798 |
|
|
Mar 10 01:59:38 PM PDT 24 |
Mar 10 01:59:44 PM PDT 24 |
2165068918 ps |
| T436 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.2764054792 |
|
|
Mar 10 01:58:32 PM PDT 24 |
Mar 10 01:58:38 PM PDT 24 |
2198374140 ps |
| T249 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.2009668165 |
|
|
Mar 10 02:00:01 PM PDT 24 |
Mar 10 02:00:48 PM PDT 24 |
147995592586 ps |
| T437 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3546212560 |
|
|
Mar 10 01:59:41 PM PDT 24 |
Mar 10 01:59:49 PM PDT 24 |
2614010886 ps |
| T338 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.297337303 |
|
|
Mar 10 01:59:10 PM PDT 24 |
Mar 10 01:59:28 PM PDT 24 |
86461968344 ps |
| T179 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1200671879 |
|
|
Mar 10 01:59:59 PM PDT 24 |
Mar 10 02:00:14 PM PDT 24 |
32285334700 ps |
| T438 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2865160924 |
|
|
Mar 10 02:00:06 PM PDT 24 |
Mar 10 02:00:15 PM PDT 24 |
3409575654 ps |
| T439 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.4212195082 |
|
|
Mar 10 01:58:39 PM PDT 24 |
Mar 10 01:58:46 PM PDT 24 |
2014519291 ps |
| T440 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.860335917 |
|
|
Mar 10 01:58:52 PM PDT 24 |
Mar 10 01:59:03 PM PDT 24 |
13182248966 ps |
| T441 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.1942743444 |
|
|
Mar 10 01:58:33 PM PDT 24 |
Mar 10 01:58:34 PM PDT 24 |
2128828844 ps |
| T305 |
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3173399702 |
|
|
Mar 10 01:58:38 PM PDT 24 |
Mar 10 01:58:45 PM PDT 24 |
6542553805 ps |
| T442 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3959295286 |
|
|
Mar 10 02:00:07 PM PDT 24 |
Mar 10 02:00:11 PM PDT 24 |
2512513092 ps |
| T443 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.1190011582 |
|
|
Mar 10 01:59:14 PM PDT 24 |
Mar 10 01:59:23 PM PDT 24 |
12252010176 ps |
| T444 |
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.1005684443 |
|
|
Mar 10 01:59:06 PM PDT 24 |
Mar 10 01:59:08 PM PDT 24 |
2059234200 ps |
| T445 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.1801006323 |
|
|
Mar 10 01:59:47 PM PDT 24 |
Mar 10 01:59:53 PM PDT 24 |
2013638901 ps |
| T446 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3474889802 |
|
|
Mar 10 01:58:41 PM PDT 24 |
Mar 10 01:58:45 PM PDT 24 |
2743510728 ps |
| T321 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3431725263 |
|
|
Mar 10 02:00:21 PM PDT 24 |
Mar 10 02:01:04 PM PDT 24 |
60516724184 ps |
| T331 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2439775060 |
|
|
Mar 10 02:00:21 PM PDT 24 |
Mar 10 02:03:02 PM PDT 24 |
61408313669 ps |
| T447 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.459344171 |
|
|
Mar 10 01:59:18 PM PDT 24 |
Mar 10 01:59:30 PM PDT 24 |
14397944048 ps |
| T448 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.3235396293 |
|
|
Mar 10 01:58:29 PM PDT 24 |
Mar 10 01:58:30 PM PDT 24 |
2513942491 ps |
| T449 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2873206636 |
|
|
Mar 10 02:00:04 PM PDT 24 |
Mar 10 02:00:11 PM PDT 24 |
2609496878 ps |
| T450 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3465731645 |
|
|
Mar 10 02:01:55 PM PDT 24 |
Mar 10 02:01:56 PM PDT 24 |
2592366126 ps |
| T256 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3017547975 |
|
|
Mar 10 01:59:17 PM PDT 24 |
Mar 10 01:59:49 PM PDT 24 |
14201224167 ps |
| T451 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.54099416 |
|
|
Mar 10 01:59:43 PM PDT 24 |
Mar 10 01:59:46 PM PDT 24 |
2120981147 ps |
| T452 |
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3589052806 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:00:07 PM PDT 24 |
2238397126 ps |
| T453 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.4207089191 |
|
|
Mar 10 01:58:27 PM PDT 24 |
Mar 10 01:58:34 PM PDT 24 |
2169734742 ps |
| T341 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.128592319 |
|
|
Mar 10 01:59:10 PM PDT 24 |
Mar 10 02:02:37 PM PDT 24 |
76165711029 ps |
| T454 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3920854466 |
|
|
Mar 10 01:58:39 PM PDT 24 |
Mar 10 01:58:41 PM PDT 24 |
4236883471 ps |
| T234 |
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1043224511 |
|
|
Mar 10 02:00:14 PM PDT 24 |
Mar 10 02:00:22 PM PDT 24 |
47944496016 ps |
| T455 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1761933481 |
|
|
Mar 10 01:59:49 PM PDT 24 |
Mar 10 01:59:54 PM PDT 24 |
3030954677 ps |
| T456 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3050304812 |
|
|
Mar 10 01:59:36 PM PDT 24 |
Mar 10 01:59:39 PM PDT 24 |
2466563997 ps |
| T457 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.392886124 |
|
|
Mar 10 01:59:54 PM PDT 24 |
Mar 10 02:00:02 PM PDT 24 |
2611665485 ps |
| T458 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.16415969 |
|
|
Mar 10 01:59:03 PM PDT 24 |
Mar 10 01:59:05 PM PDT 24 |
2061004897 ps |
| T459 |
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.4231764455 |
|
|
Mar 10 01:59:36 PM PDT 24 |
Mar 10 01:59:37 PM PDT 24 |
3510031048 ps |
| T460 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1440999196 |
|
|
Mar 10 01:58:32 PM PDT 24 |
Mar 10 01:58:36 PM PDT 24 |
2534056258 ps |
| T461 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.4227649476 |
|
|
Mar 10 01:59:32 PM PDT 24 |
Mar 10 01:59:34 PM PDT 24 |
2125368748 ps |
| T462 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.310743015 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:00:05 PM PDT 24 |
3336915246 ps |
| T463 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.754987080 |
|
|
Mar 10 01:58:46 PM PDT 24 |
Mar 10 01:58:49 PM PDT 24 |
2536334028 ps |
| T464 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2678132869 |
|
|
Mar 10 02:00:02 PM PDT 24 |
Mar 10 02:00:05 PM PDT 24 |
2524850817 ps |
| T96 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.2500474074 |
|
|
Mar 10 01:59:18 PM PDT 24 |
Mar 10 01:59:37 PM PDT 24 |
625383742300 ps |
| T191 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.3282564545 |
|
|
Mar 10 01:59:10 PM PDT 24 |
Mar 10 01:59:17 PM PDT 24 |
3344025846 ps |
| T465 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.4211168596 |
|
|
Mar 10 01:58:40 PM PDT 24 |
Mar 10 01:58:47 PM PDT 24 |
2168028849 ps |
| T466 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.1316345898 |
|
|
Mar 10 01:58:44 PM PDT 24 |
Mar 10 01:58:47 PM PDT 24 |
4918359557 ps |
| T467 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.2851057818 |
|
|
Mar 10 02:01:55 PM PDT 24 |
Mar 10 02:01:57 PM PDT 24 |
2133868057 ps |
| T468 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.628852038 |
|
|
Mar 10 02:00:06 PM PDT 24 |
Mar 10 02:00:08 PM PDT 24 |
2535212434 ps |
| T323 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3816153002 |
|
|
Mar 10 01:59:15 PM PDT 24 |
Mar 10 02:00:27 PM PDT 24 |
107189926511 ps |
| T171 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2812728821 |
|
|
Mar 10 01:58:39 PM PDT 24 |
Mar 10 01:59:39 PM PDT 24 |
22963485085 ps |
| T469 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3662851911 |
|
|
Mar 10 01:59:09 PM PDT 24 |
Mar 10 01:59:13 PM PDT 24 |
2120284546 ps |
| T470 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.362386770 |
|
|
Mar 10 02:01:39 PM PDT 24 |
Mar 10 02:01:46 PM PDT 24 |
2112550880 ps |
| T471 |
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.2011588726 |
|
|
Mar 10 01:59:15 PM PDT 24 |
Mar 10 01:59:18 PM PDT 24 |
3903996738 ps |
| T472 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2622850863 |
|
|
Mar 10 01:59:04 PM PDT 24 |
Mar 10 01:59:14 PM PDT 24 |
3423490644 ps |
| T235 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1805919235 |
|
|
Mar 10 01:58:53 PM PDT 24 |
Mar 10 01:59:49 PM PDT 24 |
42240026840 ps |
| T311 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.2363472747 |
|
|
Mar 10 01:59:08 PM PDT 24 |
Mar 10 02:01:10 PM PDT 24 |
186291773861 ps |
| T473 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1970591238 |
|
|
Mar 10 01:59:20 PM PDT 24 |
Mar 10 01:59:23 PM PDT 24 |
2973006816 ps |
| T474 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2822161309 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:00:10 PM PDT 24 |
2017439817 ps |
| T475 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.3139993547 |
|
|
Mar 10 01:59:35 PM PDT 24 |
Mar 10 01:59:37 PM PDT 24 |
2672065533 ps |
| T476 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3264282146 |
|
|
Mar 10 01:59:28 PM PDT 24 |
Mar 10 01:59:32 PM PDT 24 |
3770509453 ps |
| T477 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2188546417 |
|
|
Mar 10 01:58:42 PM PDT 24 |
Mar 10 01:58:52 PM PDT 24 |
3671971946 ps |
| T172 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2142229654 |
|
|
Mar 10 01:58:27 PM PDT 24 |
Mar 10 01:58:38 PM PDT 24 |
6072244571 ps |
| T478 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3580519690 |
|
|
Mar 10 01:59:56 PM PDT 24 |
Mar 10 02:00:01 PM PDT 24 |
5477091774 ps |
| T479 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1344928475 |
|
|
Mar 10 01:58:39 PM PDT 24 |
Mar 10 01:58:49 PM PDT 24 |
3542794259 ps |
| T480 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.2535282606 |
|
|
Mar 10 01:58:33 PM PDT 24 |
Mar 10 01:58:39 PM PDT 24 |
2012164848 ps |
| T481 |
/workspace/coverage/default/13.sysrst_ctrl_alert_test.2787102296 |
|
|
Mar 10 01:59:10 PM PDT 24 |
Mar 10 01:59:16 PM PDT 24 |
2017047531 ps |
| T105 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1977999505 |
|
|
Mar 10 02:00:25 PM PDT 24 |
Mar 10 02:01:33 PM PDT 24 |
25829796697 ps |
| T482 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1229643693 |
|
|
Mar 10 01:58:42 PM PDT 24 |
Mar 10 01:58:44 PM PDT 24 |
2034620542 ps |
| T483 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.2189942715 |
|
|
Mar 10 01:59:11 PM PDT 24 |
Mar 10 01:59:18 PM PDT 24 |
2182025631 ps |
| T484 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.1192309554 |
|
|
Mar 10 02:00:04 PM PDT 24 |
Mar 10 02:00:05 PM PDT 24 |
2495775914 ps |
| T485 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.2044389538 |
|
|
Mar 10 01:58:48 PM PDT 24 |
Mar 10 01:58:54 PM PDT 24 |
2512862235 ps |
| T195 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3984852082 |
|
|
Mar 10 02:00:00 PM PDT 24 |
Mar 10 02:00:13 PM PDT 24 |
5271240123 ps |
| T197 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.4211912238 |
|
|
Mar 10 01:59:11 PM PDT 24 |
Mar 10 01:59:14 PM PDT 24 |
2115236737 ps |
| T198 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1245754863 |
|
|
Mar 10 01:59:49 PM PDT 24 |
Mar 10 02:00:02 PM PDT 24 |
3642538281 ps |
| T106 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.1866247791 |
|
|
Mar 10 01:59:15 PM PDT 24 |
Mar 10 02:00:28 PM PDT 24 |
27083283868 ps |
| T107 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3418107641 |
|
|
Mar 10 01:59:11 PM PDT 24 |
Mar 10 01:59:21 PM PDT 24 |
24915217049 ps |
| T199 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.2760623715 |
|
|
Mar 10 01:59:28 PM PDT 24 |
Mar 10 01:59:30 PM PDT 24 |
2548937933 ps |
| T200 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.453977734 |
|
|
Mar 10 01:59:43 PM PDT 24 |
Mar 10 01:59:56 PM PDT 24 |
4370952001 ps |
| T201 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3586966606 |
|
|
Mar 10 02:00:09 PM PDT 24 |
Mar 10 02:00:15 PM PDT 24 |
386571829529 ps |
| T202 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.1664487254 |
|
|
Mar 10 01:59:51 PM PDT 24 |
Mar 10 02:01:23 PM PDT 24 |
139680858047 ps |
| T203 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.1204303555 |
|
|
Mar 10 01:59:20 PM PDT 24 |
Mar 10 02:03:00 PM PDT 24 |
189461585247 ps |
| T486 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.663827528 |
|
|
Mar 10 01:59:15 PM PDT 24 |
Mar 10 01:59:18 PM PDT 24 |
2476404848 ps |
| T324 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3550046328 |
|
|
Mar 10 02:00:26 PM PDT 24 |
Mar 10 02:01:32 PM PDT 24 |
97117766215 ps |
| T127 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.1185696827 |
|
|
Mar 10 01:59:19 PM PDT 24 |
Mar 10 01:59:22 PM PDT 24 |
7200807430 ps |
| T487 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3351740016 |
|
|
Mar 10 01:58:58 PM PDT 24 |
Mar 10 01:59:07 PM PDT 24 |
3201829591 ps |
| T488 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.385990333 |
|
|
Mar 10 01:59:30 PM PDT 24 |
Mar 10 02:00:01 PM PDT 24 |
24339344306 ps |
| T489 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.499110691 |
|
|
Mar 10 01:58:28 PM PDT 24 |
Mar 10 01:58:35 PM PDT 24 |
2752189357 ps |
| T490 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2041696201 |
|
|
Mar 10 01:59:12 PM PDT 24 |
Mar 10 01:59:16 PM PDT 24 |
2516494493 ps |
| T491 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2715717305 |
|
|
Mar 10 01:58:44 PM PDT 24 |
Mar 10 01:58:51 PM PDT 24 |
2513947859 ps |
| T180 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.4239137877 |
|
|
Mar 10 01:58:54 PM PDT 24 |
Mar 10 01:58:56 PM PDT 24 |
3330861925 ps |
| T492 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.572037792 |
|
|
Mar 10 02:00:24 PM PDT 24 |
Mar 10 02:01:13 PM PDT 24 |
35038039357 ps |
| T493 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2161400698 |
|
|
Mar 10 02:00:10 PM PDT 24 |
Mar 10 02:00:14 PM PDT 24 |
2480003587 ps |
| T494 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.3168791378 |
|
|
Mar 10 01:59:42 PM PDT 24 |
Mar 10 01:59:43 PM PDT 24 |
2066203459 ps |
| T495 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1965907275 |
|
|
Mar 10 02:00:15 PM PDT 24 |
Mar 10 02:00:19 PM PDT 24 |
3806457236 ps |
| T496 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.4129568232 |
|
|
Mar 10 01:58:24 PM PDT 24 |
Mar 10 01:58:26 PM PDT 24 |
2529517491 ps |
| T78 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1973810067 |
|
|
Mar 10 01:59:11 PM PDT 24 |
Mar 10 01:59:14 PM PDT 24 |
7209865777 ps |
| T497 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2974483801 |
|
|
Mar 10 01:58:24 PM PDT 24 |
Mar 10 01:58:25 PM PDT 24 |
2591318695 ps |
| T498 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.1001863075 |
|
|
Mar 10 01:59:38 PM PDT 24 |
Mar 10 02:01:06 PM PDT 24 |
123684499290 ps |
| T499 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2368544208 |
|
|
Mar 10 01:59:15 PM PDT 24 |
Mar 10 01:59:20 PM PDT 24 |
2984477655 ps |
| T500 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2460713495 |
|
|
Mar 10 01:59:23 PM PDT 24 |
Mar 10 01:59:25 PM PDT 24 |
2097066252 ps |
| T501 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.3215584131 |
|
|
Mar 10 01:59:38 PM PDT 24 |
Mar 10 01:59:49 PM PDT 24 |
6974516792 ps |
| T502 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2926888443 |
|
|
Mar 10 01:58:47 PM PDT 24 |
Mar 10 01:58:54 PM PDT 24 |
2515977115 ps |
| T503 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3825437174 |
|
|
Mar 10 01:58:41 PM PDT 24 |
Mar 10 01:58:57 PM PDT 24 |
10776330198 ps |
| T504 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1216670711 |
|
|
Mar 10 01:59:37 PM PDT 24 |
Mar 10 01:59:41 PM PDT 24 |
3592223474 ps |
| T505 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1767024973 |
|
|
Mar 10 02:00:15 PM PDT 24 |
Mar 10 02:01:47 PM PDT 24 |
139447478189 ps |
| T506 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.2503568013 |
|
|
Mar 10 01:58:46 PM PDT 24 |
Mar 10 01:58:52 PM PDT 24 |
2009937064 ps |
| T507 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1197462633 |
|
|
Mar 10 02:00:06 PM PDT 24 |
Mar 10 02:00:11 PM PDT 24 |
2973963536 ps |
| T508 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2720128163 |
|
|
Mar 10 01:59:30 PM PDT 24 |
Mar 10 02:00:26 PM PDT 24 |
83402599515 ps |
| T354 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2419559004 |
|
|
Mar 10 02:00:09 PM PDT 24 |
Mar 10 02:02:33 PM PDT 24 |
57221711454 ps |
| T108 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2250101306 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:00:27 PM PDT 24 |
35460052802 ps |
| T509 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1109695536 |
|
|
Mar 10 01:59:30 PM PDT 24 |
Mar 10 01:59:34 PM PDT 24 |
2520394724 ps |
| T510 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2958707213 |
|
|
Mar 10 01:59:10 PM PDT 24 |
Mar 10 01:59:12 PM PDT 24 |
2487904189 ps |
| T511 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1671106409 |
|
|
Mar 10 01:59:16 PM PDT 24 |
Mar 10 01:59:32 PM PDT 24 |
5394589150 ps |
| T512 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3534225469 |
|
|
Mar 10 02:01:39 PM PDT 24 |
Mar 10 02:01:43 PM PDT 24 |
2624746694 ps |
| T513 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1978628825 |
|
|
Mar 10 01:59:52 PM PDT 24 |
Mar 10 02:00:01 PM PDT 24 |
2462713446 ps |
| T322 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3613722430 |
|
|
Mar 10 02:00:14 PM PDT 24 |
Mar 10 02:05:50 PM PDT 24 |
141087537840 ps |
| T514 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.635273085 |
|
|
Mar 10 02:00:09 PM PDT 24 |
Mar 10 02:00:15 PM PDT 24 |
2556703069 ps |
| T515 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.103499950 |
|
|
Mar 10 02:00:11 PM PDT 24 |
Mar 10 02:00:18 PM PDT 24 |
2233843263 ps |
| T516 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.550383844 |
|
|
Mar 10 01:58:41 PM PDT 24 |
Mar 10 01:58:58 PM PDT 24 |
24601039131 ps |
| T517 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.3483456851 |
|
|
Mar 10 01:58:52 PM PDT 24 |
Mar 10 01:58:56 PM PDT 24 |
2472851369 ps |
| T518 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.481170658 |
|
|
Mar 10 01:59:04 PM PDT 24 |
Mar 10 01:59:10 PM PDT 24 |
2112613442 ps |
| T519 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.1860041646 |
|
|
Mar 10 01:58:27 PM PDT 24 |
Mar 10 01:58:30 PM PDT 24 |
2121269370 ps |
| T336 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.4079452759 |
|
|
Mar 10 01:58:29 PM PDT 24 |
Mar 10 02:01:49 PM PDT 24 |
75854066037 ps |
| T189 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2357039261 |
|
|
Mar 10 01:58:38 PM PDT 24 |
Mar 10 01:58:40 PM PDT 24 |
4984099587 ps |
| T520 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2392000886 |
|
|
Mar 10 01:58:39 PM PDT 24 |
Mar 10 01:58:51 PM PDT 24 |
4090076243 ps |
| T521 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all.2584292683 |
|
|
Mar 10 01:58:26 PM PDT 24 |
Mar 10 01:58:54 PM PDT 24 |
9685760086 ps |
| T522 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.3749152981 |
|
|
Mar 10 01:58:44 PM PDT 24 |
Mar 10 01:58:48 PM PDT 24 |
2620233223 ps |
| T523 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.1721190702 |
|
|
Mar 10 01:59:43 PM PDT 24 |
Mar 10 01:59:49 PM PDT 24 |
2013170129 ps |
| T325 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4232741062 |
|
|
Mar 10 02:00:21 PM PDT 24 |
Mar 10 02:07:10 PM PDT 24 |
158655775639 ps |
| T524 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1507592999 |
|
|
Mar 10 02:00:04 PM PDT 24 |
Mar 10 02:00:07 PM PDT 24 |
2139631626 ps |
| T357 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2940640481 |
|
|
Mar 10 01:59:37 PM PDT 24 |
Mar 10 02:06:24 PM PDT 24 |
1232420778449 ps |
| T525 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1262114655 |
|
|
Mar 10 01:59:52 PM PDT 24 |
Mar 10 02:00:03 PM PDT 24 |
2456924865 ps |
| T319 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.564941390 |
|
|
Mar 10 02:01:39 PM PDT 24 |
Mar 10 02:01:52 PM PDT 24 |
83021855903 ps |
| T526 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.1209543422 |
|
|
Mar 10 01:58:52 PM PDT 24 |
Mar 10 01:59:40 PM PDT 24 |
76121945664 ps |
| T328 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1980003553 |
|
|
Mar 10 02:00:20 PM PDT 24 |
Mar 10 02:00:53 PM PDT 24 |
42194705164 ps |
| T527 |
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.3701691638 |
|
|
Mar 10 01:58:34 PM PDT 24 |
Mar 10 01:58:36 PM PDT 24 |
3636894545 ps |
| T340 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.1913055224 |
|
|
Mar 10 01:58:47 PM PDT 24 |
Mar 10 02:04:21 PM PDT 24 |
121395777452 ps |
| T528 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.2616923674 |
|
|
Mar 10 02:00:06 PM PDT 24 |
Mar 10 02:00:12 PM PDT 24 |
17162799408 ps |
| T529 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.912698037 |
|
|
Mar 10 01:58:29 PM PDT 24 |
Mar 10 01:58:32 PM PDT 24 |
2022776298 ps |
| T530 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3944383716 |
|
|
Mar 10 01:58:26 PM PDT 24 |
Mar 10 01:58:33 PM PDT 24 |
5249861173 ps |
| T531 |
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.4270673683 |
|
|
Mar 10 01:59:12 PM PDT 24 |
Mar 10 01:59:15 PM PDT 24 |
2072945480 ps |
| T181 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3194528995 |
|
|
Mar 10 01:59:42 PM PDT 24 |
Mar 10 01:59:44 PM PDT 24 |
4047644533 ps |
| T350 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2612893449 |
|
|
Mar 10 01:59:42 PM PDT 24 |
Mar 10 01:59:59 PM PDT 24 |
21856608657 ps |
| T532 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.1788097936 |
|
|
Mar 10 01:58:48 PM PDT 24 |
Mar 10 01:59:34 PM PDT 24 |
68607813049 ps |
| T533 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1692401296 |
|
|
Mar 10 01:59:06 PM PDT 24 |
Mar 10 02:20:46 PM PDT 24 |
985868727874 ps |
| T534 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3544523974 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:00:10 PM PDT 24 |
7531890219 ps |
| T313 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3516460473 |
|
|
Mar 10 01:59:20 PM PDT 24 |
Mar 10 02:00:14 PM PDT 24 |
73200361340 ps |
| T337 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2610898434 |
|
|
Mar 10 01:58:45 PM PDT 24 |
Mar 10 02:00:19 PM PDT 24 |
115446685254 ps |
| T535 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3460852591 |
|
|
Mar 10 01:59:18 PM PDT 24 |
Mar 10 01:59:24 PM PDT 24 |
3572594654 ps |
| T182 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3667541235 |
|
|
Mar 10 01:59:58 PM PDT 24 |
Mar 10 02:00:07 PM PDT 24 |
3957987014 ps |
| T278 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1966610512 |
|
|
Mar 10 01:59:31 PM PDT 24 |
Mar 10 02:02:44 PM PDT 24 |
486138463397 ps |
| T536 |
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2261717416 |
|
|
Mar 10 01:58:29 PM PDT 24 |
Mar 10 01:58:30 PM PDT 24 |
2532615298 ps |
| T155 |
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.1187407543 |
|
|
Mar 10 02:01:54 PM PDT 24 |
Mar 10 02:01:58 PM PDT 24 |
5643181591 ps |
| T342 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2048842941 |
|
|
Mar 10 02:00:08 PM PDT 24 |
Mar 10 02:01:54 PM PDT 24 |
155833629074 ps |
| T276 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3030568819 |
|
|
Mar 10 01:59:05 PM PDT 24 |
Mar 10 01:59:57 PM PDT 24 |
30248202793 ps |
| T240 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all.3944778965 |
|
|
Mar 10 01:59:28 PM PDT 24 |
Mar 10 02:00:18 PM PDT 24 |
76828659964 ps |
| T537 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2330485017 |
|
|
Mar 10 02:00:06 PM PDT 24 |
Mar 10 02:02:52 PM PDT 24 |
285112700610 ps |
| T224 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.3279115235 |
|
|
Mar 10 01:58:27 PM PDT 24 |
Mar 10 01:58:38 PM PDT 24 |
9350917240 ps |
| T538 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3544272762 |
|
|
Mar 10 01:59:55 PM PDT 24 |
Mar 10 02:00:03 PM PDT 24 |
2512581279 ps |
| T207 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.1629548216 |
|
|
Mar 10 01:59:48 PM PDT 24 |
Mar 10 01:59:59 PM PDT 24 |
4993686407 ps |
| T539 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2850644421 |
|
|
Mar 10 01:58:49 PM PDT 24 |
Mar 10 01:58:57 PM PDT 24 |
2611855748 ps |
| T540 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.119281444 |
|
|
Mar 10 01:59:43 PM PDT 24 |
Mar 10 01:59:45 PM PDT 24 |
2508480519 ps |
| T541 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.1556021312 |
|
|
Mar 10 01:58:34 PM PDT 24 |
Mar 10 01:58:42 PM PDT 24 |
10947466790 ps |
| T542 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2416454699 |
|
|
Mar 10 01:59:54 PM PDT 24 |
Mar 10 02:00:02 PM PDT 24 |
2458170003 ps |
| T244 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3188548060 |
|
|
Mar 10 01:58:26 PM PDT 24 |
Mar 10 01:59:22 PM PDT 24 |
83597744983 ps |
| T225 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.534983088 |
|
|
Mar 10 01:58:49 PM PDT 24 |
Mar 10 02:00:08 PM PDT 24 |
31774608532 ps |
| T543 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.113227665 |
|
|
Mar 10 01:58:51 PM PDT 24 |
Mar 10 01:58:55 PM PDT 24 |
2118603601 ps |
| T544 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.716330512 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:00:10 PM PDT 24 |
2615386410 ps |
| T545 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1894430187 |
|
|
Mar 10 01:59:10 PM PDT 24 |
Mar 10 01:59:12 PM PDT 24 |
2053805003 ps |
| T546 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.2232633106 |
|
|
Mar 10 01:59:47 PM PDT 24 |
Mar 10 01:59:53 PM PDT 24 |
2480650881 ps |
| T329 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2217574537 |
|
|
Mar 10 01:58:39 PM PDT 24 |
Mar 10 02:01:22 PM PDT 24 |
61904256486 ps |
| T547 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.2471807903 |
|
|
Mar 10 01:59:32 PM PDT 24 |
Mar 10 01:59:34 PM PDT 24 |
2136059523 ps |
| T548 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.520143624 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:00:13 PM PDT 24 |
10053242831 ps |
| T252 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1612875133 |
|
|
Mar 10 01:58:29 PM PDT 24 |
Mar 10 01:58:45 PM PDT 24 |
22052850392 ps |
| T326 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.4257341672 |
|
|
Mar 10 02:00:02 PM PDT 24 |
Mar 10 02:00:46 PM PDT 24 |
72984568141 ps |
| T549 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.1840805065 |
|
|
Mar 10 01:59:07 PM PDT 24 |
Mar 10 01:59:17 PM PDT 24 |
3197942927 ps |
| T79 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1196032820 |
|
|
Mar 10 01:59:11 PM PDT 24 |
Mar 10 01:59:20 PM PDT 24 |
10614799222 ps |
| T550 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.400443819 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:00:28 PM PDT 24 |
10142278336 ps |
| T169 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.783416215 |
|
|
Mar 10 01:58:32 PM PDT 24 |
Mar 10 01:58:34 PM PDT 24 |
3049101204 ps |
| T173 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.3287100798 |
|
|
Mar 10 01:59:19 PM PDT 24 |
Mar 10 01:59:23 PM PDT 24 |
2019241890 ps |
| T174 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1721304113 |
|
|
Mar 10 01:58:52 PM PDT 24 |
Mar 10 02:01:06 PM PDT 24 |
52229625509 ps |
| T175 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3747947611 |
|
|
Mar 10 01:58:33 PM PDT 24 |
Mar 10 01:58:39 PM PDT 24 |
2164418195 ps |
| T128 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1808994171 |
|
|
Mar 10 01:58:56 PM PDT 24 |
Mar 10 01:59:01 PM PDT 24 |
4827299372 ps |
| T83 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1023236993 |
|
|
Mar 10 02:00:19 PM PDT 24 |
Mar 10 02:01:46 PM PDT 24 |
127229161287 ps |
| T80 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2838603495 |
|
|
Mar 10 01:59:42 PM PDT 24 |
Mar 10 01:59:44 PM PDT 24 |
6603090500 ps |
| T176 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all.2252905064 |
|
|
Mar 10 01:59:47 PM PDT 24 |
Mar 10 02:00:10 PM PDT 24 |
7080851423 ps |
| T177 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1393439604 |
|
|
Mar 10 01:58:50 PM PDT 24 |
Mar 10 01:58:54 PM PDT 24 |
2514161493 ps |
| T178 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2589415920 |
|
|
Mar 10 01:59:47 PM PDT 24 |
Mar 10 02:02:38 PM PDT 24 |
68796134813 ps |
| T318 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3413391731 |
|
|
Mar 10 02:00:16 PM PDT 24 |
Mar 10 02:00:53 PM PDT 24 |
50500877063 ps |
| T551 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.655981968 |
|
|
Mar 10 01:59:41 PM PDT 24 |
Mar 10 01:59:42 PM PDT 24 |
2501481315 ps |
| T552 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.4128085302 |
|
|
Mar 10 01:59:34 PM PDT 24 |
Mar 10 01:59:53 PM PDT 24 |
26107310109 ps |
| T553 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.767684283 |
|
|
Mar 10 02:00:25 PM PDT 24 |
Mar 10 02:01:05 PM PDT 24 |
28840543773 ps |
| T554 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3486369857 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:00:11 PM PDT 24 |
2466749436 ps |
| T555 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.138340608 |
|
|
Mar 10 01:59:10 PM PDT 24 |
Mar 10 01:59:15 PM PDT 24 |
2111141267 ps |
| T556 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.1071246756 |
|
|
Mar 10 01:59:50 PM PDT 24 |
Mar 10 01:59:57 PM PDT 24 |
2617974824 ps |
| T89 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.236055145 |
|
|
Mar 10 01:58:30 PM PDT 24 |
Mar 10 01:58:58 PM PDT 24 |
33763727248 ps |
| T241 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.2789486991 |
|
|
Mar 10 01:58:30 PM PDT 24 |
Mar 10 01:59:07 PM PDT 24 |
54899112836 ps |
| T557 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3901010139 |
|
|
Mar 10 01:58:48 PM PDT 24 |
Mar 10 01:58:55 PM PDT 24 |
3331029876 ps |
| T316 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2072337097 |
|
|
Mar 10 02:00:16 PM PDT 24 |
Mar 10 02:00:52 PM PDT 24 |
56034073565 ps |
| T353 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.450116309 |
|
|
Mar 10 02:00:24 PM PDT 24 |
Mar 10 02:02:09 PM PDT 24 |
84201423410 ps |
| T558 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.30878309 |
|
|
Mar 10 01:59:03 PM PDT 24 |
Mar 10 01:59:06 PM PDT 24 |
2119613852 ps |
| T559 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.841917159 |
|
|
Mar 10 02:00:02 PM PDT 24 |
Mar 10 02:00:09 PM PDT 24 |
2514062677 ps |
| T560 |
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.156426230 |
|
|
Mar 10 01:59:21 PM PDT 24 |
Mar 10 01:59:26 PM PDT 24 |
2471296274 ps |
| T561 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2119612336 |
|
|
Mar 10 01:58:45 PM PDT 24 |
Mar 10 01:58:52 PM PDT 24 |
4349602122 ps |
| T562 |
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1682215665 |
|
|
Mar 10 01:59:13 PM PDT 24 |
Mar 10 01:59:21 PM PDT 24 |
2611908154 ps |
| T563 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.3234644494 |
|
|
Mar 10 01:59:19 PM PDT 24 |
Mar 10 01:59:56 PM PDT 24 |
15331828140 ps |
| T335 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.208575159 |
|
|
Mar 10 02:00:20 PM PDT 24 |
Mar 10 02:00:55 PM PDT 24 |
109880364285 ps |
| T221 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.742707920 |
|
|
Mar 10 01:59:51 PM PDT 24 |
Mar 10 02:00:03 PM PDT 24 |
15132808390 ps |
| T564 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.1088202876 |
|
|
Mar 10 01:59:21 PM PDT 24 |
Mar 10 01:59:30 PM PDT 24 |
3455020433 ps |
| T565 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.824800955 |
|
|
Mar 10 01:58:45 PM PDT 24 |
Mar 10 01:58:50 PM PDT 24 |
2470216986 ps |
| T566 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.723324680 |
|
|
Mar 10 01:59:14 PM PDT 24 |
Mar 10 01:59:20 PM PDT 24 |
2015075796 ps |
| T567 |
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.148455881 |
|
|
Mar 10 01:58:54 PM PDT 24 |
Mar 10 01:58:56 PM PDT 24 |
2096327340 ps |
| T568 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.1111439941 |
|
|
Mar 10 02:00:13 PM PDT 24 |
Mar 10 02:00:15 PM PDT 24 |
2135832396 ps |
| T242 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.1908999445 |
|
|
Mar 10 01:59:11 PM PDT 24 |
Mar 10 02:02:31 PM PDT 24 |
81044972470 ps |
| T569 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.812774746 |
|
|
Mar 10 01:58:55 PM PDT 24 |
Mar 10 01:59:03 PM PDT 24 |
12336039781 ps |
| T570 |
/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.3386799802 |
|
|
Mar 10 01:59:17 PM PDT 24 |
Mar 10 01:59:20 PM PDT 24 |
2467691395 ps |
| T571 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2097620902 |
|
|
Mar 10 02:00:15 PM PDT 24 |
Mar 10 02:00:19 PM PDT 24 |
2020080604 ps |
| T572 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3971747437 |
|
|
Mar 10 02:00:02 PM PDT 24 |
Mar 10 02:00:04 PM PDT 24 |
3534234752 ps |
| T573 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.764964068 |
|
|
Mar 10 01:58:45 PM PDT 24 |
Mar 10 01:58:52 PM PDT 24 |
2132873735 ps |
| T574 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2369022531 |
|
|
Mar 10 01:58:52 PM PDT 24 |
Mar 10 01:58:59 PM PDT 24 |
2612185152 ps |
| T129 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.4210500642 |
|
|
Mar 10 02:00:01 PM PDT 24 |
Mar 10 02:00:03 PM PDT 24 |
5061603675 ps |
| T575 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.88686135 |
|
|
Mar 10 01:59:05 PM PDT 24 |
Mar 10 01:59:10 PM PDT 24 |
2619001089 ps |
| T576 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.882492385 |
|
|
Mar 10 01:58:50 PM PDT 24 |
Mar 10 01:59:56 PM PDT 24 |
226297724838 ps |
| T577 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1621537649 |
|
|
Mar 10 02:00:01 PM PDT 24 |
Mar 10 02:01:05 PM PDT 24 |
25582509195 ps |
| T578 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1574886117 |
|
|
Mar 10 02:00:02 PM PDT 24 |
Mar 10 02:00:06 PM PDT 24 |
2013794732 ps |
| T165 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.2928075418 |
|
|
Mar 10 01:59:33 PM PDT 24 |
Mar 10 02:01:45 PM PDT 24 |
792622435905 ps |
| T579 |
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.2176471093 |
|
|
Mar 10 01:59:32 PM PDT 24 |
Mar 10 01:59:43 PM PDT 24 |
4060624266 ps |
| T580 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2009042064 |
|
|
Mar 10 02:00:15 PM PDT 24 |
Mar 10 02:00:49 PM PDT 24 |
26837755463 ps |
| T581 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.3217019401 |
|
|
Mar 10 01:59:22 PM PDT 24 |
Mar 10 01:59:44 PM PDT 24 |
7485908235 ps |
| T166 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1187082180 |
|
|
Mar 10 01:59:17 PM PDT 24 |
Mar 10 02:02:13 PM PDT 24 |
80768832430 ps |
| T582 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1340357779 |
|
|
Mar 10 02:00:04 PM PDT 24 |
Mar 10 02:00:08 PM PDT 24 |
2021094929 ps |
| T583 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.353932572 |
|
|
Mar 10 01:59:22 PM PDT 24 |
Mar 10 01:59:34 PM PDT 24 |
3956260088 ps |
| T279 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3385148679 |
|
|
Mar 10 01:58:33 PM PDT 24 |
Mar 10 01:59:47 PM PDT 24 |
59321463354 ps |
| T584 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1413172421 |
|
|
Mar 10 01:59:43 PM PDT 24 |
Mar 10 02:01:19 PM PDT 24 |
51576819895 ps |
| T585 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.2432124419 |
|
|
Mar 10 01:59:08 PM PDT 24 |
Mar 10 01:59:10 PM PDT 24 |
2136868674 ps |
| T586 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1182944694 |
|
|
Mar 10 01:59:53 PM PDT 24 |
Mar 10 01:59:56 PM PDT 24 |
2220185727 ps |
| T587 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.594972237 |
|
|
Mar 10 02:00:03 PM PDT 24 |
Mar 10 02:01:06 PM PDT 24 |
248556728722 ps |
| T588 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.3968836683 |
|
|
Mar 10 01:59:53 PM PDT 24 |
Mar 10 01:59:56 PM PDT 24 |
2108647996 ps |
| T589 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1069343224 |
|
|
Mar 10 01:59:18 PM PDT 24 |
Mar 10 01:59:20 PM PDT 24 |
4940454987 ps |
| T84 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2468057891 |
|
|
Mar 10 01:58:31 PM PDT 24 |
Mar 10 02:01:29 PM PDT 24 |
64593095202 ps |
| T590 |
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.4153068617 |
|
|
Mar 10 01:59:13 PM PDT 24 |
Mar 10 01:59:19 PM PDT 24 |
3277124248 ps |
| T591 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.1795093873 |
|
|
Mar 10 01:59:07 PM PDT 24 |
Mar 10 01:59:34 PM PDT 24 |
16010984557 ps |
| T592 |
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.961822561 |
|
|
Mar 10 01:59:11 PM PDT 24 |
Mar 10 01:59:17 PM PDT 24 |
3400856157 ps |
| T593 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.4099106639 |
|
|
Mar 10 01:58:30 PM PDT 24 |
Mar 10 01:58:38 PM PDT 24 |
2667430166 ps |
| T594 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1300263372 |
|
|
Mar 10 02:00:08 PM PDT 24 |
Mar 10 02:00:15 PM PDT 24 |
2611183297 ps |