| T307 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.4182432254 |
|
|
Mar 12 02:50:11 PM PDT 24 |
Mar 12 02:52:39 PM PDT 24 |
302124181866 ps |
| T308 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3934773945 |
|
|
Mar 12 02:51:26 PM PDT 24 |
Mar 12 02:53:52 PM PDT 24 |
108925074105 ps |
| T428 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2776741685 |
|
|
Mar 12 02:51:18 PM PDT 24 |
Mar 12 02:51:21 PM PDT 24 |
2146232453 ps |
| T124 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3795360190 |
|
|
Mar 12 02:50:17 PM PDT 24 |
Mar 12 02:50:20 PM PDT 24 |
11596713868 ps |
| T429 |
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.831711592 |
|
|
Mar 12 02:50:09 PM PDT 24 |
Mar 12 02:50:10 PM PDT 24 |
2497733915 ps |
| T430 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3972638076 |
|
|
Mar 12 02:50:39 PM PDT 24 |
Mar 12 02:50:47 PM PDT 24 |
2463873495 ps |
| T362 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1911887415 |
|
|
Mar 12 02:51:43 PM PDT 24 |
Mar 12 02:54:15 PM PDT 24 |
55965146272 ps |
| T286 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2911989025 |
|
|
Mar 12 02:49:41 PM PDT 24 |
Mar 12 02:49:44 PM PDT 24 |
2525533732 ps |
| T431 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.581753982 |
|
|
Mar 12 02:49:33 PM PDT 24 |
Mar 12 02:49:37 PM PDT 24 |
2477265799 ps |
| T432 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.3720963782 |
|
|
Mar 12 02:50:54 PM PDT 24 |
Mar 12 02:51:03 PM PDT 24 |
2613075022 ps |
| T143 |
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3600366136 |
|
|
Mar 12 02:50:45 PM PDT 24 |
Mar 12 03:09:56 PM PDT 24 |
4327228378447 ps |
| T433 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3760011130 |
|
|
Mar 12 02:50:21 PM PDT 24 |
Mar 12 02:50:25 PM PDT 24 |
3686049017 ps |
| T434 |
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1113236837 |
|
|
Mar 12 02:51:13 PM PDT 24 |
Mar 12 02:51:20 PM PDT 24 |
2509082157 ps |
| T330 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3492111572 |
|
|
Mar 12 02:51:41 PM PDT 24 |
Mar 12 02:56:26 PM PDT 24 |
133490376407 ps |
| T211 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.1980904478 |
|
|
Mar 12 02:50:36 PM PDT 24 |
Mar 12 02:50:39 PM PDT 24 |
3031188571 ps |
| T435 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2540462240 |
|
|
Mar 12 02:49:51 PM PDT 24 |
Mar 12 02:49:55 PM PDT 24 |
4137775020 ps |
| T436 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.4263392426 |
|
|
Mar 12 02:50:34 PM PDT 24 |
Mar 12 02:51:06 PM PDT 24 |
22338834176 ps |
| T437 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.3755282694 |
|
|
Mar 12 02:49:41 PM PDT 24 |
Mar 12 02:49:44 PM PDT 24 |
2747799225 ps |
| T367 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.2801112086 |
|
|
Mar 12 02:50:08 PM PDT 24 |
Mar 12 02:50:16 PM PDT 24 |
1071944850718 ps |
| T438 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1806853088 |
|
|
Mar 12 02:48:44 PM PDT 24 |
Mar 12 02:48:48 PM PDT 24 |
2515234026 ps |
| T94 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2120743165 |
|
|
Mar 12 02:49:56 PM PDT 24 |
Mar 12 02:53:32 PM PDT 24 |
1567884065670 ps |
| T284 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3874564403 |
|
|
Mar 12 02:51:05 PM PDT 24 |
Mar 12 02:51:13 PM PDT 24 |
2458985625 ps |
| T365 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1340785659 |
|
|
Mar 12 02:51:03 PM PDT 24 |
Mar 12 02:51:13 PM PDT 24 |
13957574473 ps |
| T280 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1052999018 |
|
|
Mar 12 02:50:55 PM PDT 24 |
Mar 12 02:51:44 PM PDT 24 |
19567744714 ps |
| T439 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1455996437 |
|
|
Mar 12 02:50:48 PM PDT 24 |
Mar 12 02:50:51 PM PDT 24 |
2523110430 ps |
| T440 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.1642910548 |
|
|
Mar 12 02:51:13 PM PDT 24 |
Mar 12 02:51:16 PM PDT 24 |
2117834421 ps |
| T366 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.833687293 |
|
|
Mar 12 02:51:07 PM PDT 24 |
Mar 12 02:51:33 PM PDT 24 |
34959545582 ps |
| T95 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3479155225 |
|
|
Mar 12 02:48:53 PM PDT 24 |
Mar 12 02:48:55 PM PDT 24 |
9557836332 ps |
| T441 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1176099730 |
|
|
Mar 12 02:49:30 PM PDT 24 |
Mar 12 02:49:40 PM PDT 24 |
3583705798 ps |
| T327 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.800203920 |
|
|
Mar 12 02:50:15 PM PDT 24 |
Mar 12 02:54:59 PM PDT 24 |
106293022297 ps |
| T442 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.2192871352 |
|
|
Mar 12 02:49:39 PM PDT 24 |
Mar 12 02:49:46 PM PDT 24 |
9638754632 ps |
| T357 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.2205483008 |
|
|
Mar 12 02:50:46 PM PDT 24 |
Mar 12 02:52:41 PM PDT 24 |
178983437379 ps |
| T443 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.535710753 |
|
|
Mar 12 02:50:54 PM PDT 24 |
Mar 12 02:50:59 PM PDT 24 |
2517361422 ps |
| T290 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2040795453 |
|
|
Mar 12 02:50:03 PM PDT 24 |
Mar 12 02:50:11 PM PDT 24 |
5512535673 ps |
| T444 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.4001787395 |
|
|
Mar 12 02:49:53 PM PDT 24 |
Mar 12 02:50:03 PM PDT 24 |
3836750472 ps |
| T445 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.4268141713 |
|
|
Mar 12 02:49:51 PM PDT 24 |
Mar 12 02:49:54 PM PDT 24 |
2633488371 ps |
| T446 |
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3992569706 |
|
|
Mar 12 02:50:47 PM PDT 24 |
Mar 12 02:50:50 PM PDT 24 |
2086725586 ps |
| T447 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.224951630 |
|
|
Mar 12 02:49:51 PM PDT 24 |
Mar 12 02:49:55 PM PDT 24 |
2113874501 ps |
| T161 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2299503254 |
|
|
Mar 12 02:48:42 PM PDT 24 |
Mar 12 02:48:51 PM PDT 24 |
32041232306 ps |
| T125 |
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2162117578 |
|
|
Mar 12 02:50:46 PM PDT 24 |
Mar 12 02:50:54 PM PDT 24 |
12818078421 ps |
| T448 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.1718550792 |
|
|
Mar 12 02:49:59 PM PDT 24 |
Mar 12 02:51:17 PM PDT 24 |
115356742097 ps |
| T449 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2087010921 |
|
|
Mar 12 02:50:58 PM PDT 24 |
Mar 12 02:51:09 PM PDT 24 |
3991549289 ps |
| T450 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1264039190 |
|
|
Mar 12 02:48:56 PM PDT 24 |
Mar 12 02:48:59 PM PDT 24 |
3252349550 ps |
| T451 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.1397952148 |
|
|
Mar 12 02:48:57 PM PDT 24 |
Mar 12 02:49:00 PM PDT 24 |
3431379892 ps |
| T452 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1249486380 |
|
|
Mar 12 02:49:28 PM PDT 24 |
Mar 12 02:49:30 PM PDT 24 |
2526834192 ps |
| T453 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.869025529 |
|
|
Mar 12 02:51:23 PM PDT 24 |
Mar 12 02:51:31 PM PDT 24 |
2460534039 ps |
| T454 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.298013398 |
|
|
Mar 12 02:51:01 PM PDT 24 |
Mar 12 02:51:03 PM PDT 24 |
2887723704 ps |
| T455 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2235380064 |
|
|
Mar 12 02:49:21 PM PDT 24 |
Mar 12 02:49:28 PM PDT 24 |
2167698324 ps |
| T456 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1529986784 |
|
|
Mar 12 02:51:25 PM PDT 24 |
Mar 12 02:51:30 PM PDT 24 |
3053156372 ps |
| T108 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.2198136382 |
|
|
Mar 12 02:49:41 PM PDT 24 |
Mar 12 02:51:17 PM PDT 24 |
144827136964 ps |
| T457 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3364282245 |
|
|
Mar 12 02:50:54 PM PDT 24 |
Mar 12 02:51:02 PM PDT 24 |
2511439636 ps |
| T159 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.3940236266 |
|
|
Mar 12 02:50:50 PM PDT 24 |
Mar 12 02:51:01 PM PDT 24 |
4727113441 ps |
| T180 |
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.2175122536 |
|
|
Mar 12 02:49:55 PM PDT 24 |
Mar 12 02:49:58 PM PDT 24 |
3091647540 ps |
| T132 |
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3325935219 |
|
|
Mar 12 02:49:09 PM PDT 24 |
Mar 12 02:51:31 PM PDT 24 |
1366643891867 ps |
| T109 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1077747756 |
|
|
Mar 12 02:49:27 PM PDT 24 |
Mar 12 02:50:22 PM PDT 24 |
29475159891 ps |
| T458 |
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.4187652243 |
|
|
Mar 12 02:49:56 PM PDT 24 |
Mar 12 02:50:06 PM PDT 24 |
3335001236 ps |
| T459 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.597339442 |
|
|
Mar 12 02:49:58 PM PDT 24 |
Mar 12 02:50:02 PM PDT 24 |
2864588131 ps |
| T460 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1384499097 |
|
|
Mar 12 02:49:38 PM PDT 24 |
Mar 12 02:49:47 PM PDT 24 |
3125675804 ps |
| T461 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.82020095 |
|
|
Mar 12 02:50:34 PM PDT 24 |
Mar 12 02:50:38 PM PDT 24 |
2620889154 ps |
| T462 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1347740140 |
|
|
Mar 12 02:49:22 PM PDT 24 |
Mar 12 02:49:23 PM PDT 24 |
2107692355 ps |
| T463 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.1601335140 |
|
|
Mar 12 02:48:41 PM PDT 24 |
Mar 12 02:48:42 PM PDT 24 |
2140871801 ps |
| T345 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2869775946 |
|
|
Mar 12 02:51:30 PM PDT 24 |
Mar 12 02:52:28 PM PDT 24 |
31483894669 ps |
| T368 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1938009733 |
|
|
Mar 12 02:51:09 PM PDT 24 |
Mar 12 02:52:13 PM PDT 24 |
810914916616 ps |
| T464 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2036866875 |
|
|
Mar 12 02:49:45 PM PDT 24 |
Mar 12 02:49:52 PM PDT 24 |
2471513239 ps |
| T242 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.2482878303 |
|
|
Mar 12 02:49:56 PM PDT 24 |
Mar 12 02:50:39 PM PDT 24 |
66692542672 ps |
| T326 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.2068000093 |
|
|
Mar 12 02:50:16 PM PDT 24 |
Mar 12 02:54:20 PM PDT 24 |
349014060866 ps |
| T465 |
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1530973875 |
|
|
Mar 12 02:51:34 PM PDT 24 |
Mar 12 02:52:03 PM PDT 24 |
20839758311 ps |
| T466 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2532119210 |
|
|
Mar 12 02:50:33 PM PDT 24 |
Mar 12 02:50:43 PM PDT 24 |
15807273333 ps |
| T223 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3630197056 |
|
|
Mar 12 02:49:38 PM PDT 24 |
Mar 12 02:49:46 PM PDT 24 |
45785598391 ps |
| T467 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.1781346276 |
|
|
Mar 12 02:50:53 PM PDT 24 |
Mar 12 02:51:06 PM PDT 24 |
10796358915 ps |
| T328 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.2962148783 |
|
|
Mar 12 02:50:32 PM PDT 24 |
Mar 12 02:56:21 PM PDT 24 |
136843229143 ps |
| T468 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1970706093 |
|
|
Mar 12 02:51:38 PM PDT 24 |
Mar 12 02:53:46 PM PDT 24 |
47301005990 ps |
| T469 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3914520728 |
|
|
Mar 12 02:50:44 PM PDT 24 |
Mar 12 02:50:51 PM PDT 24 |
2613014008 ps |
| T470 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.136948910 |
|
|
Mar 12 02:50:40 PM PDT 24 |
Mar 12 02:53:03 PM PDT 24 |
50304224053 ps |
| T471 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.2505815089 |
|
|
Mar 12 02:49:51 PM PDT 24 |
Mar 12 02:49:58 PM PDT 24 |
2512216954 ps |
| T472 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.2784145989 |
|
|
Mar 12 02:50:13 PM PDT 24 |
Mar 12 02:50:15 PM PDT 24 |
2043658175 ps |
| T473 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.737764890 |
|
|
Mar 12 02:50:35 PM PDT 24 |
Mar 12 02:50:36 PM PDT 24 |
3643654860 ps |
| T474 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1689889137 |
|
|
Mar 12 02:49:35 PM PDT 24 |
Mar 12 02:49:42 PM PDT 24 |
2126787774 ps |
| T475 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.2680280013 |
|
|
Mar 12 02:50:34 PM PDT 24 |
Mar 12 02:50:40 PM PDT 24 |
2075982626 ps |
| T179 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.1414557003 |
|
|
Mar 12 02:50:17 PM PDT 24 |
Mar 12 02:51:00 PM PDT 24 |
186227251790 ps |
| T476 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.938306095 |
|
|
Mar 12 02:50:32 PM PDT 24 |
Mar 12 02:50:35 PM PDT 24 |
2532046600 ps |
| T233 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3305398941 |
|
|
Mar 12 02:51:16 PM PDT 24 |
Mar 12 02:52:52 PM PDT 24 |
76390249728 ps |
| T477 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.2907177871 |
|
|
Mar 12 02:50:09 PM PDT 24 |
Mar 12 02:50:12 PM PDT 24 |
2034188254 ps |
| T325 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all.213448590 |
|
|
Mar 12 02:49:23 PM PDT 24 |
Mar 12 02:52:40 PM PDT 24 |
143861655165 ps |
| T478 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.260549824 |
|
|
Mar 12 02:50:16 PM PDT 24 |
Mar 12 02:50:18 PM PDT 24 |
2031560234 ps |
| T153 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.87707469 |
|
|
Mar 12 02:48:59 PM PDT 24 |
Mar 12 02:49:58 PM PDT 24 |
24711889153 ps |
| T133 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3483766116 |
|
|
Mar 12 02:51:12 PM PDT 24 |
Mar 12 02:54:07 PM PDT 24 |
62806629249 ps |
| T479 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1458534239 |
|
|
Mar 12 02:51:02 PM PDT 24 |
Mar 12 02:51:19 PM PDT 24 |
23712305745 ps |
| T329 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1362848503 |
|
|
Mar 12 02:51:43 PM PDT 24 |
Mar 12 02:53:37 PM PDT 24 |
101683577931 ps |
| T480 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1930575629 |
|
|
Mar 12 02:48:42 PM PDT 24 |
Mar 12 02:48:44 PM PDT 24 |
2202497887 ps |
| T481 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.3964366302 |
|
|
Mar 12 02:49:45 PM PDT 24 |
Mar 12 02:49:47 PM PDT 24 |
2055237064 ps |
| T482 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.477658845 |
|
|
Mar 12 02:48:45 PM PDT 24 |
Mar 12 02:48:48 PM PDT 24 |
2118556020 ps |
| T483 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.621309544 |
|
|
Mar 12 02:51:17 PM PDT 24 |
Mar 12 02:51:19 PM PDT 24 |
2025010967 ps |
| T484 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.3672916354 |
|
|
Mar 12 02:50:14 PM PDT 24 |
Mar 12 02:50:21 PM PDT 24 |
2143669938 ps |
| T485 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.2443506502 |
|
|
Mar 12 02:50:47 PM PDT 24 |
Mar 12 02:50:48 PM PDT 24 |
2637250337 ps |
| T486 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.661041983 |
|
|
Mar 12 02:50:41 PM PDT 24 |
Mar 12 02:50:44 PM PDT 24 |
2016486171 ps |
| T487 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.126114919 |
|
|
Mar 12 02:48:44 PM PDT 24 |
Mar 12 02:48:59 PM PDT 24 |
5294973280 ps |
| T488 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3013157207 |
|
|
Mar 12 02:49:45 PM PDT 24 |
Mar 12 02:49:52 PM PDT 24 |
2034147972 ps |
| T489 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.528814346 |
|
|
Mar 12 02:50:49 PM PDT 24 |
Mar 12 02:50:53 PM PDT 24 |
2015617028 ps |
| T490 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2775252606 |
|
|
Mar 12 02:50:36 PM PDT 24 |
Mar 12 02:50:43 PM PDT 24 |
8099407981 ps |
| T491 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.1946582247 |
|
|
Mar 12 02:49:04 PM PDT 24 |
Mar 12 02:49:38 PM PDT 24 |
15998292174 ps |
| T339 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.453539284 |
|
|
Mar 12 02:50:09 PM PDT 24 |
Mar 12 02:50:29 PM PDT 24 |
97901308122 ps |
| T331 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1623071772 |
|
|
Mar 12 02:50:09 PM PDT 24 |
Mar 12 02:54:09 PM PDT 24 |
86035856532 ps |
| T492 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.1231159888 |
|
|
Mar 12 02:49:28 PM PDT 24 |
Mar 12 02:49:31 PM PDT 24 |
4350819011 ps |
| T493 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.409772211 |
|
|
Mar 12 02:49:25 PM PDT 24 |
Mar 12 02:49:29 PM PDT 24 |
2515567059 ps |
| T494 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.4261221759 |
|
|
Mar 12 02:48:41 PM PDT 24 |
Mar 12 02:48:53 PM PDT 24 |
3988414074 ps |
| T495 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.4153840804 |
|
|
Mar 12 02:50:58 PM PDT 24 |
Mar 12 02:51:00 PM PDT 24 |
2546715743 ps |
| T496 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3980258533 |
|
|
Mar 12 02:51:12 PM PDT 24 |
Mar 12 02:51:16 PM PDT 24 |
2479492656 ps |
| T497 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.2844356511 |
|
|
Mar 12 02:48:51 PM PDT 24 |
Mar 12 02:48:52 PM PDT 24 |
2135335840 ps |
| T231 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.333588358 |
|
|
Mar 12 02:50:13 PM PDT 24 |
Mar 12 02:52:24 PM PDT 24 |
92163369724 ps |
| T498 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2699192598 |
|
|
Mar 12 02:50:11 PM PDT 24 |
Mar 12 02:50:18 PM PDT 24 |
2614475780 ps |
| T199 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.2356554154 |
|
|
Mar 12 02:51:02 PM PDT 24 |
Mar 12 02:51:14 PM PDT 24 |
17126403442 ps |
| T499 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1545329924 |
|
|
Mar 12 02:49:09 PM PDT 24 |
Mar 12 02:49:12 PM PDT 24 |
3284376700 ps |
| T500 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.2812635079 |
|
|
Mar 12 02:49:35 PM PDT 24 |
Mar 12 02:49:43 PM PDT 24 |
6800735473 ps |
| T501 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2651504237 |
|
|
Mar 12 02:50:32 PM PDT 24 |
Mar 12 02:50:34 PM PDT 24 |
3531838573 ps |
| T232 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.3527049895 |
|
|
Mar 12 02:49:02 PM PDT 24 |
Mar 12 02:52:08 PM PDT 24 |
138768184681 ps |
| T502 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2561696638 |
|
|
Mar 12 02:49:56 PM PDT 24 |
Mar 12 02:50:00 PM PDT 24 |
2618580050 ps |
| T145 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.755811420 |
|
|
Mar 12 02:51:21 PM PDT 24 |
Mar 12 02:53:44 PM PDT 24 |
183342247092 ps |
| T503 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.3282299775 |
|
|
Mar 12 02:50:43 PM PDT 24 |
Mar 12 02:50:50 PM PDT 24 |
9362827041 ps |
| T281 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3218305484 |
|
|
Mar 12 02:49:42 PM PDT 24 |
Mar 12 02:50:43 PM PDT 24 |
48600975196 ps |
| T350 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.473286301 |
|
|
Mar 12 02:51:36 PM PDT 24 |
Mar 12 02:53:12 PM PDT 24 |
110762651723 ps |
| T504 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.636072268 |
|
|
Mar 12 02:48:44 PM PDT 24 |
Mar 12 02:48:52 PM PDT 24 |
2614023051 ps |
| T505 |
/workspace/coverage/default/3.sysrst_ctrl_smoke.1225297905 |
|
|
Mar 12 02:48:56 PM PDT 24 |
Mar 12 02:49:02 PM PDT 24 |
2107223490 ps |
| T506 |
/workspace/coverage/default/47.sysrst_ctrl_smoke.4033358657 |
|
|
Mar 12 02:51:16 PM PDT 24 |
Mar 12 02:51:18 PM PDT 24 |
2141528927 ps |
| T507 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1924787597 |
|
|
Mar 12 02:49:55 PM PDT 24 |
Mar 12 02:49:57 PM PDT 24 |
3305347465 ps |
| T508 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3513163541 |
|
|
Mar 12 02:50:47 PM PDT 24 |
Mar 12 02:50:49 PM PDT 24 |
2622594409 ps |
| T509 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.405754462 |
|
|
Mar 12 02:51:26 PM PDT 24 |
Mar 12 02:51:33 PM PDT 24 |
2457593204 ps |
| T510 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2826274746 |
|
|
Mar 12 02:49:31 PM PDT 24 |
Mar 12 02:49:38 PM PDT 24 |
2505622000 ps |
| T511 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2430352434 |
|
|
Mar 12 02:50:43 PM PDT 24 |
Mar 12 02:50:47 PM PDT 24 |
3639710799 ps |
| T512 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.1184831551 |
|
|
Mar 12 02:50:20 PM PDT 24 |
Mar 12 02:50:30 PM PDT 24 |
3216866038 ps |
| T513 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.4193596699 |
|
|
Mar 12 02:50:21 PM PDT 24 |
Mar 12 02:50:29 PM PDT 24 |
2613383883 ps |
| T164 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.233972260 |
|
|
Mar 12 02:49:30 PM PDT 24 |
Mar 12 02:49:35 PM PDT 24 |
3749823297 ps |
| T234 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect.3261541144 |
|
|
Mar 12 02:50:24 PM PDT 24 |
Mar 12 02:54:41 PM PDT 24 |
100476645387 ps |
| T514 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3910577859 |
|
|
Mar 12 02:50:48 PM PDT 24 |
Mar 12 02:52:06 PM PDT 24 |
31585441640 ps |
| T515 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1069217119 |
|
|
Mar 12 02:49:30 PM PDT 24 |
Mar 12 02:49:32 PM PDT 24 |
2031991592 ps |
| T516 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.4198614983 |
|
|
Mar 12 02:50:51 PM PDT 24 |
Mar 12 02:50:57 PM PDT 24 |
2008712366 ps |
| T517 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3912199328 |
|
|
Mar 12 02:49:36 PM PDT 24 |
Mar 12 02:49:54 PM PDT 24 |
6746087946 ps |
| T518 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3664491372 |
|
|
Mar 12 02:48:53 PM PDT 24 |
Mar 12 02:48:56 PM PDT 24 |
2480131860 ps |
| T519 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2518546230 |
|
|
Mar 12 02:51:02 PM PDT 24 |
Mar 12 02:51:07 PM PDT 24 |
3426349829 ps |
| T243 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2002294651 |
|
|
Mar 12 02:49:46 PM PDT 24 |
Mar 12 02:54:06 PM PDT 24 |
102078886544 ps |
| T343 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1332097204 |
|
|
Mar 12 02:51:25 PM PDT 24 |
Mar 12 02:51:39 PM PDT 24 |
69914394134 ps |
| T520 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3672749870 |
|
|
Mar 12 02:50:15 PM PDT 24 |
Mar 12 02:50:17 PM PDT 24 |
2152919286 ps |
| T521 |
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.804103814 |
|
|
Mar 12 02:50:41 PM PDT 24 |
Mar 12 02:50:42 PM PDT 24 |
2616307876 ps |
| T200 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.895188642 |
|
|
Mar 12 02:49:32 PM PDT 24 |
Mar 12 02:51:49 PM PDT 24 |
313208571471 ps |
| T522 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.788457141 |
|
|
Mar 12 02:49:51 PM PDT 24 |
Mar 12 02:49:55 PM PDT 24 |
2243109871 ps |
| T134 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2568750344 |
|
|
Mar 12 02:49:30 PM PDT 24 |
Mar 12 02:49:33 PM PDT 24 |
10494537916 ps |
| T523 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.3416687784 |
|
|
Mar 12 02:49:37 PM PDT 24 |
Mar 12 02:49:40 PM PDT 24 |
2038751354 ps |
| T524 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.53241803 |
|
|
Mar 12 02:51:06 PM PDT 24 |
Mar 12 02:52:15 PM PDT 24 |
51938040014 ps |
| T525 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.545974320 |
|
|
Mar 12 02:50:50 PM PDT 24 |
Mar 12 02:51:19 PM PDT 24 |
13933307180 ps |
| T526 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.302850062 |
|
|
Mar 12 02:49:04 PM PDT 24 |
Mar 12 02:49:06 PM PDT 24 |
2035381941 ps |
| T181 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.2362439235 |
|
|
Mar 12 02:50:02 PM PDT 24 |
Mar 12 02:50:08 PM PDT 24 |
14509213442 ps |
| T527 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.1263103066 |
|
|
Mar 12 02:49:14 PM PDT 24 |
Mar 12 02:49:21 PM PDT 24 |
2439579057 ps |
| T528 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.1309277516 |
|
|
Mar 12 02:50:38 PM PDT 24 |
Mar 12 02:51:28 PM PDT 24 |
77367144735 ps |
| T529 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3202692555 |
|
|
Mar 12 02:51:02 PM PDT 24 |
Mar 12 02:51:10 PM PDT 24 |
2611697628 ps |
| T530 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.1804966908 |
|
|
Mar 12 02:50:22 PM PDT 24 |
Mar 12 02:50:25 PM PDT 24 |
6783259593 ps |
| T531 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3537297009 |
|
|
Mar 12 02:51:04 PM PDT 24 |
Mar 12 02:51:06 PM PDT 24 |
2535111216 ps |
| T351 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.907688050 |
|
|
Mar 12 02:49:44 PM PDT 24 |
Mar 12 02:52:00 PM PDT 24 |
193290585524 ps |
| T532 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.4116914248 |
|
|
Mar 12 02:49:24 PM PDT 24 |
Mar 12 02:49:35 PM PDT 24 |
3881994061 ps |
| T533 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1928945401 |
|
|
Mar 12 02:50:35 PM PDT 24 |
Mar 12 02:50:38 PM PDT 24 |
5068734267 ps |
| T534 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.664115201 |
|
|
Mar 12 02:50:43 PM PDT 24 |
Mar 12 02:50:50 PM PDT 24 |
2465574217 ps |
| T332 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1670240483 |
|
|
Mar 12 02:48:42 PM PDT 24 |
Mar 12 02:49:06 PM PDT 24 |
61521252570 ps |
| T535 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2304156878 |
|
|
Mar 12 02:49:21 PM PDT 24 |
Mar 12 02:49:24 PM PDT 24 |
2634269876 ps |
| T536 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2360473573 |
|
|
Mar 12 02:51:44 PM PDT 24 |
Mar 12 02:57:25 PM PDT 24 |
153101099295 ps |
| T537 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.436343289 |
|
|
Mar 12 02:48:49 PM PDT 24 |
Mar 12 02:48:53 PM PDT 24 |
2157912361 ps |
| T335 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3164972248 |
|
|
Mar 12 02:51:39 PM PDT 24 |
Mar 12 02:52:42 PM PDT 24 |
90005008736 ps |
| T538 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2204933344 |
|
|
Mar 12 02:49:26 PM PDT 24 |
Mar 12 02:49:28 PM PDT 24 |
2044679301 ps |
| T539 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.97956532 |
|
|
Mar 12 02:50:10 PM PDT 24 |
Mar 12 02:50:16 PM PDT 24 |
2112464619 ps |
| T235 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.375689418 |
|
|
Mar 12 02:49:04 PM PDT 24 |
Mar 12 02:54:08 PM PDT 24 |
110848822434 ps |
| T177 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1504594721 |
|
|
Mar 12 02:50:46 PM PDT 24 |
Mar 12 02:51:55 PM PDT 24 |
26992942235 ps |
| T359 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1014204079 |
|
|
Mar 12 02:51:30 PM PDT 24 |
Mar 12 02:52:13 PM PDT 24 |
67600684080 ps |
| T540 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2681357144 |
|
|
Mar 12 02:49:03 PM PDT 24 |
Mar 12 02:49:05 PM PDT 24 |
2988583173 ps |
| T165 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2457171563 |
|
|
Mar 12 02:49:03 PM PDT 24 |
Mar 12 02:49:14 PM PDT 24 |
5159922171 ps |
| T346 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3204035917 |
|
|
Mar 12 02:48:49 PM PDT 24 |
Mar 12 02:54:52 PM PDT 24 |
134137426201 ps |
| T541 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.2844467502 |
|
|
Mar 12 02:50:31 PM PDT 24 |
Mar 12 02:50:36 PM PDT 24 |
2445644446 ps |
| T542 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1806898038 |
|
|
Mar 12 02:49:05 PM PDT 24 |
Mar 12 02:49:46 PM PDT 24 |
59552169200 ps |
| T543 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.212528293 |
|
|
Mar 12 02:50:31 PM PDT 24 |
Mar 12 02:52:07 PM PDT 24 |
36772724081 ps |
| T544 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1186227569 |
|
|
Mar 12 02:49:36 PM PDT 24 |
Mar 12 02:49:38 PM PDT 24 |
2473684600 ps |
| T178 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.2419324451 |
|
|
Mar 12 02:50:49 PM PDT 24 |
Mar 12 02:50:51 PM PDT 24 |
2847229217 ps |
| T545 |
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3890081437 |
|
|
Mar 12 02:51:33 PM PDT 24 |
Mar 12 02:52:36 PM PDT 24 |
25332102626 ps |
| T302 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.205821436 |
|
|
Mar 12 02:50:44 PM PDT 24 |
Mar 12 02:51:36 PM PDT 24 |
39991416547 ps |
| T252 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.372706807 |
|
|
Mar 12 02:48:56 PM PDT 24 |
Mar 12 02:49:38 PM PDT 24 |
15092509083 ps |
| T295 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.2100540520 |
|
|
Mar 12 02:49:28 PM PDT 24 |
Mar 12 02:49:30 PM PDT 24 |
2132446116 ps |
| T296 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1159370602 |
|
|
Mar 12 02:51:02 PM PDT 24 |
Mar 12 02:51:09 PM PDT 24 |
2509259100 ps |
| T297 |
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3418481654 |
|
|
Mar 12 02:51:07 PM PDT 24 |
Mar 12 02:51:11 PM PDT 24 |
2503198771 ps |
| T166 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.415064560 |
|
|
Mar 12 02:50:09 PM PDT 24 |
Mar 12 02:50:57 PM PDT 24 |
20245042511 ps |
| T298 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1889159316 |
|
|
Mar 12 02:48:43 PM PDT 24 |
Mar 12 02:49:24 PM PDT 24 |
57678648635 ps |
| T299 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3814687896 |
|
|
Mar 12 02:49:19 PM PDT 24 |
Mar 12 02:49:54 PM PDT 24 |
26093299978 ps |
| T154 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.1978452358 |
|
|
Mar 12 02:49:41 PM PDT 24 |
Mar 12 02:49:46 PM PDT 24 |
3228000265 ps |
| T300 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2471483773 |
|
|
Mar 12 02:50:55 PM PDT 24 |
Mar 12 02:51:07 PM PDT 24 |
13914035114 ps |
| T301 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2604463589 |
|
|
Mar 12 02:50:11 PM PDT 24 |
Mar 12 02:50:13 PM PDT 24 |
2525554540 ps |
| T546 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.1253900335 |
|
|
Mar 12 02:50:41 PM PDT 24 |
Mar 12 02:50:44 PM PDT 24 |
3263311603 ps |
| T547 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1422143670 |
|
|
Mar 12 02:48:42 PM PDT 24 |
Mar 12 02:48:44 PM PDT 24 |
2266838293 ps |
| T548 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.4063435353 |
|
|
Mar 12 02:50:03 PM PDT 24 |
Mar 12 02:50:10 PM PDT 24 |
2515569586 ps |
| T155 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3512591335 |
|
|
Mar 12 02:49:48 PM PDT 24 |
Mar 12 02:49:56 PM PDT 24 |
4386642383 ps |
| T549 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1025727471 |
|
|
Mar 12 02:49:58 PM PDT 24 |
Mar 12 02:50:05 PM PDT 24 |
2610976232 ps |
| T550 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.147388179 |
|
|
Mar 12 02:51:07 PM PDT 24 |
Mar 12 02:51:09 PM PDT 24 |
2121914872 ps |
| T551 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.986147825 |
|
|
Mar 12 02:49:22 PM PDT 24 |
Mar 12 02:49:30 PM PDT 24 |
2599340873 ps |
| T552 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1425423786 |
|
|
Mar 12 02:50:55 PM PDT 24 |
Mar 12 02:51:00 PM PDT 24 |
2459937202 ps |
| T553 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.3722990876 |
|
|
Mar 12 02:48:41 PM PDT 24 |
Mar 12 02:48:42 PM PDT 24 |
2549713364 ps |
| T169 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1381421024 |
|
|
Mar 12 02:49:25 PM PDT 24 |
Mar 12 02:49:33 PM PDT 24 |
3696083849 ps |
| T188 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.379224484 |
|
|
Mar 12 02:49:38 PM PDT 24 |
Mar 12 02:49:42 PM PDT 24 |
3763753586 ps |
| T554 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.2824090860 |
|
|
Mar 12 02:49:06 PM PDT 24 |
Mar 12 02:49:13 PM PDT 24 |
2110118730 ps |
| T555 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.952740172 |
|
|
Mar 12 02:50:06 PM PDT 24 |
Mar 12 02:50:15 PM PDT 24 |
2509762993 ps |
| T556 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.3433231922 |
|
|
Mar 12 02:49:41 PM PDT 24 |
Mar 12 02:50:03 PM PDT 24 |
7752786596 ps |
| T342 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3110550376 |
|
|
Mar 12 02:51:00 PM PDT 24 |
Mar 12 02:52:07 PM PDT 24 |
109093934343 ps |
| T557 |
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3640522181 |
|
|
Mar 12 02:50:21 PM PDT 24 |
Mar 12 02:50:30 PM PDT 24 |
3085785136 ps |
| T167 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.474594473 |
|
|
Mar 12 02:49:27 PM PDT 24 |
Mar 12 02:49:30 PM PDT 24 |
4023690544 ps |
| T558 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.1372762886 |
|
|
Mar 12 02:51:26 PM PDT 24 |
Mar 12 02:51:33 PM PDT 24 |
2107846138 ps |
| T559 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.222495231 |
|
|
Mar 12 02:48:51 PM PDT 24 |
Mar 12 02:48:53 PM PDT 24 |
2128366446 ps |
| T560 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2555351212 |
|
|
Mar 12 02:50:13 PM PDT 24 |
Mar 12 02:50:16 PM PDT 24 |
2626492003 ps |
| T561 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2814142599 |
|
|
Mar 12 02:51:44 PM PDT 24 |
Mar 12 02:52:47 PM PDT 24 |
95330428687 ps |
| T562 |
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.639606046 |
|
|
Mar 12 02:50:24 PM PDT 24 |
Mar 12 02:50:32 PM PDT 24 |
2463111059 ps |
| T87 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.410603818 |
|
|
Mar 12 02:51:29 PM PDT 24 |
Mar 12 02:52:26 PM PDT 24 |
84535230686 ps |
| T563 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1549074371 |
|
|
Mar 12 02:50:02 PM PDT 24 |
Mar 12 02:50:09 PM PDT 24 |
2448034661 ps |
| T564 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.870195730 |
|
|
Mar 12 02:49:41 PM PDT 24 |
Mar 12 02:49:48 PM PDT 24 |
2225492948 ps |
| T565 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.958039719 |
|
|
Mar 12 02:49:30 PM PDT 24 |
Mar 12 02:50:49 PM PDT 24 |
56189941152 ps |
| T566 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.4098836510 |
|
|
Mar 12 02:50:33 PM PDT 24 |
Mar 12 02:50:36 PM PDT 24 |
2538752507 ps |
| T567 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3584197200 |
|
|
Mar 12 02:50:53 PM PDT 24 |
Mar 12 02:50:56 PM PDT 24 |
4529337929 ps |
| T568 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.420911001 |
|
|
Mar 12 02:50:44 PM PDT 24 |
Mar 12 02:50:46 PM PDT 24 |
2496178360 ps |
| T569 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.2595375281 |
|
|
Mar 12 02:49:47 PM PDT 24 |
Mar 12 02:49:51 PM PDT 24 |
2520345225 ps |
| T570 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.2703421649 |
|
|
Mar 12 02:48:51 PM PDT 24 |
Mar 12 02:48:53 PM PDT 24 |
9024224389 ps |
| T126 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.2535930429 |
|
|
Mar 12 02:50:17 PM PDT 24 |
Mar 12 02:50:23 PM PDT 24 |
3006502612 ps |
| T571 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.4217650364 |
|
|
Mar 12 02:51:19 PM PDT 24 |
Mar 12 02:51:21 PM PDT 24 |
2478829666 ps |
| T572 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3427224246 |
|
|
Mar 12 02:49:05 PM PDT 24 |
Mar 12 02:49:09 PM PDT 24 |
2510993185 ps |
| T573 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2947605661 |
|
|
Mar 12 02:50:55 PM PDT 24 |
Mar 12 02:50:57 PM PDT 24 |
2316273465 ps |
| T574 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.1780768875 |
|
|
Mar 12 02:49:47 PM PDT 24 |
Mar 12 02:49:56 PM PDT 24 |
3253685721 ps |
| T575 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.927405311 |
|
|
Mar 12 02:50:49 PM PDT 24 |
Mar 12 02:50:57 PM PDT 24 |
2509233697 ps |
| T576 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.1818136413 |
|
|
Mar 12 02:50:16 PM PDT 24 |
Mar 12 02:50:23 PM PDT 24 |
7058995869 ps |
| T135 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.741192563 |
|
|
Mar 12 02:50:24 PM PDT 24 |
Mar 12 02:50:37 PM PDT 24 |
20492619778 ps |
| T577 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.3990922945 |
|
|
Mar 12 02:49:40 PM PDT 24 |
Mar 12 02:50:17 PM PDT 24 |
50483947693 ps |
| T334 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1249391339 |
|
|
Mar 12 02:51:31 PM PDT 24 |
Mar 12 02:52:32 PM PDT 24 |
87186358475 ps |
| T578 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.1047435225 |
|
|
Mar 12 02:50:42 PM PDT 24 |
Mar 12 02:50:44 PM PDT 24 |
2124016047 ps |
| T579 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.4235405098 |
|
|
Mar 12 02:51:24 PM PDT 24 |
Mar 12 02:56:49 PM PDT 24 |
132290661275 ps |
| T580 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3014194811 |
|
|
Mar 12 02:49:30 PM PDT 24 |
Mar 12 02:51:15 PM PDT 24 |
80560876336 ps |
| T581 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.765063973 |
|
|
Mar 12 02:50:10 PM PDT 24 |
Mar 12 02:50:19 PM PDT 24 |
2991628352 ps |
| T212 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1145665680 |
|
|
Mar 12 02:50:55 PM PDT 24 |
Mar 12 02:51:59 PM PDT 24 |
23872321837 ps |
| T582 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.1529369719 |
|
|
Mar 12 02:48:54 PM PDT 24 |
Mar 12 02:49:20 PM PDT 24 |
9231013133 ps |
| T583 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2913530706 |
|
|
Mar 12 02:51:09 PM PDT 24 |
Mar 12 02:51:11 PM PDT 24 |
3493961326 ps |
| T584 |
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2679049325 |
|
|
Mar 12 02:51:31 PM PDT 24 |
Mar 12 02:54:22 PM PDT 24 |
135126987417 ps |
| T585 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.92744593 |
|
|
Mar 12 02:50:21 PM PDT 24 |
Mar 12 02:50:24 PM PDT 24 |
2026898197 ps |
| T236 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2098365286 |
|
|
Mar 12 02:50:02 PM PDT 24 |
Mar 12 02:50:42 PM PDT 24 |
171966622456 ps |
| T586 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3815813097 |
|
|
Mar 12 02:48:58 PM PDT 24 |
Mar 12 02:49:04 PM PDT 24 |
2019043077 ps |
| T587 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2073087823 |
|
|
Mar 12 02:51:24 PM PDT 24 |
Mar 12 02:51:33 PM PDT 24 |
26131949410 ps |
| T588 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.4031588737 |
|
|
Mar 12 02:50:15 PM PDT 24 |
Mar 12 02:50:22 PM PDT 24 |
2508666090 ps |
| T589 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1584598831 |
|
|
Mar 12 02:50:49 PM PDT 24 |
Mar 12 02:51:46 PM PDT 24 |
82610148926 ps |
| T590 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.924488510 |
|
|
Mar 12 02:50:18 PM PDT 24 |
Mar 12 02:52:33 PM PDT 24 |
49403446888 ps |
| T591 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1327068748 |
|
|
Mar 12 02:50:41 PM PDT 24 |
Mar 12 02:50:49 PM PDT 24 |
2455734845 ps |
| T592 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.3848797649 |
|
|
Mar 12 02:50:33 PM PDT 24 |
Mar 12 02:50:44 PM PDT 24 |
3536529357 ps |
| T593 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all.1036315919 |
|
|
Mar 12 02:49:49 PM PDT 24 |
Mar 12 02:49:55 PM PDT 24 |
9414057740 ps |
| T594 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.796580925 |
|
|
Mar 12 02:49:37 PM PDT 24 |
Mar 12 02:49:40 PM PDT 24 |
3245956593 ps |