Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.62 99.29 96.38 100.00 96.15 98.74 99.42 93.36


Total test records in report: 910
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T438 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.543696326 Mar 17 12:57:05 PM PDT 24 Mar 17 12:57:09 PM PDT 24 3497793632 ps
T439 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2979514619 Mar 17 12:57:19 PM PDT 24 Mar 17 12:59:16 PM PDT 24 379175369869 ps
T331 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.3525913616 Mar 17 12:57:01 PM PDT 24 Mar 17 01:01:55 PM PDT 24 115573053372 ps
T352 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2075232088 Mar 17 12:55:41 PM PDT 24 Mar 17 12:57:17 PM PDT 24 66242840268 ps
T440 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3345296767 Mar 17 12:55:34 PM PDT 24 Mar 17 12:55:45 PM PDT 24 3713465488 ps
T441 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.391476203 Mar 17 12:56:19 PM PDT 24 Mar 17 12:56:27 PM PDT 24 2613616814 ps
T263 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.1237594418 Mar 17 12:56:45 PM PDT 24 Mar 17 12:58:10 PM PDT 24 118702162903 ps
T442 /workspace/coverage/default/21.sysrst_ctrl_alert_test.2326307655 Mar 17 12:55:59 PM PDT 24 Mar 17 12:56:06 PM PDT 24 2010896532 ps
T443 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2196620367 Mar 17 12:55:58 PM PDT 24 Mar 17 12:56:05 PM PDT 24 2510388350 ps
T444 /workspace/coverage/default/41.sysrst_ctrl_smoke.57609502 Mar 17 12:56:46 PM PDT 24 Mar 17 12:56:52 PM PDT 24 2115521411 ps
T445 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.550652021 Mar 17 12:55:53 PM PDT 24 Mar 17 12:55:57 PM PDT 24 3858220920 ps
T446 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.831718839 Mar 17 12:55:47 PM PDT 24 Mar 17 12:55:50 PM PDT 24 2152075700 ps
T447 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.889317346 Mar 17 12:55:33 PM PDT 24 Mar 17 12:55:40 PM PDT 24 2438537500 ps
T448 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3263781491 Mar 17 12:56:58 PM PDT 24 Mar 17 12:57:04 PM PDT 24 2032108735 ps
T185 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1790801748 Mar 17 12:56:03 PM PDT 24 Mar 17 12:56:06 PM PDT 24 4871497400 ps
T449 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2275846823 Mar 17 12:56:33 PM PDT 24 Mar 17 12:56:39 PM PDT 24 2131635278 ps
T450 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2177065199 Mar 17 12:56:36 PM PDT 24 Mar 17 12:56:38 PM PDT 24 3532153566 ps
T451 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2374023656 Mar 17 12:56:19 PM PDT 24 Mar 17 01:00:03 PM PDT 24 329128655528 ps
T452 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2568626363 Mar 17 12:56:18 PM PDT 24 Mar 17 12:56:21 PM PDT 24 2535966591 ps
T219 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.3791429494 Mar 17 12:55:48 PM PDT 24 Mar 17 12:55:50 PM PDT 24 2858495629 ps
T453 /workspace/coverage/default/49.sysrst_ctrl_smoke.3143156019 Mar 17 12:57:18 PM PDT 24 Mar 17 12:57:24 PM PDT 24 2112074481 ps
T312 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.885130194 Mar 17 12:56:26 PM PDT 24 Mar 17 12:56:33 PM PDT 24 2474823411 ps
T454 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2930429334 Mar 17 12:55:44 PM PDT 24 Mar 17 12:58:29 PM PDT 24 61707493928 ps
T133 /workspace/coverage/default/23.sysrst_ctrl_stress_all.118201286 Mar 17 12:56:08 PM PDT 24 Mar 17 12:56:27 PM PDT 24 7712072425 ps
T264 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.2147662287 Mar 17 12:56:34 PM PDT 24 Mar 17 12:58:50 PM PDT 24 56321226164 ps
T455 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.4153879921 Mar 17 12:55:47 PM PDT 24 Mar 17 12:55:49 PM PDT 24 2465882140 ps
T314 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.305304313 Mar 17 12:55:39 PM PDT 24 Mar 17 12:56:33 PM PDT 24 20035391038 ps
T456 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1675467954 Mar 17 12:56:44 PM PDT 24 Mar 17 12:56:51 PM PDT 24 2510949239 ps
T301 /workspace/coverage/default/16.sysrst_ctrl_stress_all.406184567 Mar 17 12:55:48 PM PDT 24 Mar 17 12:56:12 PM PDT 24 8728314809 ps
T457 /workspace/coverage/default/28.sysrst_ctrl_stress_all.572899140 Mar 17 12:56:20 PM PDT 24 Mar 17 12:56:31 PM PDT 24 8678372651 ps
T458 /workspace/coverage/default/14.sysrst_ctrl_alert_test.3274884523 Mar 17 12:55:39 PM PDT 24 Mar 17 12:55:45 PM PDT 24 2012764866 ps
T330 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.323654219 Mar 17 12:57:22 PM PDT 24 Mar 17 12:57:41 PM PDT 24 77778609739 ps
T459 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3783037828 Mar 17 12:55:27 PM PDT 24 Mar 17 12:55:34 PM PDT 24 2398257367 ps
T460 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3986196827 Mar 17 12:56:00 PM PDT 24 Mar 17 12:56:03 PM PDT 24 4630619708 ps
T134 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1713432227 Mar 17 12:55:35 PM PDT 24 Mar 17 12:55:42 PM PDT 24 8865108942 ps
T461 /workspace/coverage/default/49.sysrst_ctrl_stress_all.1651619213 Mar 17 12:57:16 PM PDT 24 Mar 17 12:57:43 PM PDT 24 10335550396 ps
T462 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.4122529720 Mar 17 12:56:34 PM PDT 24 Mar 17 12:56:42 PM PDT 24 2465911575 ps
T463 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3023592270 Mar 17 12:56:28 PM PDT 24 Mar 17 12:56:33 PM PDT 24 3305978121 ps
T344 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1075568687 Mar 17 12:57:27 PM PDT 24 Mar 17 01:01:27 PM PDT 24 87166722082 ps
T464 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3119975844 Mar 17 12:55:49 PM PDT 24 Mar 17 12:55:53 PM PDT 24 2472031887 ps
T212 /workspace/coverage/default/1.sysrst_ctrl_stress_all.2029922151 Mar 17 12:55:16 PM PDT 24 Mar 17 12:55:32 PM PDT 24 11339471883 ps
T465 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.742559380 Mar 17 12:55:33 PM PDT 24 Mar 17 12:55:39 PM PDT 24 2610390198 ps
T302 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2155695774 Mar 17 12:57:04 PM PDT 24 Mar 17 12:57:10 PM PDT 24 3570691642 ps
T466 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.1680017122 Mar 17 12:56:27 PM PDT 24 Mar 17 12:56:32 PM PDT 24 2614721533 ps
T467 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2584483591 Mar 17 12:57:02 PM PDT 24 Mar 17 12:57:07 PM PDT 24 2615771084 ps
T468 /workspace/coverage/default/22.sysrst_ctrl_smoke.2209936763 Mar 17 12:56:00 PM PDT 24 Mar 17 12:56:02 PM PDT 24 2141419556 ps
T469 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3326420357 Mar 17 12:55:51 PM PDT 24 Mar 17 12:55:53 PM PDT 24 2280845575 ps
T361 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.376515601 Mar 17 12:57:13 PM PDT 24 Mar 17 12:59:50 PM PDT 24 54652895721 ps
T470 /workspace/coverage/default/29.sysrst_ctrl_alert_test.892705905 Mar 17 12:56:27 PM PDT 24 Mar 17 12:56:32 PM PDT 24 2013112872 ps
T471 /workspace/coverage/default/25.sysrst_ctrl_smoke.2550560474 Mar 17 12:56:19 PM PDT 24 Mar 17 12:56:25 PM PDT 24 2115147986 ps
T472 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.356633412 Mar 17 12:56:34 PM PDT 24 Mar 17 12:56:42 PM PDT 24 2512197161 ps
T473 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3433704943 Mar 17 12:56:36 PM PDT 24 Mar 17 12:56:49 PM PDT 24 8318275889 ps
T474 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1743437545 Mar 17 12:57:23 PM PDT 24 Mar 17 12:57:54 PM PDT 24 44541348928 ps
T475 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.996692892 Mar 17 12:55:41 PM PDT 24 Mar 17 12:55:50 PM PDT 24 3224808149 ps
T476 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.2621878665 Mar 17 12:56:34 PM PDT 24 Mar 17 12:56:35 PM PDT 24 3559070883 ps
T101 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2550434849 Mar 17 12:57:21 PM PDT 24 Mar 17 12:57:51 PM PDT 24 68165846665 ps
T477 /workspace/coverage/default/17.sysrst_ctrl_alert_test.3409420623 Mar 17 12:55:50 PM PDT 24 Mar 17 12:55:56 PM PDT 24 2014030185 ps
T478 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2886173520 Mar 17 12:56:20 PM PDT 24 Mar 17 12:56:22 PM PDT 24 2108226706 ps
T157 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2773442604 Mar 17 12:55:45 PM PDT 24 Mar 17 12:55:53 PM PDT 24 2893005348 ps
T82 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.442477544 Mar 17 12:56:34 PM PDT 24 Mar 17 01:01:51 PM PDT 24 115340432990 ps
T479 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3400287072 Mar 17 12:56:51 PM PDT 24 Mar 17 12:56:54 PM PDT 24 3451972436 ps
T480 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1588057804 Mar 17 12:55:41 PM PDT 24 Mar 17 12:57:37 PM PDT 24 43284063848 ps
T158 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.2226841794 Mar 17 12:56:58 PM PDT 24 Mar 17 01:10:00 PM PDT 24 1319462300345 ps
T266 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3330954742 Mar 17 12:57:23 PM PDT 24 Mar 17 12:58:44 PM PDT 24 122733850735 ps
T481 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3583504947 Mar 17 12:57:21 PM PDT 24 Mar 17 12:57:35 PM PDT 24 56481970017 ps
T482 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2877133437 Mar 17 12:57:16 PM PDT 24 Mar 17 12:57:24 PM PDT 24 2508813053 ps
T483 /workspace/coverage/default/19.sysrst_ctrl_alert_test.1793599701 Mar 17 12:55:54 PM PDT 24 Mar 17 12:55:56 PM PDT 24 2039703742 ps
T303 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1548129030 Mar 17 12:55:57 PM PDT 24 Mar 17 12:57:57 PM PDT 24 44022789080 ps
T484 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1177889932 Mar 17 12:56:35 PM PDT 24 Mar 17 12:56:38 PM PDT 24 2623640844 ps
T485 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.3584693445 Mar 17 12:55:58 PM PDT 24 Mar 17 12:56:02 PM PDT 24 2617710351 ps
T486 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3093918118 Mar 17 12:55:17 PM PDT 24 Mar 17 12:55:20 PM PDT 24 3547867745 ps
T337 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.756006359 Mar 17 12:57:28 PM PDT 24 Mar 17 01:01:14 PM PDT 24 86201793794 ps
T487 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.4005323296 Mar 17 12:56:32 PM PDT 24 Mar 17 12:56:34 PM PDT 24 2469409226 ps
T488 /workspace/coverage/default/6.sysrst_ctrl_smoke.1533675536 Mar 17 12:55:30 PM PDT 24 Mar 17 12:55:37 PM PDT 24 2113425262 ps
T489 /workspace/coverage/default/3.sysrst_ctrl_stress_all.1509265995 Mar 17 12:55:26 PM PDT 24 Mar 17 12:56:03 PM PDT 24 14219390469 ps
T304 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3944062737 Mar 17 12:55:40 PM PDT 24 Mar 17 12:55:44 PM PDT 24 3368764534 ps
T490 /workspace/coverage/default/17.sysrst_ctrl_smoke.3360184484 Mar 17 12:55:51 PM PDT 24 Mar 17 12:55:53 PM PDT 24 2131828189 ps
T491 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.2699860880 Mar 17 12:55:46 PM PDT 24 Mar 17 12:55:54 PM PDT 24 2512165168 ps
T351 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.121887404 Mar 17 12:55:17 PM PDT 24 Mar 17 12:57:10 PM PDT 24 172074074890 ps
T492 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2402051244 Mar 17 12:55:43 PM PDT 24 Mar 17 12:55:52 PM PDT 24 3332089534 ps
T87 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.4046272382 Mar 17 12:55:52 PM PDT 24 Mar 17 12:56:36 PM PDT 24 2482147537815 ps
T493 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1576303900 Mar 17 12:55:43 PM PDT 24 Mar 17 12:55:45 PM PDT 24 3672579853 ps
T494 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1790062919 Mar 17 12:57:05 PM PDT 24 Mar 17 12:57:07 PM PDT 24 2976352363 ps
T495 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.2212139537 Mar 17 12:55:54 PM PDT 24 Mar 17 12:55:57 PM PDT 24 2533579295 ps
T496 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.3187549377 Mar 17 12:55:33 PM PDT 24 Mar 17 12:55:35 PM PDT 24 3151484902 ps
T497 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3754330164 Mar 17 12:55:45 PM PDT 24 Mar 17 12:55:52 PM PDT 24 2611286522 ps
T498 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3617936317 Mar 17 12:55:41 PM PDT 24 Mar 17 12:55:43 PM PDT 24 2242521266 ps
T135 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.653199075 Mar 17 12:56:34 PM PDT 24 Mar 17 12:58:47 PM PDT 24 508477642697 ps
T499 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3611343227 Mar 17 12:56:39 PM PDT 24 Mar 17 12:56:48 PM PDT 24 3439485056 ps
T356 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.887907203 Mar 17 12:57:21 PM PDT 24 Mar 17 12:58:36 PM PDT 24 29474582979 ps
T246 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3593708360 Mar 17 12:57:22 PM PDT 24 Mar 17 12:57:39 PM PDT 24 23100269587 ps
T500 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.2948172974 Mar 17 12:55:57 PM PDT 24 Mar 17 12:56:04 PM PDT 24 2259742925 ps
T501 /workspace/coverage/default/11.sysrst_ctrl_stress_all.2632089125 Mar 17 12:55:47 PM PDT 24 Mar 17 01:03:51 PM PDT 24 179790081815 ps
T502 /workspace/coverage/default/38.sysrst_ctrl_smoke.2383136377 Mar 17 12:56:38 PM PDT 24 Mar 17 12:56:39 PM PDT 24 2152690338 ps
T162 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.1103867818 Mar 17 12:56:45 PM PDT 24 Mar 17 12:56:56 PM PDT 24 4657040774 ps
T136 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1807166777 Mar 17 12:56:56 PM PDT 24 Mar 17 12:58:18 PM PDT 24 115878529010 ps
T163 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.2324436120 Mar 17 12:56:32 PM PDT 24 Mar 17 12:59:52 PM PDT 24 1162997333009 ps
T308 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2509550594 Mar 17 12:56:19 PM PDT 24 Mar 17 12:56:31 PM PDT 24 9152731782 ps
T225 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.1621910518 Mar 17 12:55:30 PM PDT 24 Mar 17 12:55:33 PM PDT 24 3141853543 ps
T503 /workspace/coverage/default/35.sysrst_ctrl_smoke.1462676723 Mar 17 12:56:33 PM PDT 24 Mar 17 12:56:36 PM PDT 24 2126156525 ps
T504 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2756028452 Mar 17 12:56:35 PM PDT 24 Mar 17 12:56:39 PM PDT 24 5065563489 ps
T269 /workspace/coverage/default/14.sysrst_ctrl_stress_all.1912809445 Mar 17 12:55:48 PM PDT 24 Mar 17 01:01:45 PM PDT 24 129599570130 ps
T188 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2784374994 Mar 17 12:56:47 PM PDT 24 Mar 17 12:57:01 PM PDT 24 29142723792 ps
T505 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3389406273 Mar 17 12:56:48 PM PDT 24 Mar 17 12:56:56 PM PDT 24 3441198657 ps
T506 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.18480914 Mar 17 12:56:38 PM PDT 24 Mar 17 12:56:41 PM PDT 24 3573532639 ps
T507 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2777316217 Mar 17 12:55:44 PM PDT 24 Mar 17 12:55:51 PM PDT 24 2465986970 ps
T508 /workspace/coverage/default/36.sysrst_ctrl_smoke.834169825 Mar 17 12:56:34 PM PDT 24 Mar 17 12:56:40 PM PDT 24 2111467346 ps
T509 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2113763829 Mar 17 12:55:34 PM PDT 24 Mar 17 12:55:36 PM PDT 24 2371365167 ps
T510 /workspace/coverage/default/13.sysrst_ctrl_smoke.2314096717 Mar 17 12:57:02 PM PDT 24 Mar 17 12:57:05 PM PDT 24 2117714817 ps
T511 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3510096554 Mar 17 12:55:40 PM PDT 24 Mar 17 12:55:42 PM PDT 24 2673337588 ps
T512 /workspace/coverage/default/15.sysrst_ctrl_smoke.1044555181 Mar 17 12:55:42 PM PDT 24 Mar 17 12:55:49 PM PDT 24 2110555829 ps
T513 /workspace/coverage/default/4.sysrst_ctrl_smoke.3937541935 Mar 17 12:55:25 PM PDT 24 Mar 17 12:55:32 PM PDT 24 2110451633 ps
T247 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2900513907 Mar 17 12:57:17 PM PDT 24 Mar 17 12:58:22 PM PDT 24 25332448912 ps
T355 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2517946938 Mar 17 12:56:58 PM PDT 24 Mar 17 01:02:19 PM PDT 24 122840987429 ps
T514 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2860112179 Mar 17 12:56:32 PM PDT 24 Mar 17 12:56:40 PM PDT 24 2802495173 ps
T515 /workspace/coverage/default/18.sysrst_ctrl_alert_test.4113134589 Mar 17 12:55:53 PM PDT 24 Mar 17 12:55:56 PM PDT 24 2024815310 ps
T84 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.3458822231 Mar 17 12:56:12 PM PDT 24 Mar 17 12:56:18 PM PDT 24 2820892942 ps
T226 /workspace/coverage/default/23.sysrst_ctrl_smoke.1204665489 Mar 17 12:56:05 PM PDT 24 Mar 17 12:56:11 PM PDT 24 2111046995 ps
T227 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3444846805 Mar 17 12:56:48 PM PDT 24 Mar 17 12:56:51 PM PDT 24 2481068187 ps
T228 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1587694621 Mar 17 12:57:09 PM PDT 24 Mar 17 12:57:49 PM PDT 24 59029186274 ps
T85 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2307075376 Mar 17 12:55:30 PM PDT 24 Mar 17 12:56:37 PM PDT 24 58831105289 ps
T194 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.637907409 Mar 17 12:57:21 PM PDT 24 Mar 17 01:01:38 PM PDT 24 90481771805 ps
T195 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.1744249035 Mar 17 12:56:21 PM PDT 24 Mar 17 12:56:25 PM PDT 24 2247902258 ps
T196 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2060861072 Mar 17 12:56:39 PM PDT 24 Mar 17 12:57:12 PM PDT 24 25341917153 ps
T197 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3882507514 Mar 17 12:57:04 PM PDT 24 Mar 17 12:57:09 PM PDT 24 2171233329 ps
T198 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.3195080332 Mar 17 12:55:51 PM PDT 24 Mar 17 12:57:20 PM PDT 24 62722154386 ps
T189 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.288440175 Mar 17 12:56:02 PM PDT 24 Mar 17 12:56:08 PM PDT 24 4448673082 ps
T199 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2464383681 Mar 17 12:55:59 PM PDT 24 Mar 17 12:57:12 PM PDT 24 105567965064 ps
T200 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.200758978 Mar 17 12:55:52 PM PDT 24 Mar 17 12:55:54 PM PDT 24 2626616714 ps
T201 /workspace/coverage/default/43.sysrst_ctrl_stress_all.1032738734 Mar 17 12:56:56 PM PDT 24 Mar 17 12:57:16 PM PDT 24 15280067120 ps
T516 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2342185924 Mar 17 12:57:04 PM PDT 24 Mar 17 12:57:07 PM PDT 24 2537037583 ps
T517 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3153969917 Mar 17 12:56:35 PM PDT 24 Mar 17 12:56:38 PM PDT 24 2540254521 ps
T362 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.3840772097 Mar 17 12:56:07 PM PDT 24 Mar 17 01:02:49 PM PDT 24 150120922540 ps
T518 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.1847748042 Mar 17 12:56:16 PM PDT 24 Mar 17 12:56:19 PM PDT 24 2629960036 ps
T368 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3656557314 Mar 17 12:57:21 PM PDT 24 Mar 17 01:00:56 PM PDT 24 123923191178 ps
T519 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3272862394 Mar 17 12:55:54 PM PDT 24 Mar 17 12:55:58 PM PDT 24 3730173373 ps
T520 /workspace/coverage/default/10.sysrst_ctrl_alert_test.1831720891 Mar 17 12:55:38 PM PDT 24 Mar 17 12:55:40 PM PDT 24 2076832413 ps
T369 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2686356112 Mar 17 12:57:14 PM PDT 24 Mar 17 12:58:49 PM PDT 24 76584513123 ps
T521 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.4098466791 Mar 17 12:56:44 PM PDT 24 Mar 17 12:56:47 PM PDT 24 3411633562 ps
T522 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1555463843 Mar 17 12:56:58 PM PDT 24 Mar 17 12:57:07 PM PDT 24 8353077173 ps
T523 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.377269083 Mar 17 12:57:04 PM PDT 24 Mar 17 12:57:10 PM PDT 24 3383582427 ps
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T525 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.309465022 Mar 17 12:56:36 PM PDT 24 Mar 17 12:56:39 PM PDT 24 2632847806 ps
T526 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3104046983 Mar 17 12:57:13 PM PDT 24 Mar 17 12:57:28 PM PDT 24 21594287391 ps
T527 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1024833987 Mar 17 12:56:34 PM PDT 24 Mar 17 12:56:40 PM PDT 24 3549353237 ps
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T137 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2400948716 Mar 17 12:57:00 PM PDT 24 Mar 17 12:59:42 PM PDT 24 582623676547 ps
T528 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3253938757 Mar 17 12:56:57 PM PDT 24 Mar 17 12:57:08 PM PDT 24 3463246295 ps
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T531 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3928572785 Mar 17 12:55:33 PM PDT 24 Mar 17 12:55:36 PM PDT 24 2238640353 ps
T338 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3755314822 Mar 17 12:57:00 PM PDT 24 Mar 17 01:05:02 PM PDT 24 186419491865 ps
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T546 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.2857886701 Mar 17 12:55:52 PM PDT 24 Mar 17 12:55:54 PM PDT 24 2523961534 ps
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T549 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.3322678540 Mar 17 12:55:39 PM PDT 24 Mar 17 12:55:42 PM PDT 24 3155311867 ps
T306 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3581212436 Mar 17 12:56:37 PM PDT 24 Mar 17 12:57:24 PM PDT 24 95082250577 ps
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T561 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3356986560 Mar 17 12:55:18 PM PDT 24 Mar 17 12:55:22 PM PDT 24 2614139391 ps
T562 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.446177234 Mar 17 12:56:25 PM PDT 24 Mar 17 12:56:32 PM PDT 24 2611278872 ps
T77 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2940058446 Mar 17 12:55:18 PM PDT 24 Mar 17 12:56:43 PM PDT 24 33154546517 ps
T563 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2539068652 Mar 17 12:55:40 PM PDT 24 Mar 17 12:55:47 PM PDT 24 2266793734 ps
T564 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.2353861798 Mar 17 12:56:05 PM PDT 24 Mar 17 12:56:11 PM PDT 24 3200659150 ps
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T566 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2339791669 Mar 17 12:55:16 PM PDT 24 Mar 17 12:55:25 PM PDT 24 3221246113 ps
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T571 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.632011942 Mar 17 12:56:45 PM PDT 24 Mar 17 12:56:52 PM PDT 24 2614432930 ps
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T143 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3487664536 Mar 17 12:55:30 PM PDT 24 Mar 17 12:55:38 PM PDT 24 8777451683 ps
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T573 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.12142014 Mar 17 12:55:27 PM PDT 24 Mar 17 12:55:35 PM PDT 24 2511564427 ps
T574 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.4087567402 Mar 17 12:56:45 PM PDT 24 Mar 17 12:58:22 PM PDT 24 100625909686 ps
T255 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.286099397 Mar 17 12:57:19 PM PDT 24 Mar 17 01:03:00 PM PDT 24 122505328448 ps
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T575 /workspace/coverage/default/27.sysrst_ctrl_smoke.3813387111 Mar 17 12:56:21 PM PDT 24 Mar 17 12:56:23 PM PDT 24 2130892010 ps
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T577 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1023890284 Mar 17 12:56:53 PM PDT 24 Mar 17 12:56:55 PM PDT 24 2478782388 ps
T578 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3175623721 Mar 17 12:55:11 PM PDT 24 Mar 17 12:55:15 PM PDT 24 2148247370 ps
T579 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.1803432353 Mar 17 12:56:10 PM PDT 24 Mar 17 12:56:12 PM PDT 24 2158435783 ps
T213 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.4093931464 Mar 17 12:56:34 PM PDT 24 Mar 17 01:00:13 PM PDT 24 365931875425 ps
T580 /workspace/coverage/default/23.sysrst_ctrl_alert_test.2614943714 Mar 17 12:56:10 PM PDT 24 Mar 17 12:56:11 PM PDT 24 2083128374 ps
T581 /workspace/coverage/default/21.sysrst_ctrl_stress_all.310443697 Mar 17 12:55:53 PM PDT 24 Mar 17 12:56:16 PM PDT 24 8512227834 ps
T165 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3957200623 Mar 17 12:55:57 PM PDT 24 Mar 17 12:57:28 PM PDT 24 251433036689 ps
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T583 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.1218837808 Mar 17 12:56:39 PM PDT 24 Mar 17 12:57:09 PM PDT 24 123959543427 ps
T346 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.3591474066 Mar 17 12:56:20 PM PDT 24 Mar 17 12:58:16 PM PDT 24 93938024568 ps
T335 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.2944934481 Mar 17 12:56:10 PM PDT 24 Mar 17 01:01:05 PM PDT 24 115050126028 ps
T584 /workspace/coverage/default/14.sysrst_ctrl_smoke.593508393 Mar 17 12:55:53 PM PDT 24 Mar 17 12:55:54 PM PDT 24 2130732744 ps
T585 /workspace/coverage/default/36.sysrst_ctrl_alert_test.647591271 Mar 17 12:56:41 PM PDT 24 Mar 17 12:56:43 PM PDT 24 2040773761 ps
T586 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.896675591 Mar 17 12:55:50 PM PDT 24 Mar 17 12:56:00 PM PDT 24 3348475065 ps
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T587 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.278040290 Mar 17 12:56:41 PM PDT 24 Mar 17 12:56:48 PM PDT 24 4108076268 ps
T102 /workspace/coverage/default/13.sysrst_ctrl_stress_all.611374383 Mar 17 12:55:42 PM PDT 24 Mar 17 12:57:43 PM PDT 24 48712995151 ps
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T590 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3864626838 Mar 17 12:55:52 PM PDT 24 Mar 17 12:55:55 PM PDT 24 2473661633 ps
T591 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.3417065732 Mar 17 12:55:58 PM PDT 24 Mar 17 12:56:07 PM PDT 24 3390245272 ps
T307 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.274329466 Mar 17 12:56:25 PM PDT 24 Mar 17 12:57:46 PM PDT 24 33039225886 ps
T592 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.4185754879 Mar 17 12:55:45 PM PDT 24 Mar 17 12:55:50 PM PDT 24 2619191034 ps
T593 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.4049994421 Mar 17 12:55:56 PM PDT 24 Mar 17 12:57:58 PM PDT 24 56190211292 ps
T594 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.1078703184 Mar 17 12:56:24 PM PDT 24 Mar 17 12:56:30 PM PDT 24 3484978995 ps
T595 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.948832640 Mar 17 12:55:51 PM PDT 24 Mar 17 12:55:55 PM PDT 24 4573594984 ps
T596 /workspace/coverage/default/3.sysrst_ctrl_smoke.290030369 Mar 17 12:55:25 PM PDT 24 Mar 17 12:55:29 PM PDT 24 2115554454 ps
T597 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.14364841 Mar 17 12:55:33 PM PDT 24 Mar 17 12:56:36 PM PDT 24 105185257607 ps
T598 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2899896578 Mar 17 12:55:35 PM PDT 24 Mar 17 12:55:45 PM PDT 24 3641931608 ps
T599 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3754250927 Mar 17 12:55:38 PM PDT 24 Mar 17 12:55:47 PM PDT 24 3244733646 ps
T600 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.625920306 Mar 17 12:56:14 PM PDT 24 Mar 17 12:56:22 PM PDT 24 2611235238 ps
T172 /workspace/coverage/default/34.sysrst_ctrl_stress_all.942349888 Mar 17 12:56:33 PM PDT 24 Mar 17 12:56:52 PM PDT 24 13381684522 ps
T357 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.2070688806 Mar 17 12:55:48 PM PDT 24 Mar 17 12:56:33 PM PDT 24 75085115305 ps
T601 /workspace/coverage/default/32.sysrst_ctrl_alert_test.1309140775 Mar 17 12:56:26 PM PDT 24 Mar 17 12:56:28 PM PDT 24 2039058628 ps
T234 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.2804313176 Mar 17 12:56:15 PM PDT 24 Mar 17 12:56:21 PM PDT 24 3796568626 ps
T602 /workspace/coverage/default/22.sysrst_ctrl_alert_test.3493913643 Mar 17 12:56:00 PM PDT 24 Mar 17 12:56:06 PM PDT 24 2013619187 ps
T603 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.3513303215 Mar 17 12:56:41 PM PDT 24 Mar 17 12:56:45 PM PDT 24 2627582872 ps
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