T604 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.423564963 |
|
|
Mar 17 12:55:45 PM PDT 24 |
Mar 17 12:55:50 PM PDT 24 |
2516403591 ps |
T605 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1377460045 |
|
|
Mar 17 12:55:42 PM PDT 24 |
Mar 17 12:55:50 PM PDT 24 |
2509378719 ps |
T606 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.2889023469 |
|
|
Mar 17 12:56:42 PM PDT 24 |
Mar 17 12:56:46 PM PDT 24 |
2019849675 ps |
T372 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3603698374 |
|
|
Mar 17 12:57:06 PM PDT 24 |
Mar 17 12:58:34 PM PDT 24 |
128226625679 ps |
T607 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.711336705 |
|
|
Mar 17 12:56:21 PM PDT 24 |
Mar 17 12:56:31 PM PDT 24 |
3312827552 ps |
T103 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.2399559119 |
|
|
Mar 17 12:56:33 PM PDT 24 |
Mar 17 12:57:19 PM PDT 24 |
73477086124 ps |
T608 |
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.848564012 |
|
|
Mar 17 12:56:21 PM PDT 24 |
Mar 17 12:56:28 PM PDT 24 |
2459856449 ps |
T609 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1032535031 |
|
|
Mar 17 12:56:39 PM PDT 24 |
Mar 17 12:56:42 PM PDT 24 |
2475531846 ps |
T610 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.2564875351 |
|
|
Mar 17 12:56:39 PM PDT 24 |
Mar 17 12:57:00 PM PDT 24 |
7552522120 ps |
T611 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2308516138 |
|
|
Mar 17 12:55:16 PM PDT 24 |
Mar 17 12:55:21 PM PDT 24 |
2474229265 ps |
T612 |
/workspace/coverage/default/42.sysrst_ctrl_smoke.1756310219 |
|
|
Mar 17 12:56:50 PM PDT 24 |
Mar 17 12:56:53 PM PDT 24 |
2127580545 ps |
T104 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.291799118 |
|
|
Mar 17 12:55:48 PM PDT 24 |
Mar 17 12:58:32 PM PDT 24 |
67618726062 ps |
T613 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1932303368 |
|
|
Mar 17 12:55:55 PM PDT 24 |
Mar 17 12:55:57 PM PDT 24 |
2272510179 ps |
T614 |
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.375289830 |
|
|
Mar 17 12:55:50 PM PDT 24 |
Mar 17 12:55:51 PM PDT 24 |
3175724533 ps |
T615 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.930040058 |
|
|
Mar 17 12:55:46 PM PDT 24 |
Mar 17 12:55:48 PM PDT 24 |
2251241688 ps |
T616 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.637047610 |
|
|
Mar 17 12:55:27 PM PDT 24 |
Mar 17 12:55:32 PM PDT 24 |
3352280810 ps |
T617 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1571198205 |
|
|
Mar 17 12:56:06 PM PDT 24 |
Mar 17 12:57:02 PM PDT 24 |
21367337616 ps |
T618 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.527856229 |
|
|
Mar 17 12:55:59 PM PDT 24 |
Mar 17 12:56:25 PM PDT 24 |
9308921833 ps |
T619 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1557296946 |
|
|
Mar 17 12:56:00 PM PDT 24 |
Mar 17 12:56:02 PM PDT 24 |
2548617417 ps |
T620 |
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3737621646 |
|
|
Mar 17 12:56:24 PM PDT 24 |
Mar 17 12:56:31 PM PDT 24 |
2181628947 ps |
T363 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1306862559 |
|
|
Mar 17 12:55:49 PM PDT 24 |
Mar 17 12:56:57 PM PDT 24 |
92575699179 ps |
T621 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.296520402 |
|
|
Mar 17 12:55:49 PM PDT 24 |
Mar 17 12:55:51 PM PDT 24 |
2147316763 ps |
T622 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.531203057 |
|
|
Mar 17 12:55:27 PM PDT 24 |
Mar 17 12:55:33 PM PDT 24 |
2010788815 ps |
T623 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.4052486542 |
|
|
Mar 17 12:56:33 PM PDT 24 |
Mar 17 12:56:34 PM PDT 24 |
2161815561 ps |
T105 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.765449353 |
|
|
Mar 17 12:56:49 PM PDT 24 |
Mar 17 12:59:25 PM PDT 24 |
132019277251 ps |
T118 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.661397296 |
|
|
Mar 17 12:55:59 PM PDT 24 |
Mar 17 12:56:07 PM PDT 24 |
2511640591 ps |
T119 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2741987932 |
|
|
Mar 17 12:57:02 PM PDT 24 |
Mar 17 12:57:12 PM PDT 24 |
3332068826 ps |
T120 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1351460982 |
|
|
Mar 17 12:57:09 PM PDT 24 |
Mar 17 12:57:59 PM PDT 24 |
127608856675 ps |
T121 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.423029522 |
|
|
Mar 17 12:57:20 PM PDT 24 |
Mar 17 01:02:19 PM PDT 24 |
4800120797046 ps |
T106 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2919994026 |
|
|
Mar 17 12:55:44 PM PDT 24 |
Mar 17 12:56:39 PM PDT 24 |
125375888773 ps |
T122 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.3814376116 |
|
|
Mar 17 12:57:06 PM PDT 24 |
Mar 17 12:57:09 PM PDT 24 |
2118574858 ps |
T123 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.643993879 |
|
|
Mar 17 12:56:19 PM PDT 24 |
Mar 17 12:57:32 PM PDT 24 |
28829931386 ps |
T124 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.673397749 |
|
|
Mar 17 12:57:15 PM PDT 24 |
Mar 17 12:57:21 PM PDT 24 |
2013408688 ps |
T125 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1133387751 |
|
|
Mar 17 12:55:41 PM PDT 24 |
Mar 17 12:55:43 PM PDT 24 |
3464568447 ps |
T624 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1304627883 |
|
|
Mar 17 12:57:21 PM PDT 24 |
Mar 17 12:58:23 PM PDT 24 |
44302430818 ps |
T625 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.72697282 |
|
|
Mar 17 12:55:37 PM PDT 24 |
Mar 17 12:55:40 PM PDT 24 |
2128283948 ps |
T373 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1879414048 |
|
|
Mar 17 12:56:17 PM PDT 24 |
Mar 17 12:59:19 PM PDT 24 |
2033908547677 ps |
T626 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.903960989 |
|
|
Mar 17 12:55:52 PM PDT 24 |
Mar 17 12:55:55 PM PDT 24 |
3868437711 ps |
T627 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.3122139874 |
|
|
Mar 17 12:56:28 PM PDT 24 |
Mar 17 12:56:29 PM PDT 24 |
2089038921 ps |
T628 |
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2124135307 |
|
|
Mar 17 12:56:07 PM PDT 24 |
Mar 17 12:56:11 PM PDT 24 |
4301957570 ps |
T629 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.561164770 |
|
|
Mar 17 12:57:19 PM PDT 24 |
Mar 17 12:58:49 PM PDT 24 |
65124994680 ps |
T630 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2987876349 |
|
|
Mar 17 12:57:04 PM PDT 24 |
Mar 17 12:57:07 PM PDT 24 |
2527621985 ps |
T631 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2107905964 |
|
|
Mar 17 12:56:17 PM PDT 24 |
Mar 17 12:56:20 PM PDT 24 |
2530133609 ps |
T632 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1297558972 |
|
|
Mar 17 12:55:48 PM PDT 24 |
Mar 17 12:55:57 PM PDT 24 |
3051030018 ps |
T276 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.2400430080 |
|
|
Mar 17 12:56:35 PM PDT 24 |
Mar 17 12:57:40 PM PDT 24 |
94787715130 ps |
T633 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2969202959 |
|
|
Mar 17 12:57:14 PM PDT 24 |
Mar 17 12:57:33 PM PDT 24 |
26600097538 ps |
T634 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1041094715 |
|
|
Mar 17 12:55:37 PM PDT 24 |
Mar 17 12:57:01 PM PDT 24 |
1305330119236 ps |
T635 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.4255072429 |
|
|
Mar 17 12:55:54 PM PDT 24 |
Mar 17 12:56:01 PM PDT 24 |
2112153467 ps |
T636 |
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.1542156866 |
|
|
Mar 17 12:56:33 PM PDT 24 |
Mar 17 12:56:36 PM PDT 24 |
3259698318 ps |
T235 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.4293450065 |
|
|
Mar 17 12:55:51 PM PDT 24 |
Mar 17 01:00:43 PM PDT 24 |
509010653951 ps |
T637 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.2623239006 |
|
|
Mar 17 12:55:55 PM PDT 24 |
Mar 17 01:02:08 PM PDT 24 |
144895709625 ps |
T638 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1096877687 |
|
|
Mar 17 12:57:19 PM PDT 24 |
Mar 17 01:01:59 PM PDT 24 |
103020278281 ps |
T639 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2896512153 |
|
|
Mar 17 12:56:51 PM PDT 24 |
Mar 17 12:56:53 PM PDT 24 |
2689634217 ps |
T640 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.4176724500 |
|
|
Mar 17 12:55:55 PM PDT 24 |
Mar 17 12:55:58 PM PDT 24 |
2475100821 ps |
T641 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.3885269914 |
|
|
Mar 17 12:56:42 PM PDT 24 |
Mar 17 12:56:46 PM PDT 24 |
2118540447 ps |
T642 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.910338476 |
|
|
Mar 17 12:56:18 PM PDT 24 |
Mar 17 12:56:21 PM PDT 24 |
2142848292 ps |
T107 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.144084897 |
|
|
Mar 17 12:56:12 PM PDT 24 |
Mar 17 12:58:03 PM PDT 24 |
157327098377 ps |
T643 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.2914593928 |
|
|
Mar 17 12:56:36 PM PDT 24 |
Mar 17 12:56:41 PM PDT 24 |
2010556139 ps |
T644 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.555704178 |
|
|
Mar 17 12:56:20 PM PDT 24 |
Mar 17 12:56:32 PM PDT 24 |
4385820545 ps |
T354 |
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.283142605 |
|
|
Mar 17 12:57:22 PM PDT 24 |
Mar 17 12:57:49 PM PDT 24 |
33382020516 ps |
T645 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3748146480 |
|
|
Mar 17 12:55:26 PM PDT 24 |
Mar 17 12:55:38 PM PDT 24 |
4147835751 ps |
T646 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.105556767 |
|
|
Mar 17 12:55:30 PM PDT 24 |
Mar 17 12:55:40 PM PDT 24 |
3462916236 ps |
T647 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2623704379 |
|
|
Mar 17 12:55:47 PM PDT 24 |
Mar 17 12:55:55 PM PDT 24 |
2458145706 ps |
T648 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3725638635 |
|
|
Mar 17 12:56:50 PM PDT 24 |
Mar 17 12:56:57 PM PDT 24 |
2258419981 ps |
T649 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2303853852 |
|
|
Mar 17 12:55:39 PM PDT 24 |
Mar 17 12:57:46 PM PDT 24 |
46521461266 ps |
T650 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all.4098699259 |
|
|
Mar 17 12:56:27 PM PDT 24 |
Mar 17 12:56:34 PM PDT 24 |
9611673554 ps |
T651 |
/workspace/coverage/default/11.sysrst_ctrl_smoke.611667312 |
|
|
Mar 17 12:55:46 PM PDT 24 |
Mar 17 12:55:50 PM PDT 24 |
2121171780 ps |
T652 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2117781550 |
|
|
Mar 17 12:56:58 PM PDT 24 |
Mar 17 12:57:03 PM PDT 24 |
2518274282 ps |
T653 |
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1278901834 |
|
|
Mar 17 12:56:33 PM PDT 24 |
Mar 17 12:56:40 PM PDT 24 |
2512967897 ps |
T654 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1074059616 |
|
|
Mar 17 12:56:35 PM PDT 24 |
Mar 17 12:56:40 PM PDT 24 |
3420519205 ps |
T655 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.53051412 |
|
|
Mar 17 12:57:15 PM PDT 24 |
Mar 17 12:58:39 PM PDT 24 |
34049464078 ps |
T656 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.3076246384 |
|
|
Mar 17 12:56:17 PM PDT 24 |
Mar 17 12:56:22 PM PDT 24 |
2616616644 ps |
T657 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2980750778 |
|
|
Mar 17 12:56:37 PM PDT 24 |
Mar 17 12:56:42 PM PDT 24 |
3362769533 ps |
T658 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1246724767 |
|
|
Mar 17 12:55:54 PM PDT 24 |
Mar 17 12:55:56 PM PDT 24 |
2289763173 ps |
T280 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1896005435 |
|
|
Mar 17 12:56:19 PM PDT 24 |
Mar 17 12:56:55 PM PDT 24 |
83148686905 ps |
T659 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.919068542 |
|
|
Mar 17 12:55:43 PM PDT 24 |
Mar 17 12:55:56 PM PDT 24 |
4671598871 ps |
T660 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2572612646 |
|
|
Mar 17 12:56:58 PM PDT 24 |
Mar 17 12:57:08 PM PDT 24 |
3599778036 ps |
T343 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.811735892 |
|
|
Mar 17 12:57:08 PM PDT 24 |
Mar 17 12:58:49 PM PDT 24 |
83031814114 ps |
T661 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.746669698 |
|
|
Mar 17 12:56:42 PM PDT 24 |
Mar 17 12:57:05 PM PDT 24 |
159273665227 ps |
T341 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.2899022168 |
|
|
Mar 17 12:57:01 PM PDT 24 |
Mar 17 12:58:48 PM PDT 24 |
151901206454 ps |
T139 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.800007663 |
|
|
Mar 17 12:56:29 PM PDT 24 |
Mar 17 12:58:24 PM PDT 24 |
338175033996 ps |
T144 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.52356276 |
|
|
Mar 17 12:57:03 PM PDT 24 |
Mar 17 12:57:52 PM PDT 24 |
116167780716 ps |
T108 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3724689485 |
|
|
Mar 17 12:55:47 PM PDT 24 |
Mar 17 12:56:10 PM PDT 24 |
34929735194 ps |
T214 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.2625482171 |
|
|
Mar 17 12:56:26 PM PDT 24 |
Mar 17 12:57:31 PM PDT 24 |
71293590702 ps |
T215 |
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1264966950 |
|
|
Mar 17 12:56:41 PM PDT 24 |
Mar 17 12:56:49 PM PDT 24 |
2695409059 ps |
T173 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1586602005 |
|
|
Mar 17 12:56:32 PM PDT 24 |
Mar 17 12:57:53 PM PDT 24 |
195529645451 ps |
T216 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.1986516064 |
|
|
Mar 17 12:55:39 PM PDT 24 |
Mar 17 12:55:41 PM PDT 24 |
2043064493 ps |
T140 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2341633238 |
|
|
Mar 17 12:57:14 PM PDT 24 |
Mar 17 12:58:54 PM PDT 24 |
159249945378 ps |
T217 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.569904404 |
|
|
Mar 17 12:56:35 PM PDT 24 |
Mar 17 12:59:14 PM PDT 24 |
116900310910 ps |
T218 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3443633885 |
|
|
Mar 17 12:55:22 PM PDT 24 |
Mar 17 12:56:49 PM PDT 24 |
33579699324 ps |
T166 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2781078935 |
|
|
Mar 17 12:57:03 PM PDT 24 |
Mar 17 12:58:16 PM PDT 24 |
34329465372 ps |
T229 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.245194579 |
|
|
Mar 17 12:56:22 PM PDT 24 |
Mar 17 12:56:28 PM PDT 24 |
2611063411 ps |
T230 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.3361603458 |
|
|
Mar 17 12:55:25 PM PDT 24 |
Mar 17 12:55:30 PM PDT 24 |
2016883396 ps |
T231 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.605440478 |
|
|
Mar 17 12:55:46 PM PDT 24 |
Mar 17 12:56:14 PM PDT 24 |
43451576528 ps |
T232 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1791659520 |
|
|
Mar 17 12:57:20 PM PDT 24 |
Mar 17 01:01:11 PM PDT 24 |
82221577286 ps |
T662 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.155808534 |
|
|
Mar 17 12:56:19 PM PDT 24 |
Mar 17 12:56:22 PM PDT 24 |
2631080305 ps |
T109 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3604905063 |
|
|
Mar 17 12:57:00 PM PDT 24 |
Mar 17 01:01:05 PM PDT 24 |
188375737715 ps |
T663 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3762177299 |
|
|
Mar 17 12:55:53 PM PDT 24 |
Mar 17 12:55:55 PM PDT 24 |
2064525427 ps |
T664 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.2306482337 |
|
|
Mar 17 12:55:53 PM PDT 24 |
Mar 17 12:55:59 PM PDT 24 |
2112459174 ps |
T665 |
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.792679988 |
|
|
Mar 17 12:56:42 PM PDT 24 |
Mar 17 12:56:48 PM PDT 24 |
2035731408 ps |
T666 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3781971211 |
|
|
Mar 17 12:57:09 PM PDT 24 |
Mar 17 12:57:21 PM PDT 24 |
30183493197 ps |
T667 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2662689813 |
|
|
Mar 17 12:55:42 PM PDT 24 |
Mar 17 12:56:48 PM PDT 24 |
45553564548 ps |
T668 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2212157880 |
|
|
Mar 17 12:56:21 PM PDT 24 |
Mar 17 12:56:25 PM PDT 24 |
2515823975 ps |
T243 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.2719346825 |
|
|
Mar 17 12:55:56 PM PDT 24 |
Mar 17 12:56:11 PM PDT 24 |
11315826856 ps |
T153 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.112843264 |
|
|
Mar 17 12:55:39 PM PDT 24 |
Mar 17 01:04:41 PM PDT 24 |
3392801777921 ps |
T669 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2521464359 |
|
|
Mar 17 12:55:40 PM PDT 24 |
Mar 17 12:55:46 PM PDT 24 |
3610914402 ps |
T167 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.2465357954 |
|
|
Mar 17 12:56:33 PM PDT 24 |
Mar 17 12:56:37 PM PDT 24 |
4565132997 ps |
T271 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1164520889 |
|
|
Mar 17 12:56:25 PM PDT 24 |
Mar 17 12:59:22 PM PDT 24 |
66743062044 ps |
T670 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.255736385 |
|
|
Mar 17 12:55:49 PM PDT 24 |
Mar 17 12:55:51 PM PDT 24 |
2272362689 ps |
T671 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3148418050 |
|
|
Mar 17 12:56:35 PM PDT 24 |
Mar 17 12:56:39 PM PDT 24 |
2159469623 ps |
T672 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.551756886 |
|
|
Mar 17 12:55:50 PM PDT 24 |
Mar 17 12:55:56 PM PDT 24 |
2238466838 ps |
T673 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3555305754 |
|
|
Mar 17 12:56:41 PM PDT 24 |
Mar 17 12:56:45 PM PDT 24 |
3508887376 ps |
T674 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1775562891 |
|
|
Mar 17 12:57:07 PM PDT 24 |
Mar 17 12:57:15 PM PDT 24 |
2612724168 ps |
T675 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.612802561 |
|
|
Mar 17 12:56:17 PM PDT 24 |
Mar 17 12:56:23 PM PDT 24 |
2057695357 ps |
T145 |
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.766787675 |
|
|
Mar 17 12:55:43 PM PDT 24 |
Mar 17 12:55:46 PM PDT 24 |
6768450669 ps |
T676 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.1154913586 |
|
|
Mar 17 12:55:28 PM PDT 24 |
Mar 17 12:56:25 PM PDT 24 |
93970756800 ps |
T154 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1922806271 |
|
|
Mar 17 12:55:40 PM PDT 24 |
Mar 17 12:55:45 PM PDT 24 |
8545856546 ps |
T677 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.495104102 |
|
|
Mar 17 12:57:20 PM PDT 24 |
Mar 17 12:58:58 PM PDT 24 |
152101940286 ps |
T678 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3421222926 |
|
|
Mar 17 12:57:04 PM PDT 24 |
Mar 17 12:57:07 PM PDT 24 |
9790883790 ps |
T679 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.1751225133 |
|
|
Mar 17 12:56:21 PM PDT 24 |
Mar 17 12:56:25 PM PDT 24 |
2037266092 ps |
T680 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2629694938 |
|
|
Mar 17 12:57:10 PM PDT 24 |
Mar 17 12:58:54 PM PDT 24 |
43323442038 ps |
T681 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.955836283 |
|
|
Mar 17 12:55:46 PM PDT 24 |
Mar 17 01:32:01 PM PDT 24 |
797686434522 ps |
T360 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.2176763864 |
|
|
Mar 17 12:55:58 PM PDT 24 |
Mar 17 01:01:32 PM PDT 24 |
126052669099 ps |
T682 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.77998296 |
|
|
Mar 17 12:57:20 PM PDT 24 |
Mar 17 12:57:41 PM PDT 24 |
7697717930 ps |
T244 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1054842187 |
|
|
Mar 17 12:56:56 PM PDT 24 |
Mar 17 12:57:06 PM PDT 24 |
4993677011 ps |
T683 |
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.527394171 |
|
|
Mar 17 12:57:16 PM PDT 24 |
Mar 17 12:57:33 PM PDT 24 |
26607316317 ps |
T684 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.491108764 |
|
|
Mar 17 12:55:58 PM PDT 24 |
Mar 17 12:56:01 PM PDT 24 |
3225543132 ps |
T685 |
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3430924950 |
|
|
Mar 17 12:57:20 PM PDT 24 |
Mar 17 12:57:38 PM PDT 24 |
25342734328 ps |
T686 |
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.3636577244 |
|
|
Mar 17 12:56:27 PM PDT 24 |
Mar 17 12:56:29 PM PDT 24 |
2078190025 ps |
T687 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.954130109 |
|
|
Mar 17 12:56:47 PM PDT 24 |
Mar 17 12:56:55 PM PDT 24 |
2461938644 ps |
T688 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1684799773 |
|
|
Mar 17 12:56:48 PM PDT 24 |
Mar 17 12:56:51 PM PDT 24 |
3775258670 ps |
T689 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2878308449 |
|
|
Mar 17 12:57:06 PM PDT 24 |
Mar 17 12:57:17 PM PDT 24 |
3843237130 ps |
T690 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2013938334 |
|
|
Mar 17 12:57:03 PM PDT 24 |
Mar 17 12:57:06 PM PDT 24 |
2503020455 ps |
T691 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2098639010 |
|
|
Mar 17 12:55:37 PM PDT 24 |
Mar 17 12:55:42 PM PDT 24 |
4832336756 ps |
T692 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3341667142 |
|
|
Mar 17 12:57:08 PM PDT 24 |
Mar 17 12:57:14 PM PDT 24 |
2019064007 ps |
T370 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.3859635636 |
|
|
Mar 17 12:56:31 PM PDT 24 |
Mar 17 12:59:08 PM PDT 24 |
58331394146 ps |
T693 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.328754034 |
|
|
Mar 17 12:56:25 PM PDT 24 |
Mar 17 12:56:28 PM PDT 24 |
2116948159 ps |
T694 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.961750879 |
|
|
Mar 17 12:57:18 PM PDT 24 |
Mar 17 12:57:59 PM PDT 24 |
33221930482 ps |
T695 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.2665746987 |
|
|
Mar 17 12:56:34 PM PDT 24 |
Mar 17 12:56:38 PM PDT 24 |
4427384649 ps |
T141 |
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.304729672 |
|
|
Mar 17 12:55:58 PM PDT 24 |
Mar 17 12:56:00 PM PDT 24 |
2947675528 ps |
T696 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1143060206 |
|
|
Mar 17 12:55:11 PM PDT 24 |
Mar 17 12:55:13 PM PDT 24 |
2472966452 ps |
T223 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.2931251726 |
|
|
Mar 17 12:57:07 PM PDT 24 |
Mar 17 12:57:33 PM PDT 24 |
11809312925 ps |
T697 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.448465806 |
|
|
Mar 17 12:56:40 PM PDT 24 |
Mar 17 12:56:44 PM PDT 24 |
3127866825 ps |
T698 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.1162151731 |
|
|
Mar 17 12:56:13 PM PDT 24 |
Mar 17 12:56:20 PM PDT 24 |
2937486615 ps |
T699 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.1531115526 |
|
|
Mar 17 12:56:20 PM PDT 24 |
Mar 17 12:56:25 PM PDT 24 |
2012798130 ps |
T700 |
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.770544589 |
|
|
Mar 17 12:55:46 PM PDT 24 |
Mar 17 12:55:51 PM PDT 24 |
2612323616 ps |
T701 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2856145962 |
|
|
Mar 17 12:56:39 PM PDT 24 |
Mar 17 12:56:42 PM PDT 24 |
2474053296 ps |
T702 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.554299399 |
|
|
Mar 17 12:55:31 PM PDT 24 |
Mar 17 12:55:37 PM PDT 24 |
2102950808 ps |
T703 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.3869778606 |
|
|
Mar 17 12:55:52 PM PDT 24 |
Mar 17 12:56:03 PM PDT 24 |
3562611046 ps |
T295 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3986083018 |
|
|
Mar 17 12:55:14 PM PDT 24 |
Mar 17 12:55:30 PM PDT 24 |
22077051532 ps |
T704 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.937333718 |
|
|
Mar 17 12:56:48 PM PDT 24 |
Mar 17 12:56:50 PM PDT 24 |
2578507637 ps |
T705 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1608236468 |
|
|
Mar 17 12:57:15 PM PDT 24 |
Mar 17 12:57:23 PM PDT 24 |
3296231549 ps |
T706 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.2330655771 |
|
|
Mar 17 12:55:31 PM PDT 24 |
Mar 17 12:55:39 PM PDT 24 |
4360629265 ps |
T707 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1805359142 |
|
|
Mar 17 12:57:05 PM PDT 24 |
Mar 17 12:57:13 PM PDT 24 |
2613312024 ps |
T708 |
/workspace/coverage/default/39.sysrst_ctrl_smoke.1907479160 |
|
|
Mar 17 12:56:39 PM PDT 24 |
Mar 17 12:56:45 PM PDT 24 |
2112079773 ps |
T709 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2241798582 |
|
|
Mar 17 12:55:44 PM PDT 24 |
Mar 17 12:56:42 PM PDT 24 |
69481176532 ps |
T710 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.3827355650 |
|
|
Mar 17 12:55:38 PM PDT 24 |
Mar 17 12:59:09 PM PDT 24 |
79747745188 ps |
T711 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1386848239 |
|
|
Mar 17 12:55:35 PM PDT 24 |
Mar 17 12:55:39 PM PDT 24 |
2519404781 ps |
T712 |
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3173554043 |
|
|
Mar 17 12:55:49 PM PDT 24 |
Mar 17 12:55:53 PM PDT 24 |
3742783542 ps |
T713 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2888431837 |
|
|
Mar 17 12:55:41 PM PDT 24 |
Mar 17 12:55:50 PM PDT 24 |
3288146905 ps |
T714 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2470476145 |
|
|
Mar 17 12:56:58 PM PDT 24 |
Mar 17 12:57:01 PM PDT 24 |
8404342251 ps |
T715 |
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3020493812 |
|
|
Mar 17 12:56:53 PM PDT 24 |
Mar 17 12:56:56 PM PDT 24 |
3930776037 ps |
T716 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1804233705 |
|
|
Mar 17 12:56:18 PM PDT 24 |
Mar 17 12:56:23 PM PDT 24 |
6190461073 ps |
T717 |
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2725960719 |
|
|
Mar 17 12:55:42 PM PDT 24 |
Mar 17 12:55:50 PM PDT 24 |
2450101413 ps |
T718 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.3347419591 |
|
|
Mar 17 12:56:28 PM PDT 24 |
Mar 17 01:00:04 PM PDT 24 |
80836535627 ps |
T719 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1633070905 |
|
|
Mar 17 12:55:48 PM PDT 24 |
Mar 17 12:56:24 PM PDT 24 |
53819760391 ps |
T720 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.947775360 |
|
|
Mar 17 12:56:12 PM PDT 24 |
Mar 17 01:03:36 PM PDT 24 |
170467596088 ps |
T721 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2015688571 |
|
|
Mar 17 12:56:36 PM PDT 24 |
Mar 17 12:56:44 PM PDT 24 |
3073501806 ps |
T722 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.4287382667 |
|
|
Mar 17 12:55:42 PM PDT 24 |
Mar 17 12:55:49 PM PDT 24 |
4871487064 ps |
T168 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2593430857 |
|
|
Mar 17 12:56:32 PM PDT 24 |
Mar 17 12:56:40 PM PDT 24 |
2769728552 ps |
T723 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3017834957 |
|
|
Mar 17 12:56:36 PM PDT 24 |
Mar 17 12:56:39 PM PDT 24 |
2614229268 ps |
T724 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.528057638 |
|
|
Mar 17 12:57:03 PM PDT 24 |
Mar 17 12:57:07 PM PDT 24 |
6855409329 ps |
T725 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3542329103 |
|
|
Mar 17 12:56:27 PM PDT 24 |
Mar 17 12:56:37 PM PDT 24 |
3486064099 ps |
T726 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1050799703 |
|
|
Mar 17 12:55:30 PM PDT 24 |
Mar 17 12:55:31 PM PDT 24 |
2298329631 ps |
T727 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.642045434 |
|
|
Mar 17 12:56:50 PM PDT 24 |
Mar 17 12:56:56 PM PDT 24 |
2012029617 ps |
T78 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3028466959 |
|
|
Mar 17 12:55:22 PM PDT 24 |
Mar 17 12:56:48 PM PDT 24 |
30496828682 ps |
T728 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1040573052 |
|
|
Mar 17 12:56:21 PM PDT 24 |
Mar 17 12:56:26 PM PDT 24 |
2772836664 ps |
T729 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.799368093 |
|
|
Mar 17 12:57:09 PM PDT 24 |
Mar 17 12:57:12 PM PDT 24 |
8312534340 ps |
T730 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.774718930 |
|
|
Mar 17 12:57:05 PM PDT 24 |
Mar 17 12:57:13 PM PDT 24 |
2512872054 ps |
T731 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3061585290 |
|
|
Mar 17 12:56:31 PM PDT 24 |
Mar 17 12:56:37 PM PDT 24 |
2231557163 ps |
T175 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all.4261020067 |
|
|
Mar 17 12:55:56 PM PDT 24 |
Mar 17 12:56:05 PM PDT 24 |
14480636860 ps |
T732 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1708925560 |
|
|
Mar 17 12:56:56 PM PDT 24 |
Mar 17 12:57:04 PM PDT 24 |
2444907134 ps |
T342 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3816855650 |
|
|
Mar 17 12:57:20 PM PDT 24 |
Mar 17 01:00:07 PM PDT 24 |
120066577089 ps |
T733 |
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2418747336 |
|
|
Mar 17 12:57:26 PM PDT 24 |
Mar 17 12:57:38 PM PDT 24 |
28610291560 ps |
T281 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3402525666 |
|
|
Mar 17 12:55:33 PM PDT 24 |
Mar 17 12:56:20 PM PDT 24 |
17233795799 ps |
T734 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.126565284 |
|
|
Mar 17 12:55:47 PM PDT 24 |
Mar 17 01:03:05 PM PDT 24 |
176051038342 ps |
T735 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1508142924 |
|
|
Mar 17 12:55:47 PM PDT 24 |
Mar 17 12:55:57 PM PDT 24 |
3426601617 ps |
T736 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1955746063 |
|
|
Mar 17 12:55:49 PM PDT 24 |
Mar 17 12:55:57 PM PDT 24 |
2611112554 ps |
T737 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2133807175 |
|
|
Mar 17 12:56:51 PM PDT 24 |
Mar 17 12:57:03 PM PDT 24 |
5095593145 ps |
T155 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3268409800 |
|
|
Mar 17 12:56:38 PM PDT 24 |
Mar 17 12:56:42 PM PDT 24 |
3730155158 ps |
T738 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2698492437 |
|
|
Mar 17 12:56:15 PM PDT 24 |
Mar 17 12:56:18 PM PDT 24 |
2523695710 ps |
T245 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1167401424 |
|
|
Mar 17 12:55:47 PM PDT 24 |
Mar 17 12:55:53 PM PDT 24 |
3294033524 ps |
T739 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.3167983979 |
|
|
Mar 17 12:56:16 PM PDT 24 |
Mar 17 12:56:22 PM PDT 24 |
2111610863 ps |
T339 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2407927723 |
|
|
Mar 17 12:57:19 PM PDT 24 |
Mar 17 01:04:40 PM PDT 24 |
160950702518 ps |
T740 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.231799459 |
|
|
Mar 17 12:55:37 PM PDT 24 |
Mar 17 12:55:40 PM PDT 24 |
2035906264 ps |
T741 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1574051193 |
|
|
Mar 17 12:55:25 PM PDT 24 |
Mar 17 12:56:34 PM PDT 24 |
112725655724 ps |
T742 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3285936397 |
|
|
Mar 17 12:55:37 PM PDT 24 |
Mar 17 12:55:41 PM PDT 24 |
2515575295 ps |
T340 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.498646064 |
|
|
Mar 17 12:57:21 PM PDT 24 |
Mar 17 12:59:50 PM PDT 24 |
54863464748 ps |
T743 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.672088627 |
|
|
Mar 17 12:55:40 PM PDT 24 |
Mar 17 12:55:47 PM PDT 24 |
2509986116 ps |
T358 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1992421708 |
|
|
Mar 17 12:55:18 PM PDT 24 |
Mar 17 01:00:06 PM PDT 24 |
120667917984 ps |
T744 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1422726125 |
|
|
Mar 17 12:56:52 PM PDT 24 |
Mar 17 12:56:59 PM PDT 24 |
2025945180 ps |
T224 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.4222686699 |
|
|
Mar 17 12:55:47 PM PDT 24 |
Mar 17 12:55:51 PM PDT 24 |
3609024975 ps |
T745 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.2108110483 |
|
|
Mar 17 12:55:27 PM PDT 24 |
Mar 17 12:55:28 PM PDT 24 |
2197452406 ps |
T746 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.3170398274 |
|
|
Mar 17 12:56:34 PM PDT 24 |
Mar 17 12:57:30 PM PDT 24 |
47282809718 ps |
T747 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1986039541 |
|
|
Mar 17 12:55:38 PM PDT 24 |
Mar 17 12:55:43 PM PDT 24 |
3280453753 ps |
T748 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.740766426 |
|
|
Mar 17 12:55:30 PM PDT 24 |
Mar 17 12:55:32 PM PDT 24 |
2148766286 ps |
T749 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3326172363 |
|
|
Mar 17 12:56:22 PM PDT 24 |
Mar 17 12:57:24 PM PDT 24 |
27623792844 ps |
T750 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3640533798 |
|
|
Mar 17 12:55:52 PM PDT 24 |
Mar 17 12:56:00 PM PDT 24 |
2694659381 ps |
T751 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.4141256061 |
|
|
Mar 17 12:56:27 PM PDT 24 |
Mar 17 12:56:29 PM PDT 24 |
2474336909 ps |
T752 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.4096273497 |
|
|
Mar 17 12:55:46 PM PDT 24 |
Mar 17 12:55:52 PM PDT 24 |
2015378285 ps |
T753 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.4205683465 |
|
|
Mar 17 12:55:38 PM PDT 24 |
Mar 17 12:55:40 PM PDT 24 |
2905317631 ps |
T754 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.3041676282 |
|
|
Mar 17 12:55:53 PM PDT 24 |
Mar 17 12:55:57 PM PDT 24 |
2734673467 ps |
T755 |
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.151124600 |
|
|
Mar 17 12:55:59 PM PDT 24 |
Mar 17 12:56:03 PM PDT 24 |
2180569456 ps |
T756 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.634835890 |
|
|
Mar 17 12:56:26 PM PDT 24 |
Mar 17 12:56:29 PM PDT 24 |
2484483863 ps |
T757 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.1704645073 |
|
|
Mar 17 12:56:43 PM PDT 24 |
Mar 17 12:56:49 PM PDT 24 |
3461772610 ps |
T371 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.816434911 |
|
|
Mar 17 12:57:19 PM PDT 24 |
Mar 17 12:58:03 PM PDT 24 |
72098388041 ps |
T758 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.2605399874 |
|
|
Mar 17 12:56:13 PM PDT 24 |
Mar 17 12:56:24 PM PDT 24 |
3663788664 ps |
T759 |
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.650561181 |
|
|
Mar 17 12:55:54 PM PDT 24 |
Mar 17 12:55:57 PM PDT 24 |
3048351909 ps |
T760 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.828826139 |
|
|
Mar 17 12:56:12 PM PDT 24 |
Mar 17 12:56:15 PM PDT 24 |
2528233332 ps |
T349 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1577759432 |
|
|
Mar 17 12:56:00 PM PDT 24 |
Mar 17 12:57:24 PM PDT 24 |
116325688821 ps |
T761 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.2115482348 |
|
|
Mar 17 12:56:20 PM PDT 24 |
Mar 17 12:56:27 PM PDT 24 |
2508978052 ps |
T762 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3657530243 |
|
|
Mar 17 12:55:25 PM PDT 24 |
Mar 17 12:55:28 PM PDT 24 |
2521208342 ps |
T763 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.2149286205 |
|
|
Mar 17 12:56:57 PM PDT 24 |
Mar 17 12:57:03 PM PDT 24 |
2108805446 ps |
T764 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.414487342 |
|
|
Mar 17 12:55:47 PM PDT 24 |
Mar 17 12:57:21 PM PDT 24 |
137540769478 ps |
T765 |
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3723279838 |
|
|
Mar 17 12:56:43 PM PDT 24 |
Mar 17 12:56:45 PM PDT 24 |
2636380663 ps |
T766 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.4114516165 |
|
|
Mar 17 12:55:49 PM PDT 24 |
Mar 17 12:55:51 PM PDT 24 |
2135450716 ps |
T272 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.449439144 |
|
|
Mar 17 12:57:25 PM PDT 24 |
Mar 17 12:58:22 PM PDT 24 |
84964206230 ps |
T767 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.2340992350 |
|
|
Mar 17 12:56:30 PM PDT 24 |
Mar 17 12:56:37 PM PDT 24 |
2111102214 ps |
T768 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.2977927873 |
|
|
Mar 17 12:55:48 PM PDT 24 |
Mar 17 12:55:54 PM PDT 24 |
2014635933 ps |
T769 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all.2997575845 |
|
|
Mar 17 12:56:37 PM PDT 24 |
Mar 17 12:58:29 PM PDT 24 |
158738167946 ps |
T350 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3276602346 |
|
|
Mar 17 12:56:16 PM PDT 24 |
Mar 17 12:59:18 PM PDT 24 |
66586061142 ps |
T770 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1542540120 |
|
|
Mar 17 12:56:46 PM PDT 24 |
Mar 17 01:00:15 PM PDT 24 |
79725824282 ps |
T771 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.998625986 |
|
|
Mar 17 12:56:45 PM PDT 24 |
Mar 17 12:56:52 PM PDT 24 |
3176123677 ps |
T772 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3351346197 |
|
|
Mar 17 12:55:47 PM PDT 24 |
Mar 17 12:55:58 PM PDT 24 |
3583078592 ps |
T156 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.271813840 |
|
|
Mar 17 12:56:41 PM PDT 24 |
Mar 17 12:57:28 PM PDT 24 |
20487773170 ps |
T773 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1411906058 |
|
|
Mar 17 12:56:41 PM PDT 24 |
Mar 17 12:56:44 PM PDT 24 |
2526901813 ps |
T774 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2244627287 |
|
|
Mar 17 12:55:28 PM PDT 24 |
Mar 17 12:55:32 PM PDT 24 |
2188508418 ps |
T775 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.2736251628 |
|
|
Mar 17 12:56:39 PM PDT 24 |
Mar 17 12:56:41 PM PDT 24 |
2041217453 ps |
T776 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.2012296040 |
|
|
Mar 17 12:56:25 PM PDT 24 |
Mar 17 12:56:27 PM PDT 24 |
2158108169 ps |
T777 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.4023891828 |
|
|
Mar 17 12:55:36 PM PDT 24 |
Mar 17 12:55:42 PM PDT 24 |
2059673996 ps |
T778 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1245386046 |
|
|
Mar 17 12:56:35 PM PDT 24 |
Mar 17 12:56:43 PM PDT 24 |
2612164516 ps |
T779 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.354159028 |
|
|
Mar 17 12:55:37 PM PDT 24 |
Mar 17 12:55:41 PM PDT 24 |
2124771877 ps |
T780 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.403438487 |
|
|
Mar 17 12:56:24 PM PDT 24 |
Mar 17 01:08:55 PM PDT 24 |
287048016105 ps |
T781 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.4148427353 |
|
|
Mar 17 12:56:13 PM PDT 24 |
Mar 17 12:56:16 PM PDT 24 |
4030133696 ps |
T782 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3437708407 |
|
|
Mar 17 12:56:27 PM PDT 24 |
Mar 17 12:56:28 PM PDT 24 |
2723717570 ps |
T24 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.3629514075 |
|
|
Mar 17 01:39:59 PM PDT 24 |
Mar 17 01:40:09 PM PDT 24 |
2637874891 ps |
T25 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.552594456 |
|
|
Mar 17 01:40:30 PM PDT 24 |
Mar 17 01:42:30 PM PDT 24 |
42469809633 ps |
T26 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2229337486 |
|
|
Mar 17 01:40:34 PM PDT 24 |
Mar 17 01:41:49 PM PDT 24 |
42535916416 ps |
T277 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.683279105 |
|
|
Mar 17 01:40:44 PM PDT 24 |
Mar 17 01:41:00 PM PDT 24 |
22255683159 ps |
T783 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2644931296 |
|
|
Mar 17 01:40:29 PM PDT 24 |
Mar 17 01:40:32 PM PDT 24 |
2018991744 ps |