SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
tb.me.obj.debounce_timer_cg[ec_rst_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
tb.me.obj.debounce_timer_cg[key_intr_debounce_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
tb.me.obj.debounce_timer_cg[ulp_ac_debounce_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
tb.me.obj.debounce_timer_cg[ulp_lid_debounce_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
tb.me.obj.debounce_timer_cg[ulp_pwrb_debounce_ctl].debounce_timer_cg | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 3 | 0 | 3 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_debounce_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 73 | 1 | T64 | 1 | T395 | 1 | T95 | 11 | ||||
mid_range | 531 | 1 | T22 | 1 | T55 | 1 | T35 | 4 | ||||
min_range | 517 | 1 | T8 | 4 | T9 | 6 | T10 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 37 | 1 | T38 | 1 | T122 | 19 | T269 | 1 | ||||
mid_range | 460 | 1 | T4 | 1 | T7 | 1 | T12 | 1 | ||||
min_range | 626 | 1 | T2 | 1 | T3 | 1 | T8 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 4 | 1 | T63 | 2 | T175 | 1 | T396 | 1 | ||||
mid_range | 79 | 1 | T32 | 1 | T37 | 1 | T62 | 2 | ||||
min_range | 65 | 1 | T1 | 3 | T33 | 1 | T20 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 9 | 1 | T62 | 2 | T63 | 2 | T397 | 1 | ||||
mid_range | 75 | 1 | T1 | 3 | T32 | 1 | T33 | 1 | ||||
min_range | 64 | 1 | T37 | 1 | T61 | 1 | T216 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 3 | 0 | 3 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
max_range | 8 | 1 | T20 | 2 | T230 | 1 | T87 | 1 | ||||
mid_range | 67 | 1 | T33 | 1 | T37 | 1 | T61 | 1 | ||||
min_range | 73 | 1 | T1 | 3 | T32 | 1 | T21 | 2 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |