| T192 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.2438046174 |
|
|
Mar 19 01:02:02 PM PDT 24 |
Mar 19 01:02:10 PM PDT 24 |
13046997794 ps |
| T622 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.279368552 |
|
|
Mar 19 01:01:43 PM PDT 24 |
Mar 19 01:01:48 PM PDT 24 |
2460306765 ps |
| T623 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.773379831 |
|
|
Mar 19 01:02:25 PM PDT 24 |
Mar 19 01:02:43 PM PDT 24 |
24091532336 ps |
| T624 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.3688749475 |
|
|
Mar 19 01:02:26 PM PDT 24 |
Mar 19 01:02:28 PM PDT 24 |
2032582131 ps |
| T625 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1452135340 |
|
|
Mar 19 01:02:38 PM PDT 24 |
Mar 19 01:02:40 PM PDT 24 |
4822046131 ps |
| T248 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.1307689368 |
|
|
Mar 19 01:02:38 PM PDT 24 |
Mar 19 01:02:45 PM PDT 24 |
2720015031 ps |
| T381 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.4204286765 |
|
|
Mar 19 01:03:24 PM PDT 24 |
Mar 19 01:05:55 PM PDT 24 |
77086646887 ps |
| T359 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1227287206 |
|
|
Mar 19 01:03:44 PM PDT 24 |
Mar 19 01:05:51 PM PDT 24 |
182638812913 ps |
| T626 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3069379894 |
|
|
Mar 19 01:03:58 PM PDT 24 |
Mar 19 01:06:14 PM PDT 24 |
132850386664 ps |
| T627 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1000026398 |
|
|
Mar 19 01:03:08 PM PDT 24 |
Mar 19 01:03:22 PM PDT 24 |
3011140906 ps |
| T628 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2585544135 |
|
|
Mar 19 01:01:29 PM PDT 24 |
Mar 19 01:01:33 PM PDT 24 |
2517332649 ps |
| T629 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.3739007221 |
|
|
Mar 19 01:01:47 PM PDT 24 |
Mar 19 01:01:54 PM PDT 24 |
2514648327 ps |
| T630 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2755803041 |
|
|
Mar 19 01:03:25 PM PDT 24 |
Mar 19 01:03:49 PM PDT 24 |
6624867544 ps |
| T631 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3727615034 |
|
|
Mar 19 01:02:51 PM PDT 24 |
Mar 19 01:02:57 PM PDT 24 |
2181981067 ps |
| T632 |
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.4022687517 |
|
|
Mar 19 01:02:25 PM PDT 24 |
Mar 19 01:02:27 PM PDT 24 |
2155462866 ps |
| T377 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4264287638 |
|
|
Mar 19 01:01:40 PM PDT 24 |
Mar 19 01:04:35 PM PDT 24 |
70839859297 ps |
| T633 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.378956594 |
|
|
Mar 19 01:02:57 PM PDT 24 |
Mar 19 01:03:02 PM PDT 24 |
2516893108 ps |
| T384 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.316764515 |
|
|
Mar 19 01:02:10 PM PDT 24 |
Mar 19 01:03:04 PM PDT 24 |
144470503763 ps |
| T634 |
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2147301718 |
|
|
Mar 19 01:02:09 PM PDT 24 |
Mar 19 01:02:17 PM PDT 24 |
4241251284 ps |
| T635 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2461955150 |
|
|
Mar 19 01:01:43 PM PDT 24 |
Mar 19 01:01:47 PM PDT 24 |
2821118013 ps |
| T636 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.4004717931 |
|
|
Mar 19 01:01:30 PM PDT 24 |
Mar 19 01:01:36 PM PDT 24 |
2063991811 ps |
| T637 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3143679467 |
|
|
Mar 19 01:02:38 PM PDT 24 |
Mar 19 01:02:40 PM PDT 24 |
2671191351 ps |
| T277 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2648560157 |
|
|
Mar 19 01:03:43 PM PDT 24 |
Mar 19 01:06:44 PM PDT 24 |
72952001220 ps |
| T638 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.308668940 |
|
|
Mar 19 01:03:16 PM PDT 24 |
Mar 19 01:03:22 PM PDT 24 |
2012427786 ps |
| T639 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2917604545 |
|
|
Mar 19 01:01:43 PM PDT 24 |
Mar 19 01:01:52 PM PDT 24 |
2510528307 ps |
| T640 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.4232101939 |
|
|
Mar 19 01:01:42 PM PDT 24 |
Mar 19 01:03:47 PM PDT 24 |
166796020223 ps |
| T161 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.204402111 |
|
|
Mar 19 01:03:10 PM PDT 24 |
Mar 19 01:03:22 PM PDT 24 |
3045252227 ps |
| T164 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1178526505 |
|
|
Mar 19 01:03:06 PM PDT 24 |
Mar 19 01:03:08 PM PDT 24 |
2177111331 ps |
| T165 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.34554948 |
|
|
Mar 19 01:02:36 PM PDT 24 |
Mar 19 01:03:53 PM PDT 24 |
30764081978 ps |
| T166 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.2519418843 |
|
|
Mar 19 01:02:26 PM PDT 24 |
Mar 19 01:02:31 PM PDT 24 |
2014450052 ps |
| T167 |
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3992452783 |
|
|
Mar 19 01:02:25 PM PDT 24 |
Mar 19 01:02:34 PM PDT 24 |
3451707730 ps |
| T168 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3934446853 |
|
|
Mar 19 01:03:06 PM PDT 24 |
Mar 19 01:03:14 PM PDT 24 |
2509025523 ps |
| T169 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2076747718 |
|
|
Mar 19 01:02:07 PM PDT 24 |
Mar 19 01:02:15 PM PDT 24 |
4251824894 ps |
| T170 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.912237228 |
|
|
Mar 19 01:02:43 PM PDT 24 |
Mar 19 01:03:07 PM PDT 24 |
9147784731 ps |
| T171 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1354496736 |
|
|
Mar 19 01:02:26 PM PDT 24 |
Mar 19 01:02:29 PM PDT 24 |
3028588894 ps |
| T172 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1743538800 |
|
|
Mar 19 01:02:37 PM PDT 24 |
Mar 19 01:02:56 PM PDT 24 |
25049740657 ps |
| T641 |
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.941225197 |
|
|
Mar 19 01:02:47 PM PDT 24 |
Mar 19 01:08:41 PM PDT 24 |
134954092447 ps |
| T642 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1437280945 |
|
|
Mar 19 01:01:34 PM PDT 24 |
Mar 19 01:01:44 PM PDT 24 |
3095666980 ps |
| T643 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.622873767 |
|
|
Mar 19 01:03:27 PM PDT 24 |
Mar 19 01:03:33 PM PDT 24 |
2034053007 ps |
| T644 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1504342540 |
|
|
Mar 19 01:02:19 PM PDT 24 |
Mar 19 01:02:30 PM PDT 24 |
3776692098 ps |
| T321 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.1630777522 |
|
|
Mar 19 01:02:55 PM PDT 24 |
Mar 19 01:04:22 PM PDT 24 |
34678401181 ps |
| T193 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.2749264846 |
|
|
Mar 19 01:02:08 PM PDT 24 |
Mar 19 01:02:19 PM PDT 24 |
34819195506 ps |
| T645 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.430120200 |
|
|
Mar 19 01:03:08 PM PDT 24 |
Mar 19 01:03:16 PM PDT 24 |
2043303919 ps |
| T646 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.502242575 |
|
|
Mar 19 01:02:39 PM PDT 24 |
Mar 19 01:02:41 PM PDT 24 |
2123516540 ps |
| T647 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.1866507845 |
|
|
Mar 19 01:01:59 PM PDT 24 |
Mar 19 01:02:08 PM PDT 24 |
2991493887 ps |
| T648 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1756329824 |
|
|
Mar 19 01:02:44 PM PDT 24 |
Mar 19 01:02:46 PM PDT 24 |
2120286582 ps |
| T649 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3772286375 |
|
|
Mar 19 01:01:43 PM PDT 24 |
Mar 19 01:01:47 PM PDT 24 |
3886522728 ps |
| T650 |
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1375414684 |
|
|
Mar 19 01:03:37 PM PDT 24 |
Mar 19 01:04:26 PM PDT 24 |
57136761190 ps |
| T374 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1367979967 |
|
|
Mar 19 01:03:45 PM PDT 24 |
Mar 19 01:05:05 PM PDT 24 |
57309163776 ps |
| T58 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1801009082 |
|
|
Mar 19 01:01:21 PM PDT 24 |
Mar 19 01:01:42 PM PDT 24 |
37477382166 ps |
| T651 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.2884471544 |
|
|
Mar 19 01:01:33 PM PDT 24 |
Mar 19 01:01:37 PM PDT 24 |
2017056921 ps |
| T652 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2043628152 |
|
|
Mar 19 01:01:22 PM PDT 24 |
Mar 19 01:01:24 PM PDT 24 |
2428614053 ps |
| T653 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.377404787 |
|
|
Mar 19 01:01:14 PM PDT 24 |
Mar 19 01:01:17 PM PDT 24 |
2124375177 ps |
| T378 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.255775761 |
|
|
Mar 19 01:02:41 PM PDT 24 |
Mar 19 01:04:20 PM PDT 24 |
157047668956 ps |
| T654 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1751574469 |
|
|
Mar 19 01:01:31 PM PDT 24 |
Mar 19 01:01:33 PM PDT 24 |
2551388664 ps |
| T655 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.404717947 |
|
|
Mar 19 01:01:27 PM PDT 24 |
Mar 19 01:01:29 PM PDT 24 |
2298554713 ps |
| T357 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.2172431950 |
|
|
Mar 19 01:02:40 PM PDT 24 |
Mar 19 01:04:31 PM PDT 24 |
88544716617 ps |
| T656 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.407042826 |
|
|
Mar 19 01:02:58 PM PDT 24 |
Mar 19 01:04:03 PM PDT 24 |
26475088517 ps |
| T657 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1058516374 |
|
|
Mar 19 01:03:08 PM PDT 24 |
Mar 19 01:04:58 PM PDT 24 |
165633003384 ps |
| T658 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.2564625131 |
|
|
Mar 19 01:01:29 PM PDT 24 |
Mar 19 01:01:34 PM PDT 24 |
2011058383 ps |
| T659 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.250901754 |
|
|
Mar 19 01:03:26 PM PDT 24 |
Mar 19 01:03:35 PM PDT 24 |
3034090993 ps |
| T660 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.1032081184 |
|
|
Mar 19 01:01:22 PM PDT 24 |
Mar 19 01:01:28 PM PDT 24 |
2012598494 ps |
| T661 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.1467892193 |
|
|
Mar 19 01:02:39 PM PDT 24 |
Mar 19 01:02:41 PM PDT 24 |
2241351346 ps |
| T662 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.1900703962 |
|
|
Mar 19 01:02:02 PM PDT 24 |
Mar 19 01:04:01 PM PDT 24 |
176952913487 ps |
| T141 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1529182483 |
|
|
Mar 19 01:01:43 PM PDT 24 |
Mar 19 01:01:47 PM PDT 24 |
4046097830 ps |
| T663 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.4252586558 |
|
|
Mar 19 01:01:59 PM PDT 24 |
Mar 19 01:02:02 PM PDT 24 |
3856186371 ps |
| T664 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1731614 |
|
|
Mar 19 01:02:58 PM PDT 24 |
Mar 19 01:03:08 PM PDT 24 |
3560957107 ps |
| T296 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.2127219832 |
|
|
Mar 19 01:01:28 PM PDT 24 |
Mar 19 01:01:56 PM PDT 24 |
22056298156 ps |
| T665 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.3253129171 |
|
|
Mar 19 01:02:13 PM PDT 24 |
Mar 19 01:02:15 PM PDT 24 |
2130708771 ps |
| T666 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.3484861180 |
|
|
Mar 19 01:03:18 PM PDT 24 |
Mar 19 01:03:20 PM PDT 24 |
2141700801 ps |
| T667 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.2340825867 |
|
|
Mar 19 01:01:30 PM PDT 24 |
Mar 19 01:05:51 PM PDT 24 |
192152840386 ps |
| T668 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.933883892 |
|
|
Mar 19 01:02:58 PM PDT 24 |
Mar 19 01:03:12 PM PDT 24 |
21351838525 ps |
| T669 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2926925150 |
|
|
Mar 19 01:03:26 PM PDT 24 |
Mar 19 01:03:37 PM PDT 24 |
2512347741 ps |
| T670 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2796231860 |
|
|
Mar 19 01:03:23 PM PDT 24 |
Mar 19 01:03:31 PM PDT 24 |
2194166652 ps |
| T152 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3757612389 |
|
|
Mar 19 01:01:52 PM PDT 24 |
Mar 19 01:02:08 PM PDT 24 |
91576953265 ps |
| T671 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.709498717 |
|
|
Mar 19 01:02:43 PM PDT 24 |
Mar 19 01:02:47 PM PDT 24 |
4994508023 ps |
| T672 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.435001828 |
|
|
Mar 19 01:01:52 PM PDT 24 |
Mar 19 01:03:01 PM PDT 24 |
26578421646 ps |
| T673 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1246622389 |
|
|
Mar 19 01:01:22 PM PDT 24 |
Mar 19 01:01:31 PM PDT 24 |
3086894824 ps |
| T390 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3266699916 |
|
|
Mar 19 01:03:44 PM PDT 24 |
Mar 19 01:04:30 PM PDT 24 |
61883601821 ps |
| T674 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.297171711 |
|
|
Mar 19 01:02:27 PM PDT 24 |
Mar 19 01:02:36 PM PDT 24 |
3269664897 ps |
| T372 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3415891502 |
|
|
Mar 19 01:03:44 PM PDT 24 |
Mar 19 01:09:39 PM PDT 24 |
131769812528 ps |
| T675 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1279926706 |
|
|
Mar 19 01:03:22 PM PDT 24 |
Mar 19 01:03:29 PM PDT 24 |
3305422966 ps |
| T676 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.312934441 |
|
|
Mar 19 01:02:05 PM PDT 24 |
Mar 19 01:02:07 PM PDT 24 |
2647198667 ps |
| T194 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.2375090871 |
|
|
Mar 19 01:02:15 PM PDT 24 |
Mar 19 01:02:17 PM PDT 24 |
4258848481 ps |
| T260 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.4173608388 |
|
|
Mar 19 01:01:58 PM PDT 24 |
Mar 19 01:03:23 PM PDT 24 |
125552651721 ps |
| T261 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1086834391 |
|
|
Mar 19 01:03:10 PM PDT 24 |
Mar 19 01:05:36 PM PDT 24 |
54219068169 ps |
| T195 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.1215470103 |
|
|
Mar 19 01:02:55 PM PDT 24 |
Mar 19 01:03:03 PM PDT 24 |
3039534211 ps |
| T262 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1008951970 |
|
|
Mar 19 01:02:57 PM PDT 24 |
Mar 19 01:03:00 PM PDT 24 |
2901839729 ps |
| T263 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1804384451 |
|
|
Mar 19 01:01:28 PM PDT 24 |
Mar 19 01:02:09 PM PDT 24 |
100411717449 ps |
| T264 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3520363534 |
|
|
Mar 19 01:01:50 PM PDT 24 |
Mar 19 01:01:58 PM PDT 24 |
2512391723 ps |
| T265 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.1022531998 |
|
|
Mar 19 01:01:31 PM PDT 24 |
Mar 19 01:02:46 PM PDT 24 |
107008412065 ps |
| T266 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.513000934 |
|
|
Mar 19 01:02:56 PM PDT 24 |
Mar 19 01:03:04 PM PDT 24 |
15649766057 ps |
| T258 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.3624164907 |
|
|
Mar 19 01:01:51 PM PDT 24 |
Mar 19 01:01:55 PM PDT 24 |
3665009330 ps |
| T677 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.2080891515 |
|
|
Mar 19 01:01:45 PM PDT 24 |
Mar 19 01:01:47 PM PDT 24 |
2125263456 ps |
| T678 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2224079623 |
|
|
Mar 19 01:02:13 PM PDT 24 |
Mar 19 01:02:19 PM PDT 24 |
2457831981 ps |
| T679 |
/workspace/coverage/default/29.sysrst_ctrl_smoke.1230153605 |
|
|
Mar 19 01:02:36 PM PDT 24 |
Mar 19 01:02:38 PM PDT 24 |
2123329006 ps |
| T360 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2871249743 |
|
|
Mar 19 01:02:55 PM PDT 24 |
Mar 19 01:03:54 PM PDT 24 |
109607309714 ps |
| T680 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.363536277 |
|
|
Mar 19 01:02:35 PM PDT 24 |
Mar 19 01:02:38 PM PDT 24 |
2636617711 ps |
| T681 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2622433969 |
|
|
Mar 19 01:02:58 PM PDT 24 |
Mar 19 01:03:02 PM PDT 24 |
2892730673 ps |
| T682 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.3769033729 |
|
|
Mar 19 01:02:11 PM PDT 24 |
Mar 19 01:02:14 PM PDT 24 |
2244763098 ps |
| T683 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3496869034 |
|
|
Mar 19 01:01:21 PM PDT 24 |
Mar 19 01:01:27 PM PDT 24 |
2618840196 ps |
| T684 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1189634492 |
|
|
Mar 19 01:01:32 PM PDT 24 |
Mar 19 01:03:20 PM PDT 24 |
40911532675 ps |
| T685 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.3892198001 |
|
|
Mar 19 01:02:38 PM PDT 24 |
Mar 19 01:02:40 PM PDT 24 |
2139940949 ps |
| T211 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2384111710 |
|
|
Mar 19 01:02:56 PM PDT 24 |
Mar 19 01:03:01 PM PDT 24 |
4471589971 ps |
| T686 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.1959269432 |
|
|
Mar 19 01:02:56 PM PDT 24 |
Mar 19 01:03:04 PM PDT 24 |
2609413932 ps |
| T687 |
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.3424787104 |
|
|
Mar 19 01:02:20 PM PDT 24 |
Mar 19 01:02:26 PM PDT 24 |
2224936120 ps |
| T688 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.2766806888 |
|
|
Mar 19 01:02:59 PM PDT 24 |
Mar 19 01:03:06 PM PDT 24 |
2111163834 ps |
| T689 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.1250313056 |
|
|
Mar 19 01:01:58 PM PDT 24 |
Mar 19 01:02:03 PM PDT 24 |
4436435813 ps |
| T690 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.4220743391 |
|
|
Mar 19 01:02:06 PM PDT 24 |
Mar 19 01:02:43 PM PDT 24 |
13043981652 ps |
| T691 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1504300723 |
|
|
Mar 19 01:03:17 PM PDT 24 |
Mar 19 01:03:27 PM PDT 24 |
3473372717 ps |
| T692 |
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3142083401 |
|
|
Mar 19 01:03:23 PM PDT 24 |
Mar 19 01:03:56 PM PDT 24 |
89655865177 ps |
| T693 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.3855458698 |
|
|
Mar 19 01:02:47 PM PDT 24 |
Mar 19 01:02:49 PM PDT 24 |
2033865286 ps |
| T694 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2181126178 |
|
|
Mar 19 01:02:35 PM PDT 24 |
Mar 19 01:02:38 PM PDT 24 |
2525036380 ps |
| T695 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.3262605918 |
|
|
Mar 19 01:02:36 PM PDT 24 |
Mar 19 01:02:43 PM PDT 24 |
2113880344 ps |
| T696 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2755852200 |
|
|
Mar 19 01:01:48 PM PDT 24 |
Mar 19 01:01:53 PM PDT 24 |
15182362693 ps |
| T697 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.4255914427 |
|
|
Mar 19 01:02:42 PM PDT 24 |
Mar 19 01:02:43 PM PDT 24 |
2084556533 ps |
| T698 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1608738955 |
|
|
Mar 19 01:01:34 PM PDT 24 |
Mar 19 01:01:38 PM PDT 24 |
3644400011 ps |
| T699 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3040772424 |
|
|
Mar 19 01:03:16 PM PDT 24 |
Mar 19 01:03:23 PM PDT 24 |
2949242695 ps |
| T700 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.3788041072 |
|
|
Mar 19 01:02:51 PM PDT 24 |
Mar 19 01:06:59 PM PDT 24 |
101559968977 ps |
| T701 |
/workspace/coverage/default/15.sysrst_ctrl_smoke.1878944757 |
|
|
Mar 19 01:02:00 PM PDT 24 |
Mar 19 01:02:06 PM PDT 24 |
2109558632 ps |
| T702 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.4085934493 |
|
|
Mar 19 01:03:16 PM PDT 24 |
Mar 19 01:04:46 PM PDT 24 |
114864627117 ps |
| T703 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2179424826 |
|
|
Mar 19 01:03:52 PM PDT 24 |
Mar 19 01:04:09 PM PDT 24 |
40703368369 ps |
| T704 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.582872923 |
|
|
Mar 19 01:01:30 PM PDT 24 |
Mar 19 01:01:41 PM PDT 24 |
3745213714 ps |
| T705 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all.2157973524 |
|
|
Mar 19 01:02:48 PM PDT 24 |
Mar 19 01:03:04 PM PDT 24 |
11374109201 ps |
| T388 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2633818236 |
|
|
Mar 19 01:02:58 PM PDT 24 |
Mar 19 01:07:18 PM PDT 24 |
100617886859 ps |
| T706 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2033063286 |
|
|
Mar 19 01:03:24 PM PDT 24 |
Mar 19 01:03:34 PM PDT 24 |
2467575703 ps |
| T707 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.345925085 |
|
|
Mar 19 01:03:23 PM PDT 24 |
Mar 19 01:09:30 PM PDT 24 |
142956690509 ps |
| T708 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2796738394 |
|
|
Mar 19 01:03:31 PM PDT 24 |
Mar 19 01:03:49 PM PDT 24 |
25096826435 ps |
| T709 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3172294139 |
|
|
Mar 19 01:02:07 PM PDT 24 |
Mar 19 01:02:09 PM PDT 24 |
2567763487 ps |
| T710 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.434589972 |
|
|
Mar 19 01:02:25 PM PDT 24 |
Mar 19 01:02:34 PM PDT 24 |
3043016739 ps |
| T711 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2153133572 |
|
|
Mar 19 01:03:23 PM PDT 24 |
Mar 19 01:06:34 PM PDT 24 |
68925422551 ps |
| T712 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3452162180 |
|
|
Mar 19 01:03:25 PM PDT 24 |
Mar 19 01:03:48 PM PDT 24 |
28093577266 ps |
| T713 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3025643846 |
|
|
Mar 19 01:01:30 PM PDT 24 |
Mar 19 01:01:32 PM PDT 24 |
2029652329 ps |
| T714 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3873716710 |
|
|
Mar 19 01:03:24 PM PDT 24 |
Mar 19 01:04:33 PM PDT 24 |
45949639702 ps |
| T715 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1293879946 |
|
|
Mar 19 01:01:41 PM PDT 24 |
Mar 19 01:01:43 PM PDT 24 |
2667965023 ps |
| T716 |
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1138909787 |
|
|
Mar 19 01:02:10 PM PDT 24 |
Mar 19 01:03:44 PM PDT 24 |
154352547622 ps |
| T717 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.1761460744 |
|
|
Mar 19 01:02:27 PM PDT 24 |
Mar 19 01:02:43 PM PDT 24 |
36814770337 ps |
| T718 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.3808711520 |
|
|
Mar 19 01:02:21 PM PDT 24 |
Mar 19 01:02:23 PM PDT 24 |
2038313489 ps |
| T719 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.645792046 |
|
|
Mar 19 01:02:57 PM PDT 24 |
Mar 19 01:03:07 PM PDT 24 |
3657144271 ps |
| T720 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.2781606152 |
|
|
Mar 19 01:02:37 PM PDT 24 |
Mar 19 01:02:56 PM PDT 24 |
13682327002 ps |
| T392 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2474277007 |
|
|
Mar 19 01:03:06 PM PDT 24 |
Mar 19 01:05:01 PM PDT 24 |
84545729847 ps |
| T721 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.3302404537 |
|
|
Mar 19 01:01:46 PM PDT 24 |
Mar 19 01:01:48 PM PDT 24 |
2127644758 ps |
| T722 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1584962201 |
|
|
Mar 19 01:01:41 PM PDT 24 |
Mar 19 01:01:42 PM PDT 24 |
2689553086 ps |
| T723 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2808025406 |
|
|
Mar 19 01:02:14 PM PDT 24 |
Mar 19 01:02:17 PM PDT 24 |
2638520338 ps |
| T724 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.785202900 |
|
|
Mar 19 01:01:19 PM PDT 24 |
Mar 19 01:01:22 PM PDT 24 |
2534449295 ps |
| T725 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.991179313 |
|
|
Mar 19 01:01:24 PM PDT 24 |
Mar 19 01:01:41 PM PDT 24 |
12736608777 ps |
| T726 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1176699572 |
|
|
Mar 19 01:02:37 PM PDT 24 |
Mar 19 01:02:45 PM PDT 24 |
3253939185 ps |
| T727 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.2663247038 |
|
|
Mar 19 01:01:44 PM PDT 24 |
Mar 19 01:01:52 PM PDT 24 |
3294922405 ps |
| T728 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.3568687770 |
|
|
Mar 19 01:02:09 PM PDT 24 |
Mar 19 01:02:42 PM PDT 24 |
70748937396 ps |
| T729 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.3831601041 |
|
|
Mar 19 01:02:15 PM PDT 24 |
Mar 19 01:02:18 PM PDT 24 |
2117921445 ps |
| T730 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1681008742 |
|
|
Mar 19 01:02:57 PM PDT 24 |
Mar 19 01:02:59 PM PDT 24 |
4614571328 ps |
| T731 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.258682633 |
|
|
Mar 19 01:02:20 PM PDT 24 |
Mar 19 01:03:26 PM PDT 24 |
121067583000 ps |
| T732 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2051988816 |
|
|
Mar 19 01:02:57 PM PDT 24 |
Mar 19 01:03:07 PM PDT 24 |
3128167008 ps |
| T733 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2262821283 |
|
|
Mar 19 01:02:14 PM PDT 24 |
Mar 19 01:02:17 PM PDT 24 |
2628332751 ps |
| T734 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2655328791 |
|
|
Mar 19 01:01:40 PM PDT 24 |
Mar 19 01:01:45 PM PDT 24 |
2614463400 ps |
| T735 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.4094345863 |
|
|
Mar 19 01:01:42 PM PDT 24 |
Mar 19 01:01:45 PM PDT 24 |
4713798968 ps |
| T736 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.1979753706 |
|
|
Mar 19 01:02:13 PM PDT 24 |
Mar 19 01:02:52 PM PDT 24 |
15385110808 ps |
| T737 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3595619314 |
|
|
Mar 19 01:02:16 PM PDT 24 |
Mar 19 01:02:23 PM PDT 24 |
2609412254 ps |
| T738 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1180305290 |
|
|
Mar 19 01:01:41 PM PDT 24 |
Mar 19 01:05:58 PM PDT 24 |
1282099542039 ps |
| T739 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2955006491 |
|
|
Mar 19 01:03:20 PM PDT 24 |
Mar 19 01:03:22 PM PDT 24 |
2789842328 ps |
| T740 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3609062220 |
|
|
Mar 19 01:01:31 PM PDT 24 |
Mar 19 01:01:38 PM PDT 24 |
2654226436 ps |
| T741 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.834797194 |
|
|
Mar 19 01:01:51 PM PDT 24 |
Mar 19 01:03:28 PM PDT 24 |
36044959902 ps |
| T742 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.3824228554 |
|
|
Mar 19 01:01:45 PM PDT 24 |
Mar 19 01:01:48 PM PDT 24 |
2118405478 ps |
| T743 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.1527743485 |
|
|
Mar 19 01:03:10 PM PDT 24 |
Mar 19 01:05:04 PM PDT 24 |
97017040099 ps |
| T744 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.516935503 |
|
|
Mar 19 01:03:16 PM PDT 24 |
Mar 19 01:03:34 PM PDT 24 |
12049577989 ps |
| T745 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2188191602 |
|
|
Mar 19 01:02:39 PM PDT 24 |
Mar 19 01:02:50 PM PDT 24 |
3522728801 ps |
| T131 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2427635639 |
|
|
Mar 19 01:01:48 PM PDT 24 |
Mar 19 01:04:41 PM PDT 24 |
751373935393 ps |
| T746 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.3335244431 |
|
|
Mar 19 01:01:49 PM PDT 24 |
Mar 19 01:02:00 PM PDT 24 |
5045101396 ps |
| T747 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2349684554 |
|
|
Mar 19 01:03:22 PM PDT 24 |
Mar 19 01:03:27 PM PDT 24 |
2519145164 ps |
| T748 |
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.2319678793 |
|
|
Mar 19 01:02:56 PM PDT 24 |
Mar 19 01:07:18 PM PDT 24 |
97968449233 ps |
| T749 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1293817640 |
|
|
Mar 19 01:02:19 PM PDT 24 |
Mar 19 01:02:25 PM PDT 24 |
25966011035 ps |
| T750 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3879617930 |
|
|
Mar 19 01:02:56 PM PDT 24 |
Mar 19 01:03:02 PM PDT 24 |
2122345147 ps |
| T176 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.962739705 |
|
|
Mar 19 01:02:03 PM PDT 24 |
Mar 19 01:02:08 PM PDT 24 |
3517495365 ps |
| T179 |
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.1164532011 |
|
|
Mar 19 01:02:38 PM PDT 24 |
Mar 19 01:02:42 PM PDT 24 |
4850516173 ps |
| T180 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.4032823562 |
|
|
Mar 19 01:02:36 PM PDT 24 |
Mar 19 01:02:39 PM PDT 24 |
3180114896 ps |
| T181 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.2899508921 |
|
|
Mar 19 01:02:47 PM PDT 24 |
Mar 19 01:04:31 PM PDT 24 |
158905693033 ps |
| T182 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1802015936 |
|
|
Mar 19 01:02:44 PM PDT 24 |
Mar 19 01:03:23 PM PDT 24 |
80567486457 ps |
| T183 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2948160624 |
|
|
Mar 19 01:01:48 PM PDT 24 |
Mar 19 01:01:53 PM PDT 24 |
2514591105 ps |
| T184 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3215942328 |
|
|
Mar 19 01:02:15 PM PDT 24 |
Mar 19 01:02:23 PM PDT 24 |
2469599553 ps |
| T185 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1796226535 |
|
|
Mar 19 01:01:43 PM PDT 24 |
Mar 19 01:01:58 PM PDT 24 |
6785494141 ps |
| T186 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2812103374 |
|
|
Mar 19 01:02:02 PM PDT 24 |
Mar 19 01:02:06 PM PDT 24 |
2458175397 ps |
| T187 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.199404179 |
|
|
Mar 19 01:01:48 PM PDT 24 |
Mar 19 01:01:52 PM PDT 24 |
2135555199 ps |
| T751 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1548241354 |
|
|
Mar 19 01:02:42 PM PDT 24 |
Mar 19 01:02:46 PM PDT 24 |
5871557708 ps |
| T752 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.4279089506 |
|
|
Mar 19 01:01:48 PM PDT 24 |
Mar 19 01:01:52 PM PDT 24 |
2532950699 ps |
| T132 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3043388702 |
|
|
Mar 19 01:03:08 PM PDT 24 |
Mar 19 01:08:18 PM PDT 24 |
555986765689 ps |
| T753 |
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.1155559621 |
|
|
Mar 19 01:01:23 PM PDT 24 |
Mar 19 01:01:27 PM PDT 24 |
3588420553 ps |
| T754 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.3925621967 |
|
|
Mar 19 01:02:13 PM PDT 24 |
Mar 19 01:02:19 PM PDT 24 |
2013506213 ps |
| T755 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1858003336 |
|
|
Mar 19 01:02:15 PM PDT 24 |
Mar 19 01:02:22 PM PDT 24 |
2613870866 ps |
| T756 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1327887372 |
|
|
Mar 19 01:02:43 PM PDT 24 |
Mar 19 01:02:50 PM PDT 24 |
2610627703 ps |
| T133 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2470041530 |
|
|
Mar 19 01:01:31 PM PDT 24 |
Mar 19 01:01:36 PM PDT 24 |
6683683604 ps |
| T373 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2370635991 |
|
|
Mar 19 01:03:44 PM PDT 24 |
Mar 19 01:05:01 PM PDT 24 |
61621290840 ps |
| T757 |
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2233569892 |
|
|
Mar 19 01:02:20 PM PDT 24 |
Mar 19 01:02:26 PM PDT 24 |
4096961190 ps |
| T273 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3016465036 |
|
|
Mar 19 01:02:05 PM PDT 24 |
Mar 19 01:07:08 PM PDT 24 |
140457205304 ps |
| T758 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1913503310 |
|
|
Mar 19 01:02:51 PM PDT 24 |
Mar 19 01:02:55 PM PDT 24 |
3357062092 ps |
| T396 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3205520303 |
|
|
Mar 19 01:03:10 PM PDT 24 |
Mar 19 01:03:28 PM PDT 24 |
60375668343 ps |
| T259 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.1176358309 |
|
|
Mar 19 01:01:40 PM PDT 24 |
Mar 19 01:01:43 PM PDT 24 |
3934972639 ps |
| T759 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.3831938562 |
|
|
Mar 19 01:01:44 PM PDT 24 |
Mar 19 01:01:51 PM PDT 24 |
2111301448 ps |
| T322 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2178828751 |
|
|
Mar 19 01:02:15 PM PDT 24 |
Mar 19 01:03:40 PM PDT 24 |
35637507265 ps |
| T760 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2854678703 |
|
|
Mar 19 01:01:28 PM PDT 24 |
Mar 19 01:01:30 PM PDT 24 |
2528212872 ps |
| T761 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2724905831 |
|
|
Mar 19 01:01:20 PM PDT 24 |
Mar 19 01:01:23 PM PDT 24 |
2627037532 ps |
| T762 |
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3897467504 |
|
|
Mar 19 01:02:11 PM PDT 24 |
Mar 19 01:02:18 PM PDT 24 |
2141871172 ps |
| T763 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1826711711 |
|
|
Mar 19 01:02:43 PM PDT 24 |
Mar 19 01:02:51 PM PDT 24 |
2889824915 ps |
| T764 |
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.490910315 |
|
|
Mar 19 01:02:40 PM PDT 24 |
Mar 19 01:02:49 PM PDT 24 |
3082945122 ps |
| T765 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.166575018 |
|
|
Mar 19 01:03:07 PM PDT 24 |
Mar 19 01:03:19 PM PDT 24 |
2610503557 ps |
| T766 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2418986809 |
|
|
Mar 19 01:03:41 PM PDT 24 |
Mar 19 01:04:27 PM PDT 24 |
32102116270 ps |
| T767 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1106756128 |
|
|
Mar 19 01:03:22 PM PDT 24 |
Mar 19 01:03:31 PM PDT 24 |
2611856134 ps |
| T768 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.1170332155 |
|
|
Mar 19 01:01:58 PM PDT 24 |
Mar 19 01:02:06 PM PDT 24 |
2515217473 ps |
| T769 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.61187956 |
|
|
Mar 19 01:02:16 PM PDT 24 |
Mar 19 01:02:20 PM PDT 24 |
2076131614 ps |
| T770 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2277330750 |
|
|
Mar 19 01:02:26 PM PDT 24 |
Mar 19 01:02:28 PM PDT 24 |
2494484606 ps |
| T771 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.1774844584 |
|
|
Mar 19 01:01:52 PM PDT 24 |
Mar 19 01:01:54 PM PDT 24 |
2030827140 ps |
| T772 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2658051159 |
|
|
Mar 19 01:01:41 PM PDT 24 |
Mar 19 01:01:45 PM PDT 24 |
3478118944 ps |
| T773 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1449273948 |
|
|
Mar 19 01:02:57 PM PDT 24 |
Mar 19 01:03:13 PM PDT 24 |
5408762499 ps |
| T774 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.2046442438 |
|
|
Mar 19 01:02:17 PM PDT 24 |
Mar 19 01:02:20 PM PDT 24 |
5013146762 ps |
| T775 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3664410764 |
|
|
Mar 19 01:02:10 PM PDT 24 |
Mar 19 01:02:13 PM PDT 24 |
2482929447 ps |
| T776 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1802934420 |
|
|
Mar 19 01:02:09 PM PDT 24 |
Mar 19 01:03:52 PM PDT 24 |
38535721177 ps |
| T777 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.231705260 |
|
|
Mar 19 01:02:36 PM PDT 24 |
Mar 19 01:03:42 PM PDT 24 |
65801760192 ps |
| T778 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3716972942 |
|
|
Mar 19 01:01:29 PM PDT 24 |
Mar 19 01:01:31 PM PDT 24 |
3243864555 ps |
| T779 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3551026147 |
|
|
Mar 19 01:02:45 PM PDT 24 |
Mar 19 01:02:47 PM PDT 24 |
2627035916 ps |
| T177 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2644086439 |
|
|
Mar 19 01:01:40 PM PDT 24 |
Mar 19 01:02:28 PM PDT 24 |
61284046337 ps |
| T249 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.2619263943 |
|
|
Mar 19 01:01:50 PM PDT 24 |
Mar 19 01:01:52 PM PDT 24 |
2252105383 ps |
| T250 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1156949627 |
|
|
Mar 19 01:02:19 PM PDT 24 |
Mar 19 01:02:20 PM PDT 24 |
2578056863 ps |
| T251 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.4140956975 |
|
|
Mar 19 01:01:31 PM PDT 24 |
Mar 19 01:02:18 PM PDT 24 |
42029068450 ps |
| T252 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1673216163 |
|
|
Mar 19 01:03:07 PM PDT 24 |
Mar 19 01:03:10 PM PDT 24 |
3512020809 ps |
| T253 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.4233723555 |
|
|
Mar 19 01:01:59 PM PDT 24 |
Mar 19 01:03:28 PM PDT 24 |
38580234083 ps |
| T254 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3074253867 |
|
|
Mar 19 01:01:21 PM PDT 24 |
Mar 19 01:02:40 PM PDT 24 |
27833921493 ps |
| T255 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.3078009828 |
|
|
Mar 19 01:01:34 PM PDT 24 |
Mar 19 01:02:17 PM PDT 24 |
57952348944 ps |
| T256 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2025811480 |
|
|
Mar 19 01:01:46 PM PDT 24 |
Mar 19 01:01:51 PM PDT 24 |
2701880339 ps |
| T257 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3646735033 |
|
|
Mar 19 01:02:56 PM PDT 24 |
Mar 19 01:03:05 PM PDT 24 |
26882650747 ps |
| T780 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.2989288644 |
|
|
Mar 19 01:01:50 PM PDT 24 |
Mar 19 01:03:13 PM PDT 24 |
274982687103 ps |
| T781 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.3801606006 |
|
|
Mar 19 01:02:17 PM PDT 24 |
Mar 19 01:02:20 PM PDT 24 |
2015575769 ps |
| T782 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.2208210919 |
|
|
Mar 19 01:02:26 PM PDT 24 |
Mar 19 01:02:29 PM PDT 24 |
2124536306 ps |
| T391 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.155843968 |
|
|
Mar 19 01:01:42 PM PDT 24 |
Mar 19 01:03:34 PM PDT 24 |
82150663576 ps |
| T783 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2130379642 |
|
|
Mar 19 01:03:40 PM PDT 24 |
Mar 19 01:04:25 PM PDT 24 |
60178820781 ps |
| T784 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.930289216 |
|
|
Mar 19 01:01:48 PM PDT 24 |
Mar 19 01:01:59 PM PDT 24 |
3554448768 ps |
| T785 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.2119754722 |
|
|
Mar 19 01:02:00 PM PDT 24 |
Mar 19 01:02:04 PM PDT 24 |
2016856842 ps |
| T786 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2911819829 |
|
|
Mar 19 01:03:18 PM PDT 24 |
Mar 19 01:03:21 PM PDT 24 |
2629514637 ps |
| T787 |
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.1334028366 |
|
|
Mar 19 01:02:16 PM PDT 24 |
Mar 19 01:02:24 PM PDT 24 |
8964793129 ps |
| T788 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3402162925 |
|
|
Mar 19 01:01:21 PM PDT 24 |
Mar 19 01:01:30 PM PDT 24 |
2512496937 ps |
| T789 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.169875463 |
|
|
Mar 19 01:01:11 PM PDT 24 |
Mar 19 01:01:18 PM PDT 24 |
2482361521 ps |
| T790 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2223534616 |
|
|
Mar 19 01:02:43 PM PDT 24 |
Mar 19 01:04:11 PM PDT 24 |
33582927940 ps |
| T791 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.2484467538 |
|
|
Mar 19 01:02:40 PM PDT 24 |
Mar 19 01:02:41 PM PDT 24 |
2144466587 ps |
| T311 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.3542572285 |
|
|
Mar 19 01:01:25 PM PDT 24 |
Mar 19 01:01:36 PM PDT 24 |
22132036571 ps |
| T163 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.939774091 |
|
|
Mar 19 01:03:08 PM PDT 24 |
Mar 19 01:03:16 PM PDT 24 |
2665656558 ps |
| T792 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.4169334652 |
|
|
Mar 19 01:01:21 PM PDT 24 |
Mar 19 01:01:26 PM PDT 24 |
2485059827 ps |
| T389 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.740703460 |
|
|
Mar 19 01:01:43 PM PDT 24 |
Mar 19 01:03:39 PM PDT 24 |
116490120294 ps |
| T793 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2759736752 |
|
|
Mar 19 01:02:45 PM PDT 24 |
Mar 19 01:02:48 PM PDT 24 |
2521737053 ps |
| T794 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.1592332569 |
|
|
Mar 19 01:02:37 PM PDT 24 |
Mar 19 01:02:43 PM PDT 24 |
12239363964 ps |
| T795 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1229299173 |
|
|
Mar 19 01:02:51 PM PDT 24 |
Mar 19 01:02:58 PM PDT 24 |
2610954202 ps |
| T28 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1479917419 |
|
|
Mar 19 12:35:32 PM PDT 24 |
Mar 19 12:36:09 PM PDT 24 |
22211845606 ps |
| T796 |
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.4257720835 |
|
|
Mar 19 12:35:45 PM PDT 24 |
Mar 19 12:35:47 PM PDT 24 |
2058970628 ps |