T153 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.652623969 |
|
|
Mar 21 01:45:43 PM PDT 24 |
Mar 21 01:45:45 PM PDT 24 |
4406796616 ps |
T424 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.251822379 |
|
|
Mar 21 01:43:44 PM PDT 24 |
Mar 21 01:43:46 PM PDT 24 |
2523938718 ps |
T425 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.3877694379 |
|
|
Mar 21 01:44:30 PM PDT 24 |
Mar 21 01:44:55 PM PDT 24 |
9155343505 ps |
T120 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.9855397 |
|
|
Mar 21 01:44:31 PM PDT 24 |
Mar 21 01:46:10 PM PDT 24 |
1585231162807 ps |
T426 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.328407692 |
|
|
Mar 21 01:45:08 PM PDT 24 |
Mar 21 01:45:10 PM PDT 24 |
2516129321 ps |
T427 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.898055762 |
|
|
Mar 21 01:43:10 PM PDT 24 |
Mar 21 01:43:17 PM PDT 24 |
2299716783 ps |
T428 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1858878701 |
|
|
Mar 21 01:43:23 PM PDT 24 |
Mar 21 01:43:30 PM PDT 24 |
2489132371 ps |
T222 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2230689742 |
|
|
Mar 21 01:47:28 PM PDT 24 |
Mar 21 01:51:13 PM PDT 24 |
174686523324 ps |
T254 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.3672157980 |
|
|
Mar 21 01:45:10 PM PDT 24 |
Mar 21 01:45:16 PM PDT 24 |
6689897677 ps |
T353 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.3406494834 |
|
|
Mar 21 01:44:17 PM PDT 24 |
Mar 21 01:44:32 PM PDT 24 |
9165718313 ps |
T294 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.749686273 |
|
|
Mar 21 01:47:12 PM PDT 24 |
Mar 21 01:48:18 PM PDT 24 |
104953602771 ps |
T429 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.4171186916 |
|
|
Mar 21 01:46:03 PM PDT 24 |
Mar 21 01:46:33 PM PDT 24 |
10453264755 ps |
T430 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.939906686 |
|
|
Mar 21 01:45:10 PM PDT 24 |
Mar 21 01:45:16 PM PDT 24 |
2110657882 ps |
T431 |
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2829562874 |
|
|
Mar 21 01:43:58 PM PDT 24 |
Mar 21 01:44:02 PM PDT 24 |
2479688359 ps |
T432 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1813078851 |
|
|
Mar 21 01:46:55 PM PDT 24 |
Mar 21 01:47:00 PM PDT 24 |
8037725773 ps |
T433 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1606477536 |
|
|
Mar 21 01:45:40 PM PDT 24 |
Mar 21 01:45:42 PM PDT 24 |
2188186831 ps |
T434 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.522991489 |
|
|
Mar 21 01:43:22 PM PDT 24 |
Mar 21 01:43:30 PM PDT 24 |
2611220533 ps |
T435 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.814912459 |
|
|
Mar 21 01:45:51 PM PDT 24 |
Mar 21 01:45:57 PM PDT 24 |
5769118883 ps |
T436 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.2848733716 |
|
|
Mar 21 01:46:18 PM PDT 24 |
Mar 21 01:46:24 PM PDT 24 |
2111905829 ps |
T437 |
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2787127137 |
|
|
Mar 21 01:45:09 PM PDT 24 |
Mar 21 01:45:16 PM PDT 24 |
2514887167 ps |
T342 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.939216506 |
|
|
Mar 21 01:46:33 PM PDT 24 |
Mar 21 01:46:53 PM PDT 24 |
41042950621 ps |
T438 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2700336607 |
|
|
Mar 21 01:47:12 PM PDT 24 |
Mar 21 01:49:55 PM PDT 24 |
129429208970 ps |
T176 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.1421925804 |
|
|
Mar 21 01:45:43 PM PDT 24 |
Mar 21 02:00:40 PM PDT 24 |
538089830482 ps |
T349 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.1497420138 |
|
|
Mar 21 01:45:39 PM PDT 24 |
Mar 21 01:45:46 PM PDT 24 |
1598634277379 ps |
T439 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.519265922 |
|
|
Mar 21 01:46:06 PM PDT 24 |
Mar 21 01:46:19 PM PDT 24 |
35045304577 ps |
T440 |
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.33120955 |
|
|
Mar 21 01:46:30 PM PDT 24 |
Mar 21 01:46:31 PM PDT 24 |
2564788276 ps |
T441 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.876383489 |
|
|
Mar 21 01:46:08 PM PDT 24 |
Mar 21 01:46:12 PM PDT 24 |
2616404919 ps |
T94 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2067310861 |
|
|
Mar 21 01:47:26 PM PDT 24 |
Mar 21 01:47:31 PM PDT 24 |
25667716339 ps |
T442 |
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.1609996291 |
|
|
Mar 21 01:45:30 PM PDT 24 |
Mar 21 01:45:36 PM PDT 24 |
2211921939 ps |
T443 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all.3702551914 |
|
|
Mar 21 01:45:08 PM PDT 24 |
Mar 21 01:45:32 PM PDT 24 |
8582883084 ps |
T218 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.125155993 |
|
|
Mar 21 01:44:10 PM PDT 24 |
Mar 21 01:44:55 PM PDT 24 |
65455558990 ps |
T141 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.266661739 |
|
|
Mar 21 01:44:57 PM PDT 24 |
Mar 21 01:47:57 PM PDT 24 |
329288299753 ps |
T444 |
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2020919775 |
|
|
Mar 21 01:46:53 PM PDT 24 |
Mar 21 01:46:58 PM PDT 24 |
2857799722 ps |
T130 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.83749479 |
|
|
Mar 21 01:45:22 PM PDT 24 |
Mar 21 01:46:15 PM PDT 24 |
2012909134413 ps |
T445 |
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.1630365047 |
|
|
Mar 21 01:44:30 PM PDT 24 |
Mar 21 01:44:41 PM PDT 24 |
3726792307 ps |
T446 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1545817512 |
|
|
Mar 21 01:44:25 PM PDT 24 |
Mar 21 01:44:28 PM PDT 24 |
2628292980 ps |
T260 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.87081071 |
|
|
Mar 21 01:44:53 PM PDT 24 |
Mar 21 01:44:59 PM PDT 24 |
4296690638 ps |
T447 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3348959600 |
|
|
Mar 21 01:45:30 PM PDT 24 |
Mar 21 01:45:32 PM PDT 24 |
4275735417 ps |
T448 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3333166489 |
|
|
Mar 21 01:43:57 PM PDT 24 |
Mar 21 01:44:04 PM PDT 24 |
2510690270 ps |
T298 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3171522996 |
|
|
Mar 21 01:45:21 PM PDT 24 |
Mar 21 01:46:25 PM PDT 24 |
54116645126 ps |
T354 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2323091854 |
|
|
Mar 21 01:46:43 PM PDT 24 |
Mar 21 01:48:12 PM PDT 24 |
34226328444 ps |
T326 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.1264840888 |
|
|
Mar 21 01:44:58 PM PDT 24 |
Mar 21 01:47:45 PM PDT 24 |
133239095593 ps |
T449 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3742131829 |
|
|
Mar 21 01:45:21 PM PDT 24 |
Mar 21 01:45:26 PM PDT 24 |
2515221224 ps |
T450 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2115994131 |
|
|
Mar 21 01:44:31 PM PDT 24 |
Mar 21 01:44:39 PM PDT 24 |
2459255875 ps |
T248 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1300426882 |
|
|
Mar 21 01:43:44 PM PDT 24 |
Mar 21 01:44:15 PM PDT 24 |
42102308813 ps |
T451 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.22981579 |
|
|
Mar 21 01:46:41 PM PDT 24 |
Mar 21 01:46:48 PM PDT 24 |
2458071073 ps |
T452 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.3859048924 |
|
|
Mar 21 01:44:28 PM PDT 24 |
Mar 21 01:44:32 PM PDT 24 |
2117346632 ps |
T154 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2333156741 |
|
|
Mar 21 01:45:42 PM PDT 24 |
Mar 21 01:46:17 PM PDT 24 |
43081960679 ps |
T453 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2849184620 |
|
|
Mar 21 01:44:39 PM PDT 24 |
Mar 21 01:44:41 PM PDT 24 |
2218305360 ps |
T454 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2444950192 |
|
|
Mar 21 01:43:22 PM PDT 24 |
Mar 21 01:43:24 PM PDT 24 |
2637946394 ps |
T455 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2585953445 |
|
|
Mar 21 01:43:54 PM PDT 24 |
Mar 21 01:44:01 PM PDT 24 |
3325537735 ps |
T456 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2335385693 |
|
|
Mar 21 01:46:05 PM PDT 24 |
Mar 21 01:46:12 PM PDT 24 |
2178312670 ps |
T457 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.881085652 |
|
|
Mar 21 01:47:15 PM PDT 24 |
Mar 21 01:47:22 PM PDT 24 |
8162045089 ps |
T458 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.3735203121 |
|
|
Mar 21 01:44:56 PM PDT 24 |
Mar 21 01:45:00 PM PDT 24 |
2617806617 ps |
T459 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.3550904195 |
|
|
Mar 21 01:43:55 PM PDT 24 |
Mar 21 01:43:57 PM PDT 24 |
2138011662 ps |
T315 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3399365731 |
|
|
Mar 21 01:47:25 PM PDT 24 |
Mar 21 01:48:53 PM PDT 24 |
128369762207 ps |
T183 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.2367622885 |
|
|
Mar 21 01:45:08 PM PDT 24 |
Mar 21 01:45:16 PM PDT 24 |
5575250200 ps |
T460 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.177769644 |
|
|
Mar 21 01:43:55 PM PDT 24 |
Mar 21 01:43:57 PM PDT 24 |
2461527511 ps |
T461 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.2649738735 |
|
|
Mar 21 01:45:22 PM PDT 24 |
Mar 21 01:45:26 PM PDT 24 |
3744456868 ps |
T249 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.202046225 |
|
|
Mar 21 01:43:30 PM PDT 24 |
Mar 21 01:45:14 PM PDT 24 |
42009375488 ps |
T462 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2141560409 |
|
|
Mar 21 01:43:22 PM PDT 24 |
Mar 21 01:43:26 PM PDT 24 |
2461073542 ps |
T463 |
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3633970727 |
|
|
Mar 21 01:47:14 PM PDT 24 |
Mar 21 01:47:21 PM PDT 24 |
2233089624 ps |
T464 |
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.3076664872 |
|
|
Mar 21 01:44:40 PM PDT 24 |
Mar 21 01:44:44 PM PDT 24 |
5718202926 ps |
T465 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3285963642 |
|
|
Mar 21 01:45:52 PM PDT 24 |
Mar 21 01:46:00 PM PDT 24 |
2511255149 ps |
T95 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3921735527 |
|
|
Mar 21 01:47:11 PM PDT 24 |
Mar 21 01:47:55 PM PDT 24 |
61118090745 ps |
T200 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3891072144 |
|
|
Mar 21 01:44:20 PM PDT 24 |
Mar 21 01:44:25 PM PDT 24 |
4032127140 ps |
T466 |
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.635449818 |
|
|
Mar 21 01:46:27 PM PDT 24 |
Mar 21 01:46:33 PM PDT 24 |
3156744037 ps |
T467 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1417831441 |
|
|
Mar 21 01:46:19 PM PDT 24 |
Mar 21 01:46:22 PM PDT 24 |
4194570536 ps |
T468 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.1150591692 |
|
|
Mar 21 01:46:09 PM PDT 24 |
Mar 21 01:46:11 PM PDT 24 |
2784049196 ps |
T261 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1425909930 |
|
|
Mar 21 01:44:16 PM PDT 24 |
Mar 21 01:45:14 PM PDT 24 |
83411509046 ps |
T469 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.499187899 |
|
|
Mar 21 01:45:51 PM PDT 24 |
Mar 21 01:45:54 PM PDT 24 |
2033773087 ps |
T470 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1916132529 |
|
|
Mar 21 01:43:58 PM PDT 24 |
Mar 21 01:44:00 PM PDT 24 |
2041745915 ps |
T471 |
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3698799263 |
|
|
Mar 21 01:46:39 PM PDT 24 |
Mar 21 01:46:41 PM PDT 24 |
2067558715 ps |
T96 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.981655672 |
|
|
Mar 21 01:45:53 PM PDT 24 |
Mar 21 01:48:01 PM PDT 24 |
147147732825 ps |
T182 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.1106429287 |
|
|
Mar 21 01:43:44 PM PDT 24 |
Mar 21 01:43:47 PM PDT 24 |
3134903980 ps |
T472 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2875294804 |
|
|
Mar 21 01:45:42 PM PDT 24 |
Mar 21 01:45:48 PM PDT 24 |
2449554210 ps |
T473 |
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.1567820077 |
|
|
Mar 21 01:44:39 PM PDT 24 |
Mar 21 01:44:44 PM PDT 24 |
2090281701 ps |
T474 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.4266638677 |
|
|
Mar 21 01:45:08 PM PDT 24 |
Mar 21 01:45:12 PM PDT 24 |
2519323934 ps |
T155 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3742671560 |
|
|
Mar 21 01:46:29 PM PDT 24 |
Mar 21 01:46:40 PM PDT 24 |
4273426032 ps |
T475 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3888070757 |
|
|
Mar 21 01:46:41 PM PDT 24 |
Mar 21 01:46:43 PM PDT 24 |
2890352022 ps |
T476 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.1040444053 |
|
|
Mar 21 01:46:52 PM PDT 24 |
Mar 21 01:46:54 PM PDT 24 |
2130143053 ps |
T228 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.1285601852 |
|
|
Mar 21 01:45:37 PM PDT 24 |
Mar 21 01:50:10 PM PDT 24 |
113507816191 ps |
T477 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.3339550258 |
|
|
Mar 21 01:46:41 PM PDT 24 |
Mar 21 01:46:43 PM PDT 24 |
2163936381 ps |
T295 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3147076605 |
|
|
Mar 21 01:46:53 PM PDT 24 |
Mar 21 01:54:20 PM PDT 24 |
167764959264 ps |
T478 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2119432221 |
|
|
Mar 21 01:45:53 PM PDT 24 |
Mar 21 01:46:00 PM PDT 24 |
2608072738 ps |
T479 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3405492962 |
|
|
Mar 21 01:45:32 PM PDT 24 |
Mar 21 01:45:40 PM PDT 24 |
2514661269 ps |
T171 |
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.3459039200 |
|
|
Mar 21 01:46:20 PM PDT 24 |
Mar 21 01:46:32 PM PDT 24 |
5266044227 ps |
T480 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2119967267 |
|
|
Mar 21 01:46:51 PM PDT 24 |
Mar 21 01:46:55 PM PDT 24 |
2608010098 ps |
T481 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.3114834267 |
|
|
Mar 21 01:46:34 PM PDT 24 |
Mar 21 01:46:35 PM PDT 24 |
2049731151 ps |
T300 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2137952794 |
|
|
Mar 21 01:45:10 PM PDT 24 |
Mar 21 01:51:04 PM PDT 24 |
128990624290 ps |
T320 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3368891809 |
|
|
Mar 21 01:43:20 PM PDT 24 |
Mar 21 01:43:39 PM PDT 24 |
111352690339 ps |
T482 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1699190591 |
|
|
Mar 21 01:45:19 PM PDT 24 |
Mar 21 01:45:21 PM PDT 24 |
3725959207 ps |
T483 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.4079594997 |
|
|
Mar 21 01:46:07 PM PDT 24 |
Mar 21 01:54:27 PM PDT 24 |
187718112273 ps |
T484 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.338586237 |
|
|
Mar 21 01:44:37 PM PDT 24 |
Mar 21 01:44:44 PM PDT 24 |
2441973324 ps |
T485 |
/workspace/coverage/default/14.sysrst_ctrl_alert_test.3914912885 |
|
|
Mar 21 01:44:40 PM PDT 24 |
Mar 21 01:44:42 PM PDT 24 |
2068304575 ps |
T486 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.3186640476 |
|
|
Mar 21 01:43:19 PM PDT 24 |
Mar 21 01:43:23 PM PDT 24 |
2407671756 ps |
T487 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.409571889 |
|
|
Mar 21 01:43:45 PM PDT 24 |
Mar 21 01:43:52 PM PDT 24 |
2694747393 ps |
T262 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2256145006 |
|
|
Mar 21 01:43:56 PM PDT 24 |
Mar 21 01:44:59 PM PDT 24 |
27787704343 ps |
T203 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1020045924 |
|
|
Mar 21 01:47:28 PM PDT 24 |
Mar 21 01:48:03 PM PDT 24 |
53946395505 ps |
T488 |
/workspace/coverage/default/11.sysrst_ctrl_smoke.3018094277 |
|
|
Mar 21 01:44:19 PM PDT 24 |
Mar 21 01:44:24 PM PDT 24 |
2125383041 ps |
T489 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.60373504 |
|
|
Mar 21 01:44:05 PM PDT 24 |
Mar 21 01:44:09 PM PDT 24 |
2627707530 ps |
T490 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.16892832 |
|
|
Mar 21 01:46:42 PM PDT 24 |
Mar 21 01:46:47 PM PDT 24 |
3562081122 ps |
T491 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.4214028763 |
|
|
Mar 21 01:44:07 PM PDT 24 |
Mar 21 01:44:14 PM PDT 24 |
2513124435 ps |
T492 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.4257753299 |
|
|
Mar 21 01:46:57 PM PDT 24 |
Mar 21 01:47:08 PM PDT 24 |
3701064690 ps |
T493 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.935185897 |
|
|
Mar 21 01:46:06 PM PDT 24 |
Mar 21 01:53:20 PM PDT 24 |
173271575816 ps |
T97 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.4088860239 |
|
|
Mar 21 01:43:11 PM PDT 24 |
Mar 21 01:43:48 PM PDT 24 |
26588152793 ps |
T174 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.4044520997 |
|
|
Mar 21 01:45:09 PM PDT 24 |
Mar 21 01:46:11 PM PDT 24 |
24266241201 ps |
T98 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2501230331 |
|
|
Mar 21 01:47:11 PM PDT 24 |
Mar 21 01:47:45 PM PDT 24 |
26090278291 ps |
T494 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2012438138 |
|
|
Mar 21 01:46:31 PM PDT 24 |
Mar 21 01:48:59 PM PDT 24 |
234149600554 ps |
T495 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1352690194 |
|
|
Mar 21 01:44:57 PM PDT 24 |
Mar 21 01:45:02 PM PDT 24 |
2881492544 ps |
T329 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.1098844394 |
|
|
Mar 21 01:46:17 PM PDT 24 |
Mar 21 01:50:33 PM PDT 24 |
106188848676 ps |
T496 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.3160897521 |
|
|
Mar 21 01:45:19 PM PDT 24 |
Mar 21 01:45:20 PM PDT 24 |
2150602922 ps |
T497 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1321609333 |
|
|
Mar 21 01:47:12 PM PDT 24 |
Mar 21 01:47:19 PM PDT 24 |
4270570414 ps |
T498 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.3619248362 |
|
|
Mar 21 01:44:19 PM PDT 24 |
Mar 21 01:44:24 PM PDT 24 |
2052269208 ps |
T499 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2510904422 |
|
|
Mar 21 01:44:05 PM PDT 24 |
Mar 21 01:44:13 PM PDT 24 |
2451539156 ps |
T296 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.667725840 |
|
|
Mar 21 01:44:18 PM PDT 24 |
Mar 21 01:44:56 PM PDT 24 |
62319900339 ps |
T500 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3984593018 |
|
|
Mar 21 01:44:09 PM PDT 24 |
Mar 21 01:44:14 PM PDT 24 |
2615231726 ps |
T501 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4115063273 |
|
|
Mar 21 01:46:53 PM PDT 24 |
Mar 21 01:47:00 PM PDT 24 |
2511608953 ps |
T502 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1757063309 |
|
|
Mar 21 01:44:27 PM PDT 24 |
Mar 21 01:44:30 PM PDT 24 |
3624028395 ps |
T503 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2039250454 |
|
|
Mar 21 01:46:56 PM PDT 24 |
Mar 21 01:50:11 PM PDT 24 |
72535645980 ps |
T207 |
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.494289736 |
|
|
Mar 21 01:47:24 PM PDT 24 |
Mar 21 01:48:00 PM PDT 24 |
52139388992 ps |
T504 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2902892920 |
|
|
Mar 21 01:43:09 PM PDT 24 |
Mar 21 01:43:12 PM PDT 24 |
2637345557 ps |
T505 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1506402402 |
|
|
Mar 21 01:45:12 PM PDT 24 |
Mar 21 01:45:14 PM PDT 24 |
12405859564 ps |
T506 |
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.527044820 |
|
|
Mar 21 01:46:30 PM PDT 24 |
Mar 21 01:46:37 PM PDT 24 |
7171135920 ps |
T299 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.651892059 |
|
|
Mar 21 01:46:29 PM PDT 24 |
Mar 21 01:49:29 PM PDT 24 |
177567973876 ps |
T507 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.3776787214 |
|
|
Mar 21 01:45:34 PM PDT 24 |
Mar 21 01:45:40 PM PDT 24 |
2011381949 ps |
T508 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.1139013741 |
|
|
Mar 21 01:43:10 PM PDT 24 |
Mar 21 01:43:12 PM PDT 24 |
2132680772 ps |
T509 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.4275743429 |
|
|
Mar 21 01:44:39 PM PDT 24 |
Mar 21 01:44:46 PM PDT 24 |
2460177771 ps |
T510 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.2177139169 |
|
|
Mar 21 01:46:29 PM PDT 24 |
Mar 21 01:46:32 PM PDT 24 |
2637085705 ps |
T206 |
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.596358971 |
|
|
Mar 21 01:47:25 PM PDT 24 |
Mar 21 01:48:17 PM PDT 24 |
19583031123 ps |
T511 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.3372244557 |
|
|
Mar 21 01:46:05 PM PDT 24 |
Mar 21 01:46:07 PM PDT 24 |
2042109706 ps |
T512 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.961974923 |
|
|
Mar 21 01:45:20 PM PDT 24 |
Mar 21 01:45:24 PM PDT 24 |
2526500109 ps |
T513 |
/workspace/coverage/default/21.sysrst_ctrl_alert_test.2692274099 |
|
|
Mar 21 01:45:21 PM PDT 24 |
Mar 21 01:45:25 PM PDT 24 |
2023091483 ps |
T514 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.152885376 |
|
|
Mar 21 01:44:35 PM PDT 24 |
Mar 21 01:44:36 PM PDT 24 |
2055858390 ps |
T515 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.4025160783 |
|
|
Mar 21 01:46:54 PM PDT 24 |
Mar 21 01:47:04 PM PDT 24 |
3600465547 ps |
T516 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1560747422 |
|
|
Mar 21 01:46:53 PM PDT 24 |
Mar 21 01:46:59 PM PDT 24 |
2012067701 ps |
T517 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.724267812 |
|
|
Mar 21 01:44:08 PM PDT 24 |
Mar 21 01:44:10 PM PDT 24 |
2525100993 ps |
T297 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2429881851 |
|
|
Mar 21 01:46:04 PM PDT 24 |
Mar 21 02:23:00 PM PDT 24 |
1735046240144 ps |
T518 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3041168487 |
|
|
Mar 21 01:43:33 PM PDT 24 |
Mar 21 01:43:36 PM PDT 24 |
2364733499 ps |
T519 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.15114357 |
|
|
Mar 21 01:46:19 PM PDT 24 |
Mar 21 01:46:34 PM PDT 24 |
31620399991 ps |
T520 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.2383672207 |
|
|
Mar 21 01:46:05 PM PDT 24 |
Mar 21 01:46:11 PM PDT 24 |
2012459578 ps |
T521 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1695828036 |
|
|
Mar 21 01:47:13 PM PDT 24 |
Mar 21 01:47:20 PM PDT 24 |
2508612590 ps |
T156 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3127718678 |
|
|
Mar 21 01:44:37 PM PDT 24 |
Mar 21 01:45:25 PM PDT 24 |
21137119782 ps |
T229 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.431020625 |
|
|
Mar 21 01:46:54 PM PDT 24 |
Mar 21 01:50:00 PM PDT 24 |
133504859261 ps |
T306 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3005927074 |
|
|
Mar 21 01:47:25 PM PDT 24 |
Mar 21 01:50:56 PM PDT 24 |
84852333882 ps |
T522 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.5925573 |
|
|
Mar 21 01:43:44 PM PDT 24 |
Mar 21 01:43:49 PM PDT 24 |
12886603160 ps |
T523 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3075808551 |
|
|
Mar 21 01:46:43 PM PDT 24 |
Mar 21 01:46:46 PM PDT 24 |
3532559362 ps |
T524 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.763557306 |
|
|
Mar 21 01:47:11 PM PDT 24 |
Mar 21 01:47:13 PM PDT 24 |
3287857234 ps |
T525 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.3238254989 |
|
|
Mar 21 01:44:41 PM PDT 24 |
Mar 21 01:44:43 PM PDT 24 |
2137341721 ps |
T526 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1217923894 |
|
|
Mar 21 01:46:07 PM PDT 24 |
Mar 21 01:46:15 PM PDT 24 |
2434811994 ps |
T527 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.728694716 |
|
|
Mar 21 01:46:04 PM PDT 24 |
Mar 21 01:46:08 PM PDT 24 |
3155676369 ps |
T528 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all.1894733045 |
|
|
Mar 21 01:44:39 PM PDT 24 |
Mar 21 01:44:44 PM PDT 24 |
6169430300 ps |
T529 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1323737233 |
|
|
Mar 21 01:44:29 PM PDT 24 |
Mar 21 01:44:37 PM PDT 24 |
2845476798 ps |
T530 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.583179390 |
|
|
Mar 21 01:45:53 PM PDT 24 |
Mar 21 01:46:00 PM PDT 24 |
2466682479 ps |
T531 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1824702292 |
|
|
Mar 21 01:47:10 PM PDT 24 |
Mar 21 01:47:15 PM PDT 24 |
2266023278 ps |
T532 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2909901794 |
|
|
Mar 21 01:43:44 PM PDT 24 |
Mar 21 01:43:46 PM PDT 24 |
2484066161 ps |
T81 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.680735879 |
|
|
Mar 21 01:46:05 PM PDT 24 |
Mar 21 01:46:07 PM PDT 24 |
8674776800 ps |
T219 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.1197417230 |
|
|
Mar 21 01:46:18 PM PDT 24 |
Mar 21 01:47:39 PM PDT 24 |
60529246661 ps |
T327 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.3353765259 |
|
|
Mar 21 01:44:41 PM PDT 24 |
Mar 21 01:45:08 PM PDT 24 |
40858255011 ps |
T533 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.1552376409 |
|
|
Mar 21 01:43:54 PM PDT 24 |
Mar 21 01:44:16 PM PDT 24 |
7672515548 ps |
T124 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3428390747 |
|
|
Mar 21 01:46:53 PM PDT 24 |
Mar 21 01:54:43 PM PDT 24 |
5608355419006 ps |
T230 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.138463935 |
|
|
Mar 21 01:43:19 PM PDT 24 |
Mar 21 01:44:31 PM PDT 24 |
53938885447 ps |
T534 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.3867099556 |
|
|
Mar 21 01:45:31 PM PDT 24 |
Mar 21 01:45:33 PM PDT 24 |
2128231203 ps |
T535 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.588412172 |
|
|
Mar 21 01:44:37 PM PDT 24 |
Mar 21 01:44:41 PM PDT 24 |
2116580037 ps |
T536 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3086580131 |
|
|
Mar 21 01:45:44 PM PDT 24 |
Mar 21 01:45:48 PM PDT 24 |
2618358629 ps |
T537 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2055998528 |
|
|
Mar 21 01:45:20 PM PDT 24 |
Mar 21 01:45:29 PM PDT 24 |
2609487165 ps |
T538 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.791689172 |
|
|
Mar 21 01:46:17 PM PDT 24 |
Mar 21 01:46:20 PM PDT 24 |
2082419636 ps |
T539 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.1160821120 |
|
|
Mar 21 01:46:17 PM PDT 24 |
Mar 21 01:46:26 PM PDT 24 |
2468586765 ps |
T540 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3803666354 |
|
|
Mar 21 01:44:38 PM PDT 24 |
Mar 21 01:45:43 PM PDT 24 |
26081127138 ps |
T541 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2036056079 |
|
|
Mar 21 01:45:09 PM PDT 24 |
Mar 21 01:45:12 PM PDT 24 |
2635016351 ps |
T542 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1140488012 |
|
|
Mar 21 01:43:33 PM PDT 24 |
Mar 21 01:44:31 PM PDT 24 |
132688122733 ps |
T543 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.2250034979 |
|
|
Mar 21 01:44:56 PM PDT 24 |
Mar 21 01:44:59 PM PDT 24 |
2020838768 ps |
T544 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.3333978318 |
|
|
Mar 21 01:45:22 PM PDT 24 |
Mar 21 01:48:25 PM PDT 24 |
152788138869 ps |
T545 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.2684028258 |
|
|
Mar 21 01:45:04 PM PDT 24 |
Mar 21 01:45:14 PM PDT 24 |
3656910706 ps |
T255 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.295994102 |
|
|
Mar 21 01:46:27 PM PDT 24 |
Mar 21 01:46:30 PM PDT 24 |
4305150103 ps |
T546 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3587754099 |
|
|
Mar 21 01:46:04 PM PDT 24 |
Mar 21 01:46:06 PM PDT 24 |
2472882869 ps |
T547 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.612766555 |
|
|
Mar 21 01:45:43 PM PDT 24 |
Mar 21 01:45:45 PM PDT 24 |
6026809944 ps |
T548 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.140846825 |
|
|
Mar 21 01:47:09 PM PDT 24 |
Mar 21 01:47:11 PM PDT 24 |
2673052557 ps |
T549 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.3852461476 |
|
|
Mar 21 01:44:57 PM PDT 24 |
Mar 21 01:44:59 PM PDT 24 |
2625559545 ps |
T550 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1811872349 |
|
|
Mar 21 01:44:10 PM PDT 24 |
Mar 21 01:44:16 PM PDT 24 |
2010626830 ps |
T551 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1413323120 |
|
|
Mar 21 01:46:17 PM PDT 24 |
Mar 21 01:46:19 PM PDT 24 |
3151781027 ps |
T552 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1512069074 |
|
|
Mar 21 01:43:10 PM PDT 24 |
Mar 21 01:43:12 PM PDT 24 |
2460710204 ps |
T553 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.736502506 |
|
|
Mar 21 01:46:40 PM PDT 24 |
Mar 21 01:46:47 PM PDT 24 |
2512802256 ps |
T554 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.4278766155 |
|
|
Mar 21 01:46:47 PM PDT 24 |
Mar 21 01:46:49 PM PDT 24 |
2137968913 ps |
T555 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.2248535059 |
|
|
Mar 21 01:44:56 PM PDT 24 |
Mar 21 01:45:16 PM PDT 24 |
8775723083 ps |
T316 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2573903070 |
|
|
Mar 21 01:47:28 PM PDT 24 |
Mar 21 01:50:04 PM PDT 24 |
116828009574 ps |
T313 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4185367939 |
|
|
Mar 21 01:47:24 PM PDT 24 |
Mar 21 01:48:11 PM PDT 24 |
69359004089 ps |
T556 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.455088327 |
|
|
Mar 21 01:47:10 PM PDT 24 |
Mar 21 01:47:16 PM PDT 24 |
2115887969 ps |
T201 |
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.1701333458 |
|
|
Mar 21 01:46:13 PM PDT 24 |
Mar 21 01:46:16 PM PDT 24 |
3109003859 ps |
T314 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2215004479 |
|
|
Mar 21 01:45:30 PM PDT 24 |
Mar 21 01:45:57 PM PDT 24 |
74068263310 ps |
T557 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3902426637 |
|
|
Mar 21 01:45:01 PM PDT 24 |
Mar 21 01:45:10 PM PDT 24 |
9204983785 ps |
T558 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1107625824 |
|
|
Mar 21 01:45:13 PM PDT 24 |
Mar 21 01:46:59 PM PDT 24 |
166317306920 ps |
T559 |
/workspace/coverage/default/15.sysrst_ctrl_smoke.390691682 |
|
|
Mar 21 01:44:44 PM PDT 24 |
Mar 21 01:44:46 PM PDT 24 |
2125333239 ps |
T321 |
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1678420557 |
|
|
Mar 21 01:47:27 PM PDT 24 |
Mar 21 01:49:43 PM PDT 24 |
58118881788 ps |
T560 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.4190821213 |
|
|
Mar 21 01:45:32 PM PDT 24 |
Mar 21 01:45:35 PM PDT 24 |
3619665062 ps |
T310 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1930009271 |
|
|
Mar 21 01:44:18 PM PDT 24 |
Mar 21 01:46:58 PM PDT 24 |
114443657357 ps |
T75 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3498466419 |
|
|
Mar 21 01:43:23 PM PDT 24 |
Mar 21 01:44:35 PM PDT 24 |
36255049908 ps |
T204 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.3936098410 |
|
|
Mar 21 01:46:54 PM PDT 24 |
Mar 21 01:48:16 PM PDT 24 |
31732586762 ps |
T561 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2836277081 |
|
|
Mar 21 01:46:05 PM PDT 24 |
Mar 21 01:46:07 PM PDT 24 |
2555211740 ps |
T562 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.4198773700 |
|
|
Mar 21 01:44:40 PM PDT 24 |
Mar 21 01:44:49 PM PDT 24 |
5022853372 ps |
T563 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.3409920112 |
|
|
Mar 21 01:45:10 PM PDT 24 |
Mar 21 01:45:20 PM PDT 24 |
13838051038 ps |
T564 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.267591390 |
|
|
Mar 21 01:45:10 PM PDT 24 |
Mar 21 01:45:12 PM PDT 24 |
2119447188 ps |
T308 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3802261230 |
|
|
Mar 21 01:47:12 PM PDT 24 |
Mar 21 01:48:10 PM PDT 24 |
88147485018 ps |
T565 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3957754988 |
|
|
Mar 21 01:47:14 PM PDT 24 |
Mar 21 01:47:18 PM PDT 24 |
3393352061 ps |
T566 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.2700260143 |
|
|
Mar 21 01:46:59 PM PDT 24 |
Mar 21 01:47:01 PM PDT 24 |
2137840513 ps |
T567 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.821085781 |
|
|
Mar 21 01:44:28 PM PDT 24 |
Mar 21 01:44:34 PM PDT 24 |
2009021798 ps |
T568 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.151597118 |
|
|
Mar 21 01:46:30 PM PDT 24 |
Mar 21 01:46:41 PM PDT 24 |
3430152804 ps |
T569 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.500431071 |
|
|
Mar 21 01:44:57 PM PDT 24 |
Mar 21 01:46:04 PM PDT 24 |
26580627086 ps |
T570 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.579126501 |
|
|
Mar 21 01:45:38 PM PDT 24 |
Mar 21 01:45:44 PM PDT 24 |
2012089188 ps |
T571 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.87986324 |
|
|
Mar 21 01:46:17 PM PDT 24 |
Mar 21 01:46:23 PM PDT 24 |
2015239320 ps |
T572 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.50093002 |
|
|
Mar 21 01:46:51 PM PDT 24 |
Mar 21 01:47:47 PM PDT 24 |
25082431617 ps |
T573 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.343173897 |
|
|
Mar 21 01:45:13 PM PDT 24 |
Mar 21 01:45:15 PM PDT 24 |
3418128357 ps |
T574 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3927720420 |
|
|
Mar 21 01:46:39 PM PDT 24 |
Mar 21 01:46:41 PM PDT 24 |
3966163491 ps |
T575 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.790125789 |
|
|
Mar 21 01:46:39 PM PDT 24 |
Mar 21 01:47:18 PM PDT 24 |
14491323554 ps |
T576 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.851825769 |
|
|
Mar 21 01:43:23 PM PDT 24 |
Mar 21 01:43:25 PM PDT 24 |
2541755883 ps |
T577 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1729692828 |
|
|
Mar 21 01:46:05 PM PDT 24 |
Mar 21 01:46:07 PM PDT 24 |
5925257803 ps |
T578 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2934258671 |
|
|
Mar 21 01:43:56 PM PDT 24 |
Mar 21 01:45:42 PM PDT 24 |
158159084087 ps |
T579 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2563280977 |
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|
Mar 21 01:46:55 PM PDT 24 |
Mar 21 01:47:03 PM PDT 24 |
3434735062 ps |
T580 |
/workspace/coverage/default/3.sysrst_ctrl_smoke.1640296663 |
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|
Mar 21 01:43:30 PM PDT 24 |
Mar 21 01:43:33 PM PDT 24 |
2118485055 ps |
T581 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3039092713 |
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|
Mar 21 01:47:12 PM PDT 24 |
Mar 21 01:47:21 PM PDT 24 |
3419112770 ps |
T582 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3420001140 |
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|
Mar 21 01:45:20 PM PDT 24 |
Mar 21 01:48:48 PM PDT 24 |
77802386888 ps |
T583 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.307196949 |
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|
Mar 21 01:46:18 PM PDT 24 |
Mar 21 01:46:19 PM PDT 24 |
2538003095 ps |
T158 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2902660387 |
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Mar 21 01:47:13 PM PDT 24 |
Mar 21 01:47:19 PM PDT 24 |
3104253028 ps |
T162 |
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4264137824 |
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|
Mar 21 01:47:12 PM PDT 24 |
Mar 21 01:47:19 PM PDT 24 |
2610190924 ps |
T163 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.2716267884 |
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|
Mar 21 01:46:09 PM PDT 24 |
Mar 21 01:46:16 PM PDT 24 |
2609889985 ps |
T164 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3228289811 |
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|
Mar 21 01:47:24 PM PDT 24 |
Mar 21 01:48:29 PM PDT 24 |
99815904927 ps |
T165 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.1616017074 |
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|
Mar 21 01:46:31 PM PDT 24 |
Mar 21 01:46:44 PM PDT 24 |
9175318246 ps |
T166 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.4238959207 |
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Mar 21 01:46:17 PM PDT 24 |
Mar 21 01:46:24 PM PDT 24 |
2111130271 ps |
T167 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1212053554 |
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|
Mar 21 01:44:57 PM PDT 24 |
Mar 21 01:45:00 PM PDT 24 |
3941155248 ps |
T168 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.2323708603 |
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|
Mar 21 01:43:46 PM PDT 24 |
Mar 21 01:43:56 PM PDT 24 |
6232033272 ps |
T157 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.3455178218 |
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|
Mar 21 01:46:19 PM PDT 24 |
Mar 21 01:47:04 PM PDT 24 |
75019698072 ps |
T169 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3989134664 |
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Mar 21 01:45:21 PM PDT 24 |
Mar 21 01:45:38 PM PDT 24 |
27608743489 ps |
T584 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1681020642 |
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|
Mar 21 01:46:34 PM PDT 24 |
Mar 21 01:46:36 PM PDT 24 |
2520429526 ps |
T585 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2488098816 |
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|
Mar 21 01:46:55 PM PDT 24 |
Mar 21 01:46:58 PM PDT 24 |
2690319242 ps |
T586 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2123814960 |
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|
Mar 21 01:46:59 PM PDT 24 |
Mar 21 01:47:00 PM PDT 24 |
2099059954 ps |
T587 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1793419825 |
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|
Mar 21 01:46:00 PM PDT 24 |
Mar 21 01:46:02 PM PDT 24 |
2177375508 ps |
T588 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.914323184 |
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|
Mar 21 01:44:28 PM PDT 24 |
Mar 21 01:44:33 PM PDT 24 |
2456912296 ps |
T589 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1931666129 |
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|
Mar 21 01:47:13 PM PDT 24 |
Mar 21 01:47:16 PM PDT 24 |
3634898951 ps |
T590 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2122947397 |
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|
Mar 21 01:46:33 PM PDT 24 |
Mar 21 01:46:46 PM PDT 24 |
24874516100 ps |
T591 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2753350353 |
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|
Mar 21 01:44:08 PM PDT 24 |
Mar 21 01:44:20 PM PDT 24 |
4333546953 ps |
T592 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1201728393 |
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|
Mar 21 01:46:25 PM PDT 24 |
Mar 21 01:46:32 PM PDT 24 |
2473951563 ps |
T593 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2446887336 |
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|
Mar 21 01:43:24 PM PDT 24 |
Mar 21 01:43:26 PM PDT 24 |
2555152738 ps |
T135 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.585093908 |
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|
Mar 21 01:46:28 PM PDT 24 |
Mar 21 01:46:33 PM PDT 24 |
3707586494 ps |
T594 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.3377701360 |
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|
Mar 21 01:44:39 PM PDT 24 |
Mar 21 01:44:56 PM PDT 24 |
13567668498 ps |
T209 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1742211172 |
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|
Mar 21 01:44:07 PM PDT 24 |
Mar 21 01:47:06 PM PDT 24 |
142543194522 ps |
T595 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3912161854 |
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|
Mar 21 01:45:14 PM PDT 24 |
Mar 21 01:45:17 PM PDT 24 |
2187326267 ps |
T596 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2373618326 |
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|
Mar 21 01:44:17 PM PDT 24 |
Mar 21 01:44:29 PM PDT 24 |
15584644645 ps |
T597 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2856144774 |
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|
Mar 21 01:47:23 PM PDT 24 |
Mar 21 01:49:13 PM PDT 24 |
40095045112 ps |
T598 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.1155356344 |
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|
Mar 21 01:45:32 PM PDT 24 |
Mar 21 01:45:38 PM PDT 24 |
2014962934 ps |
T599 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3353615190 |
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Mar 21 01:46:40 PM PDT 24 |
Mar 21 01:47:06 PM PDT 24 |
9232835999 ps |