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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.46 99.29 96.36 100.00 95.51 98.78 99.33 92.96


Total test records in report: 912
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T600 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3702355666 Mar 21 01:46:32 PM PDT 24 Mar 21 01:46:41 PM PDT 24 3334110270 ps
T601 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.705381969 Mar 21 01:43:32 PM PDT 24 Mar 21 01:44:43 PM PDT 24 55251785168 ps
T602 /workspace/coverage/default/6.sysrst_ctrl_stress_all.1142802426 Mar 21 01:43:56 PM PDT 24 Mar 21 01:45:59 PM PDT 24 90739025257 ps
T347 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.995457582 Mar 21 01:46:57 PM PDT 24 Mar 21 01:47:31 PM PDT 24 97137986835 ps
T603 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1798575518 Mar 21 01:46:02 PM PDT 24 Mar 21 01:46:06 PM PDT 24 3537360142 ps
T604 /workspace/coverage/default/3.sysrst_ctrl_alert_test.3869209706 Mar 21 01:43:43 PM PDT 24 Mar 21 01:43:47 PM PDT 24 2018880284 ps
T605 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.116721024 Mar 21 01:46:29 PM PDT 24 Mar 21 01:46:40 PM PDT 24 4341840237 ps
T606 /workspace/coverage/default/33.sysrst_ctrl_smoke.3003487748 Mar 21 01:46:07 PM PDT 24 Mar 21 01:46:13 PM PDT 24 2109243562 ps
T607 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1940929179 Mar 21 01:46:54 PM PDT 24 Mar 21 01:46:58 PM PDT 24 2512425264 ps
T608 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3098155367 Mar 21 01:46:05 PM PDT 24 Mar 21 01:46:07 PM PDT 24 2162096756 ps
T99 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.1962654159 Mar 21 01:46:59 PM PDT 24 Mar 21 01:47:40 PM PDT 24 42088513049 ps
T609 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3233532351 Mar 21 01:46:20 PM PDT 24 Mar 21 01:46:22 PM PDT 24 2604481820 ps
T610 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.4028555567 Mar 21 01:45:08 PM PDT 24 Mar 21 01:46:46 PM PDT 24 35091608759 ps
T611 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2210318476 Mar 21 01:45:01 PM PDT 24 Mar 21 01:45:08 PM PDT 24 2225489206 ps
T612 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1059664244 Mar 21 01:47:25 PM PDT 24 Mar 21 01:47:46 PM PDT 24 25605996175 ps
T613 /workspace/coverage/default/46.sysrst_ctrl_smoke.2188368764 Mar 21 01:47:10 PM PDT 24 Mar 21 01:47:14 PM PDT 24 2121994000 ps
T614 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.3144261710 Mar 21 01:45:20 PM PDT 24 Mar 21 01:45:22 PM PDT 24 3303352418 ps
T615 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.2157129311 Mar 21 01:45:53 PM PDT 24 Mar 21 01:45:56 PM PDT 24 2108602190 ps
T350 /workspace/coverage/default/33.sysrst_ctrl_stress_all.1017088926 Mar 21 01:46:06 PM PDT 24 Mar 21 01:46:32 PM PDT 24 861705000948 ps
T616 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.277262553 Mar 21 01:43:57 PM PDT 24 Mar 21 01:45:18 PM PDT 24 109893501431 ps
T617 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.1406801852 Mar 21 01:45:25 PM PDT 24 Mar 21 01:45:31 PM PDT 24 3839020125 ps
T618 /workspace/coverage/default/33.sysrst_ctrl_alert_test.163084452 Mar 21 01:46:14 PM PDT 24 Mar 21 01:46:20 PM PDT 24 2010335087 ps
T619 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1875086557 Mar 21 01:46:18 PM PDT 24 Mar 21 01:46:23 PM PDT 24 3310610321 ps
T620 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3429347538 Mar 21 01:44:57 PM PDT 24 Mar 21 01:45:03 PM PDT 24 2513967462 ps
T621 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2946368418 Mar 21 01:43:32 PM PDT 24 Mar 21 01:43:39 PM PDT 24 2608889813 ps
T622 /workspace/coverage/default/31.sysrst_ctrl_smoke.343384290 Mar 21 01:45:53 PM PDT 24 Mar 21 01:45:56 PM PDT 24 2126270488 ps
T305 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1884398866 Mar 21 01:46:04 PM PDT 24 Mar 21 01:51:44 PM PDT 24 123026001807 ps
T623 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.494039473 Mar 21 01:43:11 PM PDT 24 Mar 21 01:43:19 PM PDT 24 2441968050 ps
T624 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1140814121 Mar 21 01:46:39 PM PDT 24 Mar 21 01:46:46 PM PDT 24 5678373557 ps
T625 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.2451178801 Mar 21 01:46:06 PM PDT 24 Mar 21 01:46:09 PM PDT 24 2148844228 ps
T626 /workspace/coverage/default/39.sysrst_ctrl_alert_test.2097667180 Mar 21 01:46:30 PM PDT 24 Mar 21 01:46:36 PM PDT 24 2012363189 ps
T627 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.422686555 Mar 21 01:45:09 PM PDT 24 Mar 21 01:45:16 PM PDT 24 2464573652 ps
T628 /workspace/coverage/default/9.sysrst_ctrl_alert_test.268912953 Mar 21 01:44:18 PM PDT 24 Mar 21 01:44:27 PM PDT 24 2009075456 ps
T629 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3906496540 Mar 21 01:46:18 PM PDT 24 Mar 21 01:46:19 PM PDT 24 4147390483 ps
T630 /workspace/coverage/default/34.sysrst_ctrl_alert_test.1343106914 Mar 21 01:46:17 PM PDT 24 Mar 21 01:46:19 PM PDT 24 2040032021 ps
T631 /workspace/coverage/default/9.sysrst_ctrl_smoke.2580389465 Mar 21 01:44:06 PM PDT 24 Mar 21 01:44:13 PM PDT 24 2110546488 ps
T632 /workspace/coverage/default/32.sysrst_ctrl_smoke.1184570726 Mar 21 01:46:04 PM PDT 24 Mar 21 01:46:05 PM PDT 24 2166610791 ps
T345 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1580117751 Mar 21 01:47:23 PM PDT 24 Mar 21 01:48:55 PM PDT 24 72899021520 ps
T633 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2233963221 Mar 21 01:46:41 PM PDT 24 Mar 21 01:46:49 PM PDT 24 6110287822 ps
T129 /workspace/coverage/default/37.sysrst_ctrl_stress_all.2961824453 Mar 21 01:46:28 PM PDT 24 Mar 21 01:47:07 PM PDT 24 16254390700 ps
T270 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3603268927 Mar 21 01:43:56 PM PDT 24 Mar 21 01:44:22 PM PDT 24 36553845045 ps
T634 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.1095006350 Mar 21 01:43:22 PM PDT 24 Mar 21 01:43:27 PM PDT 24 3603098420 ps
T635 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2297912457 Mar 21 01:45:31 PM PDT 24 Mar 21 01:45:36 PM PDT 24 2615009626 ps
T636 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1356042029 Mar 21 01:45:53 PM PDT 24 Mar 21 01:45:56 PM PDT 24 2201722158 ps
T637 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3359809909 Mar 21 01:44:07 PM PDT 24 Mar 21 01:44:16 PM PDT 24 3778509339 ps
T638 /workspace/coverage/default/26.sysrst_ctrl_alert_test.3484170152 Mar 21 01:45:42 PM PDT 24 Mar 21 01:45:44 PM PDT 24 2032977126 ps
T639 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3154101058 Mar 21 01:43:25 PM PDT 24 Mar 21 01:43:30 PM PDT 24 3077147411 ps
T640 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1715619213 Mar 21 01:45:43 PM PDT 24 Mar 21 01:45:47 PM PDT 24 2513871595 ps
T641 /workspace/coverage/default/19.sysrst_ctrl_alert_test.2551310850 Mar 21 01:45:08 PM PDT 24 Mar 21 01:45:12 PM PDT 24 2018166306 ps
T642 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1166052107 Mar 21 01:45:21 PM PDT 24 Mar 21 01:45:33 PM PDT 24 3873874371 ps
T643 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.543709622 Mar 21 01:44:41 PM PDT 24 Mar 21 01:44:43 PM PDT 24 2524962179 ps
T644 /workspace/coverage/default/49.sysrst_ctrl_smoke.1322717017 Mar 21 01:47:12 PM PDT 24 Mar 21 01:47:18 PM PDT 24 2114452726 ps
T344 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.700703747 Mar 21 01:44:56 PM PDT 24 Mar 21 01:46:49 PM PDT 24 169251321761 ps
T322 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1490591652 Mar 21 01:47:25 PM PDT 24 Mar 21 01:50:06 PM PDT 24 63080825929 ps
T645 /workspace/coverage/default/16.sysrst_ctrl_smoke.3781109845 Mar 21 01:44:58 PM PDT 24 Mar 21 01:45:01 PM PDT 24 2115108086 ps
T646 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.406666871 Mar 21 01:46:39 PM PDT 24 Mar 21 01:46:42 PM PDT 24 2224701165 ps
T647 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.1581857034 Mar 21 01:45:44 PM PDT 24 Mar 21 01:45:51 PM PDT 24 2609222156 ps
T648 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.788193197 Mar 21 01:47:22 PM PDT 24 Mar 21 01:48:00 PM PDT 24 53826143755 ps
T649 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2707573933 Mar 21 01:44:07 PM PDT 24 Mar 21 01:44:15 PM PDT 24 2507386084 ps
T317 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.1426600242 Mar 21 01:45:38 PM PDT 24 Mar 21 01:48:10 PM PDT 24 58868034389 ps
T650 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.3786983659 Mar 21 01:45:43 PM PDT 24 Mar 21 01:48:11 PM PDT 24 55002214850 ps
T651 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.1384443911 Mar 21 01:46:28 PM PDT 24 Mar 21 01:46:38 PM PDT 24 3365446717 ps
T652 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.1757184873 Mar 21 01:44:30 PM PDT 24 Mar 21 01:44:32 PM PDT 24 2792463721 ps
T323 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.726961826 Mar 21 01:47:23 PM PDT 24 Mar 21 01:49:28 PM PDT 24 47961636624 ps
T653 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.833403842 Mar 21 01:46:16 PM PDT 24 Mar 21 01:46:25 PM PDT 24 2456991451 ps
T654 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3763396491 Mar 21 01:46:30 PM PDT 24 Mar 21 01:46:34 PM PDT 24 2523121663 ps
T655 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3074803293 Mar 21 01:45:36 PM PDT 24 Mar 21 02:20:52 PM PDT 24 1671535280721 ps
T656 /workspace/coverage/default/46.sysrst_ctrl_alert_test.4022824294 Mar 21 01:47:10 PM PDT 24 Mar 21 01:47:14 PM PDT 24 2024029240 ps
T657 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3296828225 Mar 21 01:47:28 PM PDT 24 Mar 21 01:49:11 PM PDT 24 38632654910 ps
T658 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.921259027 Mar 21 01:44:06 PM PDT 24 Mar 21 01:44:17 PM PDT 24 3659881831 ps
T659 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3448586605 Mar 21 01:43:30 PM PDT 24 Mar 21 01:43:38 PM PDT 24 2624862862 ps
T660 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1281414 Mar 21 01:47:10 PM PDT 24 Mar 21 01:47:13 PM PDT 24 3630511117 ps
T661 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2265552963 Mar 21 01:47:11 PM PDT 24 Mar 21 01:47:14 PM PDT 24 3315330788 ps
T662 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1877522030 Mar 21 01:45:10 PM PDT 24 Mar 21 01:45:17 PM PDT 24 2612374346 ps
T663 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2122751491 Mar 21 01:45:53 PM PDT 24 Mar 21 01:45:58 PM PDT 24 2613894104 ps
T664 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.438566852 Mar 21 01:45:51 PM PDT 24 Mar 21 01:46:16 PM PDT 24 51929756619 ps
T665 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.626325524 Mar 21 01:44:18 PM PDT 24 Mar 21 01:44:28 PM PDT 24 2233185965 ps
T666 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.3088340217 Mar 21 01:44:30 PM PDT 24 Mar 21 01:44:38 PM PDT 24 2512217025 ps
T667 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1721872278 Mar 21 01:44:18 PM PDT 24 Mar 21 01:44:29 PM PDT 24 2612484866 ps
T668 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2775574323 Mar 21 01:43:20 PM PDT 24 Mar 21 01:43:27 PM PDT 24 2258912309 ps
T669 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.1720437173 Mar 21 01:45:36 PM PDT 24 Mar 21 01:45:39 PM PDT 24 4007401688 ps
T670 /workspace/coverage/default/2.sysrst_ctrl_alert_test.973409969 Mar 21 01:43:32 PM PDT 24 Mar 21 01:43:38 PM PDT 24 2012442865 ps
T671 /workspace/coverage/default/11.sysrst_ctrl_stress_all.2964527012 Mar 21 01:44:31 PM PDT 24 Mar 21 01:44:41 PM PDT 24 11087820423 ps
T351 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2697920995 Mar 21 01:44:19 PM PDT 24 Mar 21 01:44:43 PM PDT 24 2466658191399 ps
T672 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1377353435 Mar 21 01:45:10 PM PDT 24 Mar 21 01:45:15 PM PDT 24 5094567857 ps
T673 /workspace/coverage/default/28.sysrst_ctrl_smoke.2297418978 Mar 21 01:45:44 PM PDT 24 Mar 21 01:45:51 PM PDT 24 2111748967 ps
T674 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.3913667334 Mar 21 01:45:08 PM PDT 24 Mar 21 01:45:11 PM PDT 24 3109020471 ps
T675 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3451710184 Mar 21 01:44:06 PM PDT 24 Mar 21 01:44:08 PM PDT 24 2483296501 ps
T309 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1708414440 Mar 21 01:47:25 PM PDT 24 Mar 21 01:48:42 PM PDT 24 108597444451 ps
T676 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.552845542 Mar 21 01:44:40 PM PDT 24 Mar 21 01:44:48 PM PDT 24 2611157962 ps
T677 /workspace/coverage/default/47.sysrst_ctrl_alert_test.1626353643 Mar 21 01:47:11 PM PDT 24 Mar 21 01:47:17 PM PDT 24 2012512484 ps
T159 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.1571380006 Mar 21 01:47:13 PM PDT 24 Mar 21 01:47:16 PM PDT 24 4033182011 ps
T678 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.2990265 Mar 21 01:43:57 PM PDT 24 Mar 21 01:44:17 PM PDT 24 137399525880 ps
T679 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3495602351 Mar 21 01:45:08 PM PDT 24 Mar 21 01:45:11 PM PDT 24 2476699106 ps
T680 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.688301929 Mar 21 01:45:02 PM PDT 24 Mar 21 01:45:05 PM PDT 24 3646659260 ps
T681 /workspace/coverage/default/19.sysrst_ctrl_smoke.2403104591 Mar 21 01:45:09 PM PDT 24 Mar 21 01:45:11 PM PDT 24 2142973898 ps
T682 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.4076857456 Mar 21 01:45:53 PM PDT 24 Mar 21 01:46:05 PM PDT 24 4114885922 ps
T683 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.2725868122 Mar 21 01:45:22 PM PDT 24 Mar 21 01:45:26 PM PDT 24 2469173412 ps
T684 /workspace/coverage/default/18.sysrst_ctrl_alert_test.2584247919 Mar 21 01:45:09 PM PDT 24 Mar 21 01:45:15 PM PDT 24 2012134138 ps
T685 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.629853746 Mar 21 01:44:34 PM PDT 24 Mar 21 01:44:36 PM PDT 24 4193271740 ps
T686 /workspace/coverage/default/13.sysrst_ctrl_alert_test.1654891025 Mar 21 01:44:40 PM PDT 24 Mar 21 01:44:43 PM PDT 24 2029739042 ps
T687 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.510275743 Mar 21 01:45:51 PM PDT 24 Mar 21 01:45:56 PM PDT 24 2515635170 ps
T688 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3479157583 Mar 21 01:44:39 PM PDT 24 Mar 21 01:44:43 PM PDT 24 2516884463 ps
T689 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.502817314 Mar 21 01:46:30 PM PDT 24 Mar 21 01:46:32 PM PDT 24 2134616589 ps
T690 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1573693386 Mar 21 01:43:42 PM PDT 24 Mar 21 01:43:45 PM PDT 24 2632705012 ps
T691 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.3142701154 Mar 21 01:44:18 PM PDT 24 Mar 21 01:46:46 PM PDT 24 892171506422 ps
T692 /workspace/coverage/default/4.sysrst_ctrl_alert_test.2848806101 Mar 21 01:43:45 PM PDT 24 Mar 21 01:43:47 PM PDT 24 2040103931 ps
T693 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.1899296864 Mar 21 01:46:40 PM PDT 24 Mar 21 01:46:48 PM PDT 24 3096452096 ps
T694 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2456147675 Mar 21 01:47:28 PM PDT 24 Mar 21 01:49:32 PM PDT 24 180348639278 ps
T125 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3426655939 Mar 21 01:43:09 PM PDT 24 Mar 21 01:43:14 PM PDT 24 9095963230 ps
T695 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.404826389 Mar 21 01:45:36 PM PDT 24 Mar 21 01:45:42 PM PDT 24 2613983717 ps
T696 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3296804483 Mar 21 01:45:09 PM PDT 24 Mar 21 01:46:21 PM PDT 24 214307329663 ps
T697 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.442500485 Mar 21 01:45:33 PM PDT 24 Mar 21 01:45:35 PM PDT 24 2537199840 ps
T175 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.3326091753 Mar 21 01:45:52 PM PDT 24 Mar 21 01:45:55 PM PDT 24 3229757740 ps
T698 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.3146293501 Mar 21 01:45:43 PM PDT 24 Mar 21 01:45:50 PM PDT 24 3888157183 ps
T100 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.1566076061 Mar 21 01:44:19 PM PDT 24 Mar 21 01:44:25 PM PDT 24 3295466345 ps
T324 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1580281927 Mar 21 01:46:29 PM PDT 24 Mar 21 01:48:13 PM PDT 24 94665293462 ps
T303 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.1965843821 Mar 21 01:45:41 PM PDT 24 Mar 21 01:52:02 PM PDT 24 140902105571 ps
T699 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.410583925 Mar 21 01:43:33 PM PDT 24 Mar 21 01:43:36 PM PDT 24 2045225983 ps
T700 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1083002884 Mar 21 01:47:26 PM PDT 24 Mar 21 01:48:41 PM PDT 24 115718949690 ps
T701 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.687609000 Mar 21 01:45:52 PM PDT 24 Mar 21 01:48:41 PM PDT 24 170984443367 ps
T702 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3577614500 Mar 21 01:47:27 PM PDT 24 Mar 21 01:48:08 PM PDT 24 43709206685 ps
T703 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3560253847 Mar 21 01:45:22 PM PDT 24 Mar 21 01:45:27 PM PDT 24 3264230353 ps
T704 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.3541079042 Mar 21 01:43:44 PM PDT 24 Mar 21 01:45:12 PM PDT 24 145850018490 ps
T180 /workspace/coverage/default/46.sysrst_ctrl_stress_all.1334105061 Mar 21 01:47:13 PM PDT 24 Mar 21 01:47:49 PM PDT 24 15534512773 ps
T705 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.471370707 Mar 21 01:47:12 PM PDT 24 Mar 21 01:47:14 PM PDT 24 5436211707 ps
T706 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.635890144 Mar 21 01:46:19 PM PDT 24 Mar 21 01:46:26 PM PDT 24 2464253565 ps
T707 /workspace/coverage/default/40.sysrst_ctrl_alert_test.469513371 Mar 21 01:46:43 PM PDT 24 Mar 21 01:46:45 PM PDT 24 2032215196 ps
T708 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2020389321 Mar 21 01:44:07 PM PDT 24 Mar 21 01:46:00 PM PDT 24 109492162898 ps
T263 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2000746856 Mar 21 01:46:31 PM PDT 24 Mar 21 01:48:49 PM PDT 24 117972880615 ps
T709 /workspace/coverage/default/37.sysrst_ctrl_alert_test.26212128 Mar 21 01:46:26 PM PDT 24 Mar 21 01:46:27 PM PDT 24 2054692079 ps
T710 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.1038989637 Mar 21 01:44:25 PM PDT 24 Mar 21 01:44:29 PM PDT 24 2521299238 ps
T711 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.2674909124 Mar 21 01:45:08 PM PDT 24 Mar 21 01:45:17 PM PDT 24 2467966606 ps
T712 /workspace/coverage/default/27.sysrst_ctrl_smoke.149686449 Mar 21 01:45:42 PM PDT 24 Mar 21 01:45:46 PM PDT 24 2116176095 ps
T205 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.4103192424 Mar 21 01:43:47 PM PDT 24 Mar 21 01:43:56 PM PDT 24 39780243093 ps
T713 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2549019225 Mar 21 01:45:21 PM PDT 24 Mar 21 01:45:24 PM PDT 24 2161278912 ps
T714 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2437585891 Mar 21 01:46:53 PM PDT 24 Mar 21 01:47:02 PM PDT 24 2940746142 ps
T715 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3599246509 Mar 21 01:45:20 PM PDT 24 Mar 21 01:45:22 PM PDT 24 4624035198 ps
T716 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1832577596 Mar 21 01:43:44 PM PDT 24 Mar 21 01:43:47 PM PDT 24 3532481515 ps
T717 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3359819116 Mar 21 01:45:08 PM PDT 24 Mar 21 01:45:16 PM PDT 24 2610554280 ps
T718 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.1820569482 Mar 21 01:46:09 PM PDT 24 Mar 21 01:46:17 PM PDT 24 2511235261 ps
T719 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1815039645 Mar 21 01:45:08 PM PDT 24 Mar 21 01:45:15 PM PDT 24 2511800369 ps
T720 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.487887223 Mar 21 01:45:32 PM PDT 24 Mar 21 01:46:23 PM PDT 24 38380035962 ps
T721 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3357821858 Mar 21 01:45:21 PM PDT 24 Mar 21 01:45:28 PM PDT 24 2063300666 ps
T722 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2362655490 Mar 21 01:46:40 PM PDT 24 Mar 21 01:46:44 PM PDT 24 2518621512 ps
T723 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.3086282245 Mar 21 01:45:43 PM PDT 24 Mar 21 01:45:47 PM PDT 24 2486160138 ps
T724 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.2904828638 Mar 21 01:43:12 PM PDT 24 Mar 21 01:43:14 PM PDT 24 2053883395 ps
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T256 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1489505791 Mar 21 01:43:35 PM PDT 24 Mar 21 01:44:04 PM PDT 24 47455322538 ps
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T728 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2939718854 Mar 21 01:44:16 PM PDT 24 Mar 21 01:44:19 PM PDT 24 2469834632 ps
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T731 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.967039476 Mar 21 01:45:09 PM PDT 24 Mar 21 01:45:36 PM PDT 24 55988934643 ps
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T733 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.2175583011 Mar 21 01:44:17 PM PDT 24 Mar 21 01:44:22 PM PDT 24 2431924873 ps
T734 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2344078633 Mar 21 01:47:15 PM PDT 24 Mar 21 01:47:18 PM PDT 24 2524496352 ps
T352 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.1731136095 Mar 21 01:43:31 PM PDT 24 Mar 21 01:49:06 PM PDT 24 2886479544452 ps
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T738 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2290639388 Mar 21 01:44:08 PM PDT 24 Mar 21 01:44:11 PM PDT 24 2635552688 ps
T739 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.635200755 Mar 21 01:47:26 PM PDT 24 Mar 21 01:47:43 PM PDT 24 24849421662 ps
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T741 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.2264810357 Mar 21 01:45:10 PM PDT 24 Mar 21 01:45:12 PM PDT 24 2255781173 ps
T742 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.3639816895 Mar 21 01:46:14 PM PDT 24 Mar 21 01:50:54 PM PDT 24 116654721611 ps
T743 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1268549500 Mar 21 01:44:30 PM PDT 24 Mar 21 01:44:34 PM PDT 24 2515497205 ps
T330 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.4179323845 Mar 21 01:46:17 PM PDT 24 Mar 21 01:46:53 PM PDT 24 80906396055 ps
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T747 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3784731232 Mar 21 01:43:25 PM PDT 24 Mar 21 01:43:31 PM PDT 24 2250358993 ps
T748 /workspace/coverage/default/10.sysrst_ctrl_smoke.2600237130 Mar 21 01:44:18 PM PDT 24 Mar 21 01:44:27 PM PDT 24 2114714418 ps
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T126 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1713324735 Mar 21 01:44:09 PM PDT 24 Mar 21 01:44:28 PM PDT 24 32194695505 ps
T194 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2205680967 Mar 21 01:43:23 PM PDT 24 Mar 21 01:43:27 PM PDT 24 2210126218 ps
T195 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.2452909813 Mar 21 01:46:29 PM PDT 24 Mar 21 01:46:32 PM PDT 24 3913384796 ps
T196 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1993442107 Mar 21 01:45:45 PM PDT 24 Mar 21 01:45:47 PM PDT 24 2534218044 ps
T197 /workspace/coverage/default/24.sysrst_ctrl_smoke.2969174372 Mar 21 01:45:33 PM PDT 24 Mar 21 01:45:37 PM PDT 24 2112472156 ps
T192 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3426054380 Mar 21 01:45:43 PM PDT 24 Mar 21 01:47:25 PM PDT 24 175134619257 ps
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T199 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.79919446 Mar 21 01:45:52 PM PDT 24 Mar 21 01:46:33 PM PDT 24 30833477862 ps
T759 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.1808813797 Mar 21 01:45:41 PM PDT 24 Mar 21 01:45:44 PM PDT 24 3219876290 ps
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T762 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2735066307 Mar 21 01:46:18 PM PDT 24 Mar 21 01:46:20 PM PDT 24 2144740764 ps
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T764 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2730413413 Mar 21 01:43:57 PM PDT 24 Mar 21 01:43:59 PM PDT 24 2240464805 ps
T765 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.779288953 Mar 21 01:44:11 PM PDT 24 Mar 21 01:44:14 PM PDT 24 2467930755 ps
T766 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.1452065862 Mar 21 01:45:42 PM PDT 24 Mar 21 01:45:44 PM PDT 24 2380573200 ps
T767 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.2121060828 Mar 21 01:43:43 PM PDT 24 Mar 21 01:43:50 PM PDT 24 2402687696 ps
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T769 /workspace/coverage/default/15.sysrst_ctrl_alert_test.2159176326 Mar 21 01:44:57 PM PDT 24 Mar 21 01:45:03 PM PDT 24 2012445288 ps
T770 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2404074106 Mar 21 01:47:12 PM PDT 24 Mar 21 01:47:20 PM PDT 24 2609912315 ps
T771 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2690809621 Mar 21 01:45:51 PM PDT 24 Mar 21 01:46:04 PM PDT 24 30595794338 ps
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T773 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2873294673 Mar 21 01:47:24 PM PDT 24 Mar 21 01:47:44 PM PDT 24 27100065523 ps
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T775 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3550028073 Mar 21 01:45:03 PM PDT 24 Mar 21 01:45:11 PM PDT 24 2449878513 ps
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T777 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1488447939 Mar 21 01:43:27 PM PDT 24 Mar 21 01:43:30 PM PDT 24 3702629048 ps
T778 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.3419900004 Mar 21 01:47:12 PM PDT 24 Mar 21 01:48:08 PM PDT 24 79408109504 ps
T779 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.392698802 Mar 21 01:46:05 PM PDT 24 Mar 21 01:48:30 PM PDT 24 57339849893 ps
T780 /workspace/coverage/default/22.sysrst_ctrl_alert_test.1192744877 Mar 21 01:45:22 PM PDT 24 Mar 21 01:45:25 PM PDT 24 2018160232 ps
T307 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3666663461 Mar 21 01:46:16 PM PDT 24 Mar 21 01:48:40 PM PDT 24 108873891831 ps
T781 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.3422174006 Mar 21 01:45:31 PM PDT 24 Mar 21 01:45:36 PM PDT 24 6946626663 ps
T782 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2211680089 Mar 21 01:45:52 PM PDT 24 Mar 21 01:54:15 PM PDT 24 185573228433 ps
T783 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4169906245 Mar 21 01:43:24 PM PDT 24 Mar 21 01:43:28 PM PDT 24 2526705672 ps
T784 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.2802753457 Mar 21 01:47:11 PM PDT 24 Mar 21 01:47:16 PM PDT 24 3168068086 ps
T785 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3216418552 Mar 21 01:47:24 PM PDT 24 Mar 21 01:47:45 PM PDT 24 29990675233 ps
T786 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2954979046 Mar 21 01:44:57 PM PDT 24 Mar 21 01:45:01 PM PDT 24 8565559727 ps
T787 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1121764526 Mar 21 01:44:20 PM PDT 24 Mar 21 01:44:25 PM PDT 24 2223022014 ps
T788 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.2622794913 Mar 21 01:45:09 PM PDT 24 Mar 21 01:45:17 PM PDT 24 3275723241 ps
T789 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.82469674 Mar 21 01:47:12 PM PDT 24 Mar 21 01:47:15 PM PDT 24 2159040723 ps
T790 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.2985502412 Mar 21 01:44:42 PM PDT 24 Mar 21 01:44:50 PM PDT 24 5202274006 ps
T325 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1510307358 Mar 21 01:47:24 PM PDT 24 Mar 21 01:48:10 PM PDT 24 65911656087 ps
T791 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.852300183 Mar 21 01:47:11 PM PDT 24 Mar 21 01:47:15 PM PDT 24 2512469921 ps
T792 /workspace/coverage/default/15.sysrst_ctrl_stress_all.62756474 Mar 21 01:44:56 PM PDT 24 Mar 21 01:45:02 PM PDT 24 7972126480 ps
T793 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.587102178 Mar 21 01:43:56 PM PDT 24 Mar 21 01:43:58 PM PDT 24 4488272088 ps
T794 /workspace/coverage/default/0.sysrst_ctrl_smoke.1792729703 Mar 21 01:43:11 PM PDT 24 Mar 21 01:43:16 PM PDT 24 2111106698 ps
T795 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.3167396291 Mar 21 01:45:22 PM PDT 24 Mar 21 01:45:27 PM PDT 24 2619872885 ps
T319 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3821397081 Mar 21 01:47:24 PM PDT 24 Mar 21 01:48:34 PM PDT 24 103808123643 ps
T796 /workspace/coverage/default/1.sysrst_ctrl_stress_all.2078416550 Mar 21 01:43:20 PM PDT 24 Mar 21 01:43:59 PM PDT 24 58281474953 ps
T797 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.28244075 Mar 21 01:44:57 PM PDT 24 Mar 21 01:52:36 PM PDT 24 170374068976 ps
T346 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1256217860 Mar 21 01:47:10 PM PDT 24 Mar 21 01:48:41 PM PDT 24 33329779225 ps
T798 /workspace/coverage/default/28.sysrst_ctrl_alert_test.4039384348 Mar 21 01:45:52 PM PDT 24 Mar 21 01:45:54 PM PDT 24 2037770727 ps
T799 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.763344305 Mar 21 01:43:31 PM PDT 24 Mar 21 01:43:39 PM PDT 24 2404311489 ps
T24 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.1631155840 Mar 21 01:36:51 PM PDT 24 Mar 21 01:37:02 PM PDT 24 9314313692 ps
T800 /workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.3404817566 Mar 21 01:37:13 PM PDT 24 Mar 21 01:37:15 PM PDT 24 2022529391 ps
T25 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3257546101 Mar 21 01:37:01 PM PDT 24 Mar 21 01:37:08 PM PDT 24 8394115587 ps
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