| T439 |
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1020715740 |
|
|
Mar 24 01:15:00 PM PDT 24 |
Mar 24 01:15:02 PM PDT 24 |
2531050987 ps |
| T440 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.3143923599 |
|
|
Mar 24 01:15:38 PM PDT 24 |
Mar 24 01:17:04 PM PDT 24 |
231465602522 ps |
| T441 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3173142311 |
|
|
Mar 24 01:14:50 PM PDT 24 |
Mar 24 01:14:53 PM PDT 24 |
2311932345 ps |
| T252 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.536318239 |
|
|
Mar 24 01:16:38 PM PDT 24 |
Mar 24 01:17:06 PM PDT 24 |
38322514083 ps |
| T179 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.505259783 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:43 PM PDT 24 |
2616903999 ps |
| T217 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2932870874 |
|
|
Mar 24 01:14:44 PM PDT 24 |
Mar 24 01:14:46 PM PDT 24 |
2364175865 ps |
| T218 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.3130768550 |
|
|
Mar 24 01:14:53 PM PDT 24 |
Mar 24 01:14:54 PM PDT 24 |
2510015386 ps |
| T219 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1772562310 |
|
|
Mar 24 01:16:34 PM PDT 24 |
Mar 24 01:16:36 PM PDT 24 |
5242525384 ps |
| T220 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.539084746 |
|
|
Mar 24 01:15:12 PM PDT 24 |
Mar 24 01:15:14 PM PDT 24 |
3141738960 ps |
| T221 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all.3066296163 |
|
|
Mar 24 01:16:05 PM PDT 24 |
Mar 24 01:16:42 PM PDT 24 |
13539161738 ps |
| T222 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2973930532 |
|
|
Mar 24 01:15:10 PM PDT 24 |
Mar 24 01:15:16 PM PDT 24 |
3200199967 ps |
| T223 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2772007502 |
|
|
Mar 24 01:14:59 PM PDT 24 |
Mar 24 01:15:14 PM PDT 24 |
22045725994 ps |
| T224 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2572932272 |
|
|
Mar 24 01:14:59 PM PDT 24 |
Mar 24 01:16:16 PM PDT 24 |
110670650410 ps |
| T225 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2421386370 |
|
|
Mar 24 01:15:44 PM PDT 24 |
Mar 24 01:15:55 PM PDT 24 |
3301930558 ps |
| T442 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2470743205 |
|
|
Mar 24 01:16:20 PM PDT 24 |
Mar 24 01:16:24 PM PDT 24 |
2612323382 ps |
| T443 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.2137328973 |
|
|
Mar 24 01:15:47 PM PDT 24 |
Mar 24 01:15:48 PM PDT 24 |
2192679322 ps |
| T444 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.406261687 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:43 PM PDT 24 |
2032022850 ps |
| T445 |
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2666829444 |
|
|
Mar 24 01:16:18 PM PDT 24 |
Mar 24 01:16:22 PM PDT 24 |
2614989208 ps |
| T446 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.1835631500 |
|
|
Mar 24 01:16:20 PM PDT 24 |
Mar 24 01:16:23 PM PDT 24 |
2122118503 ps |
| T447 |
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1443540945 |
|
|
Mar 24 01:16:32 PM PDT 24 |
Mar 24 01:16:52 PM PDT 24 |
28860374250 ps |
| T448 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.2551417978 |
|
|
Mar 24 01:16:00 PM PDT 24 |
Mar 24 01:16:02 PM PDT 24 |
2047804806 ps |
| T253 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.916197939 |
|
|
Mar 24 01:16:20 PM PDT 24 |
Mar 24 01:17:07 PM PDT 24 |
79674855548 ps |
| T449 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.1343710940 |
|
|
Mar 24 01:15:43 PM PDT 24 |
Mar 24 01:15:52 PM PDT 24 |
2610515974 ps |
| T450 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3125144654 |
|
|
Mar 24 01:15:55 PM PDT 24 |
Mar 24 01:16:03 PM PDT 24 |
2615055837 ps |
| T288 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.997073045 |
|
|
Mar 24 01:16:30 PM PDT 24 |
Mar 24 01:16:33 PM PDT 24 |
4818316160 ps |
| T184 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3132191096 |
|
|
Mar 24 01:15:07 PM PDT 24 |
Mar 24 01:16:15 PM PDT 24 |
1511169631723 ps |
| T451 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.379771564 |
|
|
Mar 24 01:15:54 PM PDT 24 |
Mar 24 01:15:56 PM PDT 24 |
2639027944 ps |
| T452 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3498260153 |
|
|
Mar 24 01:14:50 PM PDT 24 |
Mar 24 01:14:58 PM PDT 24 |
2461231574 ps |
| T453 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.1815688899 |
|
|
Mar 24 01:14:59 PM PDT 24 |
Mar 24 01:15:06 PM PDT 24 |
2011731250 ps |
| T454 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.973370893 |
|
|
Mar 24 01:15:23 PM PDT 24 |
Mar 24 01:15:28 PM PDT 24 |
2779925289 ps |
| T455 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.3810618196 |
|
|
Mar 24 01:15:45 PM PDT 24 |
Mar 24 01:15:53 PM PDT 24 |
7957418757 ps |
| T298 |
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.2177007639 |
|
|
Mar 24 01:15:55 PM PDT 24 |
Mar 24 01:16:02 PM PDT 24 |
2513994721 ps |
| T456 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2563586954 |
|
|
Mar 24 01:16:23 PM PDT 24 |
Mar 24 01:16:31 PM PDT 24 |
2446699665 ps |
| T457 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3120342155 |
|
|
Mar 24 01:15:25 PM PDT 24 |
Mar 24 01:15:33 PM PDT 24 |
2512668051 ps |
| T91 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3890281809 |
|
|
Mar 24 01:15:13 PM PDT 24 |
Mar 24 01:15:30 PM PDT 24 |
43079062829 ps |
| T99 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.572742221 |
|
|
Mar 24 01:15:24 PM PDT 24 |
Mar 24 01:21:38 PM PDT 24 |
4874787085157 ps |
| T100 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.949961222 |
|
|
Mar 24 01:15:04 PM PDT 24 |
Mar 24 01:15:11 PM PDT 24 |
2108664891 ps |
| T101 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3984308663 |
|
|
Mar 24 01:16:37 PM PDT 24 |
Mar 24 01:18:40 PM PDT 24 |
4653359394608 ps |
| T102 |
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.284892150 |
|
|
Mar 24 01:16:07 PM PDT 24 |
Mar 24 01:16:13 PM PDT 24 |
2215854442 ps |
| T103 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.2751367856 |
|
|
Mar 24 01:15:30 PM PDT 24 |
Mar 24 01:15:34 PM PDT 24 |
2622118947 ps |
| T104 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.3142157432 |
|
|
Mar 24 01:15:44 PM PDT 24 |
Mar 24 01:15:47 PM PDT 24 |
3252832098 ps |
| T105 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1896019944 |
|
|
Mar 24 01:14:58 PM PDT 24 |
Mar 24 01:15:03 PM PDT 24 |
6046157058 ps |
| T106 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3369799308 |
|
|
Mar 24 01:16:23 PM PDT 24 |
Mar 24 01:16:31 PM PDT 24 |
2510553449 ps |
| T107 |
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1377390468 |
|
|
Mar 24 01:16:10 PM PDT 24 |
Mar 24 01:16:16 PM PDT 24 |
2076726604 ps |
| T458 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.3267359245 |
|
|
Mar 24 01:15:43 PM PDT 24 |
Mar 24 01:16:24 PM PDT 24 |
14558025245 ps |
| T189 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.145266519 |
|
|
Mar 24 01:15:01 PM PDT 24 |
Mar 24 01:15:22 PM PDT 24 |
59178330026 ps |
| T459 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.630144810 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:17:10 PM PDT 24 |
34555289815 ps |
| T460 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1715091741 |
|
|
Mar 24 01:15:32 PM PDT 24 |
Mar 24 01:15:37 PM PDT 24 |
2465657690 ps |
| T381 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3281380858 |
|
|
Mar 24 01:16:34 PM PDT 24 |
Mar 24 01:17:19 PM PDT 24 |
55593463479 ps |
| T330 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.2243338121 |
|
|
Mar 24 01:16:15 PM PDT 24 |
Mar 24 01:19:12 PM PDT 24 |
128820919168 ps |
| T461 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.136732621 |
|
|
Mar 24 01:15:27 PM PDT 24 |
Mar 24 01:15:30 PM PDT 24 |
2496086400 ps |
| T462 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1853480395 |
|
|
Mar 24 01:15:46 PM PDT 24 |
Mar 24 01:15:49 PM PDT 24 |
3652350070 ps |
| T463 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.404315261 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:15:36 PM PDT 24 |
3635256844 ps |
| T464 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.4129245461 |
|
|
Mar 24 01:15:00 PM PDT 24 |
Mar 24 01:15:01 PM PDT 24 |
2602708223 ps |
| T465 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.376717485 |
|
|
Mar 24 01:15:31 PM PDT 24 |
Mar 24 01:15:34 PM PDT 24 |
2465770758 ps |
| T256 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1078049960 |
|
|
Mar 24 01:16:15 PM PDT 24 |
Mar 24 01:16:37 PM PDT 24 |
100640313510 ps |
| T466 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2558393343 |
|
|
Mar 24 01:14:48 PM PDT 24 |
Mar 24 01:14:55 PM PDT 24 |
2522634262 ps |
| T357 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1818434984 |
|
|
Mar 24 01:16:21 PM PDT 24 |
Mar 24 01:22:38 PM PDT 24 |
142863135522 ps |
| T467 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.598424483 |
|
|
Mar 24 01:16:21 PM PDT 24 |
Mar 24 01:16:26 PM PDT 24 |
3304184839 ps |
| T468 |
/workspace/coverage/default/17.sysrst_ctrl_alert_test.1883121100 |
|
|
Mar 24 01:15:24 PM PDT 24 |
Mar 24 01:15:30 PM PDT 24 |
2008041474 ps |
| T469 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2134677536 |
|
|
Mar 24 01:16:43 PM PDT 24 |
Mar 24 01:18:47 PM PDT 24 |
47007081034 ps |
| T470 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.324304872 |
|
|
Mar 24 01:16:16 PM PDT 24 |
Mar 24 01:16:18 PM PDT 24 |
3122029694 ps |
| T382 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.4055735866 |
|
|
Mar 24 01:15:15 PM PDT 24 |
Mar 24 01:17:05 PM PDT 24 |
66445444687 ps |
| T471 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.1808789133 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:15:34 PM PDT 24 |
2456465297 ps |
| T92 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3524856681 |
|
|
Mar 24 01:14:57 PM PDT 24 |
Mar 24 01:19:22 PM PDT 24 |
111777308736 ps |
| T472 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2106556617 |
|
|
Mar 24 01:15:12 PM PDT 24 |
Mar 24 01:15:15 PM PDT 24 |
2462784064 ps |
| T473 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2410922416 |
|
|
Mar 24 01:14:58 PM PDT 24 |
Mar 24 01:15:05 PM PDT 24 |
2610770178 ps |
| T185 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1017207267 |
|
|
Mar 24 01:16:19 PM PDT 24 |
Mar 24 01:30:35 PM PDT 24 |
1316991545114 ps |
| T474 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.3160499308 |
|
|
Mar 24 01:15:22 PM PDT 24 |
Mar 24 01:15:24 PM PDT 24 |
2137843995 ps |
| T344 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1466155449 |
|
|
Mar 24 01:16:29 PM PDT 24 |
Mar 24 01:16:43 PM PDT 24 |
74566563605 ps |
| T475 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1190462233 |
|
|
Mar 24 01:16:23 PM PDT 24 |
Mar 24 01:16:47 PM PDT 24 |
8497865642 ps |
| T476 |
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.4099359348 |
|
|
Mar 24 01:16:15 PM PDT 24 |
Mar 24 01:16:24 PM PDT 24 |
8972939699 ps |
| T477 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.2535186163 |
|
|
Mar 24 01:15:27 PM PDT 24 |
Mar 24 01:15:34 PM PDT 24 |
11077582649 ps |
| T478 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.608753323 |
|
|
Mar 24 01:16:19 PM PDT 24 |
Mar 24 01:16:27 PM PDT 24 |
2450114376 ps |
| T479 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2697964448 |
|
|
Mar 24 01:16:30 PM PDT 24 |
Mar 24 01:16:35 PM PDT 24 |
3566626170 ps |
| T480 |
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1568440724 |
|
|
Mar 24 01:16:29 PM PDT 24 |
Mar 24 01:16:31 PM PDT 24 |
2133995218 ps |
| T481 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.541885769 |
|
|
Mar 24 01:15:38 PM PDT 24 |
Mar 24 01:15:46 PM PDT 24 |
2755784835 ps |
| T482 |
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.204676188 |
|
|
Mar 24 01:15:57 PM PDT 24 |
Mar 24 01:16:02 PM PDT 24 |
3271810745 ps |
| T483 |
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3936653873 |
|
|
Mar 24 01:15:52 PM PDT 24 |
Mar 24 01:15:55 PM PDT 24 |
2633427836 ps |
| T177 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.893196304 |
|
|
Mar 24 01:16:37 PM PDT 24 |
Mar 24 01:16:46 PM PDT 24 |
13645252018 ps |
| T484 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3791577861 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
3171032629 ps |
| T485 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.4014367247 |
|
|
Mar 24 01:15:55 PM PDT 24 |
Mar 24 01:15:57 PM PDT 24 |
2029222036 ps |
| T486 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3867518626 |
|
|
Mar 24 01:16:26 PM PDT 24 |
Mar 24 01:16:31 PM PDT 24 |
12946803965 ps |
| T487 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.4240561806 |
|
|
Mar 24 01:15:39 PM PDT 24 |
Mar 24 01:15:43 PM PDT 24 |
2021819438 ps |
| T488 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.843052141 |
|
|
Mar 24 01:16:21 PM PDT 24 |
Mar 24 01:16:22 PM PDT 24 |
2133089899 ps |
| T489 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.3351007497 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:15:29 PM PDT 24 |
2633348974 ps |
| T490 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.541456021 |
|
|
Mar 24 01:15:15 PM PDT 24 |
Mar 24 01:15:21 PM PDT 24 |
2110317424 ps |
| T491 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.2224581949 |
|
|
Mar 24 01:16:07 PM PDT 24 |
Mar 24 01:41:55 PM PDT 24 |
566872406428 ps |
| T492 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.863539612 |
|
|
Mar 24 01:16:27 PM PDT 24 |
Mar 24 01:16:29 PM PDT 24 |
3088777268 ps |
| T493 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.944557668 |
|
|
Mar 24 01:15:27 PM PDT 24 |
Mar 24 01:15:28 PM PDT 24 |
2601248818 ps |
| T368 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.30514588 |
|
|
Mar 24 01:16:34 PM PDT 24 |
Mar 24 01:19:51 PM PDT 24 |
88183937071 ps |
| T494 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1154387054 |
|
|
Mar 24 01:15:58 PM PDT 24 |
Mar 24 01:16:00 PM PDT 24 |
2752348009 ps |
| T199 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.3906187189 |
|
|
Mar 24 01:15:29 PM PDT 24 |
Mar 24 01:16:31 PM PDT 24 |
501417068278 ps |
| T495 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.3326745203 |
|
|
Mar 24 01:15:53 PM PDT 24 |
Mar 24 01:15:54 PM PDT 24 |
2110572833 ps |
| T374 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3757454189 |
|
|
Mar 24 01:16:32 PM PDT 24 |
Mar 24 01:17:38 PM PDT 24 |
52066277008 ps |
| T496 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.808736490 |
|
|
Mar 24 01:15:47 PM PDT 24 |
Mar 24 01:15:51 PM PDT 24 |
2518820030 ps |
| T335 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3768718690 |
|
|
Mar 24 01:16:43 PM PDT 24 |
Mar 24 01:19:02 PM PDT 24 |
53649147754 ps |
| T369 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.979168138 |
|
|
Mar 24 01:16:35 PM PDT 24 |
Mar 24 01:16:56 PM PDT 24 |
55959831678 ps |
| T497 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.2138781062 |
|
|
Mar 24 01:16:11 PM PDT 24 |
Mar 24 01:16:16 PM PDT 24 |
2615720217 ps |
| T498 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1406139745 |
|
|
Mar 24 01:15:58 PM PDT 24 |
Mar 24 01:16:02 PM PDT 24 |
2818759391 ps |
| T254 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.3347434579 |
|
|
Mar 24 01:14:53 PM PDT 24 |
Mar 24 01:16:04 PM PDT 24 |
80503106225 ps |
| T499 |
/workspace/coverage/default/11.sysrst_ctrl_smoke.2613775765 |
|
|
Mar 24 01:15:14 PM PDT 24 |
Mar 24 01:15:15 PM PDT 24 |
2162187889 ps |
| T500 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.75936029 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:28 PM PDT 24 |
4367875217 ps |
| T245 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3384301036 |
|
|
Mar 24 01:16:36 PM PDT 24 |
Mar 24 01:18:46 PM PDT 24 |
50698552947 ps |
| T501 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.4266553747 |
|
|
Mar 24 01:15:05 PM PDT 24 |
Mar 24 01:15:10 PM PDT 24 |
2113186684 ps |
| T502 |
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2012337200 |
|
|
Mar 24 01:16:33 PM PDT 24 |
Mar 24 01:16:35 PM PDT 24 |
2638068910 ps |
| T503 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3106974930 |
|
|
Mar 24 01:16:07 PM PDT 24 |
Mar 24 01:16:10 PM PDT 24 |
3119785027 ps |
| T186 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.82601771 |
|
|
Mar 24 01:15:39 PM PDT 24 |
Mar 24 01:16:04 PM PDT 24 |
39650701369 ps |
| T305 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3600713996 |
|
|
Mar 24 01:15:09 PM PDT 24 |
Mar 24 01:15:15 PM PDT 24 |
2159333443 ps |
| T306 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1750935928 |
|
|
Mar 24 01:14:49 PM PDT 24 |
Mar 24 01:14:58 PM PDT 24 |
3186013433 ps |
| T307 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.308779368 |
|
|
Mar 24 01:16:24 PM PDT 24 |
Mar 24 01:16:28 PM PDT 24 |
2102183993 ps |
| T308 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3933433912 |
|
|
Mar 24 01:16:20 PM PDT 24 |
Mar 24 01:16:23 PM PDT 24 |
2627053480 ps |
| T121 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.425541001 |
|
|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:16:59 PM PDT 24 |
69121570949 ps |
| T309 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.962663096 |
|
|
Mar 24 01:16:14 PM PDT 24 |
Mar 24 01:20:35 PM PDT 24 |
189829052331 ps |
| T310 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.631352504 |
|
|
Mar 24 01:15:17 PM PDT 24 |
Mar 24 01:15:25 PM PDT 24 |
2612233423 ps |
| T311 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.3391731676 |
|
|
Mar 24 01:15:32 PM PDT 24 |
Mar 24 01:15:59 PM PDT 24 |
10008701183 ps |
| T312 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.4022378478 |
|
|
Mar 24 01:16:34 PM PDT 24 |
Mar 24 01:16:36 PM PDT 24 |
2032071291 ps |
| T375 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2051538809 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:16:32 PM PDT 24 |
65965825088 ps |
| T504 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2432064288 |
|
|
Mar 24 01:15:05 PM PDT 24 |
Mar 24 01:15:08 PM PDT 24 |
3436545128 ps |
| T505 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3131782235 |
|
|
Mar 24 01:15:25 PM PDT 24 |
Mar 24 01:15:32 PM PDT 24 |
2488659366 ps |
| T506 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3975874306 |
|
|
Mar 24 01:15:39 PM PDT 24 |
Mar 24 01:15:45 PM PDT 24 |
2186235579 ps |
| T162 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2517982037 |
|
|
Mar 24 01:16:01 PM PDT 24 |
Mar 24 01:16:04 PM PDT 24 |
3046916096 ps |
| T122 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2769100728 |
|
|
Mar 24 01:16:08 PM PDT 24 |
Mar 24 01:16:45 PM PDT 24 |
54155224084 ps |
| T507 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.2514270927 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:43 PM PDT 24 |
2122750139 ps |
| T163 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.319777663 |
|
|
Mar 24 01:16:14 PM PDT 24 |
Mar 24 01:16:17 PM PDT 24 |
2823872460 ps |
| T508 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.1374429089 |
|
|
Mar 24 01:16:07 PM PDT 24 |
Mar 24 01:16:19 PM PDT 24 |
4112444851 ps |
| T509 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.138531798 |
|
|
Mar 24 01:15:07 PM PDT 24 |
Mar 24 01:15:09 PM PDT 24 |
2620414178 ps |
| T510 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3022514863 |
|
|
Mar 24 01:16:39 PM PDT 24 |
Mar 24 01:16:49 PM PDT 24 |
3659646912 ps |
| T511 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2624979305 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:15:29 PM PDT 24 |
7502642719 ps |
| T512 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2472269878 |
|
|
Mar 24 01:16:12 PM PDT 24 |
Mar 24 01:17:24 PM PDT 24 |
26582382414 ps |
| T513 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3266515874 |
|
|
Mar 24 01:15:28 PM PDT 24 |
Mar 24 01:15:35 PM PDT 24 |
2513219172 ps |
| T514 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2145123805 |
|
|
Mar 24 01:16:19 PM PDT 24 |
Mar 24 01:16:27 PM PDT 24 |
2609751129 ps |
| T515 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3588669543 |
|
|
Mar 24 01:15:31 PM PDT 24 |
Mar 24 01:15:37 PM PDT 24 |
2049763413 ps |
| T331 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1307164759 |
|
|
Mar 24 01:16:34 PM PDT 24 |
Mar 24 01:17:31 PM PDT 24 |
107930172984 ps |
| T516 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.987827896 |
|
|
Mar 24 01:15:43 PM PDT 24 |
Mar 24 01:15:52 PM PDT 24 |
10248537409 ps |
| T517 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.3923548063 |
|
|
Mar 24 01:15:27 PM PDT 24 |
Mar 24 01:15:33 PM PDT 24 |
7089768142 ps |
| T377 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3732452395 |
|
|
Mar 24 01:14:58 PM PDT 24 |
Mar 24 01:22:38 PM PDT 24 |
173519632956 ps |
| T518 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.3563506405 |
|
|
Mar 24 01:15:11 PM PDT 24 |
Mar 24 01:15:13 PM PDT 24 |
2029198235 ps |
| T519 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2910395265 |
|
|
Mar 24 01:15:50 PM PDT 24 |
Mar 24 01:15:58 PM PDT 24 |
2610516831 ps |
| T520 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1266068708 |
|
|
Mar 24 01:16:24 PM PDT 24 |
Mar 24 01:16:58 PM PDT 24 |
27088656952 ps |
| T152 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.763230019 |
|
|
Mar 24 01:15:25 PM PDT 24 |
Mar 24 01:16:58 PM PDT 24 |
125406472505 ps |
| T123 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2977477396 |
|
|
Mar 24 01:16:24 PM PDT 24 |
Mar 24 01:17:31 PM PDT 24 |
28377792342 ps |
| T521 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3516791889 |
|
|
Mar 24 01:16:34 PM PDT 24 |
Mar 24 01:16:40 PM PDT 24 |
4037046053 ps |
| T522 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.778371473 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:53 PM PDT 24 |
8882420762 ps |
| T523 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1924286389 |
|
|
Mar 24 01:15:55 PM PDT 24 |
Mar 24 01:15:58 PM PDT 24 |
2535655258 ps |
| T246 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.1473390373 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:18:21 PM PDT 24 |
129836172248 ps |
| T194 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.3773379263 |
|
|
Mar 24 01:15:23 PM PDT 24 |
Mar 24 01:15:27 PM PDT 24 |
6312714289 ps |
| T524 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3059642665 |
|
|
Mar 24 01:15:44 PM PDT 24 |
Mar 24 01:15:53 PM PDT 24 |
3317379695 ps |
| T525 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.2807249052 |
|
|
Mar 24 01:16:08 PM PDT 24 |
Mar 24 01:16:29 PM PDT 24 |
15072303880 ps |
| T526 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.1102348623 |
|
|
Mar 24 01:15:46 PM PDT 24 |
Mar 24 01:15:49 PM PDT 24 |
2119727111 ps |
| T527 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3697323121 |
|
|
Mar 24 01:15:59 PM PDT 24 |
Mar 24 01:16:07 PM PDT 24 |
2894174696 ps |
| T528 |
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.1355059360 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:15:32 PM PDT 24 |
2141230031 ps |
| T529 |
/workspace/coverage/default/42.sysrst_ctrl_smoke.3554877571 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:26 PM PDT 24 |
2214085047 ps |
| T530 |
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.3573166252 |
|
|
Mar 24 01:14:56 PM PDT 24 |
Mar 24 01:15:00 PM PDT 24 |
5278377655 ps |
| T531 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1832793673 |
|
|
Mar 24 01:16:32 PM PDT 24 |
Mar 24 01:16:35 PM PDT 24 |
3163847147 ps |
| T287 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2668239449 |
|
|
Mar 24 01:15:00 PM PDT 24 |
Mar 24 01:15:26 PM PDT 24 |
9270487917 ps |
| T532 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1249356980 |
|
|
Mar 24 01:15:09 PM PDT 24 |
Mar 24 01:15:11 PM PDT 24 |
2461915034 ps |
| T533 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.954661980 |
|
|
Mar 24 01:16:12 PM PDT 24 |
Mar 24 01:18:15 PM PDT 24 |
49007590526 ps |
| T534 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2631012690 |
|
|
Mar 24 01:14:49 PM PDT 24 |
Mar 24 01:14:57 PM PDT 24 |
2611650273 ps |
| T262 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.987118108 |
|
|
Mar 24 01:15:01 PM PDT 24 |
Mar 24 01:15:59 PM PDT 24 |
42014140482 ps |
| T535 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.1263308632 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:15:29 PM PDT 24 |
2088530573 ps |
| T378 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2013102426 |
|
|
Mar 24 01:16:22 PM PDT 24 |
Mar 24 01:18:04 PM PDT 24 |
72821504403 ps |
| T271 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2934120395 |
|
|
Mar 24 01:14:50 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
22015353325 ps |
| T380 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.2667565723 |
|
|
Mar 24 01:16:07 PM PDT 24 |
Mar 24 01:17:57 PM PDT 24 |
79358707677 ps |
| T536 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3118196423 |
|
|
Mar 24 01:15:04 PM PDT 24 |
Mar 24 01:15:10 PM PDT 24 |
2049515923 ps |
| T537 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2269416135 |
|
|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:15:45 PM PDT 24 |
2518249279 ps |
| T538 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3180990703 |
|
|
Mar 24 01:15:40 PM PDT 24 |
Mar 24 01:15:48 PM PDT 24 |
2450498438 ps |
| T178 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2548259123 |
|
|
Mar 24 01:14:41 PM PDT 24 |
Mar 24 01:14:58 PM PDT 24 |
36681592100 ps |
| T145 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.4228396134 |
|
|
Mar 24 01:16:15 PM PDT 24 |
Mar 24 01:18:32 PM PDT 24 |
48587203763 ps |
| T539 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3493548585 |
|
|
Mar 24 01:16:17 PM PDT 24 |
Mar 24 01:16:22 PM PDT 24 |
2472320082 ps |
| T540 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.4266986601 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:16:13 PM PDT 24 |
25590510614 ps |
| T247 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.3088921316 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:18:27 PM PDT 24 |
69367599118 ps |
| T93 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.4131651226 |
|
|
Mar 24 01:16:39 PM PDT 24 |
Mar 24 01:17:24 PM PDT 24 |
59132697797 ps |
| T386 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2215167893 |
|
|
Mar 24 01:16:29 PM PDT 24 |
Mar 24 01:17:42 PM PDT 24 |
198473607767 ps |
| T541 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.3921497785 |
|
|
Mar 24 01:16:21 PM PDT 24 |
Mar 24 01:16:24 PM PDT 24 |
2020400727 ps |
| T542 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2690560826 |
|
|
Mar 24 01:16:23 PM PDT 24 |
Mar 24 01:16:25 PM PDT 24 |
2631393936 ps |
| T543 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.684880702 |
|
|
Mar 24 01:15:30 PM PDT 24 |
Mar 24 01:15:33 PM PDT 24 |
2017303491 ps |
| T544 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.2966809909 |
|
|
Mar 24 01:14:46 PM PDT 24 |
Mar 24 01:14:50 PM PDT 24 |
2516374212 ps |
| T545 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3940456759 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:30 PM PDT 24 |
2616655610 ps |
| T546 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.3419318696 |
|
|
Mar 24 01:15:56 PM PDT 24 |
Mar 24 01:15:57 PM PDT 24 |
2195325414 ps |
| T547 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2630527570 |
|
|
Mar 24 01:14:50 PM PDT 24 |
Mar 24 01:15:09 PM PDT 24 |
26097114051 ps |
| T342 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.214223407 |
|
|
Mar 24 01:16:07 PM PDT 24 |
Mar 24 01:16:59 PM PDT 24 |
76896636726 ps |
| T548 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1676411432 |
|
|
Mar 24 01:16:17 PM PDT 24 |
Mar 24 01:16:25 PM PDT 24 |
2509952247 ps |
| T549 |
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2632934913 |
|
|
Mar 24 01:16:18 PM PDT 24 |
Mar 24 01:16:20 PM PDT 24 |
2470398370 ps |
| T550 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.446725940 |
|
|
Mar 24 01:15:47 PM PDT 24 |
Mar 24 01:15:53 PM PDT 24 |
2010197826 ps |
| T551 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2331195044 |
|
|
Mar 24 01:16:11 PM PDT 24 |
Mar 24 01:16:57 PM PDT 24 |
74601961546 ps |
| T552 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.1266132206 |
|
|
Mar 24 01:16:17 PM PDT 24 |
Mar 24 01:16:38 PM PDT 24 |
8295054678 ps |
| T146 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2724798526 |
|
|
Mar 24 01:16:03 PM PDT 24 |
Mar 24 01:19:02 PM PDT 24 |
158860884527 ps |
| T553 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.113918637 |
|
|
Mar 24 01:14:48 PM PDT 24 |
Mar 24 01:14:51 PM PDT 24 |
2058126507 ps |
| T554 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2743906650 |
|
|
Mar 24 01:15:16 PM PDT 24 |
Mar 24 01:15:18 PM PDT 24 |
2053513354 ps |
| T94 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2582600507 |
|
|
Mar 24 01:16:24 PM PDT 24 |
Mar 24 01:21:22 PM PDT 24 |
117394505919 ps |
| T555 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.376885698 |
|
|
Mar 24 01:15:39 PM PDT 24 |
Mar 24 01:15:41 PM PDT 24 |
2049484670 ps |
| T556 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.3980839471 |
|
|
Mar 24 01:14:48 PM PDT 24 |
Mar 24 01:14:50 PM PDT 24 |
2146142892 ps |
| T557 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1056065159 |
|
|
Mar 24 01:16:14 PM PDT 24 |
Mar 24 01:16:16 PM PDT 24 |
3222409963 ps |
| T216 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.3018451538 |
|
|
Mar 24 01:15:31 PM PDT 24 |
Mar 24 01:15:43 PM PDT 24 |
4738090521 ps |
| T558 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.489119095 |
|
|
Mar 24 01:15:31 PM PDT 24 |
Mar 24 01:15:33 PM PDT 24 |
2479614903 ps |
| T559 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.3584621835 |
|
|
Mar 24 01:14:49 PM PDT 24 |
Mar 24 01:14:53 PM PDT 24 |
2620562851 ps |
| T364 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1940436004 |
|
|
Mar 24 01:15:50 PM PDT 24 |
Mar 24 01:24:46 PM PDT 24 |
199212181589 ps |
| T560 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.2816899784 |
|
|
Mar 24 01:15:46 PM PDT 24 |
Mar 24 01:15:52 PM PDT 24 |
2108609582 ps |
| T561 |
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2163986625 |
|
|
Mar 24 01:16:09 PM PDT 24 |
Mar 24 01:16:10 PM PDT 24 |
14448101034 ps |
| T562 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.980513731 |
|
|
Mar 24 01:14:53 PM PDT 24 |
Mar 24 01:14:56 PM PDT 24 |
2737641328 ps |
| T563 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.788820600 |
|
|
Mar 24 01:15:15 PM PDT 24 |
Mar 24 01:15:18 PM PDT 24 |
2116407301 ps |
| T564 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.3523408997 |
|
|
Mar 24 01:16:22 PM PDT 24 |
Mar 24 01:16:24 PM PDT 24 |
2131508353 ps |
| T195 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2059272118 |
|
|
Mar 24 01:16:27 PM PDT 24 |
Mar 24 01:16:32 PM PDT 24 |
4355934290 ps |
| T565 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.712995556 |
|
|
Mar 24 01:16:35 PM PDT 24 |
Mar 24 01:17:07 PM PDT 24 |
44702662054 ps |
| T566 |
/workspace/coverage/default/15.sysrst_ctrl_alert_test.325015389 |
|
|
Mar 24 01:15:29 PM PDT 24 |
Mar 24 01:15:31 PM PDT 24 |
2027143620 ps |
| T567 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.3031088769 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:45 PM PDT 24 |
6565838180 ps |
| T257 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.814662556 |
|
|
Mar 24 01:16:32 PM PDT 24 |
Mar 24 01:17:24 PM PDT 24 |
74088137682 ps |
| T568 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.3188677976 |
|
|
Mar 24 01:15:25 PM PDT 24 |
Mar 24 01:15:26 PM PDT 24 |
4158908085 ps |
| T569 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3528910186 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:35 PM PDT 24 |
3421280812 ps |
| T570 |
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.4240359452 |
|
|
Mar 24 01:15:24 PM PDT 24 |
Mar 24 01:15:28 PM PDT 24 |
2463996110 ps |
| T571 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3047015461 |
|
|
Mar 24 01:16:04 PM PDT 24 |
Mar 24 01:16:07 PM PDT 24 |
2156986301 ps |
| T373 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3302905718 |
|
|
Mar 24 01:16:42 PM PDT 24 |
Mar 24 01:17:17 PM PDT 24 |
84498699455 ps |
| T572 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1427198211 |
|
|
Mar 24 01:15:18 PM PDT 24 |
Mar 24 01:15:21 PM PDT 24 |
7078487885 ps |
| T573 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1755878281 |
|
|
Mar 24 01:15:24 PM PDT 24 |
Mar 24 01:15:27 PM PDT 24 |
2624912960 ps |
| T574 |
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.582430373 |
|
|
Mar 24 01:16:01 PM PDT 24 |
Mar 24 01:16:09 PM PDT 24 |
7989678481 ps |
| T575 |
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.3178019408 |
|
|
Mar 24 01:15:21 PM PDT 24 |
Mar 24 01:15:23 PM PDT 24 |
4124023663 ps |
| T576 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3527195791 |
|
|
Mar 24 01:15:00 PM PDT 24 |
Mar 24 01:15:03 PM PDT 24 |
2788349080 ps |
| T577 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.2276700701 |
|
|
Mar 24 01:15:44 PM PDT 24 |
Mar 24 01:15:47 PM PDT 24 |
2116440700 ps |
| T578 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.4123489284 |
|
|
Mar 24 01:15:21 PM PDT 24 |
Mar 24 01:15:49 PM PDT 24 |
24841429294 ps |
| T579 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.1221797686 |
|
|
Mar 24 01:16:17 PM PDT 24 |
Mar 24 01:16:19 PM PDT 24 |
2040531552 ps |
| T359 |
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2031486106 |
|
|
Mar 24 01:16:41 PM PDT 24 |
Mar 24 01:24:50 PM PDT 24 |
188310214145 ps |
| T580 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.1182976202 |
|
|
Mar 24 01:15:31 PM PDT 24 |
Mar 24 01:15:38 PM PDT 24 |
2612142791 ps |
| T149 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.577914773 |
|
|
Mar 24 01:14:57 PM PDT 24 |
Mar 24 01:16:08 PM PDT 24 |
111023676582 ps |
| T154 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.2306944382 |
|
|
Mar 24 01:15:32 PM PDT 24 |
Mar 24 01:15:39 PM PDT 24 |
2113360046 ps |
| T95 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2457469297 |
|
|
Mar 24 01:15:14 PM PDT 24 |
Mar 24 01:15:41 PM PDT 24 |
147622217774 ps |
| T155 |
/workspace/coverage/default/25.sysrst_ctrl_edge_detect.2778113591 |
|
|
Mar 24 01:15:47 PM PDT 24 |
Mar 24 01:15:48 PM PDT 24 |
4952557362 ps |
| T156 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.2486319688 |
|
|
Mar 24 01:15:14 PM PDT 24 |
Mar 24 01:15:20 PM PDT 24 |
2456438656 ps |
| T157 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.3503565663 |
|
|
Mar 24 01:16:17 PM PDT 24 |
Mar 24 01:16:25 PM PDT 24 |
2611274545 ps |
| T96 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2810401095 |
|
|
Mar 24 01:16:30 PM PDT 24 |
Mar 24 01:17:17 PM PDT 24 |
71372896385 ps |
| T147 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.560579703 |
|
|
Mar 24 01:14:49 PM PDT 24 |
Mar 24 01:15:29 PM PDT 24 |
64358068912 ps |
| T158 |
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2219094703 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:15:32 PM PDT 24 |
2620151125 ps |
| T97 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.1993050192 |
|
|
Mar 24 01:15:55 PM PDT 24 |
Mar 24 01:23:51 PM PDT 24 |
169437283038 ps |
| T581 |
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.21549671 |
|
|
Mar 24 01:15:33 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
4095855225 ps |
| T582 |
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2860021593 |
|
|
Mar 24 01:15:40 PM PDT 24 |
Mar 24 01:15:42 PM PDT 24 |
4092614746 ps |
| T583 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2681769168 |
|
|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:15:51 PM PDT 24 |
3488063539 ps |
| T584 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1367942666 |
|
|
Mar 24 01:15:44 PM PDT 24 |
Mar 24 01:15:49 PM PDT 24 |
2644105180 ps |
| T585 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.3577304709 |
|
|
Mar 24 01:15:27 PM PDT 24 |
Mar 24 01:15:30 PM PDT 24 |
3375493132 ps |
| T139 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2612955920 |
|
|
Mar 24 01:15:03 PM PDT 24 |
Mar 24 01:15:12 PM PDT 24 |
14219281123 ps |
| T586 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3779602812 |
|
|
Mar 24 01:14:51 PM PDT 24 |
Mar 24 01:14:59 PM PDT 24 |
2511884556 ps |
| T587 |
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2664521584 |
|
|
Mar 24 01:15:48 PM PDT 24 |
Mar 24 01:15:50 PM PDT 24 |
2461914687 ps |
| T588 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3763727995 |
|
|
Mar 24 01:16:39 PM PDT 24 |
Mar 24 01:20:04 PM PDT 24 |
84718226291 ps |
| T181 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.1236919332 |
|
|
Mar 24 01:16:00 PM PDT 24 |
Mar 24 01:16:08 PM PDT 24 |
14519605173 ps |
| T589 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.4174788931 |
|
|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:15:52 PM PDT 24 |
3518467614 ps |
| T590 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3221943446 |
|
|
Mar 24 01:14:56 PM PDT 24 |
Mar 24 01:15:05 PM PDT 24 |
3252035331 ps |
| T591 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.766824390 |
|
|
Mar 24 01:16:19 PM PDT 24 |
Mar 24 01:16:26 PM PDT 24 |
2129542317 ps |
| T134 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2496156437 |
|
|
Mar 24 01:15:38 PM PDT 24 |
Mar 24 01:18:41 PM PDT 24 |
77755820918 ps |
| T592 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1738021197 |
|
|
Mar 24 01:15:47 PM PDT 24 |
Mar 24 01:16:35 PM PDT 24 |
70455451106 ps |
| T150 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.966558247 |
|
|
Mar 24 01:15:43 PM PDT 24 |
Mar 24 01:15:47 PM PDT 24 |
3390642649 ps |
| T593 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.41897943 |
|
|
Mar 24 01:15:30 PM PDT 24 |
Mar 24 01:17:34 PM PDT 24 |
45248420657 ps |