T594 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.237791638 |
|
|
Mar 24 01:15:43 PM PDT 24 |
Mar 24 01:15:45 PM PDT 24 |
2135750962 ps |
T595 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.571678287 |
|
|
Mar 24 01:16:04 PM PDT 24 |
Mar 24 01:16:06 PM PDT 24 |
2182316815 ps |
T361 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1278749284 |
|
|
Mar 24 01:15:35 PM PDT 24 |
Mar 24 01:17:02 PM PDT 24 |
61540840711 ps |
T148 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.1910261304 |
|
|
Mar 24 01:14:47 PM PDT 24 |
Mar 24 01:14:57 PM PDT 24 |
4425239762 ps |
T596 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1128546763 |
|
|
Mar 24 01:16:39 PM PDT 24 |
Mar 24 01:16:50 PM PDT 24 |
3615874314 ps |
T597 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3451952660 |
|
|
Mar 24 01:16:21 PM PDT 24 |
Mar 24 01:16:25 PM PDT 24 |
2619297640 ps |
T598 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1295507758 |
|
|
Mar 24 01:14:58 PM PDT 24 |
Mar 24 01:15:01 PM PDT 24 |
2476578608 ps |
T599 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3597493519 |
|
|
Mar 24 01:15:25 PM PDT 24 |
Mar 24 01:15:28 PM PDT 24 |
3398044758 ps |
T385 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1603481403 |
|
|
Mar 24 01:15:33 PM PDT 24 |
Mar 24 01:18:15 PM PDT 24 |
60260583179 ps |
T600 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all.262906766 |
|
|
Mar 24 01:16:14 PM PDT 24 |
Mar 24 01:16:32 PM PDT 24 |
12316274223 ps |
T601 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.1111234206 |
|
|
Mar 24 01:16:17 PM PDT 24 |
Mar 24 01:16:19 PM PDT 24 |
2125943929 ps |
T602 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3716837343 |
|
|
Mar 24 01:15:56 PM PDT 24 |
Mar 24 01:17:01 PM PDT 24 |
51762925668 ps |
T603 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.3232581224 |
|
|
Mar 24 01:15:28 PM PDT 24 |
Mar 24 01:15:35 PM PDT 24 |
2013812045 ps |
T604 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.1827641445 |
|
|
Mar 24 01:15:54 PM PDT 24 |
Mar 24 01:15:57 PM PDT 24 |
2462889535 ps |
T301 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.585335407 |
|
|
Mar 24 01:15:18 PM PDT 24 |
Mar 24 01:15:57 PM PDT 24 |
32304503426 ps |
T605 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.727711880 |
|
|
Mar 24 01:15:29 PM PDT 24 |
Mar 24 01:15:30 PM PDT 24 |
2075365854 ps |
T606 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.3784020913 |
|
|
Mar 24 01:14:54 PM PDT 24 |
Mar 24 01:14:58 PM PDT 24 |
2015264009 ps |
T607 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.3343865288 |
|
|
Mar 24 01:14:46 PM PDT 24 |
Mar 24 01:16:58 PM PDT 24 |
171956635173 ps |
T389 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all.3503411631 |
|
|
Mar 24 01:15:23 PM PDT 24 |
Mar 24 01:18:24 PM PDT 24 |
1918489010322 ps |
T608 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.2536767776 |
|
|
Mar 24 01:15:52 PM PDT 24 |
Mar 24 01:15:57 PM PDT 24 |
3033254556 ps |
T609 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2388751759 |
|
|
Mar 24 01:14:48 PM PDT 24 |
Mar 24 01:14:50 PM PDT 24 |
3383578175 ps |
T610 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.1330762024 |
|
|
Mar 24 01:15:57 PM PDT 24 |
Mar 24 01:16:03 PM PDT 24 |
2112154277 ps |
T258 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2517536525 |
|
|
Mar 24 01:14:57 PM PDT 24 |
Mar 24 01:18:35 PM PDT 24 |
86093060077 ps |
T611 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.133897231 |
|
|
Mar 24 01:15:56 PM PDT 24 |
Mar 24 01:16:02 PM PDT 24 |
2014321941 ps |
T98 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1948428730 |
|
|
Mar 24 01:16:34 PM PDT 24 |
Mar 24 01:19:49 PM PDT 24 |
140533560523 ps |
T612 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.4204091627 |
|
|
Mar 24 01:15:29 PM PDT 24 |
Mar 24 01:15:37 PM PDT 24 |
3135006131 ps |
T613 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1603878965 |
|
|
Mar 24 01:16:29 PM PDT 24 |
Mar 24 01:17:36 PM PDT 24 |
26080229106 ps |
T390 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2792258424 |
|
|
Mar 24 01:15:56 PM PDT 24 |
Mar 24 01:17:21 PM PDT 24 |
554631760222 ps |
T614 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.41735041 |
|
|
Mar 24 01:15:27 PM PDT 24 |
Mar 24 01:15:35 PM PDT 24 |
2510912102 ps |
T615 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.2842791662 |
|
|
Mar 24 01:16:01 PM PDT 24 |
Mar 24 01:16:04 PM PDT 24 |
2473483609 ps |
T616 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.2609181694 |
|
|
Mar 24 01:15:38 PM PDT 24 |
Mar 24 01:15:40 PM PDT 24 |
4683423945 ps |
T617 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.1017132217 |
|
|
Mar 24 01:15:47 PM PDT 24 |
Mar 24 01:15:51 PM PDT 24 |
2049924739 ps |
T618 |
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2353615543 |
|
|
Mar 24 01:16:14 PM PDT 24 |
Mar 24 01:16:17 PM PDT 24 |
3026642870 ps |
T619 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2301659050 |
|
|
Mar 24 01:15:31 PM PDT 24 |
Mar 24 01:15:38 PM PDT 24 |
2256911105 ps |
T620 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.930311735 |
|
|
Mar 24 01:15:23 PM PDT 24 |
Mar 24 01:15:25 PM PDT 24 |
3633783912 ps |
T621 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.1135016316 |
|
|
Mar 24 01:14:48 PM PDT 24 |
Mar 24 01:14:50 PM PDT 24 |
2813985451 ps |
T622 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2752297412 |
|
|
Mar 24 01:15:53 PM PDT 24 |
Mar 24 01:17:35 PM PDT 24 |
1994374447495 ps |
T623 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1558701205 |
|
|
Mar 24 01:15:25 PM PDT 24 |
Mar 24 01:15:33 PM PDT 24 |
2612948481 ps |
T624 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1148900492 |
|
|
Mar 24 01:15:04 PM PDT 24 |
Mar 24 01:15:09 PM PDT 24 |
2015814743 ps |
T625 |
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.424058221 |
|
|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:15:51 PM PDT 24 |
3215395170 ps |
T135 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3123226787 |
|
|
Mar 24 01:16:17 PM PDT 24 |
Mar 24 01:16:25 PM PDT 24 |
7178406793 ps |
T626 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3619007154 |
|
|
Mar 24 01:14:49 PM PDT 24 |
Mar 24 01:14:54 PM PDT 24 |
3829081790 ps |
T627 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.895847280 |
|
|
Mar 24 01:15:57 PM PDT 24 |
Mar 24 01:16:03 PM PDT 24 |
2120374615 ps |
T628 |
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.678539716 |
|
|
Mar 24 01:15:39 PM PDT 24 |
Mar 24 01:15:41 PM PDT 24 |
3050818619 ps |
T332 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.739040940 |
|
|
Mar 24 01:16:31 PM PDT 24 |
Mar 24 01:18:00 PM PDT 24 |
68877480030 ps |
T629 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.2112999188 |
|
|
Mar 24 01:14:49 PM PDT 24 |
Mar 24 01:14:51 PM PDT 24 |
3858239644 ps |
T630 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.3506034995 |
|
|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:16:18 PM PDT 24 |
87431292836 ps |
T338 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3111075348 |
|
|
Mar 24 01:14:51 PM PDT 24 |
Mar 24 01:15:26 PM PDT 24 |
89457410911 ps |
T631 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2258537201 |
|
|
Mar 24 01:14:48 PM PDT 24 |
Mar 24 01:14:55 PM PDT 24 |
2537824862 ps |
T255 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.3833704381 |
|
|
Mar 24 01:15:31 PM PDT 24 |
Mar 24 01:18:38 PM PDT 24 |
71462219184 ps |
T632 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2969996110 |
|
|
Mar 24 01:16:32 PM PDT 24 |
Mar 24 01:16:35 PM PDT 24 |
3215438659 ps |
T633 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.497231617 |
|
|
Mar 24 01:14:56 PM PDT 24 |
Mar 24 01:15:04 PM PDT 24 |
2607500050 ps |
T350 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2186892082 |
|
|
Mar 24 01:16:20 PM PDT 24 |
Mar 24 01:17:46 PM PDT 24 |
68052610385 ps |
T634 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1146878796 |
|
|
Mar 24 01:16:14 PM PDT 24 |
Mar 24 01:16:22 PM PDT 24 |
2610547085 ps |
T384 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3334020039 |
|
|
Mar 24 01:15:39 PM PDT 24 |
Mar 24 01:16:21 PM PDT 24 |
102856665085 ps |
T635 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.250538753 |
|
|
Mar 24 01:14:43 PM PDT 24 |
Mar 24 01:15:55 PM PDT 24 |
100571213869 ps |
T636 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1999448686 |
|
|
Mar 24 01:16:30 PM PDT 24 |
Mar 24 01:16:34 PM PDT 24 |
2514208303 ps |
T637 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2930798701 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:26 PM PDT 24 |
4495630301 ps |
T362 |
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.971090383 |
|
|
Mar 24 01:16:33 PM PDT 24 |
Mar 24 01:17:50 PM PDT 24 |
126868551384 ps |
T638 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.3531315781 |
|
|
Mar 24 01:14:55 PM PDT 24 |
Mar 24 01:14:58 PM PDT 24 |
2789450945 ps |
T136 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3985541483 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:16:52 PM PDT 24 |
179939202706 ps |
T168 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.461994694 |
|
|
Mar 24 01:15:19 PM PDT 24 |
Mar 24 01:15:20 PM PDT 24 |
3577227374 ps |
T169 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1267513326 |
|
|
Mar 24 01:15:06 PM PDT 24 |
Mar 24 01:15:15 PM PDT 24 |
13077223509 ps |
T170 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.208272448 |
|
|
Mar 24 01:15:28 PM PDT 24 |
Mar 24 01:15:34 PM PDT 24 |
2416703992 ps |
T171 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.4224129681 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:29 PM PDT 24 |
3909554809 ps |
T172 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3110723806 |
|
|
Mar 24 01:15:29 PM PDT 24 |
Mar 24 01:16:07 PM PDT 24 |
77653655468 ps |
T173 |
/workspace/coverage/default/39.sysrst_ctrl_smoke.503913230 |
|
|
Mar 24 01:16:07 PM PDT 24 |
Mar 24 01:16:14 PM PDT 24 |
2110886781 ps |
T174 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1793320434 |
|
|
Mar 24 01:15:51 PM PDT 24 |
Mar 24 01:15:59 PM PDT 24 |
2510157340 ps |
T175 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.2119277404 |
|
|
Mar 24 01:14:53 PM PDT 24 |
Mar 24 01:16:03 PM PDT 24 |
25581015974 ps |
T176 |
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2109617704 |
|
|
Mar 24 01:15:24 PM PDT 24 |
Mar 24 01:15:30 PM PDT 24 |
2037316360 ps |
T639 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1506980610 |
|
|
Mar 24 01:15:29 PM PDT 24 |
Mar 24 01:15:37 PM PDT 24 |
5223952442 ps |
T137 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.3862808510 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:25:16 PM PDT 24 |
1871257351014 ps |
T640 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.3070312046 |
|
|
Mar 24 01:16:09 PM PDT 24 |
Mar 24 01:16:13 PM PDT 24 |
2119250578 ps |
T641 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3697349861 |
|
|
Mar 24 01:16:39 PM PDT 24 |
Mar 24 01:17:06 PM PDT 24 |
42790313520 ps |
T642 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2881166173 |
|
|
Mar 24 01:16:42 PM PDT 24 |
Mar 24 01:18:29 PM PDT 24 |
39950496985 ps |
T643 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.1602485647 |
|
|
Mar 24 01:14:59 PM PDT 24 |
Mar 24 01:15:05 PM PDT 24 |
2112828525 ps |
T644 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.460953324 |
|
|
Mar 24 01:14:49 PM PDT 24 |
Mar 24 01:18:15 PM PDT 24 |
78874959306 ps |
T645 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2294404851 |
|
|
Mar 24 01:14:59 PM PDT 24 |
Mar 24 01:15:04 PM PDT 24 |
2949311477 ps |
T646 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.2301685899 |
|
|
Mar 24 01:15:18 PM PDT 24 |
Mar 24 01:15:20 PM PDT 24 |
2137147265 ps |
T647 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1869833084 |
|
|
Mar 24 01:16:13 PM PDT 24 |
Mar 24 01:16:19 PM PDT 24 |
2209209034 ps |
T648 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.3856249037 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:48 PM PDT 24 |
2110674260 ps |
T649 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.2904865504 |
|
|
Mar 24 01:16:20 PM PDT 24 |
Mar 24 01:19:00 PM PDT 24 |
66844943785 ps |
T650 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1449125894 |
|
|
Mar 24 01:15:11 PM PDT 24 |
Mar 24 01:15:13 PM PDT 24 |
2626731332 ps |
T651 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.486181464 |
|
|
Mar 24 01:16:37 PM PDT 24 |
Mar 24 01:16:40 PM PDT 24 |
2622837594 ps |
T652 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.614377480 |
|
|
Mar 24 01:15:29 PM PDT 24 |
Mar 24 01:15:31 PM PDT 24 |
2134019134 ps |
T349 |
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2752397963 |
|
|
Mar 24 01:16:33 PM PDT 24 |
Mar 24 01:22:05 PM PDT 24 |
119420457037 ps |
T653 |
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3667378160 |
|
|
Mar 24 01:14:50 PM PDT 24 |
Mar 24 01:14:53 PM PDT 24 |
2965366808 ps |
T654 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.612342614 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:27 PM PDT 24 |
2622285138 ps |
T655 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3168050150 |
|
|
Mar 24 01:16:21 PM PDT 24 |
Mar 24 01:16:27 PM PDT 24 |
2011858270 ps |
T656 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1951332322 |
|
|
Mar 24 01:15:34 PM PDT 24 |
Mar 24 01:15:36 PM PDT 24 |
2536525559 ps |
T140 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.634387152 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:46 PM PDT 24 |
78409217672 ps |
T657 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.1347450754 |
|
|
Mar 24 01:15:52 PM PDT 24 |
Mar 24 01:17:36 PM PDT 24 |
137936185236 ps |
T658 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.1768493017 |
|
|
Mar 24 01:15:52 PM PDT 24 |
Mar 24 01:15:56 PM PDT 24 |
2118957575 ps |
T659 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3209464280 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:27 PM PDT 24 |
2044678437 ps |
T366 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1130334368 |
|
|
Mar 24 01:14:45 PM PDT 24 |
Mar 24 01:15:15 PM PDT 24 |
55381952901 ps |
T660 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.646504767 |
|
|
Mar 24 01:14:50 PM PDT 24 |
Mar 24 01:14:53 PM PDT 24 |
2540201301 ps |
T661 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all.3843740679 |
|
|
Mar 24 01:15:55 PM PDT 24 |
Mar 24 01:16:19 PM PDT 24 |
11228661828 ps |
T662 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3015381449 |
|
|
Mar 24 01:16:35 PM PDT 24 |
Mar 24 01:17:54 PM PDT 24 |
112077507747 ps |
T663 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.2360629710 |
|
|
Mar 24 01:15:53 PM PDT 24 |
Mar 24 01:16:29 PM PDT 24 |
13253658402 ps |
T664 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3119633202 |
|
|
Mar 24 01:14:48 PM PDT 24 |
Mar 24 01:14:55 PM PDT 24 |
2614515059 ps |
T665 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2150785827 |
|
|
Mar 24 01:15:07 PM PDT 24 |
Mar 24 01:15:15 PM PDT 24 |
2612715272 ps |
T79 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1960656663 |
|
|
Mar 24 01:16:38 PM PDT 24 |
Mar 24 01:20:51 PM PDT 24 |
99223329643 ps |
T666 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3882277671 |
|
|
Mar 24 01:16:21 PM PDT 24 |
Mar 24 01:16:23 PM PDT 24 |
2571872269 ps |
T667 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3511300323 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
3166405769 ps |
T358 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3567074570 |
|
|
Mar 24 01:15:28 PM PDT 24 |
Mar 24 01:18:02 PM PDT 24 |
116269516187 ps |
T668 |
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.732830257 |
|
|
Mar 24 01:14:59 PM PDT 24 |
Mar 24 01:15:03 PM PDT 24 |
2124180398 ps |
T669 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.1344226526 |
|
|
Mar 24 01:15:27 PM PDT 24 |
Mar 24 01:15:33 PM PDT 24 |
2015122210 ps |
T336 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.3507368938 |
|
|
Mar 24 01:15:56 PM PDT 24 |
Mar 24 01:21:00 PM PDT 24 |
115924668341 ps |
T670 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2713147750 |
|
|
Mar 24 01:16:37 PM PDT 24 |
Mar 24 01:16:40 PM PDT 24 |
3411266570 ps |
T671 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.354532497 |
|
|
Mar 24 01:15:39 PM PDT 24 |
Mar 24 01:15:50 PM PDT 24 |
8729260390 ps |
T672 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.495879991 |
|
|
Mar 24 01:16:32 PM PDT 24 |
Mar 24 01:16:39 PM PDT 24 |
2510468943 ps |
T673 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.4140234121 |
|
|
Mar 24 01:16:16 PM PDT 24 |
Mar 24 01:16:21 PM PDT 24 |
2012884800 ps |
T337 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect.955179042 |
|
|
Mar 24 01:15:45 PM PDT 24 |
Mar 24 01:18:18 PM PDT 24 |
127711952745 ps |
T674 |
/workspace/coverage/default/15.sysrst_ctrl_smoke.3066788428 |
|
|
Mar 24 01:15:22 PM PDT 24 |
Mar 24 01:15:28 PM PDT 24 |
2113921210 ps |
T675 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.3488545924 |
|
|
Mar 24 01:15:49 PM PDT 24 |
Mar 24 01:16:47 PM PDT 24 |
90987211400 ps |
T124 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.676215417 |
|
|
Mar 24 01:16:25 PM PDT 24 |
Mar 24 01:16:41 PM PDT 24 |
62515662282 ps |
T167 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.1281134975 |
|
|
Mar 24 01:15:19 PM PDT 24 |
Mar 24 01:15:28 PM PDT 24 |
4544279178 ps |
T676 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2912834239 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
2626949742 ps |
T677 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1484263230 |
|
|
Mar 24 01:16:37 PM PDT 24 |
Mar 24 01:17:40 PM PDT 24 |
50656766613 ps |
T678 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1873856733 |
|
|
Mar 24 01:14:49 PM PDT 24 |
Mar 24 01:14:51 PM PDT 24 |
2534425037 ps |
T679 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.384979634 |
|
|
Mar 24 01:14:42 PM PDT 24 |
Mar 24 01:14:44 PM PDT 24 |
2446943190 ps |
T680 |
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1615960533 |
|
|
Mar 24 01:15:22 PM PDT 24 |
Mar 24 01:17:32 PM PDT 24 |
4260633295213 ps |
T151 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2079743901 |
|
|
Mar 24 01:15:40 PM PDT 24 |
Mar 24 01:16:23 PM PDT 24 |
73579992984 ps |
T681 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.2520148262 |
|
|
Mar 24 01:15:43 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
2568824031 ps |
T339 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.3469520423 |
|
|
Mar 24 01:16:13 PM PDT 24 |
Mar 24 01:17:50 PM PDT 24 |
78635364009 ps |
T682 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.2242730335 |
|
|
Mar 24 01:16:09 PM PDT 24 |
Mar 24 01:16:12 PM PDT 24 |
2122723714 ps |
T683 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3147153339 |
|
|
Mar 24 01:16:15 PM PDT 24 |
Mar 24 01:16:17 PM PDT 24 |
2535311257 ps |
T684 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3139830113 |
|
|
Mar 24 01:15:09 PM PDT 24 |
Mar 24 01:15:19 PM PDT 24 |
3508214714 ps |
T685 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3483320436 |
|
|
Mar 24 01:15:23 PM PDT 24 |
Mar 24 01:15:26 PM PDT 24 |
6091083100 ps |
T686 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.239683046 |
|
|
Mar 24 01:15:26 PM PDT 24 |
Mar 24 01:15:33 PM PDT 24 |
2109893366 ps |
T687 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1630173224 |
|
|
Mar 24 01:16:31 PM PDT 24 |
Mar 24 01:17:34 PM PDT 24 |
23439738600 ps |
T688 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3267299603 |
|
|
Mar 24 01:16:24 PM PDT 24 |
Mar 24 01:16:26 PM PDT 24 |
3225803893 ps |
T689 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.2143900111 |
|
|
Mar 24 01:15:31 PM PDT 24 |
Mar 24 01:15:39 PM PDT 24 |
3143809286 ps |
T690 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1341515856 |
|
|
Mar 24 01:15:27 PM PDT 24 |
Mar 24 01:15:30 PM PDT 24 |
7789576748 ps |
T691 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.1003456997 |
|
|
Mar 24 01:16:21 PM PDT 24 |
Mar 24 01:16:23 PM PDT 24 |
2038962193 ps |
T692 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1836214471 |
|
|
Mar 24 01:16:28 PM PDT 24 |
Mar 24 01:16:34 PM PDT 24 |
8619660382 ps |
T693 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.1541086295 |
|
|
Mar 24 01:16:11 PM PDT 24 |
Mar 24 01:16:13 PM PDT 24 |
2142518876 ps |
T371 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.1418813131 |
|
|
Mar 24 01:16:33 PM PDT 24 |
Mar 24 01:18:42 PM PDT 24 |
117478412501 ps |
T694 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2035202113 |
|
|
Mar 24 01:14:54 PM PDT 24 |
Mar 24 01:14:56 PM PDT 24 |
2234059762 ps |
T340 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.2371850988 |
|
|
Mar 24 01:15:37 PM PDT 24 |
Mar 24 01:17:40 PM PDT 24 |
178273389646 ps |
T182 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.781921005 |
|
|
Mar 24 01:16:06 PM PDT 24 |
Mar 24 01:16:08 PM PDT 24 |
2949807349 ps |
T695 |
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.3011984306 |
|
|
Mar 24 01:14:50 PM PDT 24 |
Mar 24 01:14:55 PM PDT 24 |
2471031306 ps |
T696 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1553164096 |
|
|
Mar 24 01:16:05 PM PDT 24 |
Mar 24 01:16:08 PM PDT 24 |
2528931602 ps |
T697 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3290119960 |
|
|
Mar 24 01:15:10 PM PDT 24 |
Mar 24 01:15:13 PM PDT 24 |
8205579966 ps |
T698 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2872217651 |
|
|
Mar 24 01:15:11 PM PDT 24 |
Mar 24 01:15:14 PM PDT 24 |
2628730001 ps |
T699 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.4148817121 |
|
|
Mar 24 01:16:23 PM PDT 24 |
Mar 24 01:16:25 PM PDT 24 |
2562282559 ps |
T700 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.1117915491 |
|
|
Mar 24 01:15:56 PM PDT 24 |
Mar 24 01:16:45 PM PDT 24 |
15953293792 ps |
T341 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.392635868 |
|
|
Mar 24 01:15:44 PM PDT 24 |
Mar 24 01:18:17 PM PDT 24 |
124556971227 ps |
T701 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.3973201850 |
|
|
Mar 24 01:15:36 PM PDT 24 |
Mar 24 01:15:40 PM PDT 24 |
2620684130 ps |
T702 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1165168124 |
|
|
Mar 24 01:15:03 PM PDT 24 |
Mar 24 01:15:11 PM PDT 24 |
2510258926 ps |
T703 |
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.4141770075 |
|
|
Mar 24 01:15:28 PM PDT 24 |
Mar 24 01:15:36 PM PDT 24 |
2512106931 ps |
T372 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.962635211 |
|
|
Mar 24 01:16:29 PM PDT 24 |
Mar 24 01:21:26 PM PDT 24 |
107879423576 ps |
T704 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1594328191 |
|
|
Mar 24 01:16:37 PM PDT 24 |
Mar 24 01:16:43 PM PDT 24 |
2013004668 ps |
T705 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3037766058 |
|
|
Mar 24 01:16:03 PM PDT 24 |
Mar 24 01:16:06 PM PDT 24 |
2210420570 ps |
T706 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.1030002626 |
|
|
Mar 24 01:16:03 PM PDT 24 |
Mar 24 01:16:06 PM PDT 24 |
2920816007 ps |
T707 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3400839711 |
|
|
Mar 24 01:16:29 PM PDT 24 |
Mar 24 01:16:35 PM PDT 24 |
2512998283 ps |
T708 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3181056428 |
|
|
Mar 24 01:16:17 PM PDT 24 |
Mar 24 01:16:24 PM PDT 24 |
2541900023 ps |
T709 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.3323017345 |
|
|
Mar 24 01:15:37 PM PDT 24 |
Mar 24 01:15:39 PM PDT 24 |
2023027301 ps |
T58 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2341709612 |
|
|
Mar 24 01:14:56 PM PDT 24 |
Mar 24 01:15:23 PM PDT 24 |
41034749705 ps |
T710 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.578019207 |
|
|
Mar 24 01:15:04 PM PDT 24 |
Mar 24 01:15:19 PM PDT 24 |
65081688631 ps |
T711 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1436415851 |
|
|
Mar 24 01:15:22 PM PDT 24 |
Mar 24 01:15:29 PM PDT 24 |
2509465001 ps |
T712 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.3591419565 |
|
|
Mar 24 01:15:39 PM PDT 24 |
Mar 24 01:20:54 PM PDT 24 |
114523910295 ps |
T347 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1844794226 |
|
|
Mar 24 01:16:30 PM PDT 24 |
Mar 24 01:21:20 PM PDT 24 |
118336406267 ps |
T713 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3716365947 |
|
|
Mar 24 01:15:11 PM PDT 24 |
Mar 24 01:15:13 PM PDT 24 |
5251802412 ps |
T714 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.180999680 |
|
|
Mar 24 01:16:28 PM PDT 24 |
Mar 24 01:16:30 PM PDT 24 |
2834792445 ps |
T715 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.4236569603 |
|
|
Mar 24 01:15:18 PM PDT 24 |
Mar 24 01:16:58 PM PDT 24 |
84689374202 ps |
T206 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2189379614 |
|
|
Mar 24 01:14:49 PM PDT 24 |
Mar 24 01:20:27 PM PDT 24 |
1151160415140 ps |
T716 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2755540017 |
|
|
Mar 24 01:16:03 PM PDT 24 |
Mar 24 01:16:08 PM PDT 24 |
2618570008 ps |
T717 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3141697556 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:18:18 PM PDT 24 |
253635647290 ps |
T718 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.1114304186 |
|
|
Mar 24 01:16:18 PM PDT 24 |
Mar 24 01:16:25 PM PDT 24 |
2458825413 ps |
T719 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.3262805893 |
|
|
Mar 24 01:15:54 PM PDT 24 |
Mar 24 01:16:50 PM PDT 24 |
22331668670 ps |
T207 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3384403886 |
|
|
Mar 24 01:15:43 PM PDT 24 |
Mar 24 01:16:37 PM PDT 24 |
85843606888 ps |
T720 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.774300090 |
|
|
Mar 24 01:15:17 PM PDT 24 |
Mar 24 01:15:20 PM PDT 24 |
2097657357 ps |
T363 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2880526173 |
|
|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:29:53 PM PDT 24 |
328522320158 ps |
T721 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3114878780 |
|
|
Mar 24 01:16:35 PM PDT 24 |
Mar 24 01:16:36 PM PDT 24 |
2064755874 ps |
T249 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2808907450 |
|
|
Mar 24 01:16:30 PM PDT 24 |
Mar 24 01:18:35 PM PDT 24 |
93744508619 ps |
T722 |
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1209135080 |
|
|
Mar 24 01:16:33 PM PDT 24 |
Mar 24 01:17:53 PM PDT 24 |
29081104140 ps |
T723 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.2777704834 |
|
|
Mar 24 01:15:31 PM PDT 24 |
Mar 24 01:15:41 PM PDT 24 |
3772569924 ps |
T724 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.826364284 |
|
|
Mar 24 01:16:06 PM PDT 24 |
Mar 24 01:16:07 PM PDT 24 |
2182527031 ps |
T725 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1539909492 |
|
|
Mar 24 01:16:31 PM PDT 24 |
Mar 24 01:18:43 PM PDT 24 |
50074989593 ps |
T726 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2814982200 |
|
|
Mar 24 01:15:07 PM PDT 24 |
Mar 24 01:15:09 PM PDT 24 |
3743768106 ps |
T383 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.950753338 |
|
|
Mar 24 01:16:41 PM PDT 24 |
Mar 24 01:19:02 PM PDT 24 |
57518481656 ps |
T727 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3913366079 |
|
|
Mar 24 01:16:05 PM PDT 24 |
Mar 24 01:16:18 PM PDT 24 |
26864273416 ps |
T367 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.4158150160 |
|
|
Mar 24 01:15:04 PM PDT 24 |
Mar 24 01:16:02 PM PDT 24 |
85507374174 ps |
T728 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2896937246 |
|
|
Mar 24 01:15:06 PM PDT 24 |
Mar 24 01:15:08 PM PDT 24 |
2488508236 ps |
T729 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1845467144 |
|
|
Mar 24 01:15:29 PM PDT 24 |
Mar 24 01:15:31 PM PDT 24 |
3704963846 ps |
T730 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.861231101 |
|
|
Mar 24 01:15:57 PM PDT 24 |
Mar 24 01:16:36 PM PDT 24 |
62760705098 ps |
T731 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.945239332 |
|
|
Mar 24 01:15:25 PM PDT 24 |
Mar 24 01:15:28 PM PDT 24 |
2033987995 ps |
T732 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1793485521 |
|
|
Mar 24 01:16:04 PM PDT 24 |
Mar 24 01:16:11 PM PDT 24 |
2180972169 ps |
T733 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2359909705 |
|
|
Mar 24 01:16:38 PM PDT 24 |
Mar 24 01:16:45 PM PDT 24 |
8622469468 ps |
T734 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2891416188 |
|
|
Mar 24 01:15:30 PM PDT 24 |
Mar 24 01:15:34 PM PDT 24 |
2516877187 ps |
T735 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.4233983877 |
|
|
Mar 24 01:15:37 PM PDT 24 |
Mar 24 01:19:13 PM PDT 24 |
160614078635 ps |
T736 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1898990145 |
|
|
Mar 24 01:15:00 PM PDT 24 |
Mar 24 01:15:03 PM PDT 24 |
2018029743 ps |
T737 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1542096655 |
|
|
Mar 24 01:16:39 PM PDT 24 |
Mar 24 01:19:34 PM PDT 24 |
76785285325 ps |
T738 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.3497582299 |
|
|
Mar 24 01:16:27 PM PDT 24 |
Mar 24 01:22:35 PM PDT 24 |
148604551342 ps |
T739 |
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3508669519 |
|
|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:45 PM PDT 24 |
2138394823 ps |
T388 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.581942873 |
|
|
Mar 24 01:16:08 PM PDT 24 |
Mar 24 01:16:52 PM PDT 24 |
869080571439 ps |
T343 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.280060616 |
|
|
Mar 24 01:16:34 PM PDT 24 |
Mar 24 01:18:02 PM PDT 24 |
131559578928 ps |
T740 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.829188724 |
|
|
Mar 24 01:15:00 PM PDT 24 |
Mar 24 01:15:04 PM PDT 24 |
3540651740 ps |
T741 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.315798008 |
|
|
Mar 24 01:15:10 PM PDT 24 |
Mar 24 01:15:17 PM PDT 24 |
2507685041 ps |
T742 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.332476975 |
|
|
Mar 24 01:15:44 PM PDT 24 |
Mar 24 01:15:50 PM PDT 24 |
2010903543 ps |
T743 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.3734333608 |
|
|
Mar 24 01:15:19 PM PDT 24 |
Mar 24 01:15:51 PM PDT 24 |
105183603196 ps |
T744 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1381440526 |
|
|
Mar 24 01:15:10 PM PDT 24 |
Mar 24 01:15:15 PM PDT 24 |
2516888291 ps |
T745 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.4142774488 |
|
|
Mar 24 01:15:17 PM PDT 24 |
Mar 24 01:15:23 PM PDT 24 |
2516147291 ps |
T746 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.643168412 |
|
|
Mar 24 01:16:27 PM PDT 24 |
Mar 24 01:16:30 PM PDT 24 |
2525860967 ps |
T747 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.68412564 |
|
|
Mar 24 01:16:30 PM PDT 24 |
Mar 24 01:16:56 PM PDT 24 |
37354556128 ps |
T748 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2738861537 |
|
|
Mar 24 01:15:40 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
2457577544 ps |
T749 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1907153326 |
|
|
Mar 24 01:15:57 PM PDT 24 |
Mar 24 01:16:03 PM PDT 24 |
2147591272 ps |
T750 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.644297642 |
|
|
Mar 24 01:15:25 PM PDT 24 |
Mar 24 01:15:35 PM PDT 24 |
3948930455 ps |
T751 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.4012355934 |
|
|
Mar 24 01:15:20 PM PDT 24 |
Mar 24 01:15:22 PM PDT 24 |
2125157400 ps |
T752 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.2858252077 |
|
|
Mar 24 01:15:12 PM PDT 24 |
Mar 24 01:15:14 PM PDT 24 |
2474324434 ps |
T387 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1259500639 |
|
|
Mar 24 01:16:36 PM PDT 24 |
Mar 24 01:17:47 PM PDT 24 |
116653425809 ps |
T753 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.466154353 |
|
|
Mar 24 01:15:39 PM PDT 24 |
Mar 24 01:16:40 PM PDT 24 |
92472259176 ps |
T754 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.580631517 |
|
|
Mar 24 01:15:46 PM PDT 24 |
Mar 24 01:15:49 PM PDT 24 |
3209872647 ps |
T755 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.2243195290 |
|
|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
2557108579 ps |
T756 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.3252708889 |
|
|
Mar 24 01:15:11 PM PDT 24 |
Mar 24 01:15:43 PM PDT 24 |
47023010738 ps |
T272 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.3316508049 |
|
|
Mar 24 01:14:45 PM PDT 24 |
Mar 24 01:15:40 PM PDT 24 |
22009461094 ps |
T757 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2776659939 |
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|
Mar 24 01:16:23 PM PDT 24 |
Mar 24 01:17:29 PM PDT 24 |
143062329519 ps |
T758 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2247641434 |
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|
Mar 24 01:15:14 PM PDT 24 |
Mar 24 01:15:17 PM PDT 24 |
2127863007 ps |
T759 |
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.414914211 |
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|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:48 PM PDT 24 |
2608983555 ps |
T760 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.2651708422 |
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|
Mar 24 01:16:03 PM PDT 24 |
Mar 24 01:16:05 PM PDT 24 |
2542801189 ps |
T761 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3013787459 |
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|
Mar 24 01:16:19 PM PDT 24 |
Mar 24 01:21:03 PM PDT 24 |
144929380420 ps |
T762 |
/workspace/coverage/default/17.sysrst_ctrl_smoke.1799472209 |
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|
Mar 24 01:15:27 PM PDT 24 |
Mar 24 01:15:33 PM PDT 24 |
2113636998 ps |
T763 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.1309452197 |
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|
Mar 24 01:15:00 PM PDT 24 |
Mar 24 01:25:33 PM PDT 24 |
233182853838 ps |
T764 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.964678310 |
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|
Mar 24 01:15:08 PM PDT 24 |
Mar 24 01:16:06 PM PDT 24 |
91557919580 ps |
T765 |
/workspace/coverage/default/46.sysrst_ctrl_smoke.4146395882 |
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|
Mar 24 01:16:30 PM PDT 24 |
Mar 24 01:16:36 PM PDT 24 |
2110115773 ps |
T766 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.774099357 |
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|
Mar 24 01:14:53 PM PDT 24 |
Mar 24 01:14:57 PM PDT 24 |
2075845328 ps |
T767 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.4050387938 |
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|
Mar 24 01:15:25 PM PDT 24 |
Mar 24 01:16:59 PM PDT 24 |
36978073647 ps |
T768 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1999712237 |
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|
Mar 24 01:15:00 PM PDT 24 |
Mar 24 01:15:02 PM PDT 24 |
2649499171 ps |
T769 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.729663614 |
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|
Mar 24 01:16:19 PM PDT 24 |
Mar 24 01:16:33 PM PDT 24 |
5157683817 ps |
T770 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.3994798471 |
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|
Mar 24 01:15:24 PM PDT 24 |
Mar 24 01:15:28 PM PDT 24 |
3251562884 ps |
T771 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2968917484 |
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|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:15:48 PM PDT 24 |
2750412588 ps |
T772 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.556725669 |
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|
Mar 24 01:15:46 PM PDT 24 |
Mar 24 01:23:19 PM PDT 24 |
1840972792261 ps |
T773 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3261764674 |
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|
Mar 24 01:15:30 PM PDT 24 |
Mar 24 01:16:04 PM PDT 24 |
11814904059 ps |
T774 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2674967775 |
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|
Mar 24 01:15:12 PM PDT 24 |
Mar 24 01:15:14 PM PDT 24 |
2480840079 ps |
T775 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.754679516 |
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|
Mar 24 01:15:45 PM PDT 24 |
Mar 24 01:15:49 PM PDT 24 |
2115008416 ps |
T776 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.661681469 |
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|
Mar 24 01:15:28 PM PDT 24 |
Mar 24 01:15:30 PM PDT 24 |
2651660022 ps |
T777 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.184638275 |
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|
Mar 24 01:16:26 PM PDT 24 |
Mar 24 01:16:28 PM PDT 24 |
3540039870 ps |
T778 |
/workspace/coverage/default/47.sysrst_ctrl_smoke.2521502634 |
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|
Mar 24 01:16:34 PM PDT 24 |
Mar 24 01:16:40 PM PDT 24 |
2110201276 ps |
T348 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.495765025 |
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|
Mar 24 01:15:29 PM PDT 24 |
Mar 24 01:17:43 PM PDT 24 |
103165833938 ps |
T779 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3515483277 |
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|
Mar 24 01:14:52 PM PDT 24 |
Mar 24 01:14:54 PM PDT 24 |
2560169199 ps |
T780 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3321672640 |
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|
Mar 24 01:15:24 PM PDT 24 |
Mar 24 01:15:38 PM PDT 24 |
4918424014 ps |
T781 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.59016573 |
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|
Mar 24 01:15:53 PM PDT 24 |
Mar 24 01:16:09 PM PDT 24 |
5930987053 ps |
T782 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.1635461783 |
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|
Mar 24 01:15:42 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
2477703164 ps |
T783 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.90330379 |
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Mar 24 01:15:07 PM PDT 24 |
Mar 24 01:15:49 PM PDT 24 |
77459288135 ps |
T784 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.4030001876 |
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|
Mar 24 01:15:41 PM PDT 24 |
Mar 24 01:15:44 PM PDT 24 |
2122937481 ps |
T18 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_same_csr_outstanding.1026084999 |
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|
Mar 24 12:42:43 PM PDT 24 |
Mar 24 12:42:53 PM PDT 24 |
5221012671 ps |
T259 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3864325736 |
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Mar 24 12:43:05 PM PDT 24 |
Mar 24 12:43:09 PM PDT 24 |
2528860119 ps |
T785 |
/workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.3550021853 |
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Mar 24 12:43:01 PM PDT 24 |
Mar 24 12:43:07 PM PDT 24 |
2015037650 ps |
T786 |
/workspace/coverage/cover_reg_top/39.sysrst_ctrl_intr_test.3717480100 |
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Mar 24 12:42:51 PM PDT 24 |
Mar 24 12:42:55 PM PDT 24 |
2016530190 ps |