T610 |
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3723654815 |
|
|
Mar 26 02:44:00 PM PDT 24 |
Mar 26 02:46:08 PM PDT 24 |
50560165301 ps |
T611 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.366329023 |
|
|
Mar 26 02:42:27 PM PDT 24 |
Mar 26 02:42:30 PM PDT 24 |
2021957416 ps |
T612 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.564065538 |
|
|
Mar 26 02:41:18 PM PDT 24 |
Mar 26 02:41:20 PM PDT 24 |
2740070139 ps |
T613 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.854671372 |
|
|
Mar 26 02:43:38 PM PDT 24 |
Mar 26 02:43:41 PM PDT 24 |
2632872305 ps |
T614 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2535921721 |
|
|
Mar 26 02:42:38 PM PDT 24 |
Mar 26 03:33:21 PM PDT 24 |
1123432560184 ps |
T382 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.1447364936 |
|
|
Mar 26 02:42:16 PM PDT 24 |
Mar 26 02:42:28 PM PDT 24 |
8942597140 ps |
T615 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.1602590950 |
|
|
Mar 26 02:42:57 PM PDT 24 |
Mar 26 02:43:01 PM PDT 24 |
2120040514 ps |
T616 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.53204603 |
|
|
Mar 26 02:43:07 PM PDT 24 |
Mar 26 02:43:14 PM PDT 24 |
2164802326 ps |
T617 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.145334159 |
|
|
Mar 26 02:42:23 PM PDT 24 |
Mar 26 02:42:25 PM PDT 24 |
2123613104 ps |
T194 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.2639883140 |
|
|
Mar 26 02:43:43 PM PDT 24 |
Mar 26 02:43:53 PM PDT 24 |
5330849745 ps |
T618 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.2909900062 |
|
|
Mar 26 02:42:37 PM PDT 24 |
Mar 26 02:43:13 PM PDT 24 |
122226072253 ps |
T619 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1733182950 |
|
|
Mar 26 02:43:08 PM PDT 24 |
Mar 26 02:43:10 PM PDT 24 |
2540430601 ps |
T620 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.1493633197 |
|
|
Mar 26 02:42:46 PM PDT 24 |
Mar 26 02:42:48 PM PDT 24 |
2063113338 ps |
T621 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.2700022277 |
|
|
Mar 26 02:42:09 PM PDT 24 |
Mar 26 02:42:15 PM PDT 24 |
2116169634 ps |
T357 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1327032440 |
|
|
Mar 26 02:43:51 PM PDT 24 |
Mar 26 02:48:41 PM PDT 24 |
115505237680 ps |
T622 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2476502071 |
|
|
Mar 26 02:41:44 PM PDT 24 |
Mar 26 02:44:11 PM PDT 24 |
110932686605 ps |
T623 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3290093465 |
|
|
Mar 26 02:42:37 PM PDT 24 |
Mar 26 02:42:45 PM PDT 24 |
2508767953 ps |
T624 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1238763861 |
|
|
Mar 26 02:41:48 PM PDT 24 |
Mar 26 02:44:00 PM PDT 24 |
48655455194 ps |
T625 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.2549563139 |
|
|
Mar 26 02:42:29 PM PDT 24 |
Mar 26 02:42:34 PM PDT 24 |
2015712249 ps |
T626 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4154169954 |
|
|
Mar 26 02:43:09 PM PDT 24 |
Mar 26 02:43:14 PM PDT 24 |
2616771756 ps |
T627 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1997220472 |
|
|
Mar 26 02:41:42 PM PDT 24 |
Mar 26 02:41:45 PM PDT 24 |
2496122180 ps |
T628 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3292647173 |
|
|
Mar 26 02:41:17 PM PDT 24 |
Mar 26 02:41:20 PM PDT 24 |
2627733160 ps |
T629 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.415368713 |
|
|
Mar 26 02:41:52 PM PDT 24 |
Mar 26 02:41:59 PM PDT 24 |
3368683405 ps |
T630 |
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2665797777 |
|
|
Mar 26 02:42:45 PM PDT 24 |
Mar 26 02:42:53 PM PDT 24 |
7465636159 ps |
T631 |
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.1392316285 |
|
|
Mar 26 02:42:19 PM PDT 24 |
Mar 26 02:42:26 PM PDT 24 |
2112744400 ps |
T632 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2280110978 |
|
|
Mar 26 02:41:55 PM PDT 24 |
Mar 26 02:42:05 PM PDT 24 |
3316663915 ps |
T139 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1672350081 |
|
|
Mar 26 02:43:22 PM PDT 24 |
Mar 26 02:43:24 PM PDT 24 |
9081276550 ps |
T633 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.1609522545 |
|
|
Mar 26 02:43:11 PM PDT 24 |
Mar 26 02:43:12 PM PDT 24 |
2187779706 ps |
T634 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1732435709 |
|
|
Mar 26 02:41:49 PM PDT 24 |
Mar 26 02:41:55 PM PDT 24 |
2196929998 ps |
T635 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.714219648 |
|
|
Mar 26 02:41:48 PM PDT 24 |
Mar 26 02:47:17 PM PDT 24 |
121411425330 ps |
T636 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3271614822 |
|
|
Mar 26 02:42:10 PM PDT 24 |
Mar 26 02:42:18 PM PDT 24 |
2512999708 ps |
T637 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.4222053219 |
|
|
Mar 26 02:41:47 PM PDT 24 |
Mar 26 02:41:49 PM PDT 24 |
2525587117 ps |
T362 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.4172534658 |
|
|
Mar 26 02:42:33 PM PDT 24 |
Mar 26 02:44:01 PM PDT 24 |
51883262817 ps |
T638 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1641302356 |
|
|
Mar 26 02:43:11 PM PDT 24 |
Mar 26 02:44:00 PM PDT 24 |
18734505119 ps |
T639 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2798408801 |
|
|
Mar 26 02:42:46 PM PDT 24 |
Mar 26 02:42:48 PM PDT 24 |
2191451240 ps |
T640 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2587596409 |
|
|
Mar 26 02:43:21 PM PDT 24 |
Mar 26 02:43:23 PM PDT 24 |
2635033358 ps |
T641 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.4293346956 |
|
|
Mar 26 02:41:31 PM PDT 24 |
Mar 26 02:41:37 PM PDT 24 |
2011026677 ps |
T642 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1082780556 |
|
|
Mar 26 02:43:10 PM PDT 24 |
Mar 26 02:43:17 PM PDT 24 |
2050365978 ps |
T103 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2493751217 |
|
|
Mar 26 02:42:40 PM PDT 24 |
Mar 26 02:44:35 PM PDT 24 |
510384632540 ps |
T643 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.1246279336 |
|
|
Mar 26 02:42:12 PM PDT 24 |
Mar 26 02:42:19 PM PDT 24 |
2109415803 ps |
T644 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3123240541 |
|
|
Mar 26 02:41:42 PM PDT 24 |
Mar 26 02:43:24 PM PDT 24 |
39190228185 ps |
T104 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.4144502464 |
|
|
Mar 26 02:42:59 PM PDT 24 |
Mar 26 02:49:37 PM PDT 24 |
153780530388 ps |
T645 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.551644990 |
|
|
Mar 26 02:41:30 PM PDT 24 |
Mar 26 02:41:34 PM PDT 24 |
8047034372 ps |
T646 |
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.4190710143 |
|
|
Mar 26 02:41:31 PM PDT 24 |
Mar 26 02:41:34 PM PDT 24 |
2240683170 ps |
T647 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3080133118 |
|
|
Mar 26 02:41:50 PM PDT 24 |
Mar 26 02:42:33 PM PDT 24 |
62396732022 ps |
T648 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3555179418 |
|
|
Mar 26 02:41:19 PM PDT 24 |
Mar 26 02:41:30 PM PDT 24 |
3691196165 ps |
T649 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.1363625129 |
|
|
Mar 26 02:42:26 PM PDT 24 |
Mar 26 02:42:31 PM PDT 24 |
2014745975 ps |
T305 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.1842347845 |
|
|
Mar 26 02:41:20 PM PDT 24 |
Mar 26 02:41:36 PM PDT 24 |
22088967517 ps |
T279 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.369934458 |
|
|
Mar 26 02:41:18 PM PDT 24 |
Mar 26 02:43:47 PM PDT 24 |
57844295303 ps |
T650 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.4006460050 |
|
|
Mar 26 02:43:36 PM PDT 24 |
Mar 26 02:44:53 PM PDT 24 |
32874655219 ps |
T651 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.665063920 |
|
|
Mar 26 02:41:43 PM PDT 24 |
Mar 26 02:41:49 PM PDT 24 |
2048354599 ps |
T652 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3751672252 |
|
|
Mar 26 02:43:09 PM PDT 24 |
Mar 26 02:43:14 PM PDT 24 |
2015204235 ps |
T653 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1847739634 |
|
|
Mar 26 02:43:07 PM PDT 24 |
Mar 26 02:43:10 PM PDT 24 |
7600532398 ps |
T654 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.563770404 |
|
|
Mar 26 02:41:33 PM PDT 24 |
Mar 26 02:41:40 PM PDT 24 |
2511296193 ps |
T655 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3330467186 |
|
|
Mar 26 02:41:45 PM PDT 24 |
Mar 26 02:42:50 PM PDT 24 |
105806510356 ps |
T656 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.185558117 |
|
|
Mar 26 02:43:09 PM PDT 24 |
Mar 26 02:43:14 PM PDT 24 |
3284286210 ps |
T657 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.268458123 |
|
|
Mar 26 02:41:13 PM PDT 24 |
Mar 26 02:41:16 PM PDT 24 |
2357623431 ps |
T380 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.4286870908 |
|
|
Mar 26 02:43:59 PM PDT 24 |
Mar 26 02:45:15 PM PDT 24 |
96421957000 ps |
T658 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.4244688833 |
|
|
Mar 26 02:42:28 PM PDT 24 |
Mar 26 02:42:33 PM PDT 24 |
2943731217 ps |
T659 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1387652512 |
|
|
Mar 26 02:43:34 PM PDT 24 |
Mar 26 02:45:25 PM PDT 24 |
83456148203 ps |
T83 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3738733993 |
|
|
Mar 26 02:41:17 PM PDT 24 |
Mar 26 02:41:39 PM PDT 24 |
38472451437 ps |
T660 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.900671477 |
|
|
Mar 26 02:42:57 PM PDT 24 |
Mar 26 02:44:35 PM PDT 24 |
104913583586 ps |
T661 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2289031075 |
|
|
Mar 26 02:41:55 PM PDT 24 |
Mar 26 02:41:58 PM PDT 24 |
2122780629 ps |
T662 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3417172172 |
|
|
Mar 26 02:41:53 PM PDT 24 |
Mar 26 02:42:00 PM PDT 24 |
7245609269 ps |
T663 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1693834329 |
|
|
Mar 26 02:41:56 PM PDT 24 |
Mar 26 02:42:04 PM PDT 24 |
2608612387 ps |
T664 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.442154434 |
|
|
Mar 26 02:41:18 PM PDT 24 |
Mar 26 02:42:07 PM PDT 24 |
75544137638 ps |
T665 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.2330336750 |
|
|
Mar 26 02:42:24 PM PDT 24 |
Mar 26 02:42:34 PM PDT 24 |
15394206615 ps |
T666 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.43413535 |
|
|
Mar 26 02:41:45 PM PDT 24 |
Mar 26 02:41:47 PM PDT 24 |
2628211073 ps |
T351 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1957030363 |
|
|
Mar 26 02:41:08 PM PDT 24 |
Mar 26 02:41:27 PM PDT 24 |
108523177926 ps |
T667 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3527053845 |
|
|
Mar 26 02:43:50 PM PDT 24 |
Mar 26 02:45:51 PM PDT 24 |
47192284012 ps |
T668 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1613323448 |
|
|
Mar 26 02:43:08 PM PDT 24 |
Mar 26 02:43:22 PM PDT 24 |
21299015339 ps |
T235 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1423985581 |
|
|
Mar 26 02:42:04 PM PDT 24 |
Mar 26 02:43:50 PM PDT 24 |
43194123848 ps |
T379 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2543249796 |
|
|
Mar 26 02:42:07 PM PDT 24 |
Mar 26 02:43:44 PM PDT 24 |
36622921534 ps |
T669 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3041653392 |
|
|
Mar 26 02:43:11 PM PDT 24 |
Mar 26 02:43:21 PM PDT 24 |
3396127375 ps |
T670 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.3021562774 |
|
|
Mar 26 02:42:21 PM PDT 24 |
Mar 26 02:42:23 PM PDT 24 |
2270748022 ps |
T168 |
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.751460053 |
|
|
Mar 26 02:42:29 PM PDT 24 |
Mar 26 02:42:30 PM PDT 24 |
3655408798 ps |
T671 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.4264042392 |
|
|
Mar 26 02:42:19 PM PDT 24 |
Mar 26 02:42:23 PM PDT 24 |
2514273177 ps |
T245 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.3355185249 |
|
|
Mar 26 02:42:30 PM PDT 24 |
Mar 26 02:42:31 PM PDT 24 |
3525600910 ps |
T346 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3834047548 |
|
|
Mar 26 02:41:34 PM PDT 24 |
Mar 26 02:45:08 PM PDT 24 |
163658314299 ps |
T672 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.4280904946 |
|
|
Mar 26 02:42:36 PM PDT 24 |
Mar 26 02:43:51 PM PDT 24 |
119748494249 ps |
T673 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.4278898875 |
|
|
Mar 26 02:42:02 PM PDT 24 |
Mar 26 02:42:06 PM PDT 24 |
2050166075 ps |
T259 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3579899040 |
|
|
Mar 26 02:44:01 PM PDT 24 |
Mar 26 02:44:51 PM PDT 24 |
40091430022 ps |
T105 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.3647174236 |
|
|
Mar 26 02:42:16 PM PDT 24 |
Mar 26 02:42:45 PM PDT 24 |
135036107116 ps |
T674 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.3773223262 |
|
|
Mar 26 02:42:41 PM PDT 24 |
Mar 26 02:42:45 PM PDT 24 |
2015088600 ps |
T358 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.4050833483 |
|
|
Mar 26 02:41:43 PM PDT 24 |
Mar 26 02:45:19 PM PDT 24 |
90435176936 ps |
T675 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.792709985 |
|
|
Mar 26 02:43:37 PM PDT 24 |
Mar 26 02:43:45 PM PDT 24 |
3079304185 ps |
T676 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.905277351 |
|
|
Mar 26 02:42:30 PM PDT 24 |
Mar 26 02:42:33 PM PDT 24 |
2479923774 ps |
T155 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1708003679 |
|
|
Mar 26 02:41:51 PM PDT 24 |
Mar 26 02:42:18 PM PDT 24 |
40383564004 ps |
T345 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1231126340 |
|
|
Mar 26 02:43:11 PM PDT 24 |
Mar 26 02:45:24 PM PDT 24 |
99336742580 ps |
T215 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.1521604746 |
|
|
Mar 26 02:42:45 PM PDT 24 |
Mar 26 02:42:49 PM PDT 24 |
2786537640 ps |
T677 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all.403283196 |
|
|
Mar 26 02:42:45 PM PDT 24 |
Mar 26 02:43:07 PM PDT 24 |
8412195762 ps |
T678 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.4119613731 |
|
|
Mar 26 02:42:10 PM PDT 24 |
Mar 26 02:42:18 PM PDT 24 |
2511637995 ps |
T84 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1338054743 |
|
|
Mar 26 02:41:58 PM PDT 24 |
Mar 26 02:43:03 PM PDT 24 |
50921048807 ps |
T377 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.132508715 |
|
|
Mar 26 02:41:59 PM PDT 24 |
Mar 26 02:42:38 PM PDT 24 |
57834368378 ps |
T679 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1707808263 |
|
|
Mar 26 02:42:15 PM PDT 24 |
Mar 26 02:42:22 PM PDT 24 |
2439398695 ps |
T680 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3888965820 |
|
|
Mar 26 02:41:42 PM PDT 24 |
Mar 26 02:41:47 PM PDT 24 |
5090418031 ps |
T366 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1564720906 |
|
|
Mar 26 02:42:54 PM PDT 24 |
Mar 26 02:44:45 PM PDT 24 |
116025802833 ps |
T681 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1402088923 |
|
|
Mar 26 02:43:25 PM PDT 24 |
Mar 26 02:43:29 PM PDT 24 |
2217503388 ps |
T337 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1465174017 |
|
|
Mar 26 02:42:55 PM PDT 24 |
Mar 26 02:43:50 PM PDT 24 |
43941704698 ps |
T682 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3856755629 |
|
|
Mar 26 02:42:55 PM PDT 24 |
Mar 26 02:43:06 PM PDT 24 |
3593064906 ps |
T352 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1109797949 |
|
|
Mar 26 02:43:34 PM PDT 24 |
Mar 26 02:46:58 PM PDT 24 |
148193733544 ps |
T683 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.3300509910 |
|
|
Mar 26 02:41:07 PM PDT 24 |
Mar 26 02:41:09 PM PDT 24 |
2126228922 ps |
T684 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1005609039 |
|
|
Mar 26 02:43:49 PM PDT 24 |
Mar 26 02:43:55 PM PDT 24 |
2128349110 ps |
T219 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2295777803 |
|
|
Mar 26 02:42:38 PM PDT 24 |
Mar 26 02:42:51 PM PDT 24 |
5722466271 ps |
T685 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3172739829 |
|
|
Mar 26 02:43:08 PM PDT 24 |
Mar 26 02:43:14 PM PDT 24 |
3275463118 ps |
T686 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1725880287 |
|
|
Mar 26 02:42:37 PM PDT 24 |
Mar 26 02:42:39 PM PDT 24 |
2554833976 ps |
T687 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2666764905 |
|
|
Mar 26 02:43:22 PM PDT 24 |
Mar 26 02:43:23 PM PDT 24 |
2112276424 ps |
T688 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2141073948 |
|
|
Mar 26 02:44:00 PM PDT 24 |
Mar 26 02:46:08 PM PDT 24 |
50536778891 ps |
T689 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1322710256 |
|
|
Mar 26 02:41:14 PM PDT 24 |
Mar 26 02:41:21 PM PDT 24 |
2414683525 ps |
T690 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.1930187018 |
|
|
Mar 26 02:42:26 PM PDT 24 |
Mar 26 02:42:43 PM PDT 24 |
13663379736 ps |
T691 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.4235525007 |
|
|
Mar 26 02:42:49 PM PDT 24 |
Mar 26 02:42:56 PM PDT 24 |
2555233949 ps |
T692 |
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.4279707237 |
|
|
Mar 26 02:41:48 PM PDT 24 |
Mar 26 02:41:53 PM PDT 24 |
7987824953 ps |
T693 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2326207795 |
|
|
Mar 26 02:43:58 PM PDT 24 |
Mar 26 02:45:47 PM PDT 24 |
172870537998 ps |
T694 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3244079398 |
|
|
Mar 26 02:42:37 PM PDT 24 |
Mar 26 02:42:44 PM PDT 24 |
2890036626 ps |
T695 |
/workspace/coverage/default/39.sysrst_ctrl_smoke.2649179977 |
|
|
Mar 26 02:42:55 PM PDT 24 |
Mar 26 02:42:57 PM PDT 24 |
2138960635 ps |
T696 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.1626698550 |
|
|
Mar 26 02:41:49 PM PDT 24 |
Mar 26 02:41:52 PM PDT 24 |
2019367830 ps |
T106 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.4051896616 |
|
|
Mar 26 02:41:56 PM PDT 24 |
Mar 26 02:43:56 PM PDT 24 |
159959787200 ps |
T697 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.4156616573 |
|
|
Mar 26 02:41:54 PM PDT 24 |
Mar 26 02:42:00 PM PDT 24 |
4508976761 ps |
T698 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.1784422829 |
|
|
Mar 26 02:41:56 PM PDT 24 |
Mar 26 02:42:05 PM PDT 24 |
3237109718 ps |
T699 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1802490250 |
|
|
Mar 26 02:41:44 PM PDT 24 |
Mar 26 02:41:49 PM PDT 24 |
2516388123 ps |
T700 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3413205276 |
|
|
Mar 26 02:41:44 PM PDT 24 |
Mar 26 02:41:52 PM PDT 24 |
6585162541 ps |
T701 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1522887151 |
|
|
Mar 26 02:41:19 PM PDT 24 |
Mar 26 02:41:22 PM PDT 24 |
2991007644 ps |
T702 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1522867539 |
|
|
Mar 26 02:41:32 PM PDT 24 |
Mar 26 02:41:43 PM PDT 24 |
27608801404 ps |
T703 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.2051489575 |
|
|
Mar 26 02:42:58 PM PDT 24 |
Mar 26 02:43:02 PM PDT 24 |
2528728560 ps |
T704 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.909611157 |
|
|
Mar 26 02:41:34 PM PDT 24 |
Mar 26 02:43:14 PM PDT 24 |
170248228817 ps |
T705 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1458409346 |
|
|
Mar 26 02:41:41 PM PDT 24 |
Mar 26 02:44:04 PM PDT 24 |
106635210983 ps |
T706 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1681150172 |
|
|
Mar 26 02:41:31 PM PDT 24 |
Mar 26 02:41:38 PM PDT 24 |
2647364781 ps |
T216 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.1667026588 |
|
|
Mar 26 02:42:40 PM PDT 24 |
Mar 26 02:43:12 PM PDT 24 |
13325172577 ps |
T707 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.240765423 |
|
|
Mar 26 02:42:09 PM PDT 24 |
Mar 26 02:42:16 PM PDT 24 |
2462542421 ps |
T708 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.3373287012 |
|
|
Mar 26 02:41:32 PM PDT 24 |
Mar 26 02:41:34 PM PDT 24 |
2123298648 ps |
T709 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.1647433239 |
|
|
Mar 26 02:42:40 PM PDT 24 |
Mar 26 02:42:44 PM PDT 24 |
2613448103 ps |
T710 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.498085659 |
|
|
Mar 26 02:43:07 PM PDT 24 |
Mar 26 02:43:10 PM PDT 24 |
2524032209 ps |
T711 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1873996786 |
|
|
Mar 26 02:44:07 PM PDT 24 |
Mar 26 02:44:37 PM PDT 24 |
57772087755 ps |
T712 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.2816166938 |
|
|
Mar 26 02:41:19 PM PDT 24 |
Mar 26 02:41:23 PM PDT 24 |
2018933158 ps |
T713 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3350563121 |
|
|
Mar 26 02:42:57 PM PDT 24 |
Mar 26 02:44:20 PM PDT 24 |
29581687371 ps |
T714 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.859999873 |
|
|
Mar 26 02:41:42 PM PDT 24 |
Mar 26 02:41:46 PM PDT 24 |
9112749755 ps |
T89 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3686084859 |
|
|
Mar 26 02:44:00 PM PDT 24 |
Mar 26 02:48:04 PM PDT 24 |
97316931468 ps |
T715 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.2889440009 |
|
|
Mar 26 02:41:41 PM PDT 24 |
Mar 26 02:41:48 PM PDT 24 |
2113889226 ps |
T258 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2066984463 |
|
|
Mar 26 02:41:18 PM PDT 24 |
Mar 26 02:44:47 PM PDT 24 |
81461272783 ps |
T224 |
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2088182826 |
|
|
Mar 26 02:43:21 PM PDT 24 |
Mar 26 02:43:24 PM PDT 24 |
3303376221 ps |
T716 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.876840380 |
|
|
Mar 26 02:42:37 PM PDT 24 |
Mar 26 02:42:44 PM PDT 24 |
2113534497 ps |
T717 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3939576532 |
|
|
Mar 26 02:42:39 PM PDT 24 |
Mar 26 02:42:42 PM PDT 24 |
2214996072 ps |
T718 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2586368620 |
|
|
Mar 26 02:42:03 PM PDT 24 |
Mar 26 02:45:17 PM PDT 24 |
2853297290865 ps |
T719 |
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3156629846 |
|
|
Mar 26 02:43:39 PM PDT 24 |
Mar 26 02:43:44 PM PDT 24 |
2214740353 ps |
T720 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.1881277848 |
|
|
Mar 26 02:43:41 PM PDT 24 |
Mar 26 02:43:47 PM PDT 24 |
2111734337 ps |
T721 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.3930215236 |
|
|
Mar 26 02:42:28 PM PDT 24 |
Mar 26 02:43:07 PM PDT 24 |
16826653795 ps |
T107 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2208780329 |
|
|
Mar 26 02:41:41 PM PDT 24 |
Mar 26 02:45:01 PM PDT 24 |
80328448883 ps |
T722 |
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2840493236 |
|
|
Mar 26 02:42:29 PM PDT 24 |
Mar 26 02:42:32 PM PDT 24 |
2492065094 ps |
T353 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3263560554 |
|
|
Mar 26 02:41:46 PM PDT 24 |
Mar 26 02:42:07 PM PDT 24 |
126821811428 ps |
T723 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.22847276 |
|
|
Mar 26 02:41:20 PM PDT 24 |
Mar 26 02:41:25 PM PDT 24 |
2617028812 ps |
T193 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3687557354 |
|
|
Mar 26 02:41:59 PM PDT 24 |
Mar 26 02:42:03 PM PDT 24 |
2422043124 ps |
T286 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.1289354773 |
|
|
Mar 26 02:41:48 PM PDT 24 |
Mar 26 02:45:35 PM PDT 24 |
83689174339 ps |
T50 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3135870688 |
|
|
Mar 26 02:41:25 PM PDT 24 |
Mar 26 02:41:52 PM PDT 24 |
39716019426 ps |
T246 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.2530544104 |
|
|
Mar 26 02:41:55 PM PDT 24 |
Mar 26 02:41:57 PM PDT 24 |
2893763708 ps |
T280 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.1229949419 |
|
|
Mar 26 02:41:25 PM PDT 24 |
Mar 26 02:41:56 PM PDT 24 |
43032895813 ps |
T724 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.1109690296 |
|
|
Mar 26 02:42:36 PM PDT 24 |
Mar 26 02:42:39 PM PDT 24 |
8984827107 ps |
T725 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.4196844404 |
|
|
Mar 26 02:42:20 PM PDT 24 |
Mar 26 02:42:46 PM PDT 24 |
18948710756 ps |
T140 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2788272004 |
|
|
Mar 26 02:42:18 PM PDT 24 |
Mar 26 02:44:27 PM PDT 24 |
219902610211 ps |
T726 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2370208957 |
|
|
Mar 26 02:43:25 PM PDT 24 |
Mar 26 02:43:30 PM PDT 24 |
3325662053 ps |
T727 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.197889336 |
|
|
Mar 26 02:42:55 PM PDT 24 |
Mar 26 02:42:57 PM PDT 24 |
2493744319 ps |
T728 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2789143651 |
|
|
Mar 26 02:43:37 PM PDT 24 |
Mar 26 02:43:38 PM PDT 24 |
2049044787 ps |
T729 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.100458326 |
|
|
Mar 26 02:41:08 PM PDT 24 |
Mar 26 02:43:25 PM PDT 24 |
53787160227 ps |
T730 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.118715884 |
|
|
Mar 26 02:41:47 PM PDT 24 |
Mar 26 02:41:53 PM PDT 24 |
2014849465 ps |
T359 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3705811662 |
|
|
Mar 26 02:43:22 PM PDT 24 |
Mar 26 02:43:44 PM PDT 24 |
85776138100 ps |
T731 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.503506066 |
|
|
Mar 26 02:41:33 PM PDT 24 |
Mar 26 02:41:35 PM PDT 24 |
2526895526 ps |
T732 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.1683236137 |
|
|
Mar 26 02:41:21 PM PDT 24 |
Mar 26 02:41:23 PM PDT 24 |
2121723116 ps |
T217 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.1087424718 |
|
|
Mar 26 02:42:41 PM PDT 24 |
Mar 26 02:42:47 PM PDT 24 |
4101959917 ps |
T733 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3182697571 |
|
|
Mar 26 02:44:07 PM PDT 24 |
Mar 26 02:44:56 PM PDT 24 |
74492972235 ps |
T734 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.536150225 |
|
|
Mar 26 02:41:49 PM PDT 24 |
Mar 26 02:41:56 PM PDT 24 |
9156789699 ps |
T735 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.2483364016 |
|
|
Mar 26 02:41:49 PM PDT 24 |
Mar 26 02:41:51 PM PDT 24 |
2149215227 ps |
T736 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.346833781 |
|
|
Mar 26 02:41:47 PM PDT 24 |
Mar 26 02:42:56 PM PDT 24 |
26080731826 ps |
T737 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.82033628 |
|
|
Mar 26 02:43:21 PM PDT 24 |
Mar 26 02:43:31 PM PDT 24 |
14220946712 ps |
T738 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1297118150 |
|
|
Mar 26 02:43:43 PM PDT 24 |
Mar 26 02:44:22 PM PDT 24 |
16798579627 ps |
T739 |
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.56368437 |
|
|
Mar 26 02:42:00 PM PDT 24 |
Mar 26 02:42:08 PM PDT 24 |
2613679308 ps |
T740 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.3103154279 |
|
|
Mar 26 02:42:58 PM PDT 24 |
Mar 26 02:45:40 PM PDT 24 |
124434077536 ps |
T741 |
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2986042279 |
|
|
Mar 26 02:41:47 PM PDT 24 |
Mar 26 02:41:49 PM PDT 24 |
11719870731 ps |
T742 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.4076647518 |
|
|
Mar 26 02:42:25 PM PDT 24 |
Mar 26 02:42:28 PM PDT 24 |
3885925202 ps |
T218 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.391912389 |
|
|
Mar 26 02:41:42 PM PDT 24 |
Mar 26 02:41:44 PM PDT 24 |
3324717765 ps |
T743 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.441243617 |
|
|
Mar 26 02:41:17 PM PDT 24 |
Mar 26 02:41:24 PM PDT 24 |
2106907995 ps |
T744 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.1341934045 |
|
|
Mar 26 02:41:25 PM PDT 24 |
Mar 26 02:41:28 PM PDT 24 |
2036680452 ps |
T745 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2770805988 |
|
|
Mar 26 02:43:10 PM PDT 24 |
Mar 26 02:43:20 PM PDT 24 |
12187552702 ps |
T746 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.2696125657 |
|
|
Mar 26 02:41:19 PM PDT 24 |
Mar 26 02:41:25 PM PDT 24 |
2011669624 ps |
T747 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.657803428 |
|
|
Mar 26 02:42:37 PM PDT 24 |
Mar 26 02:42:40 PM PDT 24 |
2172724986 ps |
T748 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.552725850 |
|
|
Mar 26 02:41:18 PM PDT 24 |
Mar 26 02:41:27 PM PDT 24 |
3974177606 ps |
T749 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2304883529 |
|
|
Mar 26 02:42:06 PM PDT 24 |
Mar 26 02:43:00 PM PDT 24 |
82873668014 ps |
T750 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1915028611 |
|
|
Mar 26 02:43:57 PM PDT 24 |
Mar 26 02:45:07 PM PDT 24 |
26083589711 ps |
T751 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.1720823503 |
|
|
Mar 26 02:41:43 PM PDT 24 |
Mar 26 02:42:10 PM PDT 24 |
78607228663 ps |
T752 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.4040670674 |
|
|
Mar 26 02:43:25 PM PDT 24 |
Mar 26 02:48:04 PM PDT 24 |
108937084219 ps |
T354 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3897538209 |
|
|
Mar 26 02:43:58 PM PDT 24 |
Mar 26 02:45:21 PM PDT 24 |
121035021511 ps |
T141 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.77113111 |
|
|
Mar 26 02:43:35 PM PDT 24 |
Mar 26 02:43:44 PM PDT 24 |
10287894249 ps |
T753 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.3959696656 |
|
|
Mar 26 02:41:48 PM PDT 24 |
Mar 26 02:41:49 PM PDT 24 |
2228420435 ps |
T754 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.124688349 |
|
|
Mar 26 02:42:21 PM PDT 24 |
Mar 26 02:42:23 PM PDT 24 |
2034866394 ps |
T281 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.2833476741 |
|
|
Mar 26 02:42:38 PM PDT 24 |
Mar 26 02:43:50 PM PDT 24 |
109282179618 ps |
T755 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.4023894111 |
|
|
Mar 26 02:41:50 PM PDT 24 |
Mar 26 02:41:56 PM PDT 24 |
2176092188 ps |
T756 |
/workspace/coverage/default/36.sysrst_ctrl_alert_test.2789441685 |
|
|
Mar 26 02:42:43 PM PDT 24 |
Mar 26 02:42:46 PM PDT 24 |
2035933408 ps |
T757 |
/workspace/coverage/default/40.sysrst_ctrl_alert_test.3714145123 |
|
|
Mar 26 02:42:55 PM PDT 24 |
Mar 26 02:42:58 PM PDT 24 |
2018603003 ps |
T758 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3509293555 |
|
|
Mar 26 02:41:52 PM PDT 24 |
Mar 26 02:42:00 PM PDT 24 |
2512941067 ps |
T213 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.4290288785 |
|
|
Mar 26 02:42:00 PM PDT 24 |
Mar 26 02:46:24 PM PDT 24 |
1418682214882 ps |
T250 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2424746599 |
|
|
Mar 26 02:43:46 PM PDT 24 |
Mar 26 02:44:50 PM PDT 24 |
61605344728 ps |
T251 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1825239868 |
|
|
Mar 26 02:41:31 PM PDT 24 |
Mar 26 02:41:38 PM PDT 24 |
2512365169 ps |
T252 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.3456087305 |
|
|
Mar 26 02:42:36 PM PDT 24 |
Mar 26 02:42:47 PM PDT 24 |
3442858362 ps |
T253 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.2918302926 |
|
|
Mar 26 02:42:51 PM PDT 24 |
Mar 26 02:42:54 PM PDT 24 |
10337069392 ps |
T254 |
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.3259627962 |
|
|
Mar 26 02:41:22 PM PDT 24 |
Mar 26 02:41:31 PM PDT 24 |
3037070950 ps |
T255 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.3855861867 |
|
|
Mar 26 02:42:00 PM PDT 24 |
Mar 26 02:42:07 PM PDT 24 |
2612899008 ps |
T256 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.1012846179 |
|
|
Mar 26 02:42:15 PM PDT 24 |
Mar 26 02:42:17 PM PDT 24 |
2049130199 ps |
T257 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3216151243 |
|
|
Mar 26 02:43:57 PM PDT 24 |
Mar 26 02:44:33 PM PDT 24 |
50339943874 ps |
T214 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.4160789173 |
|
|
Mar 26 02:41:48 PM PDT 24 |
Mar 26 02:41:58 PM PDT 24 |
3476186154 ps |
T759 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.103180400 |
|
|
Mar 26 02:41:58 PM PDT 24 |
Mar 26 02:42:01 PM PDT 24 |
3670434737 ps |
T760 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1145480234 |
|
|
Mar 26 02:43:07 PM PDT 24 |
Mar 26 02:43:10 PM PDT 24 |
2493632965 ps |
T761 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2400781220 |
|
|
Mar 26 02:41:22 PM PDT 24 |
Mar 26 02:41:24 PM PDT 24 |
3584255013 ps |
T762 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1116700198 |
|
|
Mar 26 02:42:24 PM PDT 24 |
Mar 26 02:42:26 PM PDT 24 |
2532251160 ps |
T763 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.3559073913 |
|
|
Mar 26 02:42:46 PM PDT 24 |
Mar 26 02:42:56 PM PDT 24 |
3825045691 ps |
T764 |
/workspace/coverage/default/15.sysrst_ctrl_alert_test.2167222047 |
|
|
Mar 26 02:41:57 PM PDT 24 |
Mar 26 02:41:58 PM PDT 24 |
2112173770 ps |
T765 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3335340966 |
|
|
Mar 26 02:41:19 PM PDT 24 |
Mar 26 02:41:30 PM PDT 24 |
7246548225 ps |
T766 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.2740879226 |
|
|
Mar 26 02:42:30 PM PDT 24 |
Mar 26 02:42:38 PM PDT 24 |
2850918619 ps |
T319 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1747381874 |
|
|
Mar 26 02:41:56 PM PDT 24 |
Mar 26 02:42:31 PM PDT 24 |
28995596128 ps |
T767 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.568311859 |
|
|
Mar 26 02:43:58 PM PDT 24 |
Mar 26 02:45:35 PM PDT 24 |
97828361507 ps |
T768 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.332679489 |
|
|
Mar 26 02:41:25 PM PDT 24 |
Mar 26 02:41:28 PM PDT 24 |
2250103879 ps |
T769 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1741906168 |
|
|
Mar 26 02:42:00 PM PDT 24 |
Mar 26 02:42:08 PM PDT 24 |
5775683116 ps |
T770 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1279670555 |
|
|
Mar 26 02:42:34 PM PDT 24 |
Mar 26 02:42:37 PM PDT 24 |
2492687479 ps |
T771 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2055823276 |
|
|
Mar 26 02:43:59 PM PDT 24 |
Mar 26 02:45:39 PM PDT 24 |
36765142019 ps |
T306 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.736542889 |
|
|
Mar 26 02:41:22 PM PDT 24 |
Mar 26 02:43:15 PM PDT 24 |
42011728320 ps |
T772 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.748726340 |
|
|
Mar 26 02:41:42 PM PDT 24 |
Mar 26 02:44:25 PM PDT 24 |
140818205733 ps |
T773 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.2329746905 |
|
|
Mar 26 02:41:48 PM PDT 24 |
Mar 26 02:41:51 PM PDT 24 |
3539214051 ps |
T142 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.1032745436 |
|
|
Mar 26 02:41:19 PM PDT 24 |
Mar 26 02:41:25 PM PDT 24 |
5016851294 ps |
T774 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.1661262025 |
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|
Mar 26 02:41:47 PM PDT 24 |
Mar 26 02:41:50 PM PDT 24 |
2018115042 ps |
T775 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1030874911 |
|
|
Mar 26 02:41:50 PM PDT 24 |
Mar 26 02:41:54 PM PDT 24 |
2058534208 ps |
T776 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.2338026467 |
|
|
Mar 26 02:42:34 PM PDT 24 |
Mar 26 02:42:36 PM PDT 24 |
2057138526 ps |
T777 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2533370179 |
|
|
Mar 26 02:41:24 PM PDT 24 |
Mar 26 02:41:34 PM PDT 24 |
3427107989 ps |
T778 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.898860065 |
|
|
Mar 26 02:41:51 PM PDT 24 |
Mar 26 02:41:59 PM PDT 24 |
2610367171 ps |
T779 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2907660386 |
|
|
Mar 26 02:43:41 PM PDT 24 |
Mar 26 02:43:43 PM PDT 24 |
2225343281 ps |
T780 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3418771961 |
|
|
Mar 26 02:42:40 PM PDT 24 |
Mar 26 02:42:44 PM PDT 24 |
2477799430 ps |
T376 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2978118649 |
|
|
Mar 26 02:43:40 PM PDT 24 |
Mar 26 02:45:36 PM PDT 24 |
47846122115 ps |
T781 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2371524365 |
|
|
Mar 26 02:41:21 PM PDT 24 |
Mar 26 02:41:24 PM PDT 24 |
2281767503 ps |
T225 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.2292762352 |
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|
Mar 26 02:42:06 PM PDT 24 |
Mar 26 02:42:15 PM PDT 24 |
3335515651 ps |
T782 |
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.1978488839 |
|
|
Mar 26 02:42:50 PM PDT 24 |
Mar 26 02:42:53 PM PDT 24 |
2465466382 ps |
T783 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3068182559 |
|
|
Mar 26 02:41:43 PM PDT 24 |
Mar 26 02:43:14 PM PDT 24 |
71602727273 ps |
T784 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2960713112 |
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|
Mar 26 02:41:16 PM PDT 24 |
Mar 26 02:41:23 PM PDT 24 |
3025788614 ps |
T785 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2238130928 |
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|
Mar 26 02:41:47 PM PDT 24 |
Mar 26 02:42:33 PM PDT 24 |
17322193910 ps |
T143 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1339264511 |
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|
Mar 26 02:41:14 PM PDT 24 |
Mar 26 02:41:30 PM PDT 24 |
507571133117 ps |
T786 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.1068432414 |
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|
Mar 26 02:41:19 PM PDT 24 |
Mar 26 02:41:22 PM PDT 24 |
2091721417 ps |
T135 |
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1569682393 |
|
|
Mar 26 02:42:45 PM PDT 24 |
Mar 26 02:42:53 PM PDT 24 |
5863211444 ps |
T787 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.1628412790 |
|
|
Mar 26 02:42:29 PM PDT 24 |
Mar 26 02:42:31 PM PDT 24 |
2636637106 ps |
T144 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3136720035 |
|
|
Mar 26 02:41:43 PM PDT 24 |
Mar 26 02:44:36 PM PDT 24 |
68318372656 ps |
T788 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2771868493 |
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|
Mar 26 02:43:47 PM PDT 24 |
Mar 26 02:43:51 PM PDT 24 |
2337820760 ps |
T789 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1595508766 |
|
|
Mar 26 02:43:35 PM PDT 24 |
Mar 26 02:43:45 PM PDT 24 |
3808140925 ps |
T790 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.367890471 |
|
|
Mar 26 02:42:26 PM PDT 24 |
Mar 26 02:43:21 PM PDT 24 |
84923085917 ps |
T791 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.121732332 |
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|
Mar 26 02:41:33 PM PDT 24 |
Mar 26 02:50:16 PM PDT 24 |
194153884391 ps |
T792 |
/workspace/coverage/default/42.sysrst_ctrl_smoke.839867078 |
|
|
Mar 26 02:43:10 PM PDT 24 |
Mar 26 02:43:17 PM PDT 24 |
2112429196 ps |
T793 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.1824983545 |
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|
Mar 26 02:42:01 PM PDT 24 |
Mar 26 02:42:03 PM PDT 24 |
2127067448 ps |