| T364 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.1773337742 |
|
|
Mar 31 01:20:01 PM PDT 24 |
Mar 31 01:20:41 PM PDT 24 |
59655776733 ps |
| T150 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3713677128 |
|
|
Mar 31 01:19:41 PM PDT 24 |
Mar 31 01:22:18 PM PDT 24 |
170737000879 ps |
| T195 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2213704782 |
|
|
Mar 31 01:19:09 PM PDT 24 |
Mar 31 01:19:10 PM PDT 24 |
2711024666 ps |
| T196 |
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.254612843 |
|
|
Mar 31 01:19:35 PM PDT 24 |
Mar 31 01:19:44 PM PDT 24 |
2462905857 ps |
| T197 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2764984250 |
|
|
Mar 31 01:21:40 PM PDT 24 |
Mar 31 01:24:20 PM PDT 24 |
58916428147 ps |
| T77 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.43770775 |
|
|
Mar 31 01:20:16 PM PDT 24 |
Mar 31 01:20:18 PM PDT 24 |
4018876085 ps |
| T126 |
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.210591291 |
|
|
Mar 31 01:20:50 PM PDT 24 |
Mar 31 01:20:53 PM PDT 24 |
2253872812 ps |
| T127 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.853818284 |
|
|
Mar 31 01:20:30 PM PDT 24 |
Mar 31 01:22:27 PM PDT 24 |
103956714990 ps |
| T128 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1882857443 |
|
|
Mar 31 01:21:47 PM PDT 24 |
Mar 31 01:23:46 PM PDT 24 |
43869850808 ps |
| T123 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.33726640 |
|
|
Mar 31 01:19:14 PM PDT 24 |
Mar 31 01:19:42 PM PDT 24 |
653258987353 ps |
| T129 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2680404710 |
|
|
Mar 31 01:21:25 PM PDT 24 |
Mar 31 01:21:30 PM PDT 24 |
3128127706 ps |
| T130 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.1626556723 |
|
|
Mar 31 01:20:11 PM PDT 24 |
Mar 31 01:20:12 PM PDT 24 |
3111579217 ps |
| T131 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1450942411 |
|
|
Mar 31 01:19:39 PM PDT 24 |
Mar 31 01:19:42 PM PDT 24 |
2531304752 ps |
| T132 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1684109698 |
|
|
Mar 31 01:21:30 PM PDT 24 |
Mar 31 01:21:34 PM PDT 24 |
2613993535 ps |
| T133 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1593425391 |
|
|
Mar 31 01:19:46 PM PDT 24 |
Mar 31 01:19:48 PM PDT 24 |
12044255572 ps |
| T475 |
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1840054445 |
|
|
Mar 31 01:20:11 PM PDT 24 |
Mar 31 01:20:12 PM PDT 24 |
2684015639 ps |
| T476 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.48715323 |
|
|
Mar 31 01:20:51 PM PDT 24 |
Mar 31 01:20:57 PM PDT 24 |
2011231520 ps |
| T91 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.850796606 |
|
|
Mar 31 01:19:40 PM PDT 24 |
Mar 31 01:20:22 PM PDT 24 |
74066532821 ps |
| T477 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3543490740 |
|
|
Mar 31 01:21:42 PM PDT 24 |
Mar 31 01:21:48 PM PDT 24 |
2012900393 ps |
| T478 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.3050143322 |
|
|
Mar 31 01:20:49 PM PDT 24 |
Mar 31 01:20:59 PM PDT 24 |
3333148275 ps |
| T350 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2722240749 |
|
|
Mar 31 01:21:16 PM PDT 24 |
Mar 31 01:27:35 PM PDT 24 |
144043667708 ps |
| T479 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2559787510 |
|
|
Mar 31 01:19:54 PM PDT 24 |
Mar 31 01:19:58 PM PDT 24 |
2477251146 ps |
| T374 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2321991079 |
|
|
Mar 31 01:19:14 PM PDT 24 |
Mar 31 01:20:04 PM PDT 24 |
81050674378 ps |
| T480 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3732737697 |
|
|
Mar 31 01:19:40 PM PDT 24 |
Mar 31 01:19:46 PM PDT 24 |
2640976434 ps |
| T279 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.3107895815 |
|
|
Mar 31 01:19:22 PM PDT 24 |
Mar 31 01:22:41 PM PDT 24 |
75462654362 ps |
| T137 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1482838490 |
|
|
Mar 31 01:21:03 PM PDT 24 |
Mar 31 01:21:43 PM PDT 24 |
62102540451 ps |
| T212 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1687391842 |
|
|
Mar 31 01:21:08 PM PDT 24 |
Mar 31 01:21:16 PM PDT 24 |
2466221051 ps |
| T213 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2874962101 |
|
|
Mar 31 01:21:41 PM PDT 24 |
Mar 31 01:23:39 PM PDT 24 |
88033094778 ps |
| T214 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.1287281 |
|
|
Mar 31 01:20:55 PM PDT 24 |
Mar 31 01:21:03 PM PDT 24 |
2511589140 ps |
| T215 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2391324180 |
|
|
Mar 31 01:20:29 PM PDT 24 |
Mar 31 01:20:33 PM PDT 24 |
453183700991 ps |
| T216 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3596202370 |
|
|
Mar 31 01:19:40 PM PDT 24 |
Mar 31 01:19:45 PM PDT 24 |
6852450338 ps |
| T181 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.971784637 |
|
|
Mar 31 01:21:16 PM PDT 24 |
Mar 31 01:21:21 PM PDT 24 |
3199293690 ps |
| T217 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3030596769 |
|
|
Mar 31 01:21:28 PM PDT 24 |
Mar 31 01:22:20 PM PDT 24 |
19750397992 ps |
| T218 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2542523192 |
|
|
Mar 31 01:21:40 PM PDT 24 |
Mar 31 01:24:57 PM PDT 24 |
74336392468 ps |
| T219 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3517745781 |
|
|
Mar 31 01:21:43 PM PDT 24 |
Mar 31 01:21:50 PM PDT 24 |
2513737213 ps |
| T92 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1220901529 |
|
|
Mar 31 01:19:33 PM PDT 24 |
Mar 31 01:25:42 PM PDT 24 |
128012561632 ps |
| T170 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.466782433 |
|
|
Mar 31 01:20:27 PM PDT 24 |
Mar 31 01:20:47 PM PDT 24 |
9730670745 ps |
| T326 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.3260745589 |
|
|
Mar 31 01:21:09 PM PDT 24 |
Mar 31 01:21:12 PM PDT 24 |
2120529850 ps |
| T82 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.1090957062 |
|
|
Mar 31 01:20:49 PM PDT 24 |
Mar 31 01:24:58 PM PDT 24 |
92434025109 ps |
| T327 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2685907459 |
|
|
Mar 31 01:19:45 PM PDT 24 |
Mar 31 01:23:09 PM PDT 24 |
76424125796 ps |
| T328 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3361377935 |
|
|
Mar 31 01:21:46 PM PDT 24 |
Mar 31 01:26:16 PM PDT 24 |
98907981392 ps |
| T329 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2595987871 |
|
|
Mar 31 01:21:36 PM PDT 24 |
Mar 31 01:21:38 PM PDT 24 |
2525546354 ps |
| T481 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.3168845880 |
|
|
Mar 31 01:20:16 PM PDT 24 |
Mar 31 01:20:21 PM PDT 24 |
2449162307 ps |
| T482 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect.3194184440 |
|
|
Mar 31 01:20:18 PM PDT 24 |
Mar 31 01:20:44 PM PDT 24 |
71573853694 ps |
| T255 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1923639826 |
|
|
Mar 31 01:21:00 PM PDT 24 |
Mar 31 01:21:56 PM PDT 24 |
20333020656 ps |
| T483 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.4033263091 |
|
|
Mar 31 01:21:25 PM PDT 24 |
Mar 31 01:21:33 PM PDT 24 |
2610162881 ps |
| T371 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3867779806 |
|
|
Mar 31 01:21:48 PM PDT 24 |
Mar 31 01:28:47 PM PDT 24 |
165212702337 ps |
| T484 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.259669442 |
|
|
Mar 31 01:20:55 PM PDT 24 |
Mar 31 01:21:03 PM PDT 24 |
2485784864 ps |
| T264 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.2428934032 |
|
|
Mar 31 01:20:08 PM PDT 24 |
Mar 31 01:23:23 PM PDT 24 |
157461632577 ps |
| T376 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.163435358 |
|
|
Mar 31 01:21:52 PM PDT 24 |
Mar 31 01:22:46 PM PDT 24 |
91027638689 ps |
| T78 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3347611372 |
|
|
Mar 31 01:21:26 PM PDT 24 |
Mar 31 01:21:27 PM PDT 24 |
9103099111 ps |
| T394 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1967040658 |
|
|
Mar 31 01:21:49 PM PDT 24 |
Mar 31 01:25:11 PM PDT 24 |
76274680538 ps |
| T485 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.4089674394 |
|
|
Mar 31 01:20:40 PM PDT 24 |
Mar 31 01:20:43 PM PDT 24 |
2528919426 ps |
| T83 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.4032986293 |
|
|
Mar 31 01:19:38 PM PDT 24 |
Mar 31 01:21:26 PM PDT 24 |
45936459756 ps |
| T486 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.3711888375 |
|
|
Mar 31 01:21:25 PM PDT 24 |
Mar 31 01:21:27 PM PDT 24 |
2130124529 ps |
| T487 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.2729818011 |
|
|
Mar 31 01:19:56 PM PDT 24 |
Mar 31 01:19:59 PM PDT 24 |
2531768111 ps |
| T57 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.4272959927 |
|
|
Mar 31 01:19:09 PM PDT 24 |
Mar 31 01:20:45 PM PDT 24 |
37687490538 ps |
| T488 |
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3998405600 |
|
|
Mar 31 01:20:38 PM PDT 24 |
Mar 31 01:20:45 PM PDT 24 |
2466218163 ps |
| T80 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3585736883 |
|
|
Mar 31 01:19:47 PM PDT 24 |
Mar 31 01:19:50 PM PDT 24 |
4706767469 ps |
| T240 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2291520868 |
|
|
Mar 31 01:19:53 PM PDT 24 |
Mar 31 01:20:17 PM PDT 24 |
33596217667 ps |
| T241 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1983389153 |
|
|
Mar 31 01:21:35 PM PDT 24 |
Mar 31 01:21:41 PM PDT 24 |
2011202604 ps |
| T242 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.3107027166 |
|
|
Mar 31 01:20:48 PM PDT 24 |
Mar 31 01:20:51 PM PDT 24 |
2531036455 ps |
| T243 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.3198290418 |
|
|
Mar 31 01:20:54 PM PDT 24 |
Mar 31 01:20:58 PM PDT 24 |
4582259172 ps |
| T244 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.1772646209 |
|
|
Mar 31 01:19:59 PM PDT 24 |
Mar 31 01:20:05 PM PDT 24 |
2112060703 ps |
| T245 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.316101612 |
|
|
Mar 31 01:20:56 PM PDT 24 |
Mar 31 01:21:02 PM PDT 24 |
2016782155 ps |
| T246 |
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.569500179 |
|
|
Mar 31 01:21:09 PM PDT 24 |
Mar 31 01:21:13 PM PDT 24 |
2082743760 ps |
| T134 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.119631202 |
|
|
Mar 31 01:20:27 PM PDT 24 |
Mar 31 01:38:38 PM PDT 24 |
433411073335 ps |
| T247 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2689047796 |
|
|
Mar 31 01:20:14 PM PDT 24 |
Mar 31 01:21:35 PM PDT 24 |
121698149377 ps |
| T489 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.415674006 |
|
|
Mar 31 01:20:54 PM PDT 24 |
Mar 31 01:20:57 PM PDT 24 |
3721564851 ps |
| T151 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3414972190 |
|
|
Mar 31 01:21:20 PM PDT 24 |
Mar 31 01:23:10 PM PDT 24 |
1286513414625 ps |
| T490 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.3631376436 |
|
|
Mar 31 01:20:18 PM PDT 24 |
Mar 31 01:20:56 PM PDT 24 |
15148971995 ps |
| T491 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.2116805437 |
|
|
Mar 31 01:19:23 PM PDT 24 |
Mar 31 01:19:30 PM PDT 24 |
2085127217 ps |
| T492 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.2528813985 |
|
|
Mar 31 01:21:01 PM PDT 24 |
Mar 31 01:21:05 PM PDT 24 |
2698975395 ps |
| T493 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1802524884 |
|
|
Mar 31 01:20:09 PM PDT 24 |
Mar 31 01:22:08 PM PDT 24 |
185386198285 ps |
| T182 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.3766344953 |
|
|
Mar 31 01:19:53 PM PDT 24 |
Mar 31 01:20:04 PM PDT 24 |
4183763662 ps |
| T494 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.2675695254 |
|
|
Mar 31 01:20:41 PM PDT 24 |
Mar 31 01:20:44 PM PDT 24 |
2134067839 ps |
| T93 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2285257288 |
|
|
Mar 31 01:21:34 PM PDT 24 |
Mar 31 01:23:47 PM PDT 24 |
101060126455 ps |
| T495 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all.3367779869 |
|
|
Mar 31 01:19:15 PM PDT 24 |
Mar 31 01:19:34 PM PDT 24 |
7059483580 ps |
| T496 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all.273650642 |
|
|
Mar 31 01:20:29 PM PDT 24 |
Mar 31 01:21:09 PM PDT 24 |
15332735038 ps |
| T497 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3127738457 |
|
|
Mar 31 01:21:03 PM PDT 24 |
Mar 31 01:21:05 PM PDT 24 |
3392465919 ps |
| T498 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.625422848 |
|
|
Mar 31 01:20:01 PM PDT 24 |
Mar 31 01:20:02 PM PDT 24 |
2081964412 ps |
| T369 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.1154671221 |
|
|
Mar 31 01:20:23 PM PDT 24 |
Mar 31 01:21:06 PM PDT 24 |
61770744214 ps |
| T499 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2360167923 |
|
|
Mar 31 01:19:35 PM PDT 24 |
Mar 31 01:19:38 PM PDT 24 |
3426904939 ps |
| T500 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.633753087 |
|
|
Mar 31 01:20:21 PM PDT 24 |
Mar 31 01:20:28 PM PDT 24 |
2115026507 ps |
| T501 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.99595793 |
|
|
Mar 31 01:19:21 PM PDT 24 |
Mar 31 01:19:26 PM PDT 24 |
3133742109 ps |
| T502 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.1357539056 |
|
|
Mar 31 01:19:21 PM PDT 24 |
Mar 31 01:19:32 PM PDT 24 |
3859549927 ps |
| T367 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3686530856 |
|
|
Mar 31 01:21:42 PM PDT 24 |
Mar 31 01:22:43 PM PDT 24 |
86412894454 ps |
| T390 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2536726462 |
|
|
Mar 31 01:21:33 PM PDT 24 |
Mar 31 01:22:55 PM PDT 24 |
67824644283 ps |
| T503 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4029492072 |
|
|
Mar 31 01:21:25 PM PDT 24 |
Mar 31 01:21:32 PM PDT 24 |
2609554137 ps |
| T504 |
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2536992942 |
|
|
Mar 31 01:21:18 PM PDT 24 |
Mar 31 01:21:24 PM PDT 24 |
3553330976 ps |
| T152 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2153574947 |
|
|
Mar 31 01:20:27 PM PDT 24 |
Mar 31 01:22:28 PM PDT 24 |
44959751281 ps |
| T505 |
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.903975680 |
|
|
Mar 31 01:20:47 PM PDT 24 |
Mar 31 01:20:49 PM PDT 24 |
2169109747 ps |
| T122 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1601430234 |
|
|
Mar 31 01:20:08 PM PDT 24 |
Mar 31 01:20:12 PM PDT 24 |
8236545722 ps |
| T506 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2702682674 |
|
|
Mar 31 01:21:37 PM PDT 24 |
Mar 31 01:21:38 PM PDT 24 |
3854831126 ps |
| T352 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.3553212459 |
|
|
Mar 31 01:21:16 PM PDT 24 |
Mar 31 01:26:50 PM PDT 24 |
127187370618 ps |
| T507 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.404637185 |
|
|
Mar 31 01:19:42 PM PDT 24 |
Mar 31 01:19:49 PM PDT 24 |
2589327101 ps |
| T508 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.955535236 |
|
|
Mar 31 01:19:54 PM PDT 24 |
Mar 31 01:19:57 PM PDT 24 |
2028640394 ps |
| T509 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.654675020 |
|
|
Mar 31 01:20:22 PM PDT 24 |
Mar 31 01:20:33 PM PDT 24 |
3690562804 ps |
| T510 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.4008280567 |
|
|
Mar 31 01:21:18 PM PDT 24 |
Mar 31 01:21:20 PM PDT 24 |
2534317035 ps |
| T167 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.1271212240 |
|
|
Mar 31 01:20:26 PM PDT 24 |
Mar 31 01:20:30 PM PDT 24 |
2993204138 ps |
| T511 |
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3249328772 |
|
|
Mar 31 01:20:49 PM PDT 24 |
Mar 31 01:20:53 PM PDT 24 |
2493107863 ps |
| T94 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.807388042 |
|
|
Mar 31 01:21:24 PM PDT 24 |
Mar 31 01:24:19 PM PDT 24 |
71280718930 ps |
| T512 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3626845589 |
|
|
Mar 31 01:21:42 PM PDT 24 |
Mar 31 01:22:16 PM PDT 24 |
24339442844 ps |
| T513 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3004530083 |
|
|
Mar 31 01:21:37 PM PDT 24 |
Mar 31 01:21:42 PM PDT 24 |
2100526588 ps |
| T514 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.134453995 |
|
|
Mar 31 01:19:20 PM PDT 24 |
Mar 31 01:19:24 PM PDT 24 |
2226845078 ps |
| T515 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2063239001 |
|
|
Mar 31 01:21:33 PM PDT 24 |
Mar 31 01:21:34 PM PDT 24 |
2556977302 ps |
| T280 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2722533021 |
|
|
Mar 31 01:19:40 PM PDT 24 |
Mar 31 01:20:49 PM PDT 24 |
109559595444 ps |
| T516 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2602675417 |
|
|
Mar 31 01:19:48 PM PDT 24 |
Mar 31 01:19:50 PM PDT 24 |
3558218029 ps |
| T517 |
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.2090380763 |
|
|
Mar 31 01:21:00 PM PDT 24 |
Mar 31 01:21:01 PM PDT 24 |
2714512380 ps |
| T518 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2010057858 |
|
|
Mar 31 01:19:46 PM PDT 24 |
Mar 31 01:19:53 PM PDT 24 |
2509295255 ps |
| T519 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2905305091 |
|
|
Mar 31 01:21:34 PM PDT 24 |
Mar 31 01:21:36 PM PDT 24 |
2547209780 ps |
| T384 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.2382027997 |
|
|
Mar 31 01:20:36 PM PDT 24 |
Mar 31 01:21:58 PM PDT 24 |
62950800719 ps |
| T520 |
/workspace/coverage/default/14.sysrst_ctrl_alert_test.1066852453 |
|
|
Mar 31 01:20:10 PM PDT 24 |
Mar 31 01:20:12 PM PDT 24 |
2038657176 ps |
| T521 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.1454081362 |
|
|
Mar 31 01:19:40 PM PDT 24 |
Mar 31 01:19:43 PM PDT 24 |
8687157574 ps |
| T168 |
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.1947666864 |
|
|
Mar 31 01:21:01 PM PDT 24 |
Mar 31 01:21:04 PM PDT 24 |
5359941862 ps |
| T522 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.1751290702 |
|
|
Mar 31 01:20:49 PM PDT 24 |
Mar 31 01:20:52 PM PDT 24 |
2023406438 ps |
| T95 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3938343724 |
|
|
Mar 31 01:20:46 PM PDT 24 |
Mar 31 01:21:43 PM PDT 24 |
319887662793 ps |
| T523 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.4230460946 |
|
|
Mar 31 01:20:47 PM PDT 24 |
Mar 31 01:21:13 PM PDT 24 |
11726203896 ps |
| T183 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2488884437 |
|
|
Mar 31 01:19:41 PM PDT 24 |
Mar 31 01:19:49 PM PDT 24 |
4293161278 ps |
| T153 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.3649797349 |
|
|
Mar 31 01:20:49 PM PDT 24 |
Mar 31 01:20:53 PM PDT 24 |
4434719046 ps |
| T524 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.788967219 |
|
|
Mar 31 01:19:39 PM PDT 24 |
Mar 31 01:19:42 PM PDT 24 |
2633629513 ps |
| T525 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3073544053 |
|
|
Mar 31 01:19:14 PM PDT 24 |
Mar 31 01:19:17 PM PDT 24 |
2557250802 ps |
| T526 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3378748257 |
|
|
Mar 31 01:20:49 PM PDT 24 |
Mar 31 01:20:52 PM PDT 24 |
2642164399 ps |
| T314 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3987362396 |
|
|
Mar 31 01:20:32 PM PDT 24 |
Mar 31 01:25:35 PM PDT 24 |
864441651808 ps |
| T527 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.775766777 |
|
|
Mar 31 01:21:02 PM PDT 24 |
Mar 31 01:21:08 PM PDT 24 |
2111203043 ps |
| T528 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.307970528 |
|
|
Mar 31 01:21:13 PM PDT 24 |
Mar 31 01:21:22 PM PDT 24 |
2611950664 ps |
| T529 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.151654089 |
|
|
Mar 31 01:20:26 PM PDT 24 |
Mar 31 01:20:33 PM PDT 24 |
2514628478 ps |
| T530 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.167054147 |
|
|
Mar 31 01:21:21 PM PDT 24 |
Mar 31 01:21:29 PM PDT 24 |
2611046105 ps |
| T184 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.2539702348 |
|
|
Mar 31 01:21:33 PM PDT 24 |
Mar 31 01:21:40 PM PDT 24 |
4009573317 ps |
| T370 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2410002804 |
|
|
Mar 31 01:21:23 PM PDT 24 |
Mar 31 01:25:01 PM PDT 24 |
82557616568 ps |
| T124 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1286662342 |
|
|
Mar 31 01:20:39 PM PDT 24 |
Mar 31 01:20:54 PM PDT 24 |
46509266322 ps |
| T531 |
/workspace/coverage/default/17.sysrst_ctrl_smoke.682795290 |
|
|
Mar 31 01:20:15 PM PDT 24 |
Mar 31 01:20:18 PM PDT 24 |
2124620603 ps |
| T532 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1682016151 |
|
|
Mar 31 01:20:28 PM PDT 24 |
Mar 31 01:20:31 PM PDT 24 |
2490168469 ps |
| T533 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.485291160 |
|
|
Mar 31 01:21:16 PM PDT 24 |
Mar 31 01:21:21 PM PDT 24 |
3552111308 ps |
| T534 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.937528288 |
|
|
Mar 31 01:20:31 PM PDT 24 |
Mar 31 01:20:34 PM PDT 24 |
2616865721 ps |
| T535 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.2710882879 |
|
|
Mar 31 01:20:09 PM PDT 24 |
Mar 31 01:20:11 PM PDT 24 |
2537206774 ps |
| T536 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.62293573 |
|
|
Mar 31 01:20:01 PM PDT 24 |
Mar 31 01:20:05 PM PDT 24 |
2114724937 ps |
| T537 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all.1594198756 |
|
|
Mar 31 01:20:10 PM PDT 24 |
Mar 31 01:20:16 PM PDT 24 |
8339870053 ps |
| T538 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3207960548 |
|
|
Mar 31 01:20:38 PM PDT 24 |
Mar 31 01:20:40 PM PDT 24 |
3563776995 ps |
| T539 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2907259444 |
|
|
Mar 31 01:20:01 PM PDT 24 |
Mar 31 01:20:08 PM PDT 24 |
2610525388 ps |
| T540 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.2979524135 |
|
|
Mar 31 01:20:27 PM PDT 24 |
Mar 31 01:20:28 PM PDT 24 |
2065577435 ps |
| T347 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.2024371238 |
|
|
Mar 31 01:20:27 PM PDT 24 |
Mar 31 01:20:49 PM PDT 24 |
93161626088 ps |
| T541 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3202590880 |
|
|
Mar 31 01:21:41 PM PDT 24 |
Mar 31 01:23:04 PM PDT 24 |
31899732799 ps |
| T542 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2576504682 |
|
|
Mar 31 01:20:21 PM PDT 24 |
Mar 31 01:20:25 PM PDT 24 |
2618186073 ps |
| T81 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.3972300197 |
|
|
Mar 31 01:21:09 PM PDT 24 |
Mar 31 01:21:18 PM PDT 24 |
4710086481 ps |
| T141 |
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3262026639 |
|
|
Mar 31 01:21:42 PM PDT 24 |
Mar 31 01:21:45 PM PDT 24 |
2632187028 ps |
| T142 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1041807674 |
|
|
Mar 31 01:21:15 PM PDT 24 |
Mar 31 01:22:36 PM PDT 24 |
33617063765 ps |
| T143 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.132677757 |
|
|
Mar 31 01:19:42 PM PDT 24 |
Mar 31 01:19:46 PM PDT 24 |
6508375586 ps |
| T144 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.3170423280 |
|
|
Mar 31 01:21:13 PM PDT 24 |
Mar 31 01:21:20 PM PDT 24 |
2011637479 ps |
| T145 |
/workspace/coverage/default/17.sysrst_ctrl_alert_test.3713387720 |
|
|
Mar 31 01:20:15 PM PDT 24 |
Mar 31 01:20:18 PM PDT 24 |
2039342886 ps |
| T146 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.622355450 |
|
|
Mar 31 01:19:54 PM PDT 24 |
Mar 31 01:19:57 PM PDT 24 |
3642800088 ps |
| T147 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3949383372 |
|
|
Mar 31 01:20:28 PM PDT 24 |
Mar 31 01:20:41 PM PDT 24 |
4515944334 ps |
| T148 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.752331176 |
|
|
Mar 31 01:19:09 PM PDT 24 |
Mar 31 01:19:12 PM PDT 24 |
3696140764 ps |
| T149 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3634775575 |
|
|
Mar 31 01:21:23 PM PDT 24 |
Mar 31 01:21:26 PM PDT 24 |
2487221335 ps |
| T543 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1692181288 |
|
|
Mar 31 01:19:41 PM PDT 24 |
Mar 31 01:19:43 PM PDT 24 |
2086356735 ps |
| T544 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2145237459 |
|
|
Mar 31 01:21:42 PM PDT 24 |
Mar 31 01:21:45 PM PDT 24 |
3114038941 ps |
| T323 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2796841037 |
|
|
Mar 31 01:20:11 PM PDT 24 |
Mar 31 01:21:42 PM PDT 24 |
35622316943 ps |
| T545 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.4196858154 |
|
|
Mar 31 01:21:16 PM PDT 24 |
Mar 31 01:21:20 PM PDT 24 |
2123187690 ps |
| T354 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.109234845 |
|
|
Mar 31 01:21:43 PM PDT 24 |
Mar 31 01:22:15 PM PDT 24 |
47746978082 ps |
| T96 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2167474304 |
|
|
Mar 31 01:20:38 PM PDT 24 |
Mar 31 01:20:40 PM PDT 24 |
2966332608 ps |
| T97 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3885300282 |
|
|
Mar 31 01:21:38 PM PDT 24 |
Mar 31 01:22:06 PM PDT 24 |
40319619475 ps |
| T125 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3477561428 |
|
|
Mar 31 01:21:27 PM PDT 24 |
Mar 31 01:21:35 PM PDT 24 |
5398273101 ps |
| T546 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2378628722 |
|
|
Mar 31 01:19:43 PM PDT 24 |
Mar 31 01:19:50 PM PDT 24 |
2467867470 ps |
| T547 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.1691080489 |
|
|
Mar 31 01:20:12 PM PDT 24 |
Mar 31 01:21:02 PM PDT 24 |
76801394302 ps |
| T169 |
/workspace/coverage/default/25.sysrst_ctrl_edge_detect.3337522957 |
|
|
Mar 31 01:20:42 PM PDT 24 |
Mar 31 01:20:46 PM PDT 24 |
6089194603 ps |
| T548 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.239537840 |
|
|
Mar 31 01:21:21 PM PDT 24 |
Mar 31 01:21:49 PM PDT 24 |
9762524713 ps |
| T549 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.553298922 |
|
|
Mar 31 01:20:41 PM PDT 24 |
Mar 31 01:20:44 PM PDT 24 |
2465961426 ps |
| T550 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2580422608 |
|
|
Mar 31 01:20:35 PM PDT 24 |
Mar 31 01:20:37 PM PDT 24 |
2627550616 ps |
| T551 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.828000557 |
|
|
Mar 31 01:21:22 PM PDT 24 |
Mar 31 01:21:25 PM PDT 24 |
2039141304 ps |
| T552 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.3578982462 |
|
|
Mar 31 01:21:20 PM PDT 24 |
Mar 31 01:21:26 PM PDT 24 |
2110310526 ps |
| T553 |
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3287005297 |
|
|
Mar 31 01:21:26 PM PDT 24 |
Mar 31 01:21:28 PM PDT 24 |
2048974333 ps |
| T554 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.3979059202 |
|
|
Mar 31 01:19:08 PM PDT 24 |
Mar 31 01:19:16 PM PDT 24 |
2511665872 ps |
| T555 |
/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.105196207 |
|
|
Mar 31 01:20:33 PM PDT 24 |
Mar 31 01:20:44 PM PDT 24 |
12625478333 ps |
| T556 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2062367340 |
|
|
Mar 31 01:21:43 PM PDT 24 |
Mar 31 01:21:50 PM PDT 24 |
2450091760 ps |
| T557 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2183071647 |
|
|
Mar 31 01:20:37 PM PDT 24 |
Mar 31 01:20:54 PM PDT 24 |
25112702167 ps |
| T558 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.4207751915 |
|
|
Mar 31 01:21:35 PM PDT 24 |
Mar 31 01:21:41 PM PDT 24 |
2110612602 ps |
| T559 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.2931205956 |
|
|
Mar 31 01:20:14 PM PDT 24 |
Mar 31 01:20:17 PM PDT 24 |
3432160682 ps |
| T560 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.3562976288 |
|
|
Mar 31 01:20:01 PM PDT 24 |
Mar 31 01:20:05 PM PDT 24 |
4628335468 ps |
| T561 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.4027462237 |
|
|
Mar 31 01:19:09 PM PDT 24 |
Mar 31 01:19:13 PM PDT 24 |
2075539729 ps |
| T562 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1635258483 |
|
|
Mar 31 01:20:54 PM PDT 24 |
Mar 31 01:20:58 PM PDT 24 |
3997384454 ps |
| T563 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.151270269 |
|
|
Mar 31 01:21:18 PM PDT 24 |
Mar 31 01:21:48 PM PDT 24 |
12074739520 ps |
| T357 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.571687613 |
|
|
Mar 31 01:21:49 PM PDT 24 |
Mar 31 01:25:36 PM PDT 24 |
84686902004 ps |
| T356 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.995728413 |
|
|
Mar 31 01:21:48 PM PDT 24 |
Mar 31 01:23:31 PM PDT 24 |
73174922499 ps |
| T564 |
/workspace/coverage/default/43.sysrst_ctrl_smoke.2863432323 |
|
|
Mar 31 01:21:21 PM PDT 24 |
Mar 31 01:21:25 PM PDT 24 |
2114950345 ps |
| T565 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1815073083 |
|
|
Mar 31 01:20:50 PM PDT 24 |
Mar 31 01:20:54 PM PDT 24 |
2468191461 ps |
| T281 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3728004909 |
|
|
Mar 31 01:19:45 PM PDT 24 |
Mar 31 01:23:35 PM PDT 24 |
90799370317 ps |
| T566 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3866962510 |
|
|
Mar 31 01:19:24 PM PDT 24 |
Mar 31 01:19:26 PM PDT 24 |
2273716309 ps |
| T567 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.847942683 |
|
|
Mar 31 01:21:03 PM PDT 24 |
Mar 31 01:21:06 PM PDT 24 |
2152355138 ps |
| T568 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3258389597 |
|
|
Mar 31 01:21:26 PM PDT 24 |
Mar 31 01:21:29 PM PDT 24 |
3506643799 ps |
| T569 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3594993233 |
|
|
Mar 31 01:21:25 PM PDT 24 |
Mar 31 01:21:27 PM PDT 24 |
2474481430 ps |
| T265 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2253409733 |
|
|
Mar 31 01:19:54 PM PDT 24 |
Mar 31 01:22:07 PM PDT 24 |
193545870467 ps |
| T570 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.4286201344 |
|
|
Mar 31 01:21:44 PM PDT 24 |
Mar 31 01:24:10 PM PDT 24 |
55083534036 ps |
| T571 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2332684705 |
|
|
Mar 31 01:21:43 PM PDT 24 |
Mar 31 01:21:48 PM PDT 24 |
5274914674 ps |
| T572 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3503396018 |
|
|
Mar 31 01:19:53 PM PDT 24 |
Mar 31 01:20:01 PM PDT 24 |
2512577371 ps |
| T154 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.441964709 |
|
|
Mar 31 01:20:55 PM PDT 24 |
Mar 31 01:22:24 PM PDT 24 |
72397422149 ps |
| T573 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.4143092552 |
|
|
Mar 31 01:20:55 PM PDT 24 |
Mar 31 01:21:01 PM PDT 24 |
2074626518 ps |
| T574 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1665366674 |
|
|
Mar 31 01:21:35 PM PDT 24 |
Mar 31 01:21:43 PM PDT 24 |
2465455316 ps |
| T345 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.260615235 |
|
|
Mar 31 01:19:28 PM PDT 24 |
Mar 31 01:20:37 PM PDT 24 |
111252385924 ps |
| T575 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3374168800 |
|
|
Mar 31 01:21:33 PM PDT 24 |
Mar 31 01:21:35 PM PDT 24 |
2038210090 ps |
| T576 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.858564187 |
|
|
Mar 31 01:21:43 PM PDT 24 |
Mar 31 01:21:49 PM PDT 24 |
4106685248 ps |
| T577 |
/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2701838632 |
|
|
Mar 31 01:19:24 PM PDT 24 |
Mar 31 01:19:27 PM PDT 24 |
2499863542 ps |
| T578 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2298754960 |
|
|
Mar 31 01:21:35 PM PDT 24 |
Mar 31 01:21:40 PM PDT 24 |
2454773328 ps |
| T579 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.2716348827 |
|
|
Mar 31 01:20:22 PM PDT 24 |
Mar 31 01:20:29 PM PDT 24 |
2449505781 ps |
| T198 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.2171088861 |
|
|
Mar 31 01:20:29 PM PDT 24 |
Mar 31 01:20:32 PM PDT 24 |
5354978601 ps |
| T386 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3785736214 |
|
|
Mar 31 01:20:47 PM PDT 24 |
Mar 31 01:23:26 PM PDT 24 |
58995752683 ps |
| T580 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.4127798235 |
|
|
Mar 31 01:21:03 PM PDT 24 |
Mar 31 01:21:37 PM PDT 24 |
100954395260 ps |
| T581 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.914114918 |
|
|
Mar 31 01:20:14 PM PDT 24 |
Mar 31 01:20:17 PM PDT 24 |
2634812931 ps |
| T582 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.96750658 |
|
|
Mar 31 01:21:21 PM PDT 24 |
Mar 31 01:21:24 PM PDT 24 |
2460048084 ps |
| T583 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all.537722379 |
|
|
Mar 31 01:21:10 PM PDT 24 |
Mar 31 01:21:40 PM PDT 24 |
60086822944 ps |
| T584 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1350601633 |
|
|
Mar 31 01:20:09 PM PDT 24 |
Mar 31 01:20:11 PM PDT 24 |
2085415900 ps |
| T585 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2407173345 |
|
|
Mar 31 01:19:33 PM PDT 24 |
Mar 31 01:19:37 PM PDT 24 |
2515000017 ps |
| T586 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.2757369353 |
|
|
Mar 31 01:20:40 PM PDT 24 |
Mar 31 01:20:42 PM PDT 24 |
2635355597 ps |
| T587 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.2609185191 |
|
|
Mar 31 01:21:08 PM PDT 24 |
Mar 31 01:21:10 PM PDT 24 |
2136672585 ps |
| T388 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3067468435 |
|
|
Mar 31 01:21:43 PM PDT 24 |
Mar 31 01:22:34 PM PDT 24 |
37175359957 ps |
| T588 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1802838334 |
|
|
Mar 31 01:21:47 PM PDT 24 |
Mar 31 01:22:56 PM PDT 24 |
26330570286 ps |
| T589 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all.1136528906 |
|
|
Mar 31 01:20:08 PM PDT 24 |
Mar 31 01:20:19 PM PDT 24 |
8302993210 ps |
| T590 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3349877349 |
|
|
Mar 31 01:20:12 PM PDT 24 |
Mar 31 01:20:14 PM PDT 24 |
2521811278 ps |
| T591 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.360123091 |
|
|
Mar 31 01:19:54 PM PDT 24 |
Mar 31 01:20:34 PM PDT 24 |
14064612491 ps |
| T592 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.1490774507 |
|
|
Mar 31 01:20:40 PM PDT 24 |
Mar 31 01:21:05 PM PDT 24 |
9861562205 ps |
| T593 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2130755911 |
|
|
Mar 31 01:21:22 PM PDT 24 |
Mar 31 01:21:25 PM PDT 24 |
3321878777 ps |
| T594 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.212269560 |
|
|
Mar 31 01:20:28 PM PDT 24 |
Mar 31 01:20:30 PM PDT 24 |
2492770749 ps |
| T595 |
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.2154644052 |
|
|
Mar 31 01:20:13 PM PDT 24 |
Mar 31 01:20:14 PM PDT 24 |
2222592824 ps |
| T596 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.730074835 |
|
|
Mar 31 01:19:10 PM PDT 24 |
Mar 31 01:19:13 PM PDT 24 |
2068822966 ps |
| T200 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.4145719912 |
|
|
Mar 31 01:21:22 PM PDT 24 |
Mar 31 01:21:23 PM PDT 24 |
4045838446 ps |
| T201 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2692418615 |
|
|
Mar 31 01:21:28 PM PDT 24 |
Mar 31 01:21:37 PM PDT 24 |
3657867528 ps |
| T202 |
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3867285856 |
|
|
Mar 31 01:20:20 PM PDT 24 |
Mar 31 01:20:22 PM PDT 24 |
2927588516 ps |
| T203 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2899426902 |
|
|
Mar 31 01:20:35 PM PDT 24 |
Mar 31 01:20:37 PM PDT 24 |
2149931069 ps |
| T204 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.452332302 |
|
|
Mar 31 01:20:30 PM PDT 24 |
Mar 31 01:20:36 PM PDT 24 |
2515737289 ps |
| T205 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.689019398 |
|
|
Mar 31 01:20:22 PM PDT 24 |
Mar 31 01:20:29 PM PDT 24 |
2512623863 ps |
| T206 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3199141772 |
|
|
Mar 31 01:21:34 PM PDT 24 |
Mar 31 01:21:36 PM PDT 24 |
2207981090 ps |
| T207 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.4244355637 |
|
|
Mar 31 01:21:15 PM PDT 24 |
Mar 31 01:21:38 PM PDT 24 |
60325913575 ps |
| T208 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1088089647 |
|
|
Mar 31 01:20:29 PM PDT 24 |
Mar 31 01:20:32 PM PDT 24 |
2521716108 ps |
| T209 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2966482275 |
|
|
Mar 31 01:21:39 PM PDT 24 |
Mar 31 01:21:42 PM PDT 24 |
6876224256 ps |
| T597 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2438866076 |
|
|
Mar 31 01:20:11 PM PDT 24 |
Mar 31 01:20:16 PM PDT 24 |
2454588004 ps |
| T598 |
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.686217885 |
|
|
Mar 31 01:20:36 PM PDT 24 |
Mar 31 01:20:39 PM PDT 24 |
3175988298 ps |
| T599 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.3279508799 |
|
|
Mar 31 01:20:09 PM PDT 24 |
Mar 31 01:20:11 PM PDT 24 |
2144847527 ps |
| T600 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.949033777 |
|
|
Mar 31 01:19:27 PM PDT 24 |
Mar 31 01:19:33 PM PDT 24 |
3321963042 ps |
| T363 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3002826357 |
|
|
Mar 31 01:21:04 PM PDT 24 |
Mar 31 01:22:42 PM PDT 24 |
39550799336 ps |
| T98 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1370584249 |
|
|
Mar 31 01:21:08 PM PDT 24 |
Mar 31 01:24:14 PM PDT 24 |
2193336767577 ps |
| T282 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2023697673 |
|
|
Mar 31 01:21:29 PM PDT 24 |
Mar 31 01:23:47 PM PDT 24 |
101391333173 ps |
| T601 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3233740418 |
|
|
Mar 31 01:21:00 PM PDT 24 |
Mar 31 01:21:08 PM PDT 24 |
2610419574 ps |
| T248 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.4227600172 |
|
|
Mar 31 01:20:27 PM PDT 24 |
Mar 31 01:20:28 PM PDT 24 |
3729731724 ps |
| T602 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2038353616 |
|
|
Mar 31 01:19:39 PM PDT 24 |
Mar 31 01:19:45 PM PDT 24 |
2011097388 ps |
| T603 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2462721711 |
|
|
Mar 31 01:20:41 PM PDT 24 |
Mar 31 01:21:14 PM PDT 24 |
48254310604 ps |
| T604 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2724007007 |
|
|
Mar 31 01:21:23 PM PDT 24 |
Mar 31 01:21:30 PM PDT 24 |
2220218569 ps |
| T155 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.798840830 |
|
|
Mar 31 01:21:36 PM PDT 24 |
Mar 31 01:21:38 PM PDT 24 |
3056530048 ps |
| T159 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.1043370813 |
|
|
Mar 31 01:19:08 PM PDT 24 |
Mar 31 01:19:12 PM PDT 24 |
2114960432 ps |
| T160 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2727363693 |
|
|
Mar 31 01:19:18 PM PDT 24 |
Mar 31 01:21:10 PM PDT 24 |
42008199549 ps |
| T161 |
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.1305263548 |
|
|
Mar 31 01:20:28 PM PDT 24 |
Mar 31 01:20:32 PM PDT 24 |
3566235984 ps |
| T162 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.3880158608 |
|
|
Mar 31 01:20:21 PM PDT 24 |
Mar 31 01:24:51 PM PDT 24 |
192217437416 ps |