T360 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.4072223723 |
|
|
Apr 04 03:00:47 PM PDT 24 |
Apr 04 03:02:17 PM PDT 24 |
120890528292 ps |
T443 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.2823868668 |
|
|
Apr 04 03:01:36 PM PDT 24 |
Apr 04 03:01:42 PM PDT 24 |
2012192699 ps |
T444 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2899495839 |
|
|
Apr 04 03:00:10 PM PDT 24 |
Apr 04 03:00:12 PM PDT 24 |
2907243619 ps |
T445 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.198940462 |
|
|
Apr 04 03:00:34 PM PDT 24 |
Apr 04 03:00:42 PM PDT 24 |
2510979312 ps |
T256 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3278916376 |
|
|
Apr 04 03:00:05 PM PDT 24 |
Apr 04 03:01:31 PM PDT 24 |
146890451388 ps |
T340 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.4056218025 |
|
|
Apr 04 03:02:00 PM PDT 24 |
Apr 04 03:05:54 PM PDT 24 |
89920159088 ps |
T212 |
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2134782467 |
|
|
Apr 04 03:02:00 PM PDT 24 |
Apr 04 03:02:03 PM PDT 24 |
5223476869 ps |
T215 |
/workspace/coverage/default/39.sysrst_ctrl_smoke.2495843094 |
|
|
Apr 04 03:01:49 PM PDT 24 |
Apr 04 03:01:53 PM PDT 24 |
2115555340 ps |
T216 |
/workspace/coverage/default/47.sysrst_ctrl_smoke.734940354 |
|
|
Apr 04 03:02:01 PM PDT 24 |
Apr 04 03:02:06 PM PDT 24 |
2111734185 ps |
T217 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.30834821 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:02:03 PM PDT 24 |
2172478015 ps |
T218 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.227938137 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:38 PM PDT 24 |
2616192033 ps |
T219 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.959931819 |
|
|
Apr 04 02:59:55 PM PDT 24 |
Apr 04 03:00:00 PM PDT 24 |
11425386146 ps |
T220 |
/workspace/coverage/default/14.sysrst_ctrl_alert_test.2639838780 |
|
|
Apr 04 03:00:36 PM PDT 24 |
Apr 04 03:00:42 PM PDT 24 |
2012151302 ps |
T221 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.694475725 |
|
|
Apr 04 03:01:48 PM PDT 24 |
Apr 04 03:01:50 PM PDT 24 |
2543119101 ps |
T222 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all.2116153180 |
|
|
Apr 04 03:00:04 PM PDT 24 |
Apr 04 03:00:21 PM PDT 24 |
6625468461 ps |
T223 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.307705058 |
|
|
Apr 04 03:02:18 PM PDT 24 |
Apr 04 03:02:58 PM PDT 24 |
30092427201 ps |
T446 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3870696574 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:02:08 PM PDT 24 |
2612640780 ps |
T447 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all.369492718 |
|
|
Apr 04 03:01:32 PM PDT 24 |
Apr 04 03:01:40 PM PDT 24 |
12239010127 ps |
T374 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.2837603041 |
|
|
Apr 04 03:01:18 PM PDT 24 |
Apr 04 03:02:29 PM PDT 24 |
109557870491 ps |
T448 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.2726907288 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:02:05 PM PDT 24 |
2134349698 ps |
T370 |
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2863254428 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:03:43 PM PDT 24 |
60299307219 ps |
T308 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all.820268643 |
|
|
Apr 04 03:00:49 PM PDT 24 |
Apr 04 03:01:20 PM PDT 24 |
11330708783 ps |
T449 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.2772431068 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:01:29 PM PDT 24 |
9825030047 ps |
T336 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.1743578398 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:01:55 PM PDT 24 |
50907367435 ps |
T450 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1226178088 |
|
|
Apr 04 03:01:36 PM PDT 24 |
Apr 04 03:01:38 PM PDT 24 |
2285534856 ps |
T270 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1626394736 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:08:10 PM PDT 24 |
138249859875 ps |
T451 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.834533653 |
|
|
Apr 04 03:01:59 PM PDT 24 |
Apr 04 03:02:01 PM PDT 24 |
2565698288 ps |
T452 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1778374426 |
|
|
Apr 04 03:00:14 PM PDT 24 |
Apr 04 03:00:16 PM PDT 24 |
2028088599 ps |
T363 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1790019150 |
|
|
Apr 04 02:59:53 PM PDT 24 |
Apr 04 03:02:56 PM PDT 24 |
132325014621 ps |
T453 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.706143659 |
|
|
Apr 04 03:01:22 PM PDT 24 |
Apr 04 03:01:26 PM PDT 24 |
2517332509 ps |
T359 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.4145246542 |
|
|
Apr 04 03:02:21 PM PDT 24 |
Apr 04 03:02:41 PM PDT 24 |
71005811453 ps |
T454 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.2420530801 |
|
|
Apr 04 03:01:49 PM PDT 24 |
Apr 04 03:01:50 PM PDT 24 |
2026838586 ps |
T381 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1590103067 |
|
|
Apr 04 03:00:03 PM PDT 24 |
Apr 04 03:00:12 PM PDT 24 |
291861411796 ps |
T455 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1537404643 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:02:11 PM PDT 24 |
2448909155 ps |
T456 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1741684816 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:02:07 PM PDT 24 |
2618523383 ps |
T457 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.818812131 |
|
|
Apr 04 03:01:20 PM PDT 24 |
Apr 04 03:01:26 PM PDT 24 |
3445869218 ps |
T458 |
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.3320045975 |
|
|
Apr 04 03:00:52 PM PDT 24 |
Apr 04 03:00:57 PM PDT 24 |
2614717803 ps |
T184 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3021366771 |
|
|
Apr 04 03:00:05 PM PDT 24 |
Apr 04 03:00:47 PM PDT 24 |
33722202216 ps |
T344 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.366879327 |
|
|
Apr 04 03:01:06 PM PDT 24 |
Apr 04 03:02:16 PM PDT 24 |
97822015466 ps |
T231 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.1385448582 |
|
|
Apr 04 02:59:54 PM PDT 24 |
Apr 04 02:59:56 PM PDT 24 |
2395017456 ps |
T459 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1697800493 |
|
|
Apr 04 03:02:17 PM PDT 24 |
Apr 04 03:02:19 PM PDT 24 |
2040218298 ps |
T380 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1458325752 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:03:24 PM PDT 24 |
87556013698 ps |
T460 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3885651529 |
|
|
Apr 04 03:00:36 PM PDT 24 |
Apr 04 03:00:39 PM PDT 24 |
3758710843 ps |
T309 |
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2257872499 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:01:39 PM PDT 24 |
2454776540 ps |
T284 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3773879262 |
|
|
Apr 04 03:00:04 PM PDT 24 |
Apr 04 03:00:34 PM PDT 24 |
22018584510 ps |
T461 |
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3943550867 |
|
|
Apr 04 03:01:36 PM PDT 24 |
Apr 04 03:01:41 PM PDT 24 |
3275011533 ps |
T81 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.408371223 |
|
|
Apr 04 03:01:36 PM PDT 24 |
Apr 04 03:06:05 PM PDT 24 |
124230072882 ps |
T462 |
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1427762211 |
|
|
Apr 04 03:02:01 PM PDT 24 |
Apr 04 03:02:07 PM PDT 24 |
2121426256 ps |
T273 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1365159396 |
|
|
Apr 04 03:00:12 PM PDT 24 |
Apr 04 03:03:12 PM PDT 24 |
71745348182 ps |
T463 |
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.1870195773 |
|
|
Apr 04 03:01:36 PM PDT 24 |
Apr 04 03:01:41 PM PDT 24 |
2517887405 ps |
T464 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.247316522 |
|
|
Apr 04 02:59:52 PM PDT 24 |
Apr 04 02:59:53 PM PDT 24 |
2600261516 ps |
T465 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2522605901 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:22 PM PDT 24 |
2529302775 ps |
T366 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.523314562 |
|
|
Apr 04 03:00:46 PM PDT 24 |
Apr 04 03:01:00 PM PDT 24 |
75722372955 ps |
T466 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2757540860 |
|
|
Apr 04 03:00:51 PM PDT 24 |
Apr 04 03:00:54 PM PDT 24 |
5114066909 ps |
T99 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.4072598821 |
|
|
Apr 04 03:00:49 PM PDT 24 |
Apr 04 03:01:38 PM PDT 24 |
36972792945 ps |
T467 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.202232078 |
|
|
Apr 04 03:00:14 PM PDT 24 |
Apr 04 03:00:21 PM PDT 24 |
2459024131 ps |
T468 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.4066749324 |
|
|
Apr 04 03:00:45 PM PDT 24 |
Apr 04 03:01:20 PM PDT 24 |
85248476438 ps |
T469 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.327334158 |
|
|
Apr 04 03:01:53 PM PDT 24 |
Apr 04 03:01:59 PM PDT 24 |
2112958385 ps |
T339 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.3512680981 |
|
|
Apr 04 03:00:36 PM PDT 24 |
Apr 04 03:06:47 PM PDT 24 |
147120387286 ps |
T470 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3349422264 |
|
|
Apr 04 03:01:06 PM PDT 24 |
Apr 04 03:01:09 PM PDT 24 |
5702873771 ps |
T471 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1208542160 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:36 PM PDT 24 |
5060592800 ps |
T472 |
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1654553307 |
|
|
Apr 04 03:01:06 PM PDT 24 |
Apr 04 03:01:09 PM PDT 24 |
2083733198 ps |
T473 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.1467799772 |
|
|
Apr 04 03:00:46 PM PDT 24 |
Apr 04 03:00:49 PM PDT 24 |
2019932068 ps |
T474 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3031262055 |
|
|
Apr 04 03:02:23 PM PDT 24 |
Apr 04 03:06:27 PM PDT 24 |
98217345457 ps |
T475 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2045270680 |
|
|
Apr 04 03:01:07 PM PDT 24 |
Apr 04 03:01:09 PM PDT 24 |
2183448348 ps |
T476 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.4117615045 |
|
|
Apr 04 03:00:38 PM PDT 24 |
Apr 04 03:00:49 PM PDT 24 |
3687882626 ps |
T177 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.4050375036 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:02:29 PM PDT 24 |
4126573295 ps |
T477 |
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.4098499333 |
|
|
Apr 04 03:00:03 PM PDT 24 |
Apr 04 03:00:08 PM PDT 24 |
2073985115 ps |
T478 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2148643066 |
|
|
Apr 04 03:00:50 PM PDT 24 |
Apr 04 03:00:52 PM PDT 24 |
2481836039 ps |
T479 |
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.1801031219 |
|
|
Apr 04 03:00:52 PM PDT 24 |
Apr 04 03:00:59 PM PDT 24 |
2129066933 ps |
T480 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.434952978 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:24 PM PDT 24 |
2013428700 ps |
T271 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2913601704 |
|
|
Apr 04 03:02:19 PM PDT 24 |
Apr 04 03:04:13 PM PDT 24 |
83073446540 ps |
T481 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2430935194 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:08:00 PM PDT 24 |
124404535646 ps |
T482 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.2570158985 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:02:18 PM PDT 24 |
122864221083 ps |
T483 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.796319518 |
|
|
Apr 04 03:00:51 PM PDT 24 |
Apr 04 03:00:52 PM PDT 24 |
2542392483 ps |
T484 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.4022208158 |
|
|
Apr 04 02:59:42 PM PDT 24 |
Apr 04 02:59:48 PM PDT 24 |
2111901796 ps |
T485 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3930907397 |
|
|
Apr 04 03:00:24 PM PDT 24 |
Apr 04 03:00:31 PM PDT 24 |
2467222793 ps |
T486 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3440683778 |
|
|
Apr 04 03:01:48 PM PDT 24 |
Apr 04 03:01:53 PM PDT 24 |
3297291735 ps |
T487 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3359649217 |
|
|
Apr 04 03:01:52 PM PDT 24 |
Apr 04 03:01:56 PM PDT 24 |
2515769411 ps |
T146 |
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.4223420231 |
|
|
Apr 04 03:00:47 PM PDT 24 |
Apr 04 03:00:53 PM PDT 24 |
12133786542 ps |
T361 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.4274954111 |
|
|
Apr 04 02:59:51 PM PDT 24 |
Apr 04 03:03:17 PM PDT 24 |
78113394675 ps |
T373 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4277853863 |
|
|
Apr 04 03:00:14 PM PDT 24 |
Apr 04 03:00:55 PM PDT 24 |
164550276019 ps |
T368 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.715001127 |
|
|
Apr 04 03:02:18 PM PDT 24 |
Apr 04 03:05:10 PM PDT 24 |
123357659206 ps |
T488 |
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.3689090569 |
|
|
Apr 04 03:01:07 PM PDT 24 |
Apr 04 03:01:11 PM PDT 24 |
2242035305 ps |
T489 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.4202974036 |
|
|
Apr 04 03:00:47 PM PDT 24 |
Apr 04 03:00:49 PM PDT 24 |
2065910074 ps |
T490 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.3730776263 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:01:39 PM PDT 24 |
2113088634 ps |
T491 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.403107535 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:01:42 PM PDT 24 |
2611084580 ps |
T492 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3009737400 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:01:51 PM PDT 24 |
5358672379 ps |
T493 |
/workspace/coverage/default/15.sysrst_ctrl_alert_test.4022099724 |
|
|
Apr 04 03:00:37 PM PDT 24 |
Apr 04 03:00:42 PM PDT 24 |
2014458262 ps |
T494 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.308847648 |
|
|
Apr 04 03:00:22 PM PDT 24 |
Apr 04 03:00:28 PM PDT 24 |
28891650572 ps |
T495 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.3984881321 |
|
|
Apr 04 03:00:00 PM PDT 24 |
Apr 04 03:00:02 PM PDT 24 |
2034066089 ps |
T496 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3357093251 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:03:46 PM PDT 24 |
31488711046 ps |
T497 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2284860817 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:02:05 PM PDT 24 |
68447009527 ps |
T498 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.1331105696 |
|
|
Apr 04 02:59:53 PM PDT 24 |
Apr 04 02:59:56 PM PDT 24 |
2187699017 ps |
T274 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3636357545 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:06:33 PM PDT 24 |
106433128182 ps |
T371 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1532210346 |
|
|
Apr 04 03:00:47 PM PDT 24 |
Apr 04 03:05:19 PM PDT 24 |
110327698571 ps |
T499 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3549407847 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:02:08 PM PDT 24 |
2105746133 ps |
T500 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.106797236 |
|
|
Apr 04 03:01:05 PM PDT 24 |
Apr 04 03:01:07 PM PDT 24 |
2633077554 ps |
T501 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.330640649 |
|
|
Apr 04 03:02:08 PM PDT 24 |
Apr 04 03:02:10 PM PDT 24 |
2264572096 ps |
T502 |
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.1593115097 |
|
|
Apr 04 03:01:17 PM PDT 24 |
Apr 04 03:01:19 PM PDT 24 |
2082258533 ps |
T341 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.2527651102 |
|
|
Apr 04 02:59:55 PM PDT 24 |
Apr 04 03:00:58 PM PDT 24 |
104100540056 ps |
T503 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2790972231 |
|
|
Apr 04 03:01:34 PM PDT 24 |
Apr 04 03:01:36 PM PDT 24 |
2483913542 ps |
T504 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2278708883 |
|
|
Apr 04 03:01:59 PM PDT 24 |
Apr 04 03:02:07 PM PDT 24 |
2466574917 ps |
T377 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.109100040 |
|
|
Apr 04 03:02:24 PM PDT 24 |
Apr 04 03:02:52 PM PDT 24 |
43416436155 ps |
T505 |
/workspace/coverage/default/34.sysrst_ctrl_smoke.2337998604 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:39 PM PDT 24 |
2114147537 ps |
T506 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.1305872754 |
|
|
Apr 04 03:01:18 PM PDT 24 |
Apr 04 03:01:20 PM PDT 24 |
2284059305 ps |
T199 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.2561697602 |
|
|
Apr 04 03:00:40 PM PDT 24 |
Apr 04 03:00:54 PM PDT 24 |
6059846708 ps |
T507 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2611377482 |
|
|
Apr 04 03:02:19 PM PDT 24 |
Apr 04 03:03:30 PM PDT 24 |
27330856999 ps |
T508 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.2873057024 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:28 PM PDT 24 |
2611103903 ps |
T509 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1816195340 |
|
|
Apr 04 03:00:01 PM PDT 24 |
Apr 04 03:00:05 PM PDT 24 |
2614412817 ps |
T224 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.983761545 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:01:24 PM PDT 24 |
2410420842 ps |
T510 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.3516699543 |
|
|
Apr 04 03:00:23 PM PDT 24 |
Apr 04 03:00:27 PM PDT 24 |
2246851307 ps |
T382 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.922427416 |
|
|
Apr 04 03:01:20 PM PDT 24 |
Apr 04 03:03:40 PM PDT 24 |
649881357500 ps |
T310 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.4282066690 |
|
|
Apr 04 02:59:53 PM PDT 24 |
Apr 04 03:00:00 PM PDT 24 |
2467098203 ps |
T511 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.3939667230 |
|
|
Apr 04 02:59:51 PM PDT 24 |
Apr 04 02:59:53 PM PDT 24 |
2132034939 ps |
T512 |
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.855647618 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:02:07 PM PDT 24 |
2518647102 ps |
T513 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3951794979 |
|
|
Apr 04 03:00:34 PM PDT 24 |
Apr 04 03:00:36 PM PDT 24 |
2149600066 ps |
T514 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3374477639 |
|
|
Apr 04 03:02:08 PM PDT 24 |
Apr 04 03:02:11 PM PDT 24 |
3201466802 ps |
T515 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3141752656 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:03:47 PM PDT 24 |
37055171545 ps |
T342 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2196574099 |
|
|
Apr 04 03:02:19 PM PDT 24 |
Apr 04 03:03:45 PM PDT 24 |
137861117948 ps |
T516 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3320510834 |
|
|
Apr 04 03:01:22 PM PDT 24 |
Apr 04 03:01:27 PM PDT 24 |
2517494879 ps |
T517 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.2632597960 |
|
|
Apr 04 03:01:06 PM PDT 24 |
Apr 04 03:01:10 PM PDT 24 |
2113748883 ps |
T518 |
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2488388235 |
|
|
Apr 04 03:01:42 PM PDT 24 |
Apr 04 03:02:03 PM PDT 24 |
368688334837 ps |
T275 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.4292369066 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:02:34 PM PDT 24 |
68860013183 ps |
T519 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1230249916 |
|
|
Apr 04 03:01:56 PM PDT 24 |
Apr 04 03:01:59 PM PDT 24 |
2019135503 ps |
T520 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1303334053 |
|
|
Apr 04 03:02:05 PM PDT 24 |
Apr 04 03:02:07 PM PDT 24 |
2626859592 ps |
T521 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.3197634617 |
|
|
Apr 04 03:01:31 PM PDT 24 |
Apr 04 03:01:36 PM PDT 24 |
2951258388 ps |
T178 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.1998991371 |
|
|
Apr 04 03:00:04 PM PDT 24 |
Apr 04 03:00:13 PM PDT 24 |
3761051644 ps |
T522 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.1987834084 |
|
|
Apr 04 03:01:18 PM PDT 24 |
Apr 04 03:01:21 PM PDT 24 |
2033906436 ps |
T276 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect.578050130 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:04:00 PM PDT 24 |
53864465688 ps |
T523 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3425814408 |
|
|
Apr 04 03:00:24 PM PDT 24 |
Apr 04 03:00:27 PM PDT 24 |
2540797896 ps |
T524 |
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.643813388 |
|
|
Apr 04 03:02:17 PM PDT 24 |
Apr 04 03:02:34 PM PDT 24 |
62970061381 ps |
T185 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.4200090606 |
|
|
Apr 04 03:01:48 PM PDT 24 |
Apr 04 03:12:00 PM PDT 24 |
798555351135 ps |
T525 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1080868700 |
|
|
Apr 04 03:02:05 PM PDT 24 |
Apr 04 03:02:08 PM PDT 24 |
2621327254 ps |
T526 |
/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3439908215 |
|
|
Apr 04 03:01:05 PM PDT 24 |
Apr 04 03:01:09 PM PDT 24 |
2768859122 ps |
T527 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.118616416 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:02:07 PM PDT 24 |
2510711337 ps |
T528 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2536257336 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:04:52 PM PDT 24 |
58215930753 ps |
T529 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2386689853 |
|
|
Apr 04 03:01:37 PM PDT 24 |
Apr 04 03:01:44 PM PDT 24 |
2509083879 ps |
T530 |
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3913099946 |
|
|
Apr 04 03:01:03 PM PDT 24 |
Apr 04 03:01:11 PM PDT 24 |
2463902252 ps |
T531 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1803632165 |
|
|
Apr 04 03:00:01 PM PDT 24 |
Apr 04 03:00:03 PM PDT 24 |
2528938281 ps |
T532 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1623306163 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:01:58 PM PDT 24 |
3766976031 ps |
T533 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1354008644 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:01:57 PM PDT 24 |
19755386366 ps |
T133 |
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1331262156 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:02:09 PM PDT 24 |
8314133847 ps |
T534 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3166149855 |
|
|
Apr 04 03:00:11 PM PDT 24 |
Apr 04 03:09:34 PM PDT 24 |
233584372463 ps |
T535 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.105665614 |
|
|
Apr 04 02:59:53 PM PDT 24 |
Apr 04 02:59:55 PM PDT 24 |
2142989822 ps |
T536 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.921424180 |
|
|
Apr 04 03:00:47 PM PDT 24 |
Apr 04 03:00:49 PM PDT 24 |
2481303871 ps |
T149 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1387375678 |
|
|
Apr 04 03:00:01 PM PDT 24 |
Apr 04 03:01:02 PM PDT 24 |
585290672497 ps |
T154 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.1300953891 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:37 PM PDT 24 |
3393138009 ps |
T155 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.3996660948 |
|
|
Apr 04 03:01:48 PM PDT 24 |
Apr 04 03:01:58 PM PDT 24 |
15248971577 ps |
T156 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1346297418 |
|
|
Apr 04 03:02:04 PM PDT 24 |
Apr 04 03:02:12 PM PDT 24 |
3207684881 ps |
T157 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2441043271 |
|
|
Apr 04 03:01:46 PM PDT 24 |
Apr 04 03:03:10 PM PDT 24 |
67915142470 ps |
T158 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.861583900 |
|
|
Apr 04 03:00:35 PM PDT 24 |
Apr 04 03:07:55 PM PDT 24 |
164595367101 ps |
T159 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2386764507 |
|
|
Apr 04 03:01:22 PM PDT 24 |
Apr 04 03:01:28 PM PDT 24 |
4182682150 ps |
T160 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.1633009773 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:01:11 PM PDT 24 |
2442123782 ps |
T161 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1459209520 |
|
|
Apr 04 03:01:49 PM PDT 24 |
Apr 04 03:02:50 PM PDT 24 |
93529553818 ps |
T162 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.759610918 |
|
|
Apr 04 03:00:37 PM PDT 24 |
Apr 04 03:00:38 PM PDT 24 |
2671279539 ps |
T318 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1334238034 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:03:49 PM PDT 24 |
46248520381 ps |
T537 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.1017305907 |
|
|
Apr 04 03:00:24 PM PDT 24 |
Apr 04 03:00:27 PM PDT 24 |
3795843232 ps |
T538 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.488683643 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:01:48 PM PDT 24 |
17023980968 ps |
T539 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2194981793 |
|
|
Apr 04 03:00:13 PM PDT 24 |
Apr 04 03:00:15 PM PDT 24 |
2550995774 ps |
T540 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.4148943249 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:02:04 PM PDT 24 |
3554123402 ps |
T163 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1460366292 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:02:55 PM PDT 24 |
41544486120 ps |
T541 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3547804049 |
|
|
Apr 04 03:01:49 PM PDT 24 |
Apr 04 03:01:53 PM PDT 24 |
2263229401 ps |
T542 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3541527466 |
|
|
Apr 04 03:01:18 PM PDT 24 |
Apr 04 03:01:21 PM PDT 24 |
2626459006 ps |
T263 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1006682821 |
|
|
Apr 04 03:02:17 PM PDT 24 |
Apr 04 03:02:50 PM PDT 24 |
50276452999 ps |
T543 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.835638279 |
|
|
Apr 04 02:59:58 PM PDT 24 |
Apr 04 03:00:06 PM PDT 24 |
2611632365 ps |
T544 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1351878593 |
|
|
Apr 04 03:00:25 PM PDT 24 |
Apr 04 03:00:28 PM PDT 24 |
2633455114 ps |
T545 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2692947577 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:05:06 PM PDT 24 |
82002516525 ps |
T546 |
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3575312405 |
|
|
Apr 04 03:01:48 PM PDT 24 |
Apr 04 03:01:56 PM PDT 24 |
2613000866 ps |
T547 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.4121002250 |
|
|
Apr 04 03:00:49 PM PDT 24 |
Apr 04 03:00:51 PM PDT 24 |
2261503431 ps |
T548 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.457755868 |
|
|
Apr 04 03:00:39 PM PDT 24 |
Apr 04 03:00:40 PM PDT 24 |
2040138155 ps |
T549 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2167890453 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:26 PM PDT 24 |
2713165937 ps |
T550 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.3932300542 |
|
|
Apr 04 03:00:40 PM PDT 24 |
Apr 04 03:00:42 PM PDT 24 |
2130416297 ps |
T551 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.675127803 |
|
|
Apr 04 03:00:11 PM PDT 24 |
Apr 04 03:00:13 PM PDT 24 |
2642020839 ps |
T552 |
/workspace/coverage/default/17.sysrst_ctrl_alert_test.1242763340 |
|
|
Apr 04 03:00:47 PM PDT 24 |
Apr 04 03:00:53 PM PDT 24 |
2009788085 ps |
T553 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.246341340 |
|
|
Apr 04 03:01:05 PM PDT 24 |
Apr 04 03:01:11 PM PDT 24 |
2013190606 ps |
T554 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.519587182 |
|
|
Apr 04 03:00:46 PM PDT 24 |
Apr 04 03:00:52 PM PDT 24 |
2373163676 ps |
T555 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.4125867900 |
|
|
Apr 04 03:02:04 PM PDT 24 |
Apr 04 03:02:17 PM PDT 24 |
5005085587 ps |
T369 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2879464419 |
|
|
Apr 04 03:02:18 PM PDT 24 |
Apr 04 03:05:25 PM PDT 24 |
76285444731 ps |
T556 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2923572310 |
|
|
Apr 04 03:01:46 PM PDT 24 |
Apr 04 03:01:54 PM PDT 24 |
2964824861 ps |
T179 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.3705723963 |
|
|
Apr 04 02:59:55 PM PDT 24 |
Apr 04 02:59:58 PM PDT 24 |
2378787070 ps |
T557 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.1164770314 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:01:10 PM PDT 24 |
2011103619 ps |
T558 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1846570620 |
|
|
Apr 04 03:00:39 PM PDT 24 |
Apr 04 03:00:45 PM PDT 24 |
2120391684 ps |
T346 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1589562401 |
|
|
Apr 04 03:02:16 PM PDT 24 |
Apr 04 03:04:16 PM PDT 24 |
43107024919 ps |
T301 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.1405596406 |
|
|
Apr 04 02:59:53 PM PDT 24 |
Apr 04 03:00:24 PM PDT 24 |
22021810246 ps |
T559 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2047741340 |
|
|
Apr 04 03:02:16 PM PDT 24 |
Apr 04 03:06:26 PM PDT 24 |
106213695503 ps |
T560 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.3227449357 |
|
|
Apr 04 03:00:00 PM PDT 24 |
Apr 04 03:00:46 PM PDT 24 |
68788415694 ps |
T561 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.214563035 |
|
|
Apr 04 03:01:46 PM PDT 24 |
Apr 04 03:01:48 PM PDT 24 |
2482417785 ps |
T180 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.4073065135 |
|
|
Apr 04 03:01:34 PM PDT 24 |
Apr 04 03:01:40 PM PDT 24 |
7843458004 ps |
T562 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1743042631 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:05:05 PM PDT 24 |
82938510582 ps |
T563 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.885233690 |
|
|
Apr 04 02:59:42 PM PDT 24 |
Apr 04 02:59:46 PM PDT 24 |
2485960140 ps |
T362 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3670623427 |
|
|
Apr 04 03:01:31 PM PDT 24 |
Apr 04 03:03:20 PM PDT 24 |
38940443638 ps |
T564 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.1080594260 |
|
|
Apr 04 03:01:31 PM PDT 24 |
Apr 04 03:01:33 PM PDT 24 |
2137891909 ps |
T565 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2219581578 |
|
|
Apr 04 03:02:21 PM PDT 24 |
Apr 04 03:02:39 PM PDT 24 |
91244468136 ps |
T566 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.772167522 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:01:24 PM PDT 24 |
2528962077 ps |
T232 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.3323305477 |
|
|
Apr 04 03:01:37 PM PDT 24 |
Apr 04 03:01:45 PM PDT 24 |
2928606751 ps |
T567 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2046616035 |
|
|
Apr 04 03:00:37 PM PDT 24 |
Apr 04 03:03:03 PM PDT 24 |
101380553371 ps |
T568 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2795897013 |
|
|
Apr 04 03:00:01 PM PDT 24 |
Apr 04 03:02:24 PM PDT 24 |
57691375452 ps |
T569 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.4258192417 |
|
|
Apr 04 03:00:12 PM PDT 24 |
Apr 04 03:00:15 PM PDT 24 |
2120749816 ps |
T570 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3528084647 |
|
|
Apr 04 03:00:22 PM PDT 24 |
Apr 04 03:00:25 PM PDT 24 |
2622960864 ps |
T52 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3952877359 |
|
|
Apr 04 02:59:52 PM PDT 24 |
Apr 04 03:00:19 PM PDT 24 |
41114490571 ps |
T571 |
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.2283207128 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:21 PM PDT 24 |
2252660636 ps |
T572 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.4147353195 |
|
|
Apr 04 03:01:48 PM PDT 24 |
Apr 04 03:02:17 PM PDT 24 |
13912154155 ps |
T573 |
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2372758628 |
|
|
Apr 04 02:59:54 PM PDT 24 |
Apr 04 03:00:00 PM PDT 24 |
4198602128 ps |
T574 |
/workspace/coverage/default/36.sysrst_ctrl_alert_test.4014499246 |
|
|
Apr 04 03:01:36 PM PDT 24 |
Apr 04 03:01:40 PM PDT 24 |
2016802000 ps |
T575 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2537951533 |
|
|
Apr 04 02:59:56 PM PDT 24 |
Apr 04 03:04:02 PM PDT 24 |
91172497708 ps |
T576 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.3736123875 |
|
|
Apr 04 03:00:35 PM PDT 24 |
Apr 04 03:00:37 PM PDT 24 |
2131126750 ps |
T577 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all.1088909008 |
|
|
Apr 04 03:00:35 PM PDT 24 |
Apr 04 03:01:13 PM PDT 24 |
13853357042 ps |
T181 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3002309854 |
|
|
Apr 04 03:00:14 PM PDT 24 |
Apr 04 03:01:21 PM PDT 24 |
49470272972 ps |
T578 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2885616898 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:04:09 PM PDT 24 |
155442807314 ps |
T579 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1183851652 |
|
|
Apr 04 03:00:00 PM PDT 24 |
Apr 04 03:00:09 PM PDT 24 |
3408844521 ps |
T580 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.3832209735 |
|
|
Apr 04 03:00:36 PM PDT 24 |
Apr 04 03:00:38 PM PDT 24 |
2101955270 ps |
T581 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2088949189 |
|
|
Apr 04 03:00:38 PM PDT 24 |
Apr 04 03:00:42 PM PDT 24 |
3452519388 ps |
T186 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1314101753 |
|
|
Apr 04 03:00:02 PM PDT 24 |
Apr 04 03:02:13 PM PDT 24 |
276615538803 ps |
T582 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4142468415 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:02:45 PM PDT 24 |
37380707744 ps |
T583 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.734201569 |
|
|
Apr 04 03:01:59 PM PDT 24 |
Apr 04 03:02:06 PM PDT 24 |
2656506123 ps |
T584 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.472029122 |
|
|
Apr 04 03:00:46 PM PDT 24 |
Apr 04 03:00:50 PM PDT 24 |
3013156042 ps |
T585 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all.1717243301 |
|
|
Apr 04 02:59:54 PM PDT 24 |
Apr 04 03:00:16 PM PDT 24 |
15529100895 ps |
T586 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.471094414 |
|
|
Apr 04 03:01:31 PM PDT 24 |
Apr 04 03:01:33 PM PDT 24 |
2030583333 ps |
T587 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1124707570 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:03:29 PM PDT 24 |
147098730954 ps |
T588 |
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3043061239 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:01:29 PM PDT 24 |
3049696097 ps |
T589 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3940410169 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:02:09 PM PDT 24 |
2512414522 ps |
T590 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.602958964 |
|
|
Apr 04 03:02:04 PM PDT 24 |
Apr 04 03:02:09 PM PDT 24 |
3240201710 ps |
T591 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.943794936 |
|
|
Apr 04 03:00:44 PM PDT 24 |
Apr 04 03:00:46 PM PDT 24 |
2132778865 ps |
T592 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1901573477 |
|
|
Apr 04 03:01:07 PM PDT 24 |
Apr 04 03:01:14 PM PDT 24 |
2509333517 ps |
T593 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3315429853 |
|
|
Apr 04 03:02:21 PM PDT 24 |
Apr 04 03:02:38 PM PDT 24 |
6908736054 ps |
T594 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2779235153 |
|
|
Apr 04 03:00:35 PM PDT 24 |
Apr 04 03:02:04 PM PDT 24 |
46768098294 ps |
T595 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1384632688 |
|
|
Apr 04 03:00:06 PM PDT 24 |
Apr 04 03:00:17 PM PDT 24 |
3898551712 ps |
T164 |
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.754893987 |
|
|
Apr 04 03:01:37 PM PDT 24 |
Apr 04 03:01:39 PM PDT 24 |
3951936643 ps |
T596 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.459276484 |
|
|
Apr 04 03:00:27 PM PDT 24 |
Apr 04 03:00:29 PM PDT 24 |
2527166771 ps |
T597 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3358274754 |
|
|
Apr 04 03:01:07 PM PDT 24 |
Apr 04 03:01:20 PM PDT 24 |
4715809834 ps |
T598 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.3839352275 |
|
|
Apr 04 03:01:45 PM PDT 24 |
Apr 04 03:01:47 PM PDT 24 |
2636162920 ps |
T264 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.4149316772 |
|
|
Apr 04 03:00:00 PM PDT 24 |
Apr 04 03:02:57 PM PDT 24 |
73770679619 ps |
T599 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.4111437657 |
|
|
Apr 04 03:01:55 PM PDT 24 |
Apr 04 03:02:00 PM PDT 24 |
2616383753 ps |
T600 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1038332599 |
|
|
Apr 04 03:01:34 PM PDT 24 |
Apr 04 03:01:37 PM PDT 24 |
2158151611 ps |
T601 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.2513419608 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:01:22 PM PDT 24 |
2532821711 ps |
T602 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2534175184 |
|
|
Apr 04 03:01:20 PM PDT 24 |
Apr 04 03:01:27 PM PDT 24 |
2517136318 ps |
T603 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.13209399 |
|
|
Apr 04 03:01:42 PM PDT 24 |
Apr 04 03:07:26 PM PDT 24 |
132517834556 ps |
T604 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.4098798915 |
|
|
Apr 04 03:00:01 PM PDT 24 |
Apr 04 03:00:07 PM PDT 24 |
2110520250 ps |
T605 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2541432392 |
|
|
Apr 04 03:01:46 PM PDT 24 |
Apr 04 03:02:37 PM PDT 24 |
80331728916 ps |
T606 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1743742659 |
|
|
Apr 04 03:00:26 PM PDT 24 |
Apr 04 03:00:36 PM PDT 24 |
3540604124 ps |
T607 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.746858974 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:01:38 PM PDT 24 |
2513262915 ps |
T608 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.385231359 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:10:18 PM PDT 24 |
188726866889 ps |
T364 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1857745973 |
|
|
Apr 04 03:00:51 PM PDT 24 |
Apr 04 03:06:06 PM PDT 24 |
126217258853 ps |
T609 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.3505590542 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:29 PM PDT 24 |
52234727476 ps |
T610 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2234333203 |
|
|
Apr 04 03:00:12 PM PDT 24 |
Apr 04 03:00:17 PM PDT 24 |
3241796042 ps |
T611 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2436952226 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:04:12 PM PDT 24 |
272391564386 ps |
T265 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.338649056 |
|
|
Apr 04 03:00:22 PM PDT 24 |
Apr 04 03:07:48 PM PDT 24 |
184996252251 ps |
T266 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.710748959 |
|
|
Apr 04 02:59:54 PM PDT 24 |
Apr 04 03:00:11 PM PDT 24 |
125559608131 ps |
T612 |
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3872568784 |
|
|
Apr 04 03:01:07 PM PDT 24 |
Apr 04 03:01:12 PM PDT 24 |
3268529635 ps |