| T214 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.1252460096 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:21 PM PDT 24 |
2824703615 ps |
| T613 |
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.222207029 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:09:41 PM PDT 24 |
178648414857 ps |
| T614 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.3410075467 |
|
|
Apr 04 02:59:52 PM PDT 24 |
Apr 04 03:13:21 PM PDT 24 |
297490200529 ps |
| T615 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3875074360 |
|
|
Apr 04 03:00:36 PM PDT 24 |
Apr 04 03:03:42 PM PDT 24 |
74331748730 ps |
| T616 |
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1179688995 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:02:05 PM PDT 24 |
3108155587 ps |
| T617 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1222345726 |
|
|
Apr 04 03:00:45 PM PDT 24 |
Apr 04 03:00:47 PM PDT 24 |
4550783409 ps |
| T618 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.2252765207 |
|
|
Apr 04 03:01:18 PM PDT 24 |
Apr 04 03:01:59 PM PDT 24 |
77709791547 ps |
| T619 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1007518404 |
|
|
Apr 04 03:00:36 PM PDT 24 |
Apr 04 03:00:40 PM PDT 24 |
2451526759 ps |
| T620 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.2439998216 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:02:05 PM PDT 24 |
2116057194 ps |
| T621 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3900551550 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:01:54 PM PDT 24 |
2041919665 ps |
| T622 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.2455418704 |
|
|
Apr 04 03:01:07 PM PDT 24 |
Apr 04 03:01:15 PM PDT 24 |
2511507141 ps |
| T261 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2454083055 |
|
|
Apr 04 03:00:26 PM PDT 24 |
Apr 04 03:01:06 PM PDT 24 |
66738874345 ps |
| T623 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2586006979 |
|
|
Apr 04 02:59:54 PM PDT 24 |
Apr 04 02:59:56 PM PDT 24 |
2664976715 ps |
| T198 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.465546750 |
|
|
Apr 04 02:59:54 PM PDT 24 |
Apr 04 03:00:01 PM PDT 24 |
2448834127 ps |
| T134 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.2897483978 |
|
|
Apr 04 03:01:08 PM PDT 24 |
Apr 04 03:01:15 PM PDT 24 |
5161328996 ps |
| T624 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3388085860 |
|
|
Apr 04 03:00:13 PM PDT 24 |
Apr 04 03:00:16 PM PDT 24 |
3444548468 ps |
| T625 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2208225824 |
|
|
Apr 04 03:00:34 PM PDT 24 |
Apr 04 03:00:38 PM PDT 24 |
6264608931 ps |
| T626 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1493852546 |
|
|
Apr 04 03:01:42 PM PDT 24 |
Apr 04 03:01:46 PM PDT 24 |
2872580849 ps |
| T627 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1323906095 |
|
|
Apr 04 03:02:08 PM PDT 24 |
Apr 04 03:02:09 PM PDT 24 |
8290536477 ps |
| T628 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3753117313 |
|
|
Apr 04 03:00:11 PM PDT 24 |
Apr 04 03:00:14 PM PDT 24 |
2532247294 ps |
| T629 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3410225982 |
|
|
Apr 04 03:01:31 PM PDT 24 |
Apr 04 03:01:34 PM PDT 24 |
2630590243 ps |
| T630 |
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1976952092 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:42 PM PDT 24 |
8711154879 ps |
| T191 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.831656963 |
|
|
Apr 04 03:00:53 PM PDT 24 |
Apr 04 03:01:03 PM PDT 24 |
14572445683 ps |
| T165 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3304268032 |
|
|
Apr 04 03:02:00 PM PDT 24 |
Apr 04 03:02:55 PM PDT 24 |
43034752113 ps |
| T200 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1040994896 |
|
|
Apr 04 03:00:46 PM PDT 24 |
Apr 04 03:02:29 PM PDT 24 |
46308030990 ps |
| T631 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.517600676 |
|
|
Apr 04 02:59:54 PM PDT 24 |
Apr 04 03:00:00 PM PDT 24 |
2418899595 ps |
| T632 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2559297883 |
|
|
Apr 04 03:00:51 PM PDT 24 |
Apr 04 03:00:58 PM PDT 24 |
2450725393 ps |
| T633 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.534593820 |
|
|
Apr 04 03:00:22 PM PDT 24 |
Apr 04 03:00:25 PM PDT 24 |
2122901821 ps |
| T634 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.2395604824 |
|
|
Apr 04 03:00:13 PM PDT 24 |
Apr 04 03:00:16 PM PDT 24 |
2236557425 ps |
| T635 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3959497803 |
|
|
Apr 04 03:01:05 PM PDT 24 |
Apr 04 03:02:26 PM PDT 24 |
29580155283 ps |
| T636 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.66910977 |
|
|
Apr 04 02:59:52 PM PDT 24 |
Apr 04 02:59:58 PM PDT 24 |
2012721569 ps |
| T637 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1170475294 |
|
|
Apr 04 03:00:12 PM PDT 24 |
Apr 04 03:00:16 PM PDT 24 |
2428900368 ps |
| T638 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3329171077 |
|
|
Apr 04 03:00:24 PM PDT 24 |
Apr 04 03:00:31 PM PDT 24 |
7074070461 ps |
| T639 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.874495496 |
|
|
Apr 04 03:01:07 PM PDT 24 |
Apr 04 03:01:47 PM PDT 24 |
59106456659 ps |
| T640 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.3669121533 |
|
|
Apr 04 03:01:31 PM PDT 24 |
Apr 04 03:01:33 PM PDT 24 |
2129041547 ps |
| T641 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3015679177 |
|
|
Apr 04 03:00:43 PM PDT 24 |
Apr 04 03:00:53 PM PDT 24 |
3520087627 ps |
| T642 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2961461441 |
|
|
Apr 04 02:59:56 PM PDT 24 |
Apr 04 03:00:00 PM PDT 24 |
4938841664 ps |
| T643 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1477130884 |
|
|
Apr 04 03:00:14 PM PDT 24 |
Apr 04 03:00:22 PM PDT 24 |
2464742483 ps |
| T644 |
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.904865303 |
|
|
Apr 04 03:01:03 PM PDT 24 |
Apr 04 03:01:07 PM PDT 24 |
2077159160 ps |
| T375 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4233534332 |
|
|
Apr 04 03:02:19 PM PDT 24 |
Apr 04 03:03:50 PM PDT 24 |
64867722941 ps |
| T645 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.420447508 |
|
|
Apr 04 02:59:55 PM PDT 24 |
Apr 04 03:00:00 PM PDT 24 |
2525702689 ps |
| T646 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.601324663 |
|
|
Apr 04 03:00:24 PM PDT 24 |
Apr 04 03:00:27 PM PDT 24 |
2469688388 ps |
| T647 |
/workspace/coverage/default/42.sysrst_ctrl_smoke.1018029798 |
|
|
Apr 04 03:01:52 PM PDT 24 |
Apr 04 03:01:57 PM PDT 24 |
2115209040 ps |
| T302 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2180226054 |
|
|
Apr 04 03:00:02 PM PDT 24 |
Apr 04 03:00:57 PM PDT 24 |
42022790453 ps |
| T648 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.4180269426 |
|
|
Apr 04 03:00:46 PM PDT 24 |
Apr 04 03:00:48 PM PDT 24 |
2101545429 ps |
| T649 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1719555307 |
|
|
Apr 04 03:02:05 PM PDT 24 |
Apr 04 03:02:07 PM PDT 24 |
2070821739 ps |
| T650 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.569817293 |
|
|
Apr 04 03:01:55 PM PDT 24 |
Apr 04 03:02:03 PM PDT 24 |
2512478681 ps |
| T651 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.852082193 |
|
|
Apr 04 02:59:56 PM PDT 24 |
Apr 04 02:59:58 PM PDT 24 |
4814584437 ps |
| T166 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all.4167856317 |
|
|
Apr 04 03:01:16 PM PDT 24 |
Apr 04 03:01:54 PM PDT 24 |
16952201256 ps |
| T84 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2290402154 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:01:25 PM PDT 24 |
5615822507 ps |
| T147 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3459071739 |
|
|
Apr 04 02:59:54 PM PDT 24 |
Apr 04 02:59:56 PM PDT 24 |
5045936226 ps |
| T652 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.2979367998 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:37 PM PDT 24 |
2471097852 ps |
| T653 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.479737359 |
|
|
Apr 04 03:00:39 PM PDT 24 |
Apr 04 03:00:45 PM PDT 24 |
2474285899 ps |
| T654 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2897056129 |
|
|
Apr 04 03:01:07 PM PDT 24 |
Apr 04 03:01:10 PM PDT 24 |
2936072839 ps |
| T378 |
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.4263116219 |
|
|
Apr 04 03:02:17 PM PDT 24 |
Apr 04 03:04:51 PM PDT 24 |
214110422562 ps |
| T655 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.676747413 |
|
|
Apr 04 03:01:31 PM PDT 24 |
Apr 04 03:01:33 PM PDT 24 |
2554397107 ps |
| T656 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3758885522 |
|
|
Apr 04 02:59:42 PM PDT 24 |
Apr 04 02:59:44 PM PDT 24 |
2732752016 ps |
| T657 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1727759547 |
|
|
Apr 04 03:00:06 PM PDT 24 |
Apr 04 03:00:09 PM PDT 24 |
3195411055 ps |
| T100 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.2719189419 |
|
|
Apr 04 03:00:52 PM PDT 24 |
Apr 04 03:01:32 PM PDT 24 |
376758035308 ps |
| T658 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1511474904 |
|
|
Apr 04 03:00:24 PM PDT 24 |
Apr 04 03:00:26 PM PDT 24 |
2115241557 ps |
| T659 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.3481297968 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:37 PM PDT 24 |
2411995656 ps |
| T192 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1933411352 |
|
|
Apr 04 03:01:49 PM PDT 24 |
Apr 04 03:01:55 PM PDT 24 |
3316925998 ps |
| T660 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3213546781 |
|
|
Apr 04 03:00:37 PM PDT 24 |
Apr 04 03:00:44 PM PDT 24 |
2508742635 ps |
| T661 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.594489840 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:58 PM PDT 24 |
99553658333 ps |
| T662 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.507217544 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:02:08 PM PDT 24 |
51071265120 ps |
| T663 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2701657017 |
|
|
Apr 04 03:02:01 PM PDT 24 |
Apr 04 03:02:04 PM PDT 24 |
2180323638 ps |
| T664 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2602742262 |
|
|
Apr 04 03:01:22 PM PDT 24 |
Apr 04 03:01:25 PM PDT 24 |
7735441076 ps |
| T665 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1388342462 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:27 PM PDT 24 |
5066180568 ps |
| T666 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.544033861 |
|
|
Apr 04 03:01:18 PM PDT 24 |
Apr 04 03:01:20 PM PDT 24 |
2134363883 ps |
| T667 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2608974920 |
|
|
Apr 04 02:59:51 PM PDT 24 |
Apr 04 02:59:53 PM PDT 24 |
2478252578 ps |
| T668 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1730557627 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:40 PM PDT 24 |
2260166817 ps |
| T669 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2707780435 |
|
|
Apr 04 03:02:19 PM PDT 24 |
Apr 04 03:02:31 PM PDT 24 |
24365539931 ps |
| T670 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.2952048620 |
|
|
Apr 04 03:00:16 PM PDT 24 |
Apr 04 03:00:22 PM PDT 24 |
2109537277 ps |
| T671 |
/workspace/coverage/default/15.sysrst_ctrl_smoke.2996795818 |
|
|
Apr 04 03:00:38 PM PDT 24 |
Apr 04 03:00:43 PM PDT 24 |
2114452712 ps |
| T672 |
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2160768867 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:03:51 PM PDT 24 |
36194410517 ps |
| T673 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3424295692 |
|
|
Apr 04 03:00:14 PM PDT 24 |
Apr 04 03:00:22 PM PDT 24 |
2512984291 ps |
| T674 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.911969348 |
|
|
Apr 04 03:00:26 PM PDT 24 |
Apr 04 03:00:30 PM PDT 24 |
2021423180 ps |
| T101 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.167047751 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:03:09 PM PDT 24 |
139114140037 ps |
| T343 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.822290630 |
|
|
Apr 04 03:00:45 PM PDT 24 |
Apr 04 03:02:08 PM PDT 24 |
108363249719 ps |
| T675 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1639338783 |
|
|
Apr 04 03:02:04 PM PDT 24 |
Apr 04 03:02:06 PM PDT 24 |
2529656468 ps |
| T174 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.3851170209 |
|
|
Apr 04 03:01:20 PM PDT 24 |
Apr 04 03:01:25 PM PDT 24 |
3069775603 ps |
| T150 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2713410317 |
|
|
Apr 04 03:01:53 PM PDT 24 |
Apr 04 03:01:55 PM PDT 24 |
4602793008 ps |
| T676 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.2772416927 |
|
|
Apr 04 03:01:34 PM PDT 24 |
Apr 04 03:01:56 PM PDT 24 |
8743314360 ps |
| T677 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.3787264210 |
|
|
Apr 04 03:01:07 PM PDT 24 |
Apr 04 03:01:11 PM PDT 24 |
2116583064 ps |
| T365 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3989457880 |
|
|
Apr 04 03:00:12 PM PDT 24 |
Apr 04 03:00:37 PM PDT 24 |
100272770463 ps |
| T678 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.421657637 |
|
|
Apr 04 03:00:02 PM PDT 24 |
Apr 04 03:00:05 PM PDT 24 |
3120934322 ps |
| T167 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3874549811 |
|
|
Apr 04 03:00:35 PM PDT 24 |
Apr 04 03:01:54 PM PDT 24 |
31774098273 ps |
| T679 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.928579889 |
|
|
Apr 04 03:00:39 PM PDT 24 |
Apr 04 03:00:41 PM PDT 24 |
2492256170 ps |
| T680 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3222942733 |
|
|
Apr 04 03:00:03 PM PDT 24 |
Apr 04 03:00:09 PM PDT 24 |
2422488741 ps |
| T135 |
/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.1003331668 |
|
|
Apr 04 03:00:39 PM PDT 24 |
Apr 04 03:00:41 PM PDT 24 |
5034133013 ps |
| T681 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.39754353 |
|
|
Apr 04 03:00:53 PM PDT 24 |
Apr 04 03:01:01 PM PDT 24 |
2509842749 ps |
| T682 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3341531722 |
|
|
Apr 04 03:00:12 PM PDT 24 |
Apr 04 03:00:14 PM PDT 24 |
2053389720 ps |
| T683 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.2807197286 |
|
|
Apr 04 03:01:36 PM PDT 24 |
Apr 04 03:01:42 PM PDT 24 |
2011484524 ps |
| T684 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1134372503 |
|
|
Apr 04 03:00:52 PM PDT 24 |
Apr 04 03:00:57 PM PDT 24 |
2802069303 ps |
| T351 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.686441384 |
|
|
Apr 04 03:02:16 PM PDT 24 |
Apr 04 03:03:06 PM PDT 24 |
76007179804 ps |
| T685 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.247349308 |
|
|
Apr 04 03:00:37 PM PDT 24 |
Apr 04 03:00:41 PM PDT 24 |
2621418572 ps |
| T686 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3288758678 |
|
|
Apr 04 03:00:06 PM PDT 24 |
Apr 04 03:00:10 PM PDT 24 |
2614030095 ps |
| T226 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.4036233949 |
|
|
Apr 04 03:01:20 PM PDT 24 |
Apr 04 03:02:06 PM PDT 24 |
31229812582 ps |
| T687 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1991189139 |
|
|
Apr 04 03:00:12 PM PDT 24 |
Apr 04 03:00:18 PM PDT 24 |
3690406570 ps |
| T688 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1182411335 |
|
|
Apr 04 03:02:05 PM PDT 24 |
Apr 04 03:02:08 PM PDT 24 |
2525913801 ps |
| T257 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3952498619 |
|
|
Apr 04 03:02:18 PM PDT 24 |
Apr 04 03:07:10 PM PDT 24 |
106646986882 ps |
| T689 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1377783032 |
|
|
Apr 04 03:01:20 PM PDT 24 |
Apr 04 03:01:27 PM PDT 24 |
2238100476 ps |
| T690 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3697171469 |
|
|
Apr 04 03:02:07 PM PDT 24 |
Apr 04 03:02:48 PM PDT 24 |
58963730378 ps |
| T691 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2947472938 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:01:49 PM PDT 24 |
2575046868 ps |
| T692 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.1880900536 |
|
|
Apr 04 03:00:48 PM PDT 24 |
Apr 04 03:00:50 PM PDT 24 |
2137764977 ps |
| T693 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1990968912 |
|
|
Apr 04 03:00:11 PM PDT 24 |
Apr 04 03:00:19 PM PDT 24 |
2609792634 ps |
| T182 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2871707581 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:01:34 PM PDT 24 |
35360524713 ps |
| T694 |
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1815000698 |
|
|
Apr 04 03:00:34 PM PDT 24 |
Apr 04 03:00:36 PM PDT 24 |
2560250005 ps |
| T695 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.496910490 |
|
|
Apr 04 03:00:46 PM PDT 24 |
Apr 04 03:00:49 PM PDT 24 |
7991046305 ps |
| T696 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1913402091 |
|
|
Apr 04 03:01:54 PM PDT 24 |
Apr 04 03:01:56 PM PDT 24 |
5827502216 ps |
| T697 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.265872813 |
|
|
Apr 04 03:00:02 PM PDT 24 |
Apr 04 03:00:10 PM PDT 24 |
3873605690 ps |
| T698 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.3478419521 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:01:13 PM PDT 24 |
8011930624 ps |
| T699 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2664284066 |
|
|
Apr 04 02:59:54 PM PDT 24 |
Apr 04 03:05:46 PM PDT 24 |
275359590824 ps |
| T700 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.556400624 |
|
|
Apr 04 03:00:11 PM PDT 24 |
Apr 04 03:00:14 PM PDT 24 |
3304726213 ps |
| T136 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2026219084 |
|
|
Apr 04 03:01:36 PM PDT 24 |
Apr 04 03:01:44 PM PDT 24 |
6093029002 ps |
| T701 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3412563784 |
|
|
Apr 04 03:00:46 PM PDT 24 |
Apr 04 03:00:53 PM PDT 24 |
2613786918 ps |
| T702 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.4069928295 |
|
|
Apr 04 03:01:16 PM PDT 24 |
Apr 04 03:01:22 PM PDT 24 |
2011445779 ps |
| T703 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.2872195447 |
|
|
Apr 04 03:00:24 PM PDT 24 |
Apr 04 03:00:27 PM PDT 24 |
2014272353 ps |
| T704 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3876708993 |
|
|
Apr 04 03:02:03 PM PDT 24 |
Apr 04 03:02:05 PM PDT 24 |
2460544373 ps |
| T137 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2814714738 |
|
|
Apr 04 03:01:45 PM PDT 24 |
Apr 04 03:02:10 PM PDT 24 |
38893246367 ps |
| T85 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.528878844 |
|
|
Apr 04 03:00:36 PM PDT 24 |
Apr 04 03:02:44 PM PDT 24 |
55577656715 ps |
| T203 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.2120346331 |
|
|
Apr 04 03:00:35 PM PDT 24 |
Apr 04 03:00:40 PM PDT 24 |
3425519039 ps |
| T204 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.951663225 |
|
|
Apr 04 03:01:16 PM PDT 24 |
Apr 04 03:01:20 PM PDT 24 |
2459703355 ps |
| T205 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1807456328 |
|
|
Apr 04 03:00:36 PM PDT 24 |
Apr 04 03:00:39 PM PDT 24 |
2535648060 ps |
| T206 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.865938688 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:04:01 PM PDT 24 |
161743724665 ps |
| T207 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.2264794390 |
|
|
Apr 04 03:00:48 PM PDT 24 |
Apr 04 03:00:54 PM PDT 24 |
9855769351 ps |
| T208 |
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.2132870281 |
|
|
Apr 04 03:00:03 PM PDT 24 |
Apr 04 03:00:14 PM PDT 24 |
3454052089 ps |
| T209 |
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1481554387 |
|
|
Apr 04 03:00:34 PM PDT 24 |
Apr 04 03:00:42 PM PDT 24 |
8613933759 ps |
| T210 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.1872725660 |
|
|
Apr 04 03:01:46 PM PDT 24 |
Apr 04 03:01:57 PM PDT 24 |
4216706707 ps |
| T128 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.1211547315 |
|
|
Apr 04 03:01:05 PM PDT 24 |
Apr 04 03:01:09 PM PDT 24 |
19454845506 ps |
| T705 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.3962887772 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:10:06 PM PDT 24 |
187790288956 ps |
| T706 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2306584210 |
|
|
Apr 04 02:59:53 PM PDT 24 |
Apr 04 02:59:55 PM PDT 24 |
2373862036 ps |
| T707 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.3915863884 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:02:09 PM PDT 24 |
85708394904 ps |
| T708 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.597817786 |
|
|
Apr 04 03:01:22 PM PDT 24 |
Apr 04 03:04:39 PM PDT 24 |
314484322093 ps |
| T709 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.1256368523 |
|
|
Apr 04 03:00:24 PM PDT 24 |
Apr 04 03:00:29 PM PDT 24 |
3604445597 ps |
| T710 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3575548992 |
|
|
Apr 04 03:00:06 PM PDT 24 |
Apr 04 03:00:08 PM PDT 24 |
2535151258 ps |
| T711 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1892172646 |
|
|
Apr 04 03:00:39 PM PDT 24 |
Apr 04 03:00:40 PM PDT 24 |
2184964654 ps |
| T712 |
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3222361753 |
|
|
Apr 04 03:00:50 PM PDT 24 |
Apr 04 03:00:57 PM PDT 24 |
2513170190 ps |
| T713 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.862074582 |
|
|
Apr 04 03:00:40 PM PDT 24 |
Apr 04 03:00:42 PM PDT 24 |
2632425953 ps |
| T714 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.239292951 |
|
|
Apr 04 03:02:08 PM PDT 24 |
Apr 04 03:02:12 PM PDT 24 |
2461910400 ps |
| T715 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.1914530866 |
|
|
Apr 04 03:00:49 PM PDT 24 |
Apr 04 03:00:50 PM PDT 24 |
2232337298 ps |
| T716 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.519187978 |
|
|
Apr 04 03:02:24 PM PDT 24 |
Apr 04 03:03:52 PM PDT 24 |
63342254814 ps |
| T717 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.522154887 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:03:59 PM PDT 24 |
192525432687 ps |
| T148 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.429950880 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:02:48 PM PDT 24 |
115509976400 ps |
| T718 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2051908429 |
|
|
Apr 04 02:59:52 PM PDT 24 |
Apr 04 02:59:56 PM PDT 24 |
2622503584 ps |
| T719 |
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.323689774 |
|
|
Apr 04 03:00:02 PM PDT 24 |
Apr 04 03:00:08 PM PDT 24 |
2057852824 ps |
| T720 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.3318039561 |
|
|
Apr 04 03:02:19 PM PDT 24 |
Apr 04 03:02:21 PM PDT 24 |
2129188428 ps |
| T721 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.4187231913 |
|
|
Apr 04 03:00:44 PM PDT 24 |
Apr 04 03:00:48 PM PDT 24 |
4453529192 ps |
| T722 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1568884803 |
|
|
Apr 04 03:02:01 PM PDT 24 |
Apr 04 03:02:10 PM PDT 24 |
3005631661 ps |
| T723 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.1756014936 |
|
|
Apr 04 03:00:33 PM PDT 24 |
Apr 04 03:00:35 PM PDT 24 |
2133283710 ps |
| T724 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2144696683 |
|
|
Apr 04 03:02:01 PM PDT 24 |
Apr 04 03:02:06 PM PDT 24 |
7492216029 ps |
| T725 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2238353092 |
|
|
Apr 04 03:02:21 PM PDT 24 |
Apr 04 03:02:51 PM PDT 24 |
24839671365 ps |
| T726 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3767334497 |
|
|
Apr 04 03:02:19 PM PDT 24 |
Apr 04 03:02:29 PM PDT 24 |
3703821006 ps |
| T727 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2910963371 |
|
|
Apr 04 03:02:18 PM PDT 24 |
Apr 04 03:02:25 PM PDT 24 |
8555230657 ps |
| T728 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2826292620 |
|
|
Apr 04 03:01:32 PM PDT 24 |
Apr 04 03:01:34 PM PDT 24 |
2162358957 ps |
| T729 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.4157395952 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:01:24 PM PDT 24 |
2147307586 ps |
| T347 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.80732569 |
|
|
Apr 04 03:00:34 PM PDT 24 |
Apr 04 03:00:46 PM PDT 24 |
80073766064 ps |
| T730 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.668090845 |
|
|
Apr 04 03:01:34 PM PDT 24 |
Apr 04 03:01:40 PM PDT 24 |
2193369777 ps |
| T731 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.584513942 |
|
|
Apr 04 03:00:15 PM PDT 24 |
Apr 04 03:00:22 PM PDT 24 |
2468285124 ps |
| T732 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3435301536 |
|
|
Apr 04 03:01:32 PM PDT 24 |
Apr 04 03:01:42 PM PDT 24 |
3785198311 ps |
| T733 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1499238087 |
|
|
Apr 04 03:00:01 PM PDT 24 |
Apr 04 03:00:04 PM PDT 24 |
4001097374 ps |
| T734 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3530741216 |
|
|
Apr 04 03:01:17 PM PDT 24 |
Apr 04 03:09:18 PM PDT 24 |
774659761804 ps |
| T735 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3849435403 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:38 PM PDT 24 |
2518019368 ps |
| T736 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1104976075 |
|
|
Apr 04 02:59:55 PM PDT 24 |
Apr 04 03:00:03 PM PDT 24 |
2549879493 ps |
| T737 |
/workspace/coverage/default/29.sysrst_ctrl_edge_detect.3410343996 |
|
|
Apr 04 03:01:21 PM PDT 24 |
Apr 04 03:01:29 PM PDT 24 |
2743819225 ps |
| T211 |
/workspace/coverage/default/25.sysrst_ctrl_edge_detect.1657742662 |
|
|
Apr 04 03:01:05 PM PDT 24 |
Apr 04 03:01:16 PM PDT 24 |
3714116514 ps |
| T234 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2771922163 |
|
|
Apr 04 03:02:20 PM PDT 24 |
Apr 04 03:02:53 PM PDT 24 |
49951770558 ps |
| T235 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2433887336 |
|
|
Apr 04 02:59:55 PM PDT 24 |
Apr 04 02:59:59 PM PDT 24 |
2194655595 ps |
| T236 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3951281325 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:02:57 PM PDT 24 |
75378466998 ps |
| T237 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.3831252371 |
|
|
Apr 04 03:02:01 PM PDT 24 |
Apr 04 03:02:08 PM PDT 24 |
2112393377 ps |
| T238 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.1449406842 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:03:28 PM PDT 24 |
159552585744 ps |
| T239 |
/workspace/coverage/default/11.sysrst_ctrl_smoke.3683063444 |
|
|
Apr 04 03:00:27 PM PDT 24 |
Apr 04 03:00:29 PM PDT 24 |
2123205295 ps |
| T240 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.2008266445 |
|
|
Apr 04 03:01:44 PM PDT 24 |
Apr 04 03:01:50 PM PDT 24 |
2012025688 ps |
| T241 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.2163715731 |
|
|
Apr 04 03:01:04 PM PDT 24 |
Apr 04 03:01:06 PM PDT 24 |
2598938401 ps |
| T242 |
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.1160400016 |
|
|
Apr 04 03:00:48 PM PDT 24 |
Apr 04 03:00:52 PM PDT 24 |
3330154104 ps |
| T376 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2150052367 |
|
|
Apr 04 03:00:05 PM PDT 24 |
Apr 04 03:03:17 PM PDT 24 |
70620046089 ps |
| T738 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1240546391 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:04:10 PM PDT 24 |
59256319000 ps |
| T739 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.1223361138 |
|
|
Apr 04 02:59:52 PM PDT 24 |
Apr 04 02:59:59 PM PDT 24 |
2511424928 ps |
| T740 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3300723663 |
|
|
Apr 04 03:00:39 PM PDT 24 |
Apr 04 03:00:43 PM PDT 24 |
2516146120 ps |
| T741 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.549048440 |
|
|
Apr 04 02:59:51 PM PDT 24 |
Apr 04 03:06:34 PM PDT 24 |
153383383940 ps |
| T742 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3168726145 |
|
|
Apr 04 03:01:52 PM PDT 24 |
Apr 04 03:02:00 PM PDT 24 |
2610556974 ps |
| T743 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.265235545 |
|
|
Apr 04 03:01:06 PM PDT 24 |
Apr 04 03:01:14 PM PDT 24 |
2608759741 ps |
| T744 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1267680504 |
|
|
Apr 04 03:00:25 PM PDT 24 |
Apr 04 03:01:01 PM PDT 24 |
55524997797 ps |
| T745 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3582365819 |
|
|
Apr 04 03:00:39 PM PDT 24 |
Apr 04 03:00:42 PM PDT 24 |
3293214550 ps |
| T746 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3172066266 |
|
|
Apr 04 03:00:51 PM PDT 24 |
Apr 04 03:00:53 PM PDT 24 |
2535462407 ps |
| T747 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.2381745588 |
|
|
Apr 04 03:00:27 PM PDT 24 |
Apr 04 03:08:51 PM PDT 24 |
186065575353 ps |
| T748 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.3067330514 |
|
|
Apr 04 03:01:34 PM PDT 24 |
Apr 04 03:02:31 PM PDT 24 |
89519206078 ps |
| T749 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.4221111225 |
|
|
Apr 04 03:00:00 PM PDT 24 |
Apr 04 03:01:02 PM PDT 24 |
137960052308 ps |
| T750 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1637739040 |
|
|
Apr 04 03:00:37 PM PDT 24 |
Apr 04 03:00:39 PM PDT 24 |
2631708333 ps |
| T751 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.359081575 |
|
|
Apr 04 03:01:33 PM PDT 24 |
Apr 04 03:01:35 PM PDT 24 |
2933703366 ps |
| T752 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2922017765 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:01:37 PM PDT 24 |
2506824999 ps |
| T753 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.1906616432 |
|
|
Apr 04 03:00:25 PM PDT 24 |
Apr 04 03:00:32 PM PDT 24 |
2612178434 ps |
| T754 |
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3511635682 |
|
|
Apr 04 03:00:23 PM PDT 24 |
Apr 04 03:00:29 PM PDT 24 |
2729810720 ps |
| T755 |
/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2970503740 |
|
|
Apr 04 03:00:36 PM PDT 24 |
Apr 04 03:00:38 PM PDT 24 |
2141649558 ps |
| T756 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.1734852195 |
|
|
Apr 04 03:01:56 PM PDT 24 |
Apr 04 03:06:17 PM PDT 24 |
97318683587 ps |
| T757 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2510458836 |
|
|
Apr 04 03:02:01 PM PDT 24 |
Apr 04 03:02:02 PM PDT 24 |
2039066964 ps |
| T758 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1231891983 |
|
|
Apr 04 03:01:55 PM PDT 24 |
Apr 04 03:02:05 PM PDT 24 |
6635154458 ps |
| T759 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.284621671 |
|
|
Apr 04 03:00:13 PM PDT 24 |
Apr 04 03:00:16 PM PDT 24 |
5005686526 ps |
| T760 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2722500900 |
|
|
Apr 04 03:01:54 PM PDT 24 |
Apr 04 03:01:57 PM PDT 24 |
2015499314 ps |
| T761 |
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2898969058 |
|
|
Apr 04 03:01:34 PM PDT 24 |
Apr 04 03:01:39 PM PDT 24 |
9641886283 ps |
| T762 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1890322509 |
|
|
Apr 04 03:02:18 PM PDT 24 |
Apr 04 03:04:59 PM PDT 24 |
117360722608 ps |
| T763 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2664263292 |
|
|
Apr 04 02:59:52 PM PDT 24 |
Apr 04 02:59:54 PM PDT 24 |
2852400903 ps |
| T764 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.3766247059 |
|
|
Apr 04 02:59:53 PM PDT 24 |
Apr 04 02:59:55 PM PDT 24 |
2198658253 ps |
| T765 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1037827805 |
|
|
Apr 04 03:00:16 PM PDT 24 |
Apr 04 03:08:45 PM PDT 24 |
197703069545 ps |
| T766 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.3735670903 |
|
|
Apr 04 03:01:19 PM PDT 24 |
Apr 04 03:01:23 PM PDT 24 |
4028507616 ps |
| T767 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2246366354 |
|
|
Apr 04 03:02:21 PM PDT 24 |
Apr 04 03:02:30 PM PDT 24 |
8659646164 ps |
| T350 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1785488237 |
|
|
Apr 04 03:01:22 PM PDT 24 |
Apr 04 03:02:13 PM PDT 24 |
51436547871 ps |
| T247 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2486021042 |
|
|
Apr 04 03:00:16 PM PDT 24 |
Apr 04 03:01:07 PM PDT 24 |
20832533569 ps |
| T248 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3285714592 |
|
|
Apr 04 03:02:19 PM PDT 24 |
Apr 04 03:06:56 PM PDT 24 |
105981068174 ps |
| T249 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3478797549 |
|
|
Apr 04 03:00:15 PM PDT 24 |
Apr 04 03:01:20 PM PDT 24 |
52080960407 ps |
| T250 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.1425271786 |
|
|
Apr 04 03:00:00 PM PDT 24 |
Apr 04 03:00:04 PM PDT 24 |
2117804804 ps |
| T251 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.807263672 |
|
|
Apr 04 03:01:31 PM PDT 24 |
Apr 04 03:01:33 PM PDT 24 |
2030710261 ps |
| T252 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.999641859 |
|
|
Apr 04 02:59:51 PM PDT 24 |
Apr 04 02:59:54 PM PDT 24 |
2531852631 ps |
| T213 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.29862926 |
|
|
Apr 04 03:00:11 PM PDT 24 |
Apr 04 03:00:19 PM PDT 24 |
3318758759 ps |
| T253 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3236768512 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:24:46 PM PDT 24 |
1096995273899 ps |
| T254 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2553230460 |
|
|
Apr 04 03:00:25 PM PDT 24 |
Apr 04 03:00:32 PM PDT 24 |
2524963020 ps |
| T255 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.4071444275 |
|
|
Apr 04 03:00:03 PM PDT 24 |
Apr 04 03:00:09 PM PDT 24 |
2013334952 ps |
| T352 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2755774493 |
|
|
Apr 04 03:01:48 PM PDT 24 |
Apr 04 03:02:39 PM PDT 24 |
77400058762 ps |
| T348 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3750781810 |
|
|
Apr 04 03:01:20 PM PDT 24 |
Apr 04 03:01:46 PM PDT 24 |
141045718365 ps |
| T768 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.138553084 |
|
|
Apr 04 03:01:45 PM PDT 24 |
Apr 04 03:01:48 PM PDT 24 |
2480283556 ps |
| T769 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2851923840 |
|
|
Apr 04 03:00:11 PM PDT 24 |
Apr 04 03:08:00 PM PDT 24 |
186771253210 ps |
| T770 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.2263903944 |
|
|
Apr 04 03:00:22 PM PDT 24 |
Apr 04 03:00:28 PM PDT 24 |
2379098708 ps |
| T771 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.741269010 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:01:52 PM PDT 24 |
3655369303 ps |
| T772 |
/workspace/coverage/default/40.sysrst_ctrl_alert_test.279135461 |
|
|
Apr 04 03:01:47 PM PDT 24 |
Apr 04 03:01:51 PM PDT 24 |
2021122341 ps |
| T773 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2057264070 |
|
|
Apr 04 03:02:18 PM PDT 24 |
Apr 04 03:02:24 PM PDT 24 |
2015110141 ps |
| T774 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.2050591591 |
|
|
Apr 04 03:00:50 PM PDT 24 |
Apr 04 03:03:55 PM PDT 24 |
72744635491 ps |
| T775 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3797382351 |
|
|
Apr 04 03:02:19 PM PDT 24 |
Apr 04 03:02:33 PM PDT 24 |
22359039980 ps |
| T776 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.4133157127 |
|
|
Apr 04 03:01:48 PM PDT 24 |
Apr 04 03:03:29 PM PDT 24 |
168705209060 ps |
| T777 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3191089515 |
|
|
Apr 04 03:02:15 PM PDT 24 |
Apr 04 03:06:23 PM PDT 24 |
90784711497 ps |
| T778 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2190065864 |
|
|
Apr 04 03:01:18 PM PDT 24 |
Apr 04 03:06:32 PM PDT 24 |
119029005705 ps |
| T779 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.2277750829 |
|
|
Apr 04 03:01:09 PM PDT 24 |
Apr 04 03:03:02 PM PDT 24 |
39886177264 ps |
| T780 |
/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.420839497 |
|
|
Apr 04 03:01:06 PM PDT 24 |
Apr 04 03:01:08 PM PDT 24 |
2490860165 ps |
| T233 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2843116635 |
|
|
Apr 04 03:00:23 PM PDT 24 |
Apr 04 03:01:27 PM PDT 24 |
100249803391 ps |
| T781 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3036294699 |
|
|
Apr 04 03:01:35 PM PDT 24 |
Apr 04 03:01:39 PM PDT 24 |
3460194938 ps |
| T782 |
/workspace/coverage/default/21.sysrst_ctrl_alert_test.207291170 |
|
|
Apr 04 03:00:48 PM PDT 24 |
Apr 04 03:00:51 PM PDT 24 |
2029963325 ps |
| T783 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2860425123 |
|
|
Apr 04 03:02:02 PM PDT 24 |
Apr 04 03:02:32 PM PDT 24 |
10074519951 ps |
| T784 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3968145176 |
|
|
Apr 04 03:00:53 PM PDT 24 |
Apr 04 03:02:47 PM PDT 24 |
83645593643 ps |
| T785 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.435746358 |
|
|
Apr 04 03:00:53 PM PDT 24 |
Apr 04 03:07:16 PM PDT 24 |
148256329108 ps |
| T786 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.541301045 |
|
|
Apr 04 03:00:16 PM PDT 24 |
Apr 04 03:00:18 PM PDT 24 |
2061303084 ps |
| T787 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2816339392 |
|
|
Apr 04 03:00:04 PM PDT 24 |
Apr 04 03:00:10 PM PDT 24 |
2015072087 ps |
| T267 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect.1904541726 |
|
|
Apr 04 03:01:18 PM PDT 24 |
Apr 04 03:01:59 PM PDT 24 |
81022810251 ps |
| T788 |
/workspace/coverage/default/17.sysrst_ctrl_smoke.1859127358 |
|
|
Apr 04 03:00:37 PM PDT 24 |
Apr 04 03:00:39 PM PDT 24 |
2124436833 ps |
| T789 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1719444160 |
|
|
Apr 04 03:00:14 PM PDT 24 |
Apr 04 03:00:17 PM PDT 24 |
2186512243 ps |
| T790 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.700086490 |
|
|
Apr 04 03:00:03 PM PDT 24 |
Apr 04 03:00:05 PM PDT 24 |
2475114303 ps |
| T791 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3244028784 |
|
|
Apr 04 03:02:17 PM PDT 24 |
Apr 04 03:02:21 PM PDT 24 |
2516482034 ps |
| T792 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.2384233450 |
|
|
Apr 04 03:00:34 PM PDT 24 |
Apr 04 03:00:38 PM PDT 24 |
3911460167 ps |
| T793 |
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2634977720 |
|
|
Apr 04 03:00:04 PM PDT 24 |
Apr 04 03:00:07 PM PDT 24 |
2457851905 ps |
| T281 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3609551140 |
|
|
Apr 04 02:51:31 PM PDT 24 |
Apr 04 02:51:36 PM PDT 24 |
2071350418 ps |
| T794 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.4095978627 |
|
|
Apr 04 02:51:46 PM PDT 24 |
Apr 04 02:51:50 PM PDT 24 |
2025195510 ps |
| T26 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2953317884 |
|
|
Apr 04 02:51:45 PM PDT 24 |
Apr 04 02:51:49 PM PDT 24 |
2137853562 ps |