Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.90 98.92 96.89 100.00 97.44 98.37 99.81 93.85


Total tests in report: 912
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
70.16 70.16 90.30 90.30 77.63 77.63 66.44 66.44 71.79 71.79 90.28 90.28 86.71 86.71 7.95 7.95 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.1885806194
78.60 8.45 94.79 4.50 88.27 10.64 88.70 22.26 73.72 1.92 94.68 4.40 90.08 3.37 20.00 12.05 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.459757299
82.07 3.46 96.36 1.57 90.62 2.35 88.93 0.23 73.72 0.00 96.16 1.48 93.93 3.85 34.77 14.77 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2170454532
84.18 2.11 96.85 0.49 90.93 0.30 88.93 0.00 78.21 4.49 96.56 0.41 95.38 1.45 42.41 7.64 /workspace/coverage/default/11.sysrst_ctrl_stress_all.2539532351
86.09 1.92 97.05 0.21 91.25 0.33 89.38 0.46 80.13 1.92 96.78 0.22 95.95 0.58 52.10 9.69 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4224623945
87.93 1.83 97.39 0.34 91.78 0.53 97.15 7.76 80.13 0.00 96.89 0.11 95.95 0.00 56.21 4.10 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2587460881
89.47 1.54 97.42 0.04 91.81 0.03 97.15 0.00 80.77 0.64 96.93 0.04 96.05 0.10 66.15 9.95 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2843116635
90.69 1.22 97.50 0.07 93.02 1.21 97.83 0.68 80.77 0.00 97.04 0.11 96.05 0.00 72.62 6.46 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.925200552
91.65 0.96 97.63 0.13 93.68 0.66 97.95 0.11 81.41 0.64 97.08 0.04 96.53 0.48 77.28 4.67 /workspace/coverage/default/9.sysrst_ctrl_stress_all.2539486548
92.48 0.83 97.91 0.28 93.93 0.25 97.95 0.00 83.33 1.92 97.34 0.26 97.21 0.67 79.69 2.41 /workspace/coverage/default/29.sysrst_ctrl_stress_all.2175643632
93.07 0.59 98.10 0.19 94.19 0.25 98.17 0.23 83.33 0.00 97.34 0.00 97.21 0.00 83.18 3.49 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.882051371
93.56 0.49 98.23 0.13 94.26 0.08 98.17 0.00 85.90 2.56 97.49 0.15 97.50 0.29 83.38 0.21 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.528878844
93.96 0.40 98.30 0.07 94.26 0.00 98.17 0.00 88.46 2.56 97.63 0.15 97.50 0.00 83.38 0.00 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2871707581
94.28 0.32 98.38 0.07 94.39 0.13 98.17 0.00 89.74 1.28 97.71 0.07 97.88 0.39 83.69 0.31 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1387375678
94.56 0.28 98.38 0.00 94.41 0.03 99.77 1.60 89.74 0.00 97.71 0.00 97.98 0.10 83.95 0.26 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2319261136
94.81 0.24 98.43 0.06 94.44 0.03 99.77 0.00 89.74 0.00 97.71 0.00 98.17 0.19 85.38 1.44 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2922613488
95.03 0.22 98.49 0.06 94.46 0.03 99.77 0.00 91.03 1.28 97.78 0.07 98.27 0.10 85.38 0.00 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1385448582
95.25 0.22 98.54 0.06 94.49 0.03 99.77 0.00 92.31 1.28 97.86 0.07 98.36 0.10 85.38 0.00 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.29862926
95.46 0.21 98.56 0.02 94.64 0.15 99.77 0.00 92.95 0.64 97.93 0.07 98.55 0.19 85.79 0.41 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3720454527
95.65 0.19 98.60 0.04 94.69 0.05 99.77 0.00 92.95 0.00 97.93 0.00 98.55 0.00 87.03 1.23 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3925530068
95.79 0.14 98.60 0.00 95.53 0.83 99.77 0.00 92.95 0.00 97.93 0.00 98.55 0.00 87.18 0.15 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.1332099319
95.93 0.14 98.60 0.00 95.63 0.10 99.77 0.00 92.95 0.00 97.93 0.00 99.33 0.77 87.28 0.10 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3030024393
96.05 0.12 98.64 0.04 95.68 0.05 99.77 0.00 93.59 0.64 97.97 0.04 99.42 0.10 87.28 0.00 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.4106055212
96.17 0.12 98.66 0.02 95.73 0.05 99.77 0.00 94.23 0.64 98.00 0.04 99.52 0.10 87.28 0.00 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.3851170209
96.29 0.12 98.69 0.04 95.75 0.03 99.77 0.00 94.87 0.64 98.04 0.04 99.61 0.10 87.28 0.00 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.1657742662
96.41 0.12 98.73 0.04 95.78 0.03 99.77 0.00 95.51 0.64 98.08 0.04 99.71 0.10 87.28 0.00 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2486021042
96.52 0.11 98.73 0.00 95.78 0.00 99.77 0.00 95.51 0.00 98.08 0.00 99.71 0.00 88.05 0.77 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2199804662
96.62 0.10 98.75 0.02 95.80 0.03 99.77 0.00 96.15 0.64 98.11 0.04 99.71 0.00 88.05 0.00 /workspace/coverage/default/20.sysrst_ctrl_stress_all.3137140690
96.72 0.10 98.75 0.00 95.80 0.00 99.77 0.00 96.15 0.00 98.11 0.00 99.71 0.00 88.77 0.72 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.4056218025
96.82 0.10 98.77 0.02 95.80 0.00 99.77 0.00 96.79 0.64 98.15 0.04 99.71 0.00 88.77 0.00 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.3334090656
96.92 0.10 98.79 0.02 95.80 0.00 99.77 0.00 97.44 0.64 98.19 0.04 99.71 0.00 88.77 0.00 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.1938191037
97.02 0.10 98.79 0.00 96.13 0.33 99.77 0.00 97.44 0.00 98.23 0.04 99.71 0.00 89.08 0.31 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3971267329
97.12 0.10 98.79 0.00 96.13 0.00 99.77 0.00 97.44 0.00 98.23 0.00 99.71 0.00 89.74 0.67 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1040994896
97.20 0.08 98.79 0.00 96.13 0.00 99.77 0.00 97.44 0.00 98.23 0.00 99.71 0.00 90.31 0.56 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3191924964
97.26 0.07 98.79 0.00 96.13 0.00 99.77 0.00 97.44 0.00 98.23 0.00 99.71 0.00 90.77 0.46 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1585794005
97.31 0.05 98.84 0.06 96.21 0.08 100.00 0.23 97.44 0.00 98.23 0.00 99.71 0.00 90.77 0.00 /workspace/coverage/default/13.sysrst_ctrl_alert_test.792844762
97.36 0.05 98.84 0.00 96.21 0.00 100.00 0.00 97.44 0.00 98.23 0.00 99.71 0.00 91.13 0.36 /workspace/coverage/default/2.sysrst_ctrl_stress_all.2527651102
97.40 0.04 98.84 0.00 96.28 0.08 100.00 0.00 97.44 0.00 98.26 0.04 99.71 0.00 91.28 0.15 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3637411879
97.44 0.04 98.88 0.04 96.44 0.15 100.00 0.00 97.44 0.00 98.34 0.07 99.71 0.00 91.28 0.00 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3488277761
97.48 0.04 98.88 0.00 96.44 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.71 0.00 91.54 0.26 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2164889007
97.51 0.04 98.88 0.00 96.44 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.71 0.00 91.79 0.26 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.80732569
97.55 0.04 98.88 0.00 96.44 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.71 0.00 92.05 0.26 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2983599227
97.59 0.04 98.88 0.00 96.44 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.71 0.00 92.31 0.26 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1589562401
97.61 0.03 98.88 0.00 96.61 0.18 100.00 0.00 97.44 0.00 98.34 0.00 99.71 0.00 92.31 0.00 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.3386083564
97.63 0.02 98.88 0.00 96.61 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.71 0.00 92.46 0.15 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.3512680981
97.66 0.02 98.88 0.00 96.61 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.71 0.00 92.62 0.15 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.1402919734
97.68 0.02 98.88 0.00 96.76 0.15 100.00 0.00 97.44 0.00 98.34 0.00 99.71 0.00 92.62 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.3952877359
97.70 0.02 98.88 0.00 96.81 0.05 100.00 0.00 97.44 0.00 98.34 0.00 99.81 0.10 92.62 0.00 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.1428946382
97.72 0.02 98.90 0.02 96.81 0.00 100.00 0.00 97.44 0.00 98.34 0.00 99.81 0.00 92.72 0.10 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3285071991
97.73 0.02 98.92 0.02 96.81 0.00 100.00 0.00 97.44 0.00 98.37 0.04 99.81 0.00 92.77 0.05 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3824356643
97.75 0.01 98.92 0.00 96.81 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 92.87 0.10 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.575559366
97.76 0.01 98.92 0.00 96.81 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 92.97 0.10 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1904541726
97.78 0.01 98.92 0.00 96.81 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.08 0.10 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3750781810
97.79 0.01 98.92 0.00 96.81 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.18 0.10 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1785488237
97.80 0.01 98.92 0.00 96.81 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.28 0.10 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2755774493
97.82 0.01 98.92 0.00 96.84 0.03 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.33 0.05 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.585200208
97.82 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.38 0.05 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1878506774
97.83 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.44 0.05 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.861583900
97.84 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.49 0.05 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.523314562
97.84 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.54 0.05 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2129580624
97.85 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.59 0.05 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2160768867
97.86 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.64 0.05 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2211456333
97.87 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.69 0.05 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.686441384
97.87 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.74 0.05 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.4263116219
97.88 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.79 0.05 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2863254428
97.89 0.01 98.92 0.00 96.84 0.00 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.85 0.05 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1331132847
97.89 0.01 98.92 0.00 96.87 0.03 100.00 0.00 97.44 0.00 98.37 0.00 99.81 0.00 93.85 0.00 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3952498619


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.115434392
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.3654989018
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3837960609
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.511143940
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.6343928
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3632573650
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.558722264
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2229139609
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.131750356
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.777634093
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1309062671
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3853299394
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3254825663
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1371839667
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3140976579
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3703098125
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1879038638
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.4046923762
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.641705489
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2655536058
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3609551140
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3201394602
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1677926894
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2716180470
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.339453976
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1819076582
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2235838941
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3622831750
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2315551912
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3022254443
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1497782832
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.370026465
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.32642233
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2738896981
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.2574735163
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2808663282
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.3911603540
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2739206256
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3525019987
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.129320338
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1929616216
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1336828967
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1035907667
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.582911409
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2953317884
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2777828867
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.4095978627
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1269143332
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2916313352
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1193232207
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1080308987
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.21723044
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3966715062
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1002888001
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1910921426
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.3107989678
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3518878054
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.3366135889
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3635536924
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.1256564101
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1731226296
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.3504101592
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3479939606
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.1838789743
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.426868993
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.533696035
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.3446685069
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2629342799
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.2301174749
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.2114998976
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2026484789
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.107913176
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.1408442375
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.213686046
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2457749853
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.482452698
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.1174954838
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.1468970709
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.3986644082
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.1825529512
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.1940941379
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.2965297188
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.1196855309
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.2427661508
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/workspace/coverage/default/41.sysrst_ctrl_stress_all.1231891983
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1913402091
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2722500900
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.609470112
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1124707570
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1900619973
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2713410317
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.4111437657
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.173341530
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3007639132
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.569817293
/workspace/coverage/default/42.sysrst_ctrl_smoke.1018029798
/workspace/coverage/default/42.sysrst_ctrl_stress_all.4147353195
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.867389579
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3009737400
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2510458836
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2258564734
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.487039907
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3599245326
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2005905618
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.782362867
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.834533653
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.30834821
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.118616416
/workspace/coverage/default/43.sysrst_ctrl_smoke.2184813846
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1626394736
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1331262156
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1927547173
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.602958964
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.385231359
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3253071830
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.4125867900
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3236768512
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1303334053
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3876708993
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3549407847
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.855647618
/workspace/coverage/default/44.sysrst_ctrl_smoke.2439998216
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3636357545
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3697171469
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2339773294
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3101541277
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1346297418
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2400047808
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3141752656
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1179688995
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2134782467
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3870696574
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2278708883
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1719555307
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3940410169
/workspace/coverage/default/45.sysrst_ctrl_smoke.3831252371
/workspace/coverage/default/45.sysrst_ctrl_stress_all.4211838568
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.66223946
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1785879553
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.4148943249
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1640427362
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2024849287
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1568884803
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1719675018
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1080868700
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3994094101
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2701657017
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1182411335
/workspace/coverage/default/46.sysrst_ctrl_smoke.2122516426
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1984875632
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3304268032
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2019152365
/workspace/coverage/default/47.sysrst_ctrl_alert_test.932122453
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2860425123
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2438797467
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.734201569
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1607718640
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.368289250
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1537404643
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.330640649
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2890797159
/workspace/coverage/default/47.sysrst_ctrl_smoke.734940354
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2144696683
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1323906095
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2057264070
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3374477639
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2913601704
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1890322509
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.4246570790
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1308607069
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1741684816
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.239292951
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1427762211
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1639338783
/workspace/coverage/default/48.sysrst_ctrl_smoke.2726907288
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3191089515
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.828604087
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2246366354
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1697800493
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3728075677
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1006682821
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.4073638137
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3767334497
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.4050375036
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.250031178
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2561061747
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3884069633
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3244028784
/workspace/coverage/default/49.sysrst_ctrl_smoke.3318039561
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3315429853
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2910963371
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2816339392
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1384632688
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2150052367
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2600041404
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.265872813
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.892472383
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3288758678
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.700086490
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.4098499333
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1803632165
/workspace/coverage/default/5.sysrst_ctrl_smoke.3333753670
/workspace/coverage/default/5.sysrst_ctrl_stress_all.4149316772
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.4123697377
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.865938688
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.643813388
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.866307701
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2885616898
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2196574099
/workspace/coverage/default/6.sysrst_ctrl_alert_test.4071444275
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1499238087
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.931690199
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1063908878
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.421657637
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3278916376
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1816195340
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2634977720
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.323689774
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1439407827
/workspace/coverage/default/6.sysrst_ctrl_smoke.1425271786
/workspace/coverage/default/6.sysrst_ctrl_stress_all.4221111225
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3021366771
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1727759547
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.715001127
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2646234471
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3357093251
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3797382351
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2611377482
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2047741340
/workspace/coverage/default/7.sysrst_ctrl_alert_test.146054200
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3388085860
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2851923840
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3989457880
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.556400624
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3929059329
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.675127803
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3008402413
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3341531722
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3753117313
/workspace/coverage/default/7.sysrst_ctrl_smoke.945004682
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1037827805
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2899495839
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.307705058
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.519187978
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.116709391
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4279026738
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2879464419
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.334705721
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2536257336
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3285714592
/workspace/coverage/default/8.sysrst_ctrl_alert_test.541301045
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2234333203
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1366378695
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1991189139
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2299930858
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.202232078
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.836927146
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3424295692
/workspace/coverage/default/8.sysrst_ctrl_smoke.1340179372
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1365159396
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.284621671
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2707780435
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.639057025
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2238353092
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.176216883
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2692947577
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.109100040
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4233534332
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2771922163
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1778374426
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3371201566
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4277853863
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3478797549
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3166149855
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1170475294
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1990968912
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1477130884
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1719444160
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2194981793
/workspace/coverage/default/9.sysrst_ctrl_smoke.4258192417
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3002309854
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2544438329
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3031262055
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2430935194
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4142468415
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.4145246542
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2219581578
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.4140926771
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.4214384604




Total test records in report: 912
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T5 /workspace/coverage/default/47.sysrst_ctrl_alert_test.932122453 Apr 04 03:02:08 PM PDT 24 Apr 04 03:02:14 PM PDT 24 2012660308 ps
T1 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.1308607069 Apr 04 03:02:15 PM PDT 24 Apr 04 03:02:17 PM PDT 24 2434470005 ps
T2 /workspace/coverage/default/9.sysrst_ctrl_stress_all.2539486548 Apr 04 03:00:13 PM PDT 24 Apr 04 03:05:26 PM PDT 24 129052049061 ps
T12 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1218547670 Apr 04 03:00:50 PM PDT 24 Apr 04 03:00:53 PM PDT 24 2639082748 ps
T13 /workspace/coverage/default/45.sysrst_ctrl_alert_test.3101541277 Apr 04 03:02:04 PM PDT 24 Apr 04 03:02:08 PM PDT 24 2018612484 ps
T3 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.1885806194 Apr 04 02:59:55 PM PDT 24 Apr 04 03:01:28 PM PDT 24 38313195758 ps
T14 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.173341530 Apr 04 03:01:54 PM PDT 24 Apr 04 03:02:02 PM PDT 24 2464432039 ps
T15 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.782362867 Apr 04 03:02:03 PM PDT 24 Apr 04 03:02:06 PM PDT 24 2630662408 ps
T16 /workspace/coverage/default/44.sysrst_ctrl_alert_test.1927547173 Apr 04 03:02:05 PM PDT 24 Apr 04 03:02:07 PM PDT 24 2033079287 ps
T17 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.2685204624 Apr 04 03:01:47 PM PDT 24 Apr 04 03:01:57 PM PDT 24 3594999666 ps
T4 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.1728810348 Apr 04 03:00:38 PM PDT 24 Apr 04 03:00:41 PM PDT 24 3534550000 ps
T25 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.116709391 Apr 04 03:02:21 PM PDT 24 Apr 04 03:02:54 PM PDT 24 25589685922 ps
T50 /workspace/coverage/default/2.sysrst_ctrl_alert_test.41132375 Apr 04 02:59:56 PM PDT 24 Apr 04 03:00:02 PM PDT 24 2012094676 ps
T6 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.1587494090 Apr 04 03:01:35 PM PDT 24 Apr 04 03:02:04 PM PDT 24 44619813515 ps
T51 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2742456232 Apr 04 03:01:34 PM PDT 24 Apr 04 03:01:37 PM PDT 24 3024068550 ps
T7 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2587460881 Apr 04 03:02:18 PM PDT 24 Apr 04 03:03:37 PM PDT 24 40015225888 ps
T30 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2544438329 Apr 04 03:00:17 PM PDT 24 Apr 04 03:00:19 PM PDT 24 5324756140 ps
T120 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.4199332028 Apr 04 03:00:05 PM PDT 24 Apr 04 03:00:07 PM PDT 24 2194941791 ps
T23 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.4014804270 Apr 04 03:00:48 PM PDT 24 Apr 04 03:00:49 PM PDT 24 2544594577 ps
T8 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3971267329 Apr 04 03:00:49 PM PDT 24 Apr 04 03:00:50 PM PDT 24 11699648216 ps
T53 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2019152365 Apr 04 03:02:01 PM PDT 24 Apr 04 03:02:08 PM PDT 24 2589195227 ps
T54 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3110380724 Apr 04 03:01:50 PM PDT 24 Apr 04 03:01:53 PM PDT 24 7182436706 ps
T121 /workspace/coverage/default/29.sysrst_ctrl_smoke.3481988198 Apr 04 03:01:18 PM PDT 24 Apr 04 03:01:20 PM PDT 24 2135137620 ps
T9 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3925530068 Apr 04 03:02:19 PM PDT 24 Apr 04 03:05:53 PM PDT 24 160091860939 ps
T124 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3337141635 Apr 04 02:59:43 PM PDT 24 Apr 04 02:59:44 PM PDT 24 2106697489 ps
T65 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1270411024 Apr 04 03:01:07 PM PDT 24 Apr 04 03:01:08 PM PDT 24 2677213689 ps
T125 /workspace/coverage/default/25.sysrst_ctrl_alert_test.243139055 Apr 04 03:01:06 PM PDT 24 Apr 04 03:01:08 PM PDT 24 2029160064 ps
T126 /workspace/coverage/default/20.sysrst_ctrl_alert_test.432482397 Apr 04 03:00:52 PM PDT 24 Apr 04 03:00:55 PM PDT 24 2021888504 ps
T66 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.1011075741 Apr 04 03:01:21 PM PDT 24 Apr 04 03:01:28 PM PDT 24 2615590376 ps
T67 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2341737106 Apr 04 03:01:06 PM PDT 24 Apr 04 03:01:08 PM PDT 24 2729398274 ps
T10 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3253071830 Apr 04 03:02:04 PM PDT 24 Apr 04 03:05:57 PM PDT 24 85319852049 ps
T304 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3884069633 Apr 04 03:02:16 PM PDT 24 Apr 04 03:02:18 PM PDT 24 2097140292 ps
T11 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.459757299 Apr 04 03:00:15 PM PDT 24 Apr 04 03:01:04 PM PDT 24 76027338308 ps
T32 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.2067968644 Apr 04 03:00:47 PM PDT 24 Apr 04 03:02:02 PM PDT 24 116381674610 ps
T55 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.103668224 Apr 04 03:01:47 PM PDT 24 Apr 04 03:01:50 PM PDT 24 3382954122 ps
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T187 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2319261136 Apr 04 02:59:56 PM PDT 24 Apr 04 03:00:07 PM PDT 24 22113925063 ps
T188 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3624431147 Apr 04 03:01:49 PM PDT 24 Apr 04 03:01:51 PM PDT 24 2282136259 ps
T68 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2882912758 Apr 04 03:01:46 PM PDT 24 Apr 04 03:01:48 PM PDT 24 2661262919 ps
T31 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.66223946 Apr 04 03:02:04 PM PDT 24 Apr 04 03:02:12 PM PDT 24 4753746823 ps
T189 /workspace/coverage/default/5.sysrst_ctrl_smoke.3333753670 Apr 04 03:00:02 PM PDT 24 Apr 04 03:00:04 PM PDT 24 2130423937 ps
T190 /workspace/coverage/default/37.sysrst_ctrl_smoke.1283156710 Apr 04 03:01:36 PM PDT 24 Apr 04 03:01:38 PM PDT 24 2130782920 ps
T69 /workspace/coverage/default/26.sysrst_ctrl_stress_all.1885586421 Apr 04 03:01:15 PM PDT 24 Apr 04 03:01:40 PM PDT 24 8915139576 ps
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T34 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.3390411230 Apr 04 03:01:20 PM PDT 24 Apr 04 03:01:23 PM PDT 24 5054020744 ps
T21 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3176081588 Apr 04 03:00:05 PM PDT 24 Apr 04 03:00:12 PM PDT 24 2445181222 ps
T70 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.3513315108 Apr 04 03:00:51 PM PDT 24 Apr 04 03:00:54 PM PDT 24 2629014754 ps
T22 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.2505290648 Apr 04 03:01:34 PM PDT 24 Apr 04 03:01:37 PM PDT 24 2507931096 ps
T41 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1201932110 Apr 04 03:00:48 PM PDT 24 Apr 04 03:00:57 PM PDT 24 3329548012 ps
T42 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1606359299 Apr 04 03:01:36 PM PDT 24 Apr 04 03:01:42 PM PDT 24 3956230863 ps
T43 /workspace/coverage/default/46.sysrst_ctrl_stress_all.1984875632 Apr 04 03:02:02 PM PDT 24 Apr 04 03:02:50 PM PDT 24 75041414584 ps
T168 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3007639132 Apr 04 03:01:52 PM PDT 24 Apr 04 03:01:54 PM PDT 24 2138071307 ps
T169 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.4156165646 Apr 04 03:00:38 PM PDT 24 Apr 04 03:00:44 PM PDT 24 3454057284 ps
T58 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.4018279554 Apr 04 03:01:19 PM PDT 24 Apr 04 03:01:23 PM PDT 24 2485718280 ps
T44 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.878999128 Apr 04 02:59:50 PM PDT 24 Apr 04 02:59:54 PM PDT 24 3628384913 ps
T56 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1233189007 Apr 04 03:01:06 PM PDT 24 Apr 04 03:01:09 PM PDT 24 5160092182 ps
T86 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.4180207412 Apr 04 02:59:54 PM PDT 24 Apr 04 03:00:01 PM PDT 24 2401744879 ps
T45 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.575559366 Apr 04 03:00:24 PM PDT 24 Apr 04 03:00:34 PM PDT 24 3586657968 ps
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T312 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.483937698 Apr 04 03:00:50 PM PDT 24 Apr 04 03:00:51 PM PDT 24 2718204817 ps
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T46 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2600041404 Apr 04 03:00:00 PM PDT 24 Apr 04 03:01:08 PM PDT 24 25833727279 ps
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T33 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1585794005 Apr 04 03:02:05 PM PDT 24 Apr 04 03:04:45 PM PDT 24 94052743372 ps
T47 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2922613488 Apr 04 03:01:05 PM PDT 24 Apr 04 03:04:23 PM PDT 24 73544778943 ps
T40 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.828604087 Apr 04 03:02:21 PM PDT 24 Apr 04 03:02:58 PM PDT 24 16145646670 ps
T227 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1032977049 Apr 04 03:01:53 PM PDT 24 Apr 04 03:01:56 PM PDT 24 2534336442 ps
T228 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.4024307507 Apr 04 03:01:34 PM PDT 24 Apr 04 03:01:37 PM PDT 24 2624101355 ps
T229 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1256672589 Apr 04 02:59:50 PM PDT 24 Apr 04 02:59:58 PM PDT 24 2509688640 ps
T72 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1878506774 Apr 04 02:59:52 PM PDT 24 Apr 04 03:01:41 PM PDT 24 121680772769 ps
T230 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1033161435 Apr 04 02:59:43 PM PDT 24 Apr 04 02:59:49 PM PDT 24 2250476750 ps
T48 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.857711032 Apr 04 03:00:51 PM PDT 24 Apr 04 03:00:56 PM PDT 24 3776442891 ps
T57 /workspace/coverage/default/10.sysrst_ctrl_stress_all.2979397188 Apr 04 03:00:26 PM PDT 24 Apr 04 03:00:42 PM PDT 24 10373959243 ps
T49 /workspace/coverage/default/29.sysrst_ctrl_stress_all.2175643632 Apr 04 03:01:22 PM PDT 24 Apr 04 03:01:43 PM PDT 24 14820911287 ps
T35 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.3686854972 Apr 04 03:01:45 PM PDT 24 Apr 04 03:01:49 PM PDT 24 2739021589 ps
T36 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.3361615321 Apr 04 03:01:05 PM PDT 24 Apr 04 03:01:32 PM PDT 24 20382117787 ps
T87 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1076982999 Apr 04 03:00:52 PM PDT 24 Apr 04 03:01:02 PM PDT 24 3675450199 ps
T129 /workspace/coverage/default/46.sysrst_ctrl_alert_test.1785879553 Apr 04 03:02:08 PM PDT 24 Apr 04 03:02:11 PM PDT 24 2015753927 ps
T130 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.983545737 Apr 04 02:59:54 PM PDT 24 Apr 04 02:59:56 PM PDT 24 3862411556 ps
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T37 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.3230584206 Apr 04 03:00:25 PM PDT 24 Apr 04 03:00:32 PM PDT 24 2392741198 ps
T132 /workspace/coverage/default/16.sysrst_ctrl_stress_all.2904921860 Apr 04 03:00:37 PM PDT 24 Apr 04 03:00:42 PM PDT 24 6774974481 ps
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T38 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.1428946382 Apr 04 03:00:36 PM PDT 24 Apr 04 03:00:38 PM PDT 24 2829573553 ps
T117 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3371201566 Apr 04 03:00:14 PM PDT 24 Apr 04 03:00:22 PM PDT 24 3509902175 ps
T73 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4279026738 Apr 04 03:02:19 PM PDT 24 Apr 04 03:03:24 PM PDT 24 24583896483 ps
T193 /workspace/coverage/default/46.sysrst_ctrl_smoke.2122516426 Apr 04 03:02:01 PM PDT 24 Apr 04 03:02:07 PM PDT 24 2112501392 ps
T118 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2258564734 Apr 04 03:02:00 PM PDT 24 Apr 04 03:02:10 PM PDT 24 3378954854 ps
T194 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3637411879 Apr 04 03:01:36 PM PDT 24 Apr 04 03:01:55 PM PDT 24 14765765336 ps
T80 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.4106055212 Apr 04 03:01:49 PM PDT 24 Apr 04 03:01:53 PM PDT 24 3154560123 ps
T383 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.117043321 Apr 04 03:00:25 PM PDT 24 Apr 04 03:00:27 PM PDT 24 10176618829 ps
T268 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.1402919734 Apr 04 03:01:46 PM PDT 24 Apr 04 03:03:06 PM PDT 24 139481322171 ps
T127 /workspace/coverage/default/13.sysrst_ctrl_stress_all.1076408526 Apr 04 03:00:35 PM PDT 24 Apr 04 03:02:20 PM PDT 24 149412583710 ps
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T385 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.2582719050 Apr 04 03:00:47 PM PDT 24 Apr 04 03:00:50 PM PDT 24 4385716185 ps
T119 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1063908878 Apr 04 03:00:05 PM PDT 24 Apr 04 03:00:52 PM PDT 24 70442133410 ps
T386 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3134287428 Apr 04 03:01:20 PM PDT 24 Apr 04 03:01:22 PM PDT 24 2731292990 ps
T88 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.2361583969 Apr 04 03:01:30 PM PDT 24 Apr 04 03:04:13 PM PDT 24 126182889190 ps
T102 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1204369157 Apr 04 03:00:35 PM PDT 24 Apr 04 03:00:42 PM PDT 24 2608289321 ps
T103 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.3859721223 Apr 04 03:01:23 PM PDT 24 Apr 04 03:01:31 PM PDT 24 2786032973 ps
T104 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.245140222 Apr 04 02:59:55 PM PDT 24 Apr 04 02:59:58 PM PDT 24 3514793406 ps
T89 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.2573541523 Apr 04 03:01:07 PM PDT 24 Apr 04 03:01:45 PM PDT 24 23083173154 ps
T90 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.3541374615 Apr 04 03:01:34 PM PDT 24 Apr 04 03:05:09 PM PDT 24 90780013145 ps
T105 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3996794980 Apr 04 03:01:20 PM PDT 24 Apr 04 03:01:22 PM PDT 24 3263295635 ps
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T107 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2299930858 Apr 04 03:00:14 PM PDT 24 Apr 04 03:00:17 PM PDT 24 2623450649 ps
T108 /workspace/coverage/default/31.sysrst_ctrl_alert_test.2257283934 Apr 04 03:01:21 PM PDT 24 Apr 04 03:01:28 PM PDT 24 2011968050 ps
T316 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2987288911 Apr 04 03:00:34 PM PDT 24 Apr 04 03:00:38 PM PDT 24 3892414127 ps
T387 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.4246570790 Apr 04 03:02:04 PM PDT 24 Apr 04 03:02:09 PM PDT 24 3436392600 ps
T59 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3407378927 Apr 04 03:01:05 PM PDT 24 Apr 04 03:01:07 PM PDT 24 2512906450 ps
T39 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.3929059329 Apr 04 03:00:15 PM PDT 24 Apr 04 03:00:17 PM PDT 24 5696431434 ps
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T176 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3728075677 Apr 04 03:02:15 PM PDT 24 Apr 04 03:03:10 PM PDT 24 26424555082 ps
T74 /workspace/coverage/default/11.sysrst_ctrl_stress_all.2539532351 Apr 04 03:00:23 PM PDT 24 Apr 04 03:00:54 PM PDT 24 15790171465 ps
T138 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.4042188724 Apr 04 03:01:21 PM PDT 24 Apr 04 03:01:31 PM PDT 24 3616536166 ps
T139 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3625323922 Apr 04 02:59:41 PM PDT 24 Apr 04 02:59:48 PM PDT 24 2302126734 ps
T140 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1064120213 Apr 04 03:01:32 PM PDT 24 Apr 04 03:01:36 PM PDT 24 2514873395 ps
T60 /workspace/coverage/default/45.sysrst_ctrl_stress_all.4211838568 Apr 04 03:02:01 PM PDT 24 Apr 04 03:02:59 PM PDT 24 91519335137 ps
T141 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.882051371 Apr 04 03:02:21 PM PDT 24 Apr 04 03:05:26 PM PDT 24 147230132579 ps
T142 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.1366378695 Apr 04 03:00:12 PM PDT 24 Apr 04 03:02:25 PM PDT 24 110068504315 ps
T143 /workspace/coverage/default/18.sysrst_ctrl_smoke.1360820399 Apr 04 03:00:44 PM PDT 24 Apr 04 03:00:46 PM PDT 24 2126584290 ps
T144 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3180742354 Apr 04 03:00:52 PM PDT 24 Apr 04 03:00:53 PM PDT 24 5180170581 ps
T145 /workspace/coverage/default/10.sysrst_ctrl_alert_test.3788280278 Apr 04 03:00:25 PM PDT 24 Apr 04 03:00:27 PM PDT 24 2035354174 ps
T314 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.924263267 Apr 04 03:01:09 PM PDT 24 Apr 04 03:01:10 PM PDT 24 2615494756 ps
T151 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3720454527 Apr 04 02:59:50 PM PDT 24 Apr 04 03:00:38 PM PDT 24 37843304691 ps
T75 /workspace/coverage/default/30.sysrst_ctrl_stress_all.3345755469 Apr 04 03:01:22 PM PDT 24 Apr 04 03:01:30 PM PDT 24 12142724127 ps
T61 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2170454532 Apr 04 03:02:16 PM PDT 24 Apr 04 03:02:49 PM PDT 24 13228445644 ps
T62 /workspace/coverage/default/0.sysrst_ctrl_stress_all.2786878695 Apr 04 02:59:53 PM PDT 24 Apr 04 03:00:30 PM PDT 24 13780360877 ps
T91 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.2400047808 Apr 04 03:02:05 PM PDT 24 Apr 04 03:04:26 PM PDT 24 53961288569 ps
T243 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.4141702854 Apr 04 03:00:35 PM PDT 24 Apr 04 03:00:40 PM PDT 24 3251845825 ps
T63 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3068755642 Apr 04 03:01:19 PM PDT 24 Apr 04 03:01:41 PM PDT 24 32985749317 ps
T244 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.639057025 Apr 04 03:02:21 PM PDT 24 Apr 04 03:02:47 PM PDT 24 40125120029 ps
T245 /workspace/coverage/default/30.sysrst_ctrl_alert_test.178874677 Apr 04 03:01:20 PM PDT 24 Apr 04 03:01:24 PM PDT 24 2020598425 ps
T246 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1352987507 Apr 04 03:00:47 PM PDT 24 Apr 04 03:07:07 PM PDT 24 180194973703 ps
T305 /workspace/coverage/default/28.sysrst_ctrl_smoke.154263308 Apr 04 03:01:21 PM PDT 24 Apr 04 03:01:27 PM PDT 24 2109243329 ps
T171 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2747055863 Apr 04 03:00:47 PM PDT 24 Apr 04 03:03:17 PM PDT 24 60015240929 ps
T76 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1937554601 Apr 04 03:00:53 PM PDT 24 Apr 04 03:01:00 PM PDT 24 6909079000 ps
T388 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.294174553 Apr 04 03:00:53 PM PDT 24 Apr 04 03:00:59 PM PDT 24 2095167295 ps
T389 /workspace/coverage/default/27.sysrst_ctrl_alert_test.4147001266 Apr 04 03:01:18 PM PDT 24 Apr 04 03:01:20 PM PDT 24 2029077082 ps
T195 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.972566860 Apr 04 02:59:52 PM PDT 24 Apr 04 02:59:59 PM PDT 24 3331268842 ps
T390 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3588144041 Apr 04 03:01:33 PM PDT 24 Apr 04 03:01:36 PM PDT 24 3616259690 ps
T77 /workspace/coverage/default/28.sysrst_ctrl_stress_all.2967618374 Apr 04 03:01:21 PM PDT 24 Apr 04 03:01:27 PM PDT 24 12956739317 ps
T391 /workspace/coverage/default/3.sysrst_ctrl_smoke.4288982292 Apr 04 02:59:52 PM PDT 24 Apr 04 02:59:54 PM PDT 24 2143512910 ps
T92 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3739118354 Apr 04 03:00:37 PM PDT 24 Apr 04 03:01:12 PM PDT 24 26584323077 ps
T392 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.2935168330 Apr 04 03:01:42 PM PDT 24 Apr 04 03:01:45 PM PDT 24 2625148230 ps
T393 /workspace/coverage/default/0.sysrst_ctrl_alert_test.3217333002 Apr 04 02:59:52 PM PDT 24 Apr 04 02:59:54 PM PDT 24 2038142434 ps
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T395 /workspace/coverage/default/37.sysrst_ctrl_alert_test.2935217373 Apr 04 03:01:47 PM PDT 24 Apr 04 03:01:53 PM PDT 24 2013844279 ps
T79 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3489970483 Apr 04 03:01:31 PM PDT 24 Apr 04 03:01:54 PM PDT 24 31262709378 ps
T64 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.3074675822 Apr 04 02:59:54 PM PDT 24 Apr 04 02:59:56 PM PDT 24 2488812941 ps
T396 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2231288831 Apr 04 03:01:05 PM PDT 24 Apr 04 03:01:08 PM PDT 24 2631562602 ps
T397 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.250031178 Apr 04 03:02:19 PM PDT 24 Apr 04 03:02:20 PM PDT 24 2781333554 ps
T287 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.867389579 Apr 04 03:01:54 PM PDT 24 Apr 04 03:05:37 PM PDT 24 86189099302 ps
T398 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2008124203 Apr 04 03:01:33 PM PDT 24 Apr 04 03:01:34 PM PDT 24 2216382882 ps
T78 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.1350962466 Apr 04 03:01:04 PM PDT 24 Apr 04 03:01:06 PM PDT 24 6954705701 ps
T172 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1907902265 Apr 04 03:00:53 PM PDT 24 Apr 04 03:00:57 PM PDT 24 6227661754 ps
T399 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3008402413 Apr 04 03:00:11 PM PDT 24 Apr 04 03:00:13 PM PDT 24 2469263901 ps
T400 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3959343952 Apr 04 03:01:22 PM PDT 24 Apr 04 03:01:27 PM PDT 24 2467632830 ps
T401 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.420442636 Apr 04 03:01:47 PM PDT 24 Apr 04 03:01:50 PM PDT 24 2500205198 ps
T259 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.4140926771 Apr 04 03:02:21 PM PDT 24 Apr 04 03:03:13 PM PDT 24 71938126774 ps
T402 /workspace/coverage/default/43.sysrst_ctrl_smoke.2184813846 Apr 04 03:01:54 PM PDT 24 Apr 04 03:01:56 PM PDT 24 2133940416 ps
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T404 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.422891287 Apr 04 03:01:31 PM PDT 24 Apr 04 03:01:38 PM PDT 24 2507630387 ps
T283 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2329609633 Apr 04 02:59:55 PM PDT 24 Apr 04 03:00:04 PM PDT 24 22120866121 ps
T338 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3191924964 Apr 04 03:00:52 PM PDT 24 Apr 04 03:04:39 PM PDT 24 160160054050 ps
T405 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2972046345 Apr 04 03:01:20 PM PDT 24 Apr 04 03:01:24 PM PDT 24 2451356214 ps
T152 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.2487586397 Apr 04 03:00:22 PM PDT 24 Apr 04 03:00:25 PM PDT 24 2803469237 ps
T173 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.3801421625 Apr 04 03:00:48 PM PDT 24 Apr 04 03:00:53 PM PDT 24 3007885276 ps
T288 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2273736393 Apr 04 03:00:35 PM PDT 24 Apr 04 03:02:24 PM PDT 24 51762934514 ps
T337 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.587724095 Apr 04 03:00:23 PM PDT 24 Apr 04 03:01:53 PM PDT 24 132175246420 ps
T83 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2129580624 Apr 04 03:01:32 PM PDT 24 Apr 04 03:06:47 PM PDT 24 1242011890689 ps
T153 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.1719675018 Apr 04 03:02:00 PM PDT 24 Apr 04 03:02:01 PM PDT 24 3408464743 ps
T82 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2339773294 Apr 04 03:02:02 PM PDT 24 Apr 04 03:03:38 PM PDT 24 784350601331 ps
T260 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2983599227 Apr 04 03:02:20 PM PDT 24 Apr 04 03:04:02 PM PDT 24 89321218684 ps
T406 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1085530737 Apr 04 03:01:20 PM PDT 24 Apr 04 03:01:31 PM PDT 24 3845847407 ps
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T345 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3285071991 Apr 04 03:01:47 PM PDT 24 Apr 04 03:04:56 PM PDT 24 73837452080 ps
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T439 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2005283660 Apr 04 03:00:47 PM PDT 24 Apr 04 03:01:42 PM PDT 24 22574972271 ps
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T98 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.4057877839 Apr 04 02:59:52 PM PDT 24 Apr 04 03:00:49 PM PDT 24 71211048142 ps
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