| T215 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.1872619573 |
|
|
Apr 15 01:01:53 PM PDT 24 |
Apr 15 01:01:58 PM PDT 24 |
3409702425 ps |
| T608 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2308365755 |
|
|
Apr 15 01:01:16 PM PDT 24 |
Apr 15 01:01:19 PM PDT 24 |
2918822475 ps |
| T609 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.2252946112 |
|
|
Apr 15 01:01:09 PM PDT 24 |
Apr 15 01:01:11 PM PDT 24 |
2204718152 ps |
| T610 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1207513511 |
|
|
Apr 15 01:03:15 PM PDT 24 |
Apr 15 01:07:28 PM PDT 24 |
90886996009 ps |
| T164 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.4251588017 |
|
|
Apr 15 01:02:28 PM PDT 24 |
Apr 15 01:03:11 PM PDT 24 |
73069912305 ps |
| T167 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.3605406142 |
|
|
Apr 15 01:02:20 PM PDT 24 |
Apr 15 01:02:22 PM PDT 24 |
3248731463 ps |
| T168 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.2701973480 |
|
|
Apr 15 01:02:02 PM PDT 24 |
Apr 15 01:02:09 PM PDT 24 |
2109031446 ps |
| T169 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.468813389 |
|
|
Apr 15 01:02:43 PM PDT 24 |
Apr 15 01:02:46 PM PDT 24 |
2049218723 ps |
| T170 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.69003672 |
|
|
Apr 15 01:02:12 PM PDT 24 |
Apr 15 01:02:16 PM PDT 24 |
2251013985 ps |
| T171 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.2062035358 |
|
|
Apr 15 01:01:31 PM PDT 24 |
Apr 15 01:01:39 PM PDT 24 |
2513018375 ps |
| T172 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1062839437 |
|
|
Apr 15 01:01:55 PM PDT 24 |
Apr 15 01:02:03 PM PDT 24 |
2477445041 ps |
| T173 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1609100453 |
|
|
Apr 15 01:02:15 PM PDT 24 |
Apr 15 01:07:44 PM PDT 24 |
131953053047 ps |
| T174 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.704840407 |
|
|
Apr 15 01:01:43 PM PDT 24 |
Apr 15 01:02:31 PM PDT 24 |
136429528995 ps |
| T175 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.652278578 |
|
|
Apr 15 01:03:17 PM PDT 24 |
Apr 15 01:04:04 PM PDT 24 |
49501010501 ps |
| T611 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2460670963 |
|
|
Apr 15 01:01:35 PM PDT 24 |
Apr 15 01:01:42 PM PDT 24 |
2185799292 ps |
| T612 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2225181361 |
|
|
Apr 15 01:02:59 PM PDT 24 |
Apr 15 01:03:03 PM PDT 24 |
2206646329 ps |
| T613 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1396962485 |
|
|
Apr 15 01:02:21 PM PDT 24 |
Apr 15 01:02:31 PM PDT 24 |
3471138808 ps |
| T155 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2102352290 |
|
|
Apr 15 01:02:08 PM PDT 24 |
Apr 15 01:02:13 PM PDT 24 |
6134019701 ps |
| T374 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.2052995805 |
|
|
Apr 15 01:02:17 PM PDT 24 |
Apr 15 01:03:20 PM PDT 24 |
107793179858 ps |
| T614 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3102802059 |
|
|
Apr 15 01:02:39 PM PDT 24 |
Apr 15 01:02:45 PM PDT 24 |
3316655180 ps |
| T615 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.648349788 |
|
|
Apr 15 01:03:10 PM PDT 24 |
Apr 15 01:06:27 PM PDT 24 |
78192902212 ps |
| T616 |
/workspace/coverage/default/46.sysrst_ctrl_smoke.1548529429 |
|
|
Apr 15 01:02:57 PM PDT 24 |
Apr 15 01:03:01 PM PDT 24 |
2121825310 ps |
| T617 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1127237646 |
|
|
Apr 15 01:02:25 PM PDT 24 |
Apr 15 01:11:58 PM PDT 24 |
2276916462265 ps |
| T618 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2241189773 |
|
|
Apr 15 01:02:55 PM PDT 24 |
Apr 15 01:03:03 PM PDT 24 |
3351994817 ps |
| T619 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.965205428 |
|
|
Apr 15 01:03:02 PM PDT 24 |
Apr 15 01:03:09 PM PDT 24 |
2611753117 ps |
| T620 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.3545781510 |
|
|
Apr 15 01:01:23 PM PDT 24 |
Apr 15 01:01:26 PM PDT 24 |
2128399515 ps |
| T621 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.2343527876 |
|
|
Apr 15 01:02:57 PM PDT 24 |
Apr 15 01:03:01 PM PDT 24 |
2156244240 ps |
| T109 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.1106078945 |
|
|
Apr 15 01:02:24 PM PDT 24 |
Apr 15 01:06:55 PM PDT 24 |
98420129105 ps |
| T286 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.3360143326 |
|
|
Apr 15 01:02:50 PM PDT 24 |
Apr 15 01:03:03 PM PDT 24 |
67555306415 ps |
| T84 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.834852154 |
|
|
Apr 15 01:01:04 PM PDT 24 |
Apr 15 01:01:10 PM PDT 24 |
30421858976 ps |
| T227 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.1487023773 |
|
|
Apr 15 01:01:50 PM PDT 24 |
Apr 15 01:01:53 PM PDT 24 |
6333440497 ps |
| T375 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1516327585 |
|
|
Apr 15 01:02:33 PM PDT 24 |
Apr 15 01:04:08 PM PDT 24 |
89318053443 ps |
| T159 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.2910452788 |
|
|
Apr 15 01:02:31 PM PDT 24 |
Apr 15 01:03:34 PM PDT 24 |
52217812384 ps |
| T622 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.3725164550 |
|
|
Apr 15 01:02:09 PM PDT 24 |
Apr 15 01:02:16 PM PDT 24 |
2113719443 ps |
| T623 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.553581831 |
|
|
Apr 15 01:01:58 PM PDT 24 |
Apr 15 01:02:05 PM PDT 24 |
2611349993 ps |
| T341 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.3382700108 |
|
|
Apr 15 01:02:03 PM PDT 24 |
Apr 15 01:06:44 PM PDT 24 |
112365509475 ps |
| T624 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3197027987 |
|
|
Apr 15 01:02:52 PM PDT 24 |
Apr 15 01:03:00 PM PDT 24 |
2510796834 ps |
| T296 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.4251057067 |
|
|
Apr 15 01:02:53 PM PDT 24 |
Apr 15 01:04:34 PM PDT 24 |
77297068438 ps |
| T625 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.3676296145 |
|
|
Apr 15 01:01:43 PM PDT 24 |
Apr 15 01:01:51 PM PDT 24 |
2717461448 ps |
| T626 |
/workspace/coverage/default/29.sysrst_ctrl_smoke.3538506044 |
|
|
Apr 15 01:02:14 PM PDT 24 |
Apr 15 01:02:20 PM PDT 24 |
2112389962 ps |
| T398 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2182617048 |
|
|
Apr 15 01:01:31 PM PDT 24 |
Apr 15 01:02:23 PM PDT 24 |
85451046622 ps |
| T627 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.1739539842 |
|
|
Apr 15 01:02:16 PM PDT 24 |
Apr 15 01:02:40 PM PDT 24 |
9756760602 ps |
| T628 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.918261212 |
|
|
Apr 15 01:01:25 PM PDT 24 |
Apr 15 01:01:28 PM PDT 24 |
3196678178 ps |
| T629 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4015497733 |
|
|
Apr 15 01:03:00 PM PDT 24 |
Apr 15 01:03:07 PM PDT 24 |
2511961109 ps |
| T630 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.4113024715 |
|
|
Apr 15 01:02:39 PM PDT 24 |
Apr 15 01:02:43 PM PDT 24 |
4426511007 ps |
| T342 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3140464402 |
|
|
Apr 15 01:02:05 PM PDT 24 |
Apr 15 01:02:34 PM PDT 24 |
13184926789 ps |
| T631 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1900043186 |
|
|
Apr 15 01:02:02 PM PDT 24 |
Apr 15 01:02:10 PM PDT 24 |
2512775294 ps |
| T140 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1280125178 |
|
|
Apr 15 01:02:53 PM PDT 24 |
Apr 15 01:02:57 PM PDT 24 |
6716733567 ps |
| T632 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1666908117 |
|
|
Apr 15 01:03:09 PM PDT 24 |
Apr 15 01:03:19 PM PDT 24 |
24618574339 ps |
| T633 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2035655298 |
|
|
Apr 15 01:01:33 PM PDT 24 |
Apr 15 01:01:35 PM PDT 24 |
2042015018 ps |
| T634 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3171759281 |
|
|
Apr 15 01:01:13 PM PDT 24 |
Apr 15 01:01:18 PM PDT 24 |
2615235738 ps |
| T228 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.892361685 |
|
|
Apr 15 01:02:53 PM PDT 24 |
Apr 15 01:03:00 PM PDT 24 |
2752062673 ps |
| T635 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.3228729131 |
|
|
Apr 15 01:01:39 PM PDT 24 |
Apr 15 01:01:50 PM PDT 24 |
3690922376 ps |
| T636 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.2082420936 |
|
|
Apr 15 01:01:38 PM PDT 24 |
Apr 15 01:01:41 PM PDT 24 |
2429059615 ps |
| T193 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3314783184 |
|
|
Apr 15 01:02:55 PM PDT 24 |
Apr 15 01:03:28 PM PDT 24 |
15120781288 ps |
| T637 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1789979650 |
|
|
Apr 15 01:01:43 PM PDT 24 |
Apr 15 01:01:47 PM PDT 24 |
2187166552 ps |
| T638 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3519005254 |
|
|
Apr 15 01:01:26 PM PDT 24 |
Apr 15 01:01:31 PM PDT 24 |
2466772000 ps |
| T639 |
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1061087610 |
|
|
Apr 15 01:02:02 PM PDT 24 |
Apr 15 01:08:09 PM PDT 24 |
319537927904 ps |
| T640 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4150900930 |
|
|
Apr 15 01:03:15 PM PDT 24 |
Apr 15 01:05:52 PM PDT 24 |
58535067457 ps |
| T641 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.1866222761 |
|
|
Apr 15 01:02:09 PM PDT 24 |
Apr 15 01:02:13 PM PDT 24 |
2017028680 ps |
| T141 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.560338087 |
|
|
Apr 15 01:01:51 PM PDT 24 |
Apr 15 01:01:55 PM PDT 24 |
5250602810 ps |
| T642 |
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.565644879 |
|
|
Apr 15 01:03:05 PM PDT 24 |
Apr 15 01:03:11 PM PDT 24 |
2614412012 ps |
| T303 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2875798964 |
|
|
Apr 15 01:01:21 PM PDT 24 |
Apr 15 01:01:48 PM PDT 24 |
41731272913 ps |
| T643 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3799055480 |
|
|
Apr 15 01:02:52 PM PDT 24 |
Apr 15 01:02:59 PM PDT 24 |
8165854421 ps |
| T644 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1158811641 |
|
|
Apr 15 01:02:10 PM PDT 24 |
Apr 15 01:02:14 PM PDT 24 |
4150572756 ps |
| T645 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.182134307 |
|
|
Apr 15 01:02:15 PM PDT 24 |
Apr 15 01:02:18 PM PDT 24 |
2630670005 ps |
| T646 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.2690536097 |
|
|
Apr 15 01:02:27 PM PDT 24 |
Apr 15 01:02:34 PM PDT 24 |
14723847593 ps |
| T297 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2159782691 |
|
|
Apr 15 01:01:26 PM PDT 24 |
Apr 15 01:02:53 PM PDT 24 |
75740748457 ps |
| T647 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2765684607 |
|
|
Apr 15 01:01:17 PM PDT 24 |
Apr 15 01:01:19 PM PDT 24 |
6850846776 ps |
| T648 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.1029393643 |
|
|
Apr 15 01:01:31 PM PDT 24 |
Apr 15 01:01:37 PM PDT 24 |
2013351527 ps |
| T649 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.2345968670 |
|
|
Apr 15 01:01:45 PM PDT 24 |
Apr 15 01:01:47 PM PDT 24 |
2528717640 ps |
| T650 |
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3906556639 |
|
|
Apr 15 01:02:12 PM PDT 24 |
Apr 15 01:02:23 PM PDT 24 |
3576243176 ps |
| T180 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.3108646255 |
|
|
Apr 15 01:02:19 PM PDT 24 |
Apr 15 01:02:24 PM PDT 24 |
13928112282 ps |
| T651 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3464902 |
|
|
Apr 15 01:01:10 PM PDT 24 |
Apr 15 01:01:13 PM PDT 24 |
2442284654 ps |
| T652 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3309045301 |
|
|
Apr 15 01:01:17 PM PDT 24 |
Apr 15 01:01:26 PM PDT 24 |
2611519847 ps |
| T653 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.4255736598 |
|
|
Apr 15 01:01:39 PM PDT 24 |
Apr 15 01:03:18 PM PDT 24 |
37390494795 ps |
| T298 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.3076760662 |
|
|
Apr 15 01:02:14 PM PDT 24 |
Apr 15 01:04:08 PM PDT 24 |
43192852086 ps |
| T110 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.2794471445 |
|
|
Apr 15 01:02:09 PM PDT 24 |
Apr 15 01:06:18 PM PDT 24 |
101396968308 ps |
| T111 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.4141648210 |
|
|
Apr 15 01:02:11 PM PDT 24 |
Apr 15 01:02:30 PM PDT 24 |
68803721091 ps |
| T182 |
/workspace/coverage/default/40.sysrst_ctrl_alert_test.4267323064 |
|
|
Apr 15 01:02:47 PM PDT 24 |
Apr 15 01:02:49 PM PDT 24 |
2031827061 ps |
| T183 |
/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.1115403773 |
|
|
Apr 15 01:01:33 PM PDT 24 |
Apr 15 01:01:37 PM PDT 24 |
3104144784 ps |
| T184 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3592341124 |
|
|
Apr 15 01:02:51 PM PDT 24 |
Apr 15 01:02:55 PM PDT 24 |
2616196945 ps |
| T185 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3978734372 |
|
|
Apr 15 01:02:04 PM PDT 24 |
Apr 15 01:04:20 PM PDT 24 |
57049136705 ps |
| T186 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1313462819 |
|
|
Apr 15 01:01:07 PM PDT 24 |
Apr 15 01:01:12 PM PDT 24 |
2518147309 ps |
| T187 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.847426342 |
|
|
Apr 15 01:02:48 PM PDT 24 |
Apr 15 01:02:50 PM PDT 24 |
2200458593 ps |
| T188 |
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3630645366 |
|
|
Apr 15 01:02:42 PM PDT 24 |
Apr 15 01:02:50 PM PDT 24 |
2450611542 ps |
| T189 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.998267725 |
|
|
Apr 15 01:02:56 PM PDT 24 |
Apr 15 01:08:05 PM PDT 24 |
118926458688 ps |
| T85 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.846363161 |
|
|
Apr 15 01:02:52 PM PDT 24 |
Apr 15 01:03:17 PM PDT 24 |
32799831320 ps |
| T654 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1770153946 |
|
|
Apr 15 01:02:58 PM PDT 24 |
Apr 15 01:03:01 PM PDT 24 |
2477103154 ps |
| T655 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.804342859 |
|
|
Apr 15 01:02:09 PM PDT 24 |
Apr 15 01:02:14 PM PDT 24 |
2122095575 ps |
| T371 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2674572767 |
|
|
Apr 15 01:01:22 PM PDT 24 |
Apr 15 01:05:45 PM PDT 24 |
197015692428 ps |
| T656 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1514567511 |
|
|
Apr 15 01:02:00 PM PDT 24 |
Apr 15 01:02:03 PM PDT 24 |
2485575116 ps |
| T657 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.401052843 |
|
|
Apr 15 01:02:47 PM PDT 24 |
Apr 15 01:02:50 PM PDT 24 |
7590265664 ps |
| T658 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.2240898991 |
|
|
Apr 15 01:02:21 PM PDT 24 |
Apr 15 01:02:28 PM PDT 24 |
2093183027 ps |
| T659 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1330226583 |
|
|
Apr 15 01:02:53 PM PDT 24 |
Apr 15 01:02:55 PM PDT 24 |
2697305243 ps |
| T660 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.4031608031 |
|
|
Apr 15 01:02:09 PM PDT 24 |
Apr 15 01:02:14 PM PDT 24 |
2483864208 ps |
| T661 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2285965245 |
|
|
Apr 15 01:03:05 PM PDT 24 |
Apr 15 01:03:09 PM PDT 24 |
2109476838 ps |
| T662 |
/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2083508076 |
|
|
Apr 15 01:01:50 PM PDT 24 |
Apr 15 01:02:00 PM PDT 24 |
3429335165 ps |
| T663 |
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1670974234 |
|
|
Apr 15 01:01:22 PM PDT 24 |
Apr 15 01:01:26 PM PDT 24 |
2632592731 ps |
| T216 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.2241609141 |
|
|
Apr 15 01:02:44 PM PDT 24 |
Apr 15 01:02:53 PM PDT 24 |
3385270944 ps |
| T287 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.127748250 |
|
|
Apr 15 01:02:52 PM PDT 24 |
Apr 15 01:04:35 PM PDT 24 |
89336307060 ps |
| T664 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.974701697 |
|
|
Apr 15 01:02:10 PM PDT 24 |
Apr 15 01:02:13 PM PDT 24 |
2542194290 ps |
| T665 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.3439494070 |
|
|
Apr 15 01:01:08 PM PDT 24 |
Apr 15 01:01:14 PM PDT 24 |
2013916726 ps |
| T666 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3179416918 |
|
|
Apr 15 01:01:36 PM PDT 24 |
Apr 15 01:01:41 PM PDT 24 |
2517833055 ps |
| T667 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.2442450935 |
|
|
Apr 15 01:02:09 PM PDT 24 |
Apr 15 01:02:17 PM PDT 24 |
29055297583 ps |
| T668 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.3378080807 |
|
|
Apr 15 01:02:16 PM PDT 24 |
Apr 15 01:02:23 PM PDT 24 |
4512007005 ps |
| T669 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.918154174 |
|
|
Apr 15 01:02:06 PM PDT 24 |
Apr 15 01:02:09 PM PDT 24 |
2032927514 ps |
| T670 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.3560636111 |
|
|
Apr 15 01:01:34 PM PDT 24 |
Apr 15 01:01:37 PM PDT 24 |
9142597760 ps |
| T671 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3008819340 |
|
|
Apr 15 01:01:03 PM PDT 24 |
Apr 15 01:01:04 PM PDT 24 |
2243554849 ps |
| T672 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1074182942 |
|
|
Apr 15 01:01:24 PM PDT 24 |
Apr 15 01:01:28 PM PDT 24 |
2017198539 ps |
| T673 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2949477254 |
|
|
Apr 15 01:01:29 PM PDT 24 |
Apr 15 01:01:35 PM PDT 24 |
2196728966 ps |
| T390 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2488082390 |
|
|
Apr 15 01:03:13 PM PDT 24 |
Apr 15 01:04:31 PM PDT 24 |
90625959832 ps |
| T674 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.1374405708 |
|
|
Apr 15 01:02:38 PM PDT 24 |
Apr 15 01:03:35 PM PDT 24 |
113965337623 ps |
| T675 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.3204737221 |
|
|
Apr 15 01:01:43 PM PDT 24 |
Apr 15 01:01:46 PM PDT 24 |
2625723194 ps |
| T676 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2528783356 |
|
|
Apr 15 01:03:28 PM PDT 24 |
Apr 15 01:04:30 PM PDT 24 |
85535864134 ps |
| T677 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.1838364454 |
|
|
Apr 15 01:01:23 PM PDT 24 |
Apr 15 01:01:26 PM PDT 24 |
2132416536 ps |
| T678 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.4278146690 |
|
|
Apr 15 01:02:58 PM PDT 24 |
Apr 15 01:03:01 PM PDT 24 |
2120528960 ps |
| T679 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2632673981 |
|
|
Apr 15 01:01:01 PM PDT 24 |
Apr 15 01:01:58 PM PDT 24 |
87358036038 ps |
| T245 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2374874854 |
|
|
Apr 15 01:02:51 PM PDT 24 |
Apr 15 01:02:56 PM PDT 24 |
3020115386 ps |
| T680 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.876126197 |
|
|
Apr 15 01:02:17 PM PDT 24 |
Apr 15 01:07:53 PM PDT 24 |
143077834387 ps |
| T86 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3384682816 |
|
|
Apr 15 01:01:07 PM PDT 24 |
Apr 15 01:05:50 PM PDT 24 |
117105679703 ps |
| T681 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.599345276 |
|
|
Apr 15 01:01:58 PM PDT 24 |
Apr 15 01:02:01 PM PDT 24 |
2525348172 ps |
| T682 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1873615224 |
|
|
Apr 15 01:03:01 PM PDT 24 |
Apr 15 01:03:06 PM PDT 24 |
2518410576 ps |
| T683 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.3747328873 |
|
|
Apr 15 01:02:17 PM PDT 24 |
Apr 15 01:02:21 PM PDT 24 |
2113905519 ps |
| T684 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1237431504 |
|
|
Apr 15 01:01:12 PM PDT 24 |
Apr 15 01:01:18 PM PDT 24 |
2180416997 ps |
| T685 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3454188370 |
|
|
Apr 15 01:02:16 PM PDT 24 |
Apr 15 01:02:27 PM PDT 24 |
3660834383 ps |
| T686 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.4164213975 |
|
|
Apr 15 01:01:38 PM PDT 24 |
Apr 15 01:01:47 PM PDT 24 |
2612935598 ps |
| T687 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.46802777 |
|
|
Apr 15 01:03:11 PM PDT 24 |
Apr 15 01:04:13 PM PDT 24 |
88940718432 ps |
| T688 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.1677083262 |
|
|
Apr 15 01:01:04 PM PDT 24 |
Apr 15 01:01:09 PM PDT 24 |
13349409030 ps |
| T400 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1374887385 |
|
|
Apr 15 01:02:01 PM PDT 24 |
Apr 15 01:02:38 PM PDT 24 |
55251326821 ps |
| T689 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.998772527 |
|
|
Apr 15 01:02:22 PM PDT 24 |
Apr 15 01:02:29 PM PDT 24 |
2433938168 ps |
| T690 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.945461580 |
|
|
Apr 15 01:01:22 PM PDT 24 |
Apr 15 01:01:30 PM PDT 24 |
4999290145 ps |
| T691 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.1594567413 |
|
|
Apr 15 01:02:52 PM PDT 24 |
Apr 15 01:02:59 PM PDT 24 |
2015174272 ps |
| T692 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2374668414 |
|
|
Apr 15 01:02:06 PM PDT 24 |
Apr 15 01:02:10 PM PDT 24 |
3597465153 ps |
| T693 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.191632458 |
|
|
Apr 15 01:02:51 PM PDT 24 |
Apr 15 01:03:02 PM PDT 24 |
3779104608 ps |
| T112 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3541841284 |
|
|
Apr 15 01:01:24 PM PDT 24 |
Apr 15 01:03:07 PM PDT 24 |
45404406817 ps |
| T694 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3688890777 |
|
|
Apr 15 01:01:19 PM PDT 24 |
Apr 15 01:01:27 PM PDT 24 |
2453592333 ps |
| T165 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.153793603 |
|
|
Apr 15 01:02:25 PM PDT 24 |
Apr 15 01:02:27 PM PDT 24 |
6032855507 ps |
| T695 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2891840179 |
|
|
Apr 15 01:02:53 PM PDT 24 |
Apr 15 01:03:03 PM PDT 24 |
3514879319 ps |
| T696 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.4173289971 |
|
|
Apr 15 01:02:02 PM PDT 24 |
Apr 15 01:05:00 PM PDT 24 |
64448866615 ps |
| T697 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.732314171 |
|
|
Apr 15 01:01:30 PM PDT 24 |
Apr 15 01:01:38 PM PDT 24 |
2611168814 ps |
| T698 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.4093948101 |
|
|
Apr 15 01:03:05 PM PDT 24 |
Apr 15 01:03:07 PM PDT 24 |
3206840653 ps |
| T699 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.326778763 |
|
|
Apr 15 01:01:25 PM PDT 24 |
Apr 15 01:01:35 PM PDT 24 |
3068979518 ps |
| T113 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3311835172 |
|
|
Apr 15 01:03:05 PM PDT 24 |
Apr 15 01:04:36 PM PDT 24 |
71790569463 ps |
| T700 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1627133691 |
|
|
Apr 15 01:02:52 PM PDT 24 |
Apr 15 01:03:04 PM PDT 24 |
4312398127 ps |
| T701 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.2253720742 |
|
|
Apr 15 01:01:31 PM PDT 24 |
Apr 15 01:03:35 PM PDT 24 |
64595767953 ps |
| T702 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.459233339 |
|
|
Apr 15 01:01:34 PM PDT 24 |
Apr 15 01:01:39 PM PDT 24 |
2450443586 ps |
| T703 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.825993517 |
|
|
Apr 15 01:01:42 PM PDT 24 |
Apr 15 01:01:52 PM PDT 24 |
3329267125 ps |
| T704 |
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.120037053 |
|
|
Apr 15 01:01:52 PM PDT 24 |
Apr 15 01:01:55 PM PDT 24 |
2536073641 ps |
| T156 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.624965060 |
|
|
Apr 15 01:03:00 PM PDT 24 |
Apr 15 01:04:29 PM PDT 24 |
70308179545 ps |
| T705 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.3162173886 |
|
|
Apr 15 01:02:38 PM PDT 24 |
Apr 15 01:02:40 PM PDT 24 |
2147203380 ps |
| T706 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.888608522 |
|
|
Apr 15 01:01:30 PM PDT 24 |
Apr 15 01:01:36 PM PDT 24 |
4053325842 ps |
| T707 |
/workspace/coverage/default/0.sysrst_ctrl_smoke.3243551005 |
|
|
Apr 15 01:00:59 PM PDT 24 |
Apr 15 01:01:02 PM PDT 24 |
2117976170 ps |
| T708 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.4048582060 |
|
|
Apr 15 01:01:04 PM PDT 24 |
Apr 15 01:01:07 PM PDT 24 |
4861205182 ps |
| T709 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2314518384 |
|
|
Apr 15 01:01:06 PM PDT 24 |
Apr 15 01:01:09 PM PDT 24 |
3163726894 ps |
| T710 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1806773247 |
|
|
Apr 15 01:01:07 PM PDT 24 |
Apr 15 01:01:10 PM PDT 24 |
2327196372 ps |
| T333 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.426339141 |
|
|
Apr 15 01:02:22 PM PDT 24 |
Apr 15 01:05:21 PM PDT 24 |
201258630318 ps |
| T711 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.2490537458 |
|
|
Apr 15 01:01:58 PM PDT 24 |
Apr 15 01:08:28 PM PDT 24 |
201205932633 ps |
| T712 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3765075128 |
|
|
Apr 15 01:01:08 PM PDT 24 |
Apr 15 01:02:51 PM PDT 24 |
76757610005 ps |
| T713 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.3795674503 |
|
|
Apr 15 01:02:44 PM PDT 24 |
Apr 15 01:10:05 PM PDT 24 |
164530133329 ps |
| T714 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1605124712 |
|
|
Apr 15 01:01:25 PM PDT 24 |
Apr 15 01:01:28 PM PDT 24 |
2021869807 ps |
| T715 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.397228396 |
|
|
Apr 15 01:03:03 PM PDT 24 |
Apr 15 01:03:54 PM PDT 24 |
1528344396504 ps |
| T716 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.222935727 |
|
|
Apr 15 01:02:27 PM PDT 24 |
Apr 15 01:15:56 PM PDT 24 |
321936051436 ps |
| T717 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.174265150 |
|
|
Apr 15 01:01:35 PM PDT 24 |
Apr 15 01:01:38 PM PDT 24 |
2624547992 ps |
| T718 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.2144715443 |
|
|
Apr 15 01:01:35 PM PDT 24 |
Apr 15 01:03:04 PM PDT 24 |
142274659543 ps |
| T719 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.4094715316 |
|
|
Apr 15 01:02:26 PM PDT 24 |
Apr 15 01:02:27 PM PDT 24 |
2496341030 ps |
| T720 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.553493403 |
|
|
Apr 15 01:02:45 PM PDT 24 |
Apr 15 01:02:48 PM PDT 24 |
2628915736 ps |
| T721 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2229491145 |
|
|
Apr 15 01:01:25 PM PDT 24 |
Apr 15 01:01:30 PM PDT 24 |
2623561355 ps |
| T722 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.234325556 |
|
|
Apr 15 01:01:34 PM PDT 24 |
Apr 15 01:01:55 PM PDT 24 |
13862737022 ps |
| T157 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3605943890 |
|
|
Apr 15 01:01:31 PM PDT 24 |
Apr 15 01:01:34 PM PDT 24 |
6927249664 ps |
| T723 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.4092196872 |
|
|
Apr 15 01:02:26 PM PDT 24 |
Apr 15 01:02:29 PM PDT 24 |
2816711865 ps |
| T724 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.2945740630 |
|
|
Apr 15 01:02:43 PM PDT 24 |
Apr 15 01:03:05 PM PDT 24 |
11788919769 ps |
| T725 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1112740116 |
|
|
Apr 15 01:03:18 PM PDT 24 |
Apr 15 01:03:37 PM PDT 24 |
29846016433 ps |
| T726 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.1619841424 |
|
|
Apr 15 01:01:39 PM PDT 24 |
Apr 15 01:01:49 PM PDT 24 |
3504967825 ps |
| T727 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.4111372993 |
|
|
Apr 15 01:02:03 PM PDT 24 |
Apr 15 01:02:05 PM PDT 24 |
2145785332 ps |
| T728 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.79985650 |
|
|
Apr 15 01:01:24 PM PDT 24 |
Apr 15 01:01:31 PM PDT 24 |
2474831577 ps |
| T729 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3807775791 |
|
|
Apr 15 01:01:23 PM PDT 24 |
Apr 15 01:02:18 PM PDT 24 |
80614800374 ps |
| T730 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.2358532496 |
|
|
Apr 15 01:01:50 PM PDT 24 |
Apr 15 01:01:56 PM PDT 24 |
3702704072 ps |
| T731 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2569987929 |
|
|
Apr 15 01:01:07 PM PDT 24 |
Apr 15 01:01:13 PM PDT 24 |
3896436553 ps |
| T732 |
/workspace/coverage/default/11.sysrst_ctrl_alert_test.2102494054 |
|
|
Apr 15 01:01:29 PM PDT 24 |
Apr 15 01:01:36 PM PDT 24 |
2011278902 ps |
| T733 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1151886261 |
|
|
Apr 15 01:02:55 PM PDT 24 |
Apr 15 01:02:57 PM PDT 24 |
2035406110 ps |
| T734 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.593882165 |
|
|
Apr 15 01:02:49 PM PDT 24 |
Apr 15 01:02:54 PM PDT 24 |
2513824248 ps |
| T735 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.886905466 |
|
|
Apr 15 01:02:02 PM PDT 24 |
Apr 15 01:02:09 PM PDT 24 |
4308026271 ps |
| T736 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.180384467 |
|
|
Apr 15 01:01:42 PM PDT 24 |
Apr 15 01:03:09 PM PDT 24 |
338875576589 ps |
| T737 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.3437167276 |
|
|
Apr 15 01:02:48 PM PDT 24 |
Apr 15 01:03:30 PM PDT 24 |
16001745411 ps |
| T738 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2202099303 |
|
|
Apr 15 01:02:10 PM PDT 24 |
Apr 15 01:02:13 PM PDT 24 |
2527438158 ps |
| T739 |
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3869229290 |
|
|
Apr 15 01:02:59 PM PDT 24 |
Apr 15 01:03:02 PM PDT 24 |
2534647355 ps |
| T304 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.1894449386 |
|
|
Apr 15 01:02:10 PM PDT 24 |
Apr 15 01:03:47 PM PDT 24 |
434151397664 ps |
| T740 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.822378010 |
|
|
Apr 15 01:02:50 PM PDT 24 |
Apr 15 01:02:58 PM PDT 24 |
2608401297 ps |
| T741 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.1722459218 |
|
|
Apr 15 01:02:16 PM PDT 24 |
Apr 15 01:02:20 PM PDT 24 |
15046782949 ps |
| T742 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.3720334900 |
|
|
Apr 15 01:02:14 PM PDT 24 |
Apr 15 01:02:17 PM PDT 24 |
2027270233 ps |
| T743 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.2358988064 |
|
|
Apr 15 01:02:11 PM PDT 24 |
Apr 15 01:12:40 PM PDT 24 |
248888894069 ps |
| T744 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.4144498209 |
|
|
Apr 15 01:02:50 PM PDT 24 |
Apr 15 01:02:52 PM PDT 24 |
2205218151 ps |
| T745 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.156612967 |
|
|
Apr 15 01:03:07 PM PDT 24 |
Apr 15 01:03:09 PM PDT 24 |
3145389386 ps |
| T746 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2285517806 |
|
|
Apr 15 01:02:07 PM PDT 24 |
Apr 15 01:02:12 PM PDT 24 |
2479711039 ps |
| T747 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3304002943 |
|
|
Apr 15 01:02:55 PM PDT 24 |
Apr 15 01:02:58 PM PDT 24 |
4457536845 ps |
| T748 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3246300078 |
|
|
Apr 15 01:02:11 PM PDT 24 |
Apr 15 01:02:21 PM PDT 24 |
3400262822 ps |
| T305 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1566826468 |
|
|
Apr 15 01:03:00 PM PDT 24 |
Apr 15 01:05:03 PM PDT 24 |
188000043236 ps |
| T749 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.459998220 |
|
|
Apr 15 01:02:08 PM PDT 24 |
Apr 15 01:02:15 PM PDT 24 |
2246837893 ps |
| T750 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3354335390 |
|
|
Apr 15 01:01:38 PM PDT 24 |
Apr 15 01:12:40 PM PDT 24 |
247236267774 ps |
| T751 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.942525558 |
|
|
Apr 15 01:01:17 PM PDT 24 |
Apr 15 01:01:23 PM PDT 24 |
2013277409 ps |
| T752 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.716611595 |
|
|
Apr 15 01:01:39 PM PDT 24 |
Apr 15 01:02:32 PM PDT 24 |
85101403674 ps |
| T753 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.1636560249 |
|
|
Apr 15 01:01:03 PM PDT 24 |
Apr 15 01:01:09 PM PDT 24 |
2010542039 ps |
| T754 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3816030041 |
|
|
Apr 15 01:03:05 PM PDT 24 |
Apr 15 01:07:05 PM PDT 24 |
94124663942 ps |
| T755 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3986033141 |
|
|
Apr 15 01:01:45 PM PDT 24 |
Apr 15 01:01:48 PM PDT 24 |
2631827914 ps |
| T756 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.641761107 |
|
|
Apr 15 01:01:07 PM PDT 24 |
Apr 15 01:01:10 PM PDT 24 |
2620834560 ps |
| T757 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.91802825 |
|
|
Apr 15 01:02:08 PM PDT 24 |
Apr 15 01:02:13 PM PDT 24 |
2017084270 ps |
| T758 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.1475838795 |
|
|
Apr 15 01:01:52 PM PDT 24 |
Apr 15 01:02:01 PM PDT 24 |
12248732223 ps |
| T759 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.3794355496 |
|
|
Apr 15 01:02:31 PM PDT 24 |
Apr 15 01:02:37 PM PDT 24 |
2445034977 ps |
| T760 |
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.4252020778 |
|
|
Apr 15 01:02:50 PM PDT 24 |
Apr 15 01:02:55 PM PDT 24 |
5891272890 ps |
| T761 |
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.3815579744 |
|
|
Apr 15 01:02:11 PM PDT 24 |
Apr 15 01:02:15 PM PDT 24 |
2634247061 ps |
| T762 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.1166783502 |
|
|
Apr 15 01:02:20 PM PDT 24 |
Apr 15 01:04:25 PM PDT 24 |
162527711764 ps |
| T763 |
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.1837516091 |
|
|
Apr 15 01:02:10 PM PDT 24 |
Apr 15 01:02:14 PM PDT 24 |
4072139367 ps |
| T764 |
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3234720356 |
|
|
Apr 15 01:02:47 PM PDT 24 |
Apr 15 01:02:51 PM PDT 24 |
2109282120 ps |
| T765 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.4195049139 |
|
|
Apr 15 01:01:37 PM PDT 24 |
Apr 15 01:01:42 PM PDT 24 |
2642130100 ps |
| T766 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.151212361 |
|
|
Apr 15 01:02:55 PM PDT 24 |
Apr 15 01:03:29 PM PDT 24 |
12059243077 ps |
| T767 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.2125536062 |
|
|
Apr 15 01:02:09 PM PDT 24 |
Apr 15 01:02:13 PM PDT 24 |
2015320435 ps |
| T768 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.61243321 |
|
|
Apr 15 01:03:11 PM PDT 24 |
Apr 15 01:05:57 PM PDT 24 |
119607618927 ps |
| T769 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2439095376 |
|
|
Apr 15 01:01:21 PM PDT 24 |
Apr 15 01:02:00 PM PDT 24 |
16131958622 ps |
| T770 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2674894709 |
|
|
Apr 15 01:02:44 PM PDT 24 |
Apr 15 01:02:53 PM PDT 24 |
4287604468 ps |
| T401 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1313832021 |
|
|
Apr 15 01:03:11 PM PDT 24 |
Apr 15 01:07:20 PM PDT 24 |
95273986131 ps |
| T771 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2047594069 |
|
|
Apr 15 01:01:22 PM PDT 24 |
Apr 15 01:01:33 PM PDT 24 |
3391509750 ps |
| T772 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3795369953 |
|
|
Apr 15 01:02:08 PM PDT 24 |
Apr 15 01:02:13 PM PDT 24 |
5264532538 ps |
| T773 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.2693711842 |
|
|
Apr 15 01:02:17 PM PDT 24 |
Apr 15 01:02:22 PM PDT 24 |
2014394413 ps |
| T774 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1116704162 |
|
|
Apr 15 01:02:45 PM PDT 24 |
Apr 15 01:02:52 PM PDT 24 |
2434294532 ps |
| T775 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.3258964830 |
|
|
Apr 15 01:01:22 PM PDT 24 |
Apr 15 01:01:26 PM PDT 24 |
2529181821 ps |
| T776 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.656531134 |
|
|
Apr 15 01:02:43 PM PDT 24 |
Apr 15 01:04:12 PM PDT 24 |
67758863510 ps |
| T777 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.4178289204 |
|
|
Apr 15 01:01:47 PM PDT 24 |
Apr 15 01:01:49 PM PDT 24 |
2021464029 ps |
| T778 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3768189545 |
|
|
Apr 15 01:02:56 PM PDT 24 |
Apr 15 01:04:56 PM PDT 24 |
171989893987 ps |
| T163 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1420067248 |
|
|
Apr 15 01:01:15 PM PDT 24 |
Apr 15 01:01:20 PM PDT 24 |
3766697507 ps |
| T779 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.2925266180 |
|
|
Apr 15 01:02:39 PM PDT 24 |
Apr 15 01:02:41 PM PDT 24 |
2170913773 ps |
| T780 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.4009545149 |
|
|
Apr 15 01:01:38 PM PDT 24 |
Apr 15 01:01:47 PM PDT 24 |
2461203233 ps |
| T306 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.3106592091 |
|
|
Apr 15 01:02:09 PM PDT 24 |
Apr 15 01:09:19 PM PDT 24 |
168653177963 ps |
| T781 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1827553090 |
|
|
Apr 15 01:01:08 PM PDT 24 |
Apr 15 01:01:15 PM PDT 24 |
2362152215 ps |
| T782 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.804871250 |
|
|
Apr 15 01:02:53 PM PDT 24 |
Apr 15 01:02:58 PM PDT 24 |
2073466909 ps |
| T60 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2023066818 |
|
|
Apr 15 01:01:05 PM PDT 24 |
Apr 15 01:01:30 PM PDT 24 |
40994167444 ps |
| T783 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3701398288 |
|
|
Apr 15 01:02:48 PM PDT 24 |
Apr 15 01:02:59 PM PDT 24 |
3883060466 ps |
| T784 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2531970268 |
|
|
Apr 15 01:02:52 PM PDT 24 |
Apr 15 01:04:08 PM PDT 24 |
35834241997 ps |
| T785 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.2088098920 |
|
|
Apr 15 01:02:46 PM PDT 24 |
Apr 15 01:02:49 PM PDT 24 |
2025999834 ps |
| T786 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.4109501919 |
|
|
Apr 15 01:02:39 PM PDT 24 |
Apr 15 01:02:42 PM PDT 24 |
2635718819 ps |
| T787 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1650295832 |
|
|
Apr 15 01:01:50 PM PDT 24 |
Apr 15 01:02:18 PM PDT 24 |
40363201119 ps |
| T788 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1820952009 |
|
|
Apr 15 01:02:23 PM PDT 24 |
Apr 15 01:02:26 PM PDT 24 |
2482334048 ps |
| T789 |
/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1702539166 |
|
|
Apr 15 01:02:12 PM PDT 24 |
Apr 15 01:02:19 PM PDT 24 |
2454722163 ps |
| T28 |
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_mem_rw_with_rand_reset.379306052 |
|
|
Apr 15 12:24:06 PM PDT 24 |
Apr 15 12:24:11 PM PDT 24 |
2111788880 ps |
| T18 |
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.3441552980 |
|
|
Apr 15 12:23:51 PM PDT 24 |
Apr 15 12:23:55 PM PDT 24 |
2056952066 ps |
| T29 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.3310404863 |
|
|
Apr 15 12:23:35 PM PDT 24 |
Apr 15 12:23:42 PM PDT 24 |
6084360014 ps |
| T30 |
/workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_rw.2541052259 |
|
|
Apr 15 12:23:38 PM PDT 24 |
Apr 15 12:23:46 PM PDT 24 |
2029305334 ps |
| T309 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3123822452 |
|
|
Apr 15 12:23:47 PM PDT 24 |
Apr 15 12:23:51 PM PDT 24 |
2678470502 ps |
| T790 |
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.1713357597 |
|
|
Apr 15 12:23:43 PM PDT 24 |
Apr 15 12:23:46 PM PDT 24 |
2030630029 ps |
| T31 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.3440107904 |
|
|
Apr 15 12:23:41 PM PDT 24 |
Apr 15 12:23:46 PM PDT 24 |
2085269745 ps |