Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.94	99.40	96.78	100.00	97.44	98.89	99.61	93.46

Total tests in report: 908

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
65.17	65.17	82.42	82.42	71.64	71.64	86.30	86.30	31.41	31.41	83.29	83.29	74.76	74.76	26.35	26.35	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.745852521
73.33	8.16	89.16	6.74	81.07	9.43	95.89	9.59	41.67	10.26	88.76	5.47	83.33	8.57	33.42	7.07	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3527396528
79.64	6.31	92.72	3.56	85.26	4.20	96.58	0.68	55.13	13.46	91.98	3.22	89.02	5.68	46.81	13.39	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1269437920
83.20	3.55	95.41	2.69	89.13	3.87	97.26	0.68	63.46	8.33	94.94	2.96	92.87	3.85	49.31	2.50	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1636075129
85.68	2.49	96.57	1.16	90.70	1.57	97.26	0.00	76.92	13.46	96.16	1.22	92.87	0.00	49.31	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.834852154
87.87	2.19	96.98	0.41	91.13	0.43	97.26	0.00	79.49	2.56	96.56	0.41	94.03	1.16	59.67	10.36	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3991874396
89.36	1.49	97.52	0.54	91.73	0.61	97.26	0.00	85.26	5.77	97.15	0.59	95.47	1.45	61.16	1.49	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1471200417
90.63	1.27	97.54	0.02	92.85	1.11	97.95	0.68	85.26	0.00	97.19	0.04	95.47	0.00	68.17	7.01	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.1983793155
91.62	0.99	97.61	0.07	93.20	0.35	97.95	0.00	85.26	0.00	97.19	0.00	95.57	0.10	74.55	6.38	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.437201138
92.57	0.95	98.08	0.47	93.60	0.40	97.95	0.00	89.10	3.85	97.60	0.41	97.01	1.45	74.65	0.11	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.497535432
93.24	0.67	98.23	0.15	93.73	0.13	97.95	0.00	89.74	0.64	97.63	0.04	97.01	0.00	78.37	3.72	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3185101160
93.83	0.59	98.26	0.04	93.76	0.03	97.95	0.00	90.38	0.64	97.67	0.04	97.11	0.10	81.67	3.29	/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.22036566
94.22	0.39	98.49	0.22	93.86	0.10	97.95	0.00	92.31	1.92	97.78	0.11	97.50	0.39	81.67	0.00	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.900409446
94.54	0.32	98.49	0.00	93.88	0.03	99.77	1.83	92.31	0.00	97.78	0.00	97.59	0.10	81.93	0.27	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2749457279
94.81	0.27	98.51	0.02	93.88	0.00	99.77	0.00	92.31	0.00	97.78	0.00	97.59	0.00	83.79	1.86	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.3068077199
95.06	0.25	98.60	0.09	93.93	0.05	99.77	0.00	93.59	1.28	97.89	0.11	97.78	0.19	83.85	0.05	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1405600280
95.31	0.25	98.68	0.07	93.98	0.05	99.77	0.00	94.87	1.28	97.97	0.07	97.98	0.19	83.90	0.05	/workspace/coverage/default/25.sysrst_ctrl_stress_all.2794471445
95.51	0.21	98.71	0.04	94.03	0.05	99.77	0.00	94.87	0.00	98.00	0.04	98.07	0.10	85.12	1.22	/workspace/coverage/default/13.sysrst_ctrl_stress_all.3746288187
95.71	0.20	98.71	0.00	94.89	0.86	99.77	0.00	94.87	0.00	98.04	0.04	98.07	0.00	85.60	0.48	/workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_errors.4291872936
95.88	0.17	98.79	0.07	94.89	0.00	99.77	0.00	94.87	0.00	98.04	0.00	98.07	0.00	86.72	1.12	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.752526053
96.04	0.16	98.82	0.04	95.22	0.33	99.77	0.00	95.51	0.64	98.08	0.04	98.17	0.10	86.72	0.00	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1142511011
96.20	0.16	98.82	0.00	95.25	0.03	99.77	0.00	95.51	0.00	98.08	0.00	98.27	0.10	87.73	1.01	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.3949647221
96.35	0.15	98.86	0.04	95.27	0.03	99.77	0.00	96.15	0.64	98.11	0.04	98.36	0.10	87.94	0.21	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3311835172
96.49	0.14	98.88	0.02	95.48	0.20	99.77	0.00	96.15	0.00	98.19	0.07	98.94	0.58	88.04	0.11	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.792822253
96.61	0.12	98.92	0.04	95.50	0.03	99.77	0.00	96.79	0.64	98.23	0.04	99.04	0.10	88.04	0.00	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.4251588017
96.73	0.12	98.96	0.04	95.53	0.03	99.77	0.00	97.44	0.64	98.26	0.04	99.13	0.10	88.04	0.00	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2375174678
96.85	0.12	98.96	0.00	95.55	0.03	99.77	0.00	97.44	0.00	98.26	0.00	99.13	0.00	88.84	0.80	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.4106405097
96.96	0.11	98.96	0.00	95.58	0.03	99.77	0.00	97.44	0.00	98.26	0.00	99.13	0.00	89.59	0.74	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3773589148
97.05	0.09	98.96	0.00	95.60	0.03	99.77	0.00	97.44	0.00	98.26	0.00	99.23	0.10	90.06	0.48	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.209561359
97.12	0.07	98.97	0.02	96.03	0.43	99.77	0.00	97.44	0.00	98.30	0.04	99.23	0.00	90.06	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2023066818
97.18	0.06	98.97	0.00	96.03	0.00	99.77	0.00	97.44	0.00	98.30	0.00	99.23	0.00	90.49	0.43	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.2677754200
97.23	0.06	99.01	0.04	96.13	0.10	99.77	0.00	97.44	0.00	98.37	0.07	99.42	0.19	90.49	0.00	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2961533407
97.29	0.06	99.09	0.07	96.28	0.15	99.77	0.00	97.44	0.00	98.45	0.07	99.52	0.10	90.49	0.00	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.3441552980
97.34	0.05	99.14	0.06	96.36	0.08	100.00	0.23	97.44	0.00	98.45	0.00	99.52	0.00	90.49	0.00	/workspace/coverage/default/12.sysrst_ctrl_alert_test.662898659
97.39	0.05	99.14	0.00	96.39	0.03	100.00	0.00	97.44	0.00	98.45	0.00	99.52	0.00	90.81	0.32	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2585724607
97.43	0.04	99.16	0.02	96.41	0.03	100.00	0.00	97.44	0.00	98.48	0.04	99.52	0.00	91.02	0.21	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3363215904
97.47	0.04	99.22	0.06	96.46	0.05	100.00	0.00	97.44	0.00	98.56	0.07	99.52	0.00	91.13	0.11	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.3644150016
97.51	0.04	99.23	0.02	96.46	0.00	100.00	0.00	97.44	0.00	98.56	0.00	99.52	0.00	91.39	0.27	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.136861029
97.54	0.03	99.23	0.00	96.46	0.00	100.00	0.00	97.44	0.00	98.56	0.00	99.52	0.00	91.60	0.21	/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.79472570
97.57	0.03	99.23	0.00	96.66	0.20	100.00	0.00	97.44	0.00	98.56	0.00	99.52	0.00	91.60	0.00	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_errors.4235251297
97.60	0.02	99.29	0.06	96.66	0.00	100.00	0.00	97.44	0.00	98.67	0.11	99.52	0.00	91.60	0.00	/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.2910452788
97.62	0.02	99.29	0.00	96.66	0.00	100.00	0.00	97.44	0.00	98.67	0.00	99.52	0.00	91.76	0.16	/workspace/coverage/default/11.sysrst_ctrl_stress_all.2144715443
97.64	0.02	99.29	0.00	96.66	0.00	100.00	0.00	97.44	0.00	98.67	0.00	99.52	0.00	91.92	0.16	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3384682816
97.67	0.02	99.29	0.00	96.66	0.00	100.00	0.00	97.44	0.00	98.67	0.00	99.52	0.00	92.08	0.16	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1909527709
97.69	0.02	99.33	0.04	96.69	0.03	100.00	0.00	97.44	0.00	98.74	0.07	99.52	0.00	92.08	0.00	/workspace/coverage/default/31.sysrst_ctrl_stress_all.3108646255
97.70	0.02	99.35	0.02	96.69	0.00	100.00	0.00	97.44	0.00	98.78	0.04	99.52	0.00	92.14	0.05	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1310475154
97.72	0.02	99.37	0.02	96.69	0.00	100.00	0.00	97.44	0.00	98.82	0.04	99.52	0.00	92.19	0.05	/workspace/coverage/default/20.sysrst_ctrl_stress_all.3185828628
97.73	0.02	99.37	0.00	96.69	0.00	100.00	0.00	97.44	0.00	98.82	0.00	99.52	0.00	92.30	0.11	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.1761090763
97.75	0.02	99.37	0.00	96.69	0.00	100.00	0.00	97.44	0.00	98.82	0.00	99.52	0.00	92.40	0.11	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3781220003
97.76	0.02	99.37	0.00	96.69	0.00	100.00	0.00	97.44	0.00	98.82	0.00	99.52	0.00	92.51	0.11	/workspace/coverage/default/12.sysrst_ctrl_stress_all.1199175489
97.78	0.02	99.37	0.00	96.69	0.00	100.00	0.00	97.44	0.00	98.82	0.00	99.52	0.00	92.61	0.11	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.3010186688
97.79	0.01	99.37	0.00	96.69	0.00	100.00	0.00	97.44	0.00	98.82	0.00	99.61	0.10	92.61	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.4235527971
97.80	0.01	99.37	0.00	96.71	0.03	100.00	0.00	97.44	0.00	98.82	0.00	99.61	0.00	92.67	0.05	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2493944838
97.81	0.01	99.38	0.02	96.71	0.00	100.00	0.00	97.44	0.00	98.85	0.04	99.61	0.00	92.67	0.00	/workspace/coverage/default/24.sysrst_ctrl_stress_all.481209877
97.82	0.01	99.40	0.02	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.04	99.61	0.00	92.67	0.00	/workspace/coverage/default/33.sysrst_ctrl_edge_detect.153793603
97.83	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	92.72	0.05	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.778475794
97.83	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	92.77	0.05	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.1533521101
97.84	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	92.83	0.05	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.2957664260
97.85	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	92.88	0.05	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.180384467
97.86	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	92.93	0.05	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3093939671
97.86	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	92.99	0.05	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1374887385
97.87	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.04	0.05	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3788240661
97.88	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.09	0.05	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.382508351
97.89	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.15	0.05	/workspace/coverage/default/37.sysrst_ctrl_stress_all.836145074
97.89	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.20	0.05	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.5115043
97.90	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.25	0.05	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2601578055
97.91	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.30	0.05	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1766505206
97.92	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.36	0.05	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2742588622
97.92	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.41	0.05	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1313832021
97.93	0.01	99.40	0.00	96.71	0.00	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.46	0.05	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2353927044
97.94	0.01	99.40	0.00	96.74	0.03	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.46	0.00	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.825153721
97.94	0.01	99.40	0.00	96.76	0.03	100.00	0.00	97.44	0.00	98.89	0.00	99.61	0.00	93.46	0.00	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.846363161

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.685209985
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.195262064
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3755950461
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.2458194504
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3736031563
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3092531437
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3123822452
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2598392105
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.198049418
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1617777950
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1631168427
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2513971702
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.830029492
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1595299464
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1801248634
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3473220960
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.193274538
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.478003292
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3207076450
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2650399588
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3973990875
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.946463596
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3703195095
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.314138761
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3109890271
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1410738804
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2040862477
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1127596995
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1612605660
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.624376719
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2357299578
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2404865595
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2327146252
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2991499984
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.245649712
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3191043227
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/workspace/coverage/default/39.sysrst_ctrl_smoke.2767869345
/workspace/coverage/default/39.sysrst_ctrl_stress_all.2945740630
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2920874504
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.4056361091
/workspace/coverage/default/4.sysrst_ctrl_alert_test.942525558
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2047594069
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3703917706
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3521992951
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1827553090
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.200854646
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2308365755
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3533763912
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2061741788
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1237431504
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.545120891
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2302325014
/workspace/coverage/default/4.sysrst_ctrl_smoke.1207415534
/workspace/coverage/default/4.sysrst_ctrl_stress_all.4262655477
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2765684607
/workspace/coverage/default/40.sysrst_ctrl_alert_test.4267323064
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3701398288
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3499100456
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2674894709
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.995507054
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1535785431
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2790960751
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.932151708
/workspace/coverage/default/40.sysrst_ctrl_smoke.847426342
/workspace/coverage/default/40.sysrst_ctrl_stress_all.692606224
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3501096016
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.401052843
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1932509884
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3489117406
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.4251057067
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2670780041
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.4148200044
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3304002943
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.4218716142
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1074031644
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.4144498209
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.593882165
/workspace/coverage/default/41.sysrst_ctrl_smoke.1179842188
/workspace/coverage/default/41.sysrst_ctrl_stress_all.151212361
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3758746948
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3849756899
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.141556671
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3768189545
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.191632458
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2357950417
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3592341124
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4246799403
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3234720356
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3019539977
/workspace/coverage/default/42.sysrst_ctrl_smoke.1943083082
/workspace/coverage/default/42.sysrst_ctrl_stress_all.3360143326
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3799055480
/workspace/coverage/default/43.sysrst_ctrl_alert_test.1594567413
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.601766218
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.127748250
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2531970268
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3148048039
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2374874854
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.822378010
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1840303664
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3980749446
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1247885151
/workspace/coverage/default/43.sysrst_ctrl_smoke.1782327996
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2728322703
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.490810804
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.4186740975
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1681463341
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.4245261744
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.998267725
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1627133691
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3772180071
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.589090228
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3891699639
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.804871250
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3869229290
/workspace/coverage/default/44.sysrst_ctrl_smoke.4278146690
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2736083676
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1631907609
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1151886261
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2891840179
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.400105237
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1594064254
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.620513506
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.224634021
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.589552729
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3336570948
/workspace/coverage/default/45.sysrst_ctrl_smoke.3669811746
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3314783184
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.4034588652
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1280125178
/workspace/coverage/default/46.sysrst_ctrl_alert_test.112826122
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2241189773
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1564339172
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3318842868
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3016178675
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.892361685
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1330226583
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.4241362032
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.4044341326
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3197027987
/workspace/coverage/default/46.sysrst_ctrl_smoke.1548529429
/workspace/coverage/default/46.sysrst_ctrl_stress_all.550414395
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.5877758
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3288796732
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3921184370
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2013223205
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1566826468
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2849170253
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.30853767
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1788914607
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.965205428
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1770153946
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2225181361
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4015497733
/workspace/coverage/default/47.sysrst_ctrl_smoke.2128878591
/workspace/coverage/default/47.sysrst_ctrl_stress_all.397228396
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.624965060
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.4288803444
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1971407131
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3110242903
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3913351222
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.103328180
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3193505404
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1666411923
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2470314382
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1567149200
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1924856196
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1873615224
/workspace/coverage/default/48.sysrst_ctrl_smoke.3388926203
/workspace/coverage/default/48.sysrst_ctrl_stress_all.692528243
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.478313107
/workspace/coverage/default/49.sysrst_ctrl_alert_test.83941878
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.156612967
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1533092108
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2113395120
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.4093948101
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.565644879
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1813483959
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2285965245
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1599998639
/workspace/coverage/default/49.sysrst_ctrl_smoke.3765235358
/workspace/coverage/default/49.sysrst_ctrl_stress_all.4152424173
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3058651086
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3836819425
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1203673051
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.688633923
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.591712218
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1420067248
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3309045301
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1489208320
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3472725547
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3669799361
/workspace/coverage/default/5.sysrst_ctrl_smoke.1331695844
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2875798964
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.167299947
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2860937530
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2191767981
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.4037504778
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3816030041
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.815124592
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1074182942
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3461800537
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2156237005
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3797144946
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2040772387
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.971818639
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.903963953
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1077571675
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1004872893
/workspace/coverage/default/6.sysrst_ctrl_smoke.1838364454
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3250900699
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2439095376
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.945461580
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1990250522
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.411957976
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2249755421
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1602593925
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2289294774
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.214127716
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.648349788
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.61243321
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1605124712
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3217346268
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2674572767
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3807775791
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.379333559
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.4120592888
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1670974234
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.79985650
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.736822740
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.585511033
/workspace/coverage/default/7.sysrst_ctrl_smoke.3545781510
/workspace/coverage/default/7.sysrst_ctrl_stress_all.3524454154
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1602438504
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1436109008
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1112740116
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.108390428
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4091193360
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1380740598
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.46802777
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3782160146
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1666908117
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1238390314
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2035655298
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.918261212
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2159782691
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.326778763
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3417280132
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2229491145
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3688890777
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2985417356
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.4073650569
/workspace/coverage/default/8.sysrst_ctrl_smoke.4228104802
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3007745780
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3541841284
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2406746347
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3197168051
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3968465710
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2785833574
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3602112448
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2994486084
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4150900930
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1207513511
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3156750930
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3148994754
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.91208617
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.4255736598
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.888608522
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.4119635219
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.732314171
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3519005254
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2949477254
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.4246322072
/workspace/coverage/default/9.sysrst_ctrl_smoke.1999838639
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1507954041
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2981595863
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1284701773
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1920707315
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2488082390
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2528783356
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3393351768
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.339165431
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3072557359
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.652278578
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2066719762

Total test records in report: 908

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3132407912	Apr 15 01:02:03 PM PDT 24	Apr 15 01:02:08 PM PDT 24	2534004544 ps
T1	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.497535432	Apr 15 01:03:06 PM PDT 24	Apr 15 01:03:14 PM PDT 24	4715574031 ps
T2	/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2981595863	Apr 15 01:01:33 PM PDT 24	Apr 15 01:02:47 PM PDT 24	31427540388 ps
T12	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3779276532	Apr 15 01:02:22 PM PDT 24	Apr 15 01:02:26 PM PDT 24	3067405233 ps
T13	/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3533763912	Apr 15 01:01:12 PM PDT 24	Apr 15 01:01:20 PM PDT 24	2608842968 ps
T14	/workspace/coverage/default/14.sysrst_ctrl_stress_all.554632836	Apr 15 01:01:41 PM PDT 24	Apr 15 01:02:10 PM PDT 24	9690466368 ps
T15	/workspace/coverage/default/9.sysrst_ctrl_stress_all.1507954041	Apr 15 01:01:29 PM PDT 24	Apr 15 01:04:18 PM PDT 24	136227604935 ps
T3	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.745852521	Apr 15 01:01:56 PM PDT 24	Apr 15 01:02:44 PM PDT 24	376499896280 ps
T5	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.382508351	Apr 15 01:02:28 PM PDT 24	Apr 15 01:06:14 PM PDT 24	88762136405 ps
T16	/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.1878485375	Apr 15 01:02:12 PM PDT 24	Apr 15 01:02:25 PM PDT 24	4422860460 ps
T17	/workspace/coverage/default/49.sysrst_ctrl_alert_test.83941878	Apr 15 01:03:05 PM PDT 24	Apr 15 01:03:07 PM PDT 24	2026813153 ps
T25	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3217346268	Apr 15 01:01:20 PM PDT 24	Apr 15 01:01:30 PM PDT 24	3499373106 ps
T6	/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1284701773	Apr 15 01:01:29 PM PDT 24	Apr 15 01:01:32 PM PDT 24	8695536381 ps
T55	/workspace/coverage/default/30.sysrst_ctrl_alert_test.2531704297	Apr 15 01:02:20 PM PDT 24	Apr 15 01:02:26 PM PDT 24	2010154425 ps
T7	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.1346801313	Apr 15 01:02:32 PM PDT 24	Apr 15 01:08:58 PM PDT 24	145635455053 ps
T26	/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.141556671	Apr 15 01:02:50 PM PDT 24	Apr 15 01:02:54 PM PDT 24	3012447939 ps
T56	/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.2896337780	Apr 15 01:02:17 PM PDT 24	Apr 15 01:02:26 PM PDT 24	2854140345 ps
T57	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.228176258	Apr 15 01:02:36 PM PDT 24	Apr 15 01:05:53 PM PDT 24	1387684335647 ps
T47	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.221369692	Apr 15 01:01:05 PM PDT 24	Apr 15 01:01:27 PM PDT 24	30209848722 ps
T8	/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.4281289031	Apr 15 01:02:00 PM PDT 24	Apr 15 01:02:08 PM PDT 24	5855263774 ps
T72	/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2743441805	Apr 15 01:02:17 PM PDT 24	Apr 15 01:02:20 PM PDT 24	2540174874 ps
T135	/workspace/coverage/default/49.sysrst_ctrl_smoke.3765235358	Apr 15 01:03:08 PM PDT 24	Apr 15 01:03:10 PM PDT 24	2151147369 ps
T73	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3944166144	Apr 15 01:02:28 PM PDT 24	Apr 15 01:02:37 PM PDT 24	2613105329 ps
T9	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.136861029	Apr 15 01:03:03 PM PDT 24	Apr 15 01:04:11 PM PDT 24	94307628595 ps
T74	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.995507054	Apr 15 01:02:43 PM PDT 24	Apr 15 01:02:45 PM PDT 24	2622648630 ps
T10	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3521992951	Apr 15 01:01:11 PM PDT 24	Apr 15 01:01:15 PM PDT 24	2421050982 ps
T11	/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2406746347	Apr 15 01:01:27 PM PDT 24	Apr 15 01:01:32 PM PDT 24	5243250682 ps
T131	/workspace/coverage/default/3.sysrst_ctrl_alert_test.3221396214	Apr 15 01:01:21 PM PDT 24	Apr 15 01:01:22 PM PDT 24	2241862913 ps
T36	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1636075129	Apr 15 01:02:51 PM PDT 24	Apr 15 01:04:40 PM PDT 24	102452926237 ps
T132	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1268119364	Apr 15 01:01:44 PM PDT 24	Apr 15 01:01:46 PM PDT 24	2037612748 ps
T27	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3602112448	Apr 15 01:03:14 PM PDT 24	Apr 15 01:03:54 PM PDT 24	31276597119 ps
T142	/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2435853987	Apr 15 01:02:02 PM PDT 24	Apr 15 01:02:07 PM PDT 24	2076088017 ps
T32	/workspace/coverage/default/7.sysrst_ctrl_stress_all.3524454154	Apr 15 01:01:22 PM PDT 24	Apr 15 01:01:40 PM PDT 24	7097979899 ps
T143	/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.3111590950	Apr 15 01:02:40 PM PDT 24	Apr 15 01:02:42 PM PDT 24	2109925908 ps
T75	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.620513506	Apr 15 01:02:53 PM PDT 24	Apr 15 01:02:56 PM PDT 24	2631108809 ps
T144	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2359844781	Apr 15 01:02:21 PM PDT 24	Apr 15 01:02:28 PM PDT 24	2613623677 ps
T177	/workspace/coverage/default/1.sysrst_ctrl_smoke.1091012935	Apr 15 01:01:02 PM PDT 24	Apr 15 01:01:06 PM PDT 24	2114233677 ps
T178	/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2831530648	Apr 15 01:02:02 PM PDT 24	Apr 15 01:02:07 PM PDT 24	2620368805 ps
T283	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1388303756	Apr 15 01:02:09 PM PDT 24	Apr 15 01:02:17 PM PDT 24	2515635218 ps
T284	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1893043273	Apr 15 01:01:39 PM PDT 24	Apr 15 01:01:42 PM PDT 24	2192871234 ps
T34	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3527396528	Apr 15 01:03:06 PM PDT 24	Apr 15 01:09:35 PM PDT 24	153567898032 ps
T33	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.437201138	Apr 15 01:01:17 PM PDT 24	Apr 15 01:07:57 PM PDT 24	165104430986 ps
T114	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.2749457279	Apr 15 01:01:12 PM PDT 24	Apr 15 01:02:12 PM PDT 24	22012182037 ps
T115	/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3007040105	Apr 15 01:02:40 PM PDT 24	Apr 15 01:02:47 PM PDT 24	2611180462 ps
T37	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2073213144	Apr 15 01:02:39 PM PDT 24	Apr 15 01:02:43 PM PDT 24	4542886585 ps
T48	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.1713647475	Apr 15 01:01:40 PM PDT 24	Apr 15 01:05:36 PM PDT 24	90955499677 ps
T116	/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.2188456496	Apr 15 01:02:17 PM PDT 24	Apr 15 01:02:25 PM PDT 24	2512975014 ps
T117	/workspace/coverage/default/2.sysrst_ctrl_smoke.3271529760	Apr 15 01:01:10 PM PDT 24	Apr 15 01:01:14 PM PDT 24	2117032720 ps
T118	/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.69070189	Apr 15 01:01:05 PM PDT 24	Apr 15 01:01:13 PM PDT 24	2511341990 ps
T49	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.52996840	Apr 15 01:01:43 PM PDT 24	Apr 15 01:02:30 PM PDT 24	33942984975 ps
T35	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.3949647221	Apr 15 01:02:45 PM PDT 24	Apr 15 01:06:26 PM PDT 24	77866356442 ps
T206	/workspace/coverage/default/14.sysrst_ctrl_alert_test.958765545	Apr 15 01:01:45 PM PDT 24	Apr 15 01:01:51 PM PDT 24	2015152566 ps
T207	/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2765660305	Apr 15 01:02:34 PM PDT 24	Apr 15 01:02:37 PM PDT 24	2534198503 ps
T45	/workspace/coverage/default/40.sysrst_ctrl_stress_all.692606224	Apr 15 01:02:47 PM PDT 24	Apr 15 01:03:19 PM PDT 24	12202015596 ps
T50	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3093939671	Apr 15 01:01:55 PM PDT 24	Apr 15 01:02:05 PM PDT 24	3376613533 ps
T76	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.2568807897	Apr 15 01:01:12 PM PDT 24	Apr 15 01:03:20 PM PDT 24	99809850309 ps
T41	/workspace/coverage/default/28.sysrst_ctrl_edge_detect.3861544258	Apr 15 01:02:15 PM PDT 24	Apr 15 01:02:19 PM PDT 24	6674266106 ps
T211	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.3068077199	Apr 15 01:02:44 PM PDT 24	Apr 15 01:03:11 PM PDT 24	38639292602 ps
T212	/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.379333559	Apr 15 01:01:24 PM PDT 24	Apr 15 01:01:28 PM PDT 24	2754808237 ps
T213	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3752585734	Apr 15 01:02:38 PM PDT 24	Apr 15 01:02:42 PM PDT 24	2636563217 ps
T214	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.1734160543	Apr 15 01:01:54 PM PDT 24	Apr 15 01:01:58 PM PDT 24	2519127844 ps
T22	/workspace/coverage/default/46.sysrst_ctrl_stress_all.550414395	Apr 15 01:03:02 PM PDT 24	Apr 15 01:03:19 PM PDT 24	8182867805 ps
T58	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2651080078	Apr 15 01:02:00 PM PDT 24	Apr 15 01:02:57 PM PDT 24	42762292338 ps
T59	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.900409446	Apr 15 01:02:43 PM PDT 24	Apr 15 01:03:03 PM PDT 24	29849679514 ps
T61	/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.3490524437	Apr 15 01:01:44 PM PDT 24	Apr 15 01:01:52 PM PDT 24	5757942404 ps
T68	/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.339165431	Apr 15 01:03:14 PM PDT 24	Apr 15 01:03:40 PM PDT 24	37708077400 ps
T69	/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3858228076	Apr 15 01:02:10 PM PDT 24	Apr 15 01:02:13 PM PDT 24	2122068426 ps
T70	/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1362814267	Apr 15 01:01:52 PM PDT 24	Apr 15 01:01:59 PM PDT 24	2032022294 ps
T71	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2837721425	Apr 15 01:01:30 PM PDT 24	Apr 15 01:07:35 PM PDT 24	933040279819 ps
T51	/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.265527184	Apr 15 01:02:27 PM PDT 24	Apr 15 01:02:33 PM PDT 24	3715439037 ps
T23	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1535785431	Apr 15 01:02:48 PM PDT 24	Apr 15 01:02:51 PM PDT 24	2483775778 ps
T77	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4091193360	Apr 15 01:03:10 PM PDT 24	Apr 15 01:06:13 PM PDT 24	71122100209 ps
T52	/workspace/coverage/default/13.sysrst_ctrl_stress_all.3746288187	Apr 15 01:01:38 PM PDT 24	Apr 15 01:01:46 PM PDT 24	9885634343 ps
T43	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.4176655492	Apr 15 01:02:45 PM PDT 24	Apr 15 01:02:48 PM PDT 24	3199371359 ps
T219	/workspace/coverage/default/47.sysrst_ctrl_smoke.2128878591	Apr 15 01:02:59 PM PDT 24	Apr 15 01:03:02 PM PDT 24	2132679157 ps
T44	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.13774442	Apr 15 01:02:27 PM PDT 24	Apr 15 01:02:31 PM PDT 24	3966383321 ps
T42	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3772180071	Apr 15 01:02:52 PM PDT 24	Apr 15 01:03:05 PM PDT 24	5208846800 ps
T220	/workspace/coverage/default/12.sysrst_ctrl_stress_all.1199175489	Apr 15 01:01:37 PM PDT 24	Apr 15 01:02:07 PM PDT 24	11333540672 ps
T221	/workspace/coverage/default/9.sysrst_ctrl_smoke.1999838639	Apr 15 01:01:25 PM PDT 24	Apr 15 01:01:28 PM PDT 24	2135673402 ps
T24	/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1813483959	Apr 15 01:03:03 PM PDT 24	Apr 15 01:03:08 PM PDT 24	2464924660 ps
T222	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.736822740	Apr 15 01:01:24 PM PDT 24	Apr 15 01:01:28 PM PDT 24	2154524011 ps
T223	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.2405023528	Apr 15 01:01:07 PM PDT 24	Apr 15 01:01:24 PM PDT 24	51359521689 ps
T224	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3472725547	Apr 15 01:01:16 PM PDT 24	Apr 15 01:01:22 PM PDT 24	2031706700 ps
T39	/workspace/coverage/default/24.sysrst_ctrl_stress_all.481209877	Apr 15 01:02:03 PM PDT 24	Apr 15 01:02:40 PM PDT 24	13910388692 ps
T229	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2483287626	Apr 15 01:01:44 PM PDT 24	Apr 15 01:01:47 PM PDT 24	2528585729 ps
T406	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.589090228	Apr 15 01:02:57 PM PDT 24	Apr 15 01:03:05 PM PDT 24	2611491541 ps
T404	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3595370815	Apr 15 01:01:20 PM PDT 24	Apr 15 01:01:27 PM PDT 24	2712074159 ps
T407	/workspace/coverage/default/41.sysrst_ctrl_smoke.1179842188	Apr 15 01:02:47 PM PDT 24	Apr 15 01:02:54 PM PDT 24	2108315534 ps
T337	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.250618722	Apr 15 01:01:32 PM PDT 24	Apr 15 01:01:40 PM PDT 24	2512285628 ps
T78	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2249755421	Apr 15 01:03:11 PM PDT 24	Apr 15 01:03:49 PM PDT 24	50235859546 ps
T408	/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2157844350	Apr 15 01:01:10 PM PDT 24	Apr 15 01:01:12 PM PDT 24	4487088248 ps
T128	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.714090432	Apr 15 01:01:04 PM PDT 24	Apr 15 01:01:07 PM PDT 24	2445875423 ps
T409	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2374681145	Apr 15 01:01:30 PM PDT 24	Apr 15 01:01:38 PM PDT 24	2236251160 ps
T327	/workspace/coverage/default/12.sysrst_ctrl_alert_test.662898659	Apr 15 01:01:41 PM PDT 24	Apr 15 01:01:43 PM PDT 24	2036055163 ps
T79	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.4186740975	Apr 15 01:02:49 PM PDT 24	Apr 15 01:10:07 PM PDT 24	1605522762229 ps
T62	/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1074031644	Apr 15 01:02:49 PM PDT 24	Apr 15 01:02:57 PM PDT 24	2459607167 ps
T129	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.4245066084	Apr 15 01:02:40 PM PDT 24	Apr 15 01:03:42 PM PDT 24	88880849153 ps
T410	/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.527052623	Apr 15 01:02:05 PM PDT 24	Apr 15 01:02:13 PM PDT 24	2612822620 ps
T63	/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.738604703	Apr 15 01:01:03 PM PDT 24	Apr 15 01:01:11 PM PDT 24	2462900721 ps
T40	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3242000772	Apr 15 01:01:59 PM PDT 24	Apr 15 01:02:14 PM PDT 24	5588640235 ps
T158	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.2098573596	Apr 15 01:01:49 PM PDT 24	Apr 15 01:01:52 PM PDT 24	5184565591 ps
T239	/workspace/coverage/default/27.sysrst_ctrl_smoke.1314267966	Apr 15 01:02:12 PM PDT 24	Apr 15 01:02:18 PM PDT 24	2111523193 ps
T181	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.4119635219	Apr 15 01:01:36 PM PDT 24	Apr 15 01:01:44 PM PDT 24	3451698743 ps
T64	/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1649614675	Apr 15 01:01:07 PM PDT 24	Apr 15 01:01:16 PM PDT 24	2471214664 ps
T240	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.209561359	Apr 15 01:02:10 PM PDT 24	Apr 15 01:03:30 PM PDT 24	123079709655 ps
T241	/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1227723032	Apr 15 01:01:34 PM PDT 24	Apr 15 01:01:39 PM PDT 24	4530725338 ps
T242	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.545120891	Apr 15 01:01:12 PM PDT 24	Apr 15 01:01:14 PM PDT 24	2578789241 ps
T53	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2669498821	Apr 15 01:02:39 PM PDT 24	Apr 15 01:02:49 PM PDT 24	3183415043 ps
T243	/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3922950239	Apr 15 01:02:32 PM PDT 24	Apr 15 01:02:40 PM PDT 24	7572230130 ps
T65	/workspace/coverage/default/19.sysrst_ctrl_stress_all.3654219473	Apr 15 01:02:02 PM PDT 24	Apr 15 01:02:34 PM PDT 24	11613467417 ps
T66	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.272407850	Apr 15 01:02:22 PM PDT 24	Apr 15 01:02:26 PM PDT 24	2485129647 ps
T307	/workspace/coverage/default/8.sysrst_ctrl_smoke.4228104802	Apr 15 01:01:21 PM PDT 24	Apr 15 01:01:24 PM PDT 24	2202809294 ps
T308	/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1599998639	Apr 15 01:03:05 PM PDT 24	Apr 15 01:03:07 PM PDT 24	2571305379 ps
T277	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.752526053	Apr 15 01:03:11 PM PDT 24	Apr 15 01:03:55 PM PDT 24	64367616265 ps
T330	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.399720778	Apr 15 01:01:46 PM PDT 24	Apr 15 01:02:50 PM PDT 24	46195421507 ps
T411	/workspace/coverage/default/37.sysrst_ctrl_alert_test.913938842	Apr 15 01:02:38 PM PDT 24	Apr 15 01:02:43 PM PDT 24	2015063491 ps
T412	/workspace/coverage/default/43.sysrst_ctrl_stress_all.2728322703	Apr 15 01:02:51 PM PDT 24	Apr 15 01:03:11 PM PDT 24	6864763167 ps
T278	/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.79472570	Apr 15 01:02:57 PM PDT 24	Apr 15 01:05:06 PM PDT 24	57187439399 ps
T338	/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.4073650569	Apr 15 01:01:22 PM PDT 24	Apr 15 01:01:31 PM PDT 24	2512599198 ps
T54	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.4106405097	Apr 15 01:01:17 PM PDT 24	Apr 15 01:02:49 PM PDT 24	75053179105 ps
T279	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3185101160	Apr 15 01:02:05 PM PDT 24	Apr 15 01:12:46 PM PDT 24	233344622989 ps
T413	/workspace/coverage/default/42.sysrst_ctrl_smoke.1943083082	Apr 15 01:02:56 PM PDT 24	Apr 15 01:03:02 PM PDT 24	2114111325 ps
T392	/workspace/coverage/default/23.sysrst_ctrl_stress_all.1203556470	Apr 15 01:02:07 PM PDT 24	Apr 15 01:03:53 PM PDT 24	162216314845 ps
T414	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.370229923	Apr 15 01:01:07 PM PDT 24	Apr 15 01:01:14 PM PDT 24	2425613660 ps
T339	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.4246322072	Apr 15 01:01:26 PM PDT 24	Apr 15 01:01:29 PM PDT 24	2524760893 ps
T280	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2191767981	Apr 15 01:03:05 PM PDT 24	Apr 15 01:04:29 PM PDT 24	122264817909 ps
T80	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1602438504	Apr 15 01:01:24 PM PDT 24	Apr 15 01:02:41 PM PDT 24	1968835374479 ps
T415	/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3391652278	Apr 15 01:02:02 PM PDT 24	Apr 15 01:02:08 PM PDT 24	3739506937 ps
T97	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2585724607	Apr 15 01:03:08 PM PDT 24	Apr 15 01:08:46 PM PDT 24	126457100415 ps
T67	/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.4222942071	Apr 15 01:01:30 PM PDT 24	Apr 15 01:01:33 PM PDT 24	2472550720 ps
T288	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3072557359	Apr 15 01:03:16 PM PDT 24	Apr 15 01:03:51 PM PDT 24	54525345659 ps
T332	/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1238390314	Apr 15 01:03:06 PM PDT 24	Apr 15 01:03:57 PM PDT 24	84755909474 ps
T416	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.413188185	Apr 15 01:02:36 PM PDT 24	Apr 15 01:02:39 PM PDT 24	2627321658 ps
T417	/workspace/coverage/default/13.sysrst_ctrl_alert_test.3410032589	Apr 15 01:01:40 PM PDT 24	Apr 15 01:01:46 PM PDT 24	2011118603 ps
T46	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.22444470	Apr 15 01:02:15 PM PDT 24	Apr 15 01:02:18 PM PDT 24	2782515445 ps
T266	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.647693994	Apr 15 01:01:59 PM PDT 24	Apr 15 01:02:07 PM PDT 24	2775884090 ps
T312	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2278309294	Apr 15 01:01:10 PM PDT 24	Apr 15 01:02:07 PM PDT 24	22012531359 ps
T418	/workspace/coverage/default/36.sysrst_ctrl_alert_test.1956644145	Apr 15 01:02:39 PM PDT 24	Apr 15 01:02:46 PM PDT 24	2016833064 ps
T194	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.882887852	Apr 15 01:01:38 PM PDT 24	Apr 15 01:01:41 PM PDT 24	2415444784 ps
T299	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3197168051	Apr 15 01:03:18 PM PDT 24	Apr 15 01:04:45 PM PDT 24	64882390375 ps
T419	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3782160146	Apr 15 01:03:18 PM PDT 24	Apr 15 01:05:24 PM PDT 24	46076879320 ps
T38	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1269437920	Apr 15 01:02:15 PM PDT 24	Apr 15 01:03:52 PM PDT 24	39544850763 ps
T95	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.4290575746	Apr 15 01:02:04 PM PDT 24	Apr 15 01:02:15 PM PDT 24	3719976949 ps
T98	/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3703917706	Apr 15 01:01:16 PM PDT 24	Apr 15 01:01:24 PM PDT 24	28287879711 ps
T343	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.615225911	Apr 15 01:01:43 PM PDT 24	Apr 15 01:01:47 PM PDT 24	2190154845 ps
T96	/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.710942289	Apr 15 01:02:15 PM PDT 24	Apr 15 01:02:21 PM PDT 24	3475969668 ps
T99	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.2537193797	Apr 15 01:02:29 PM PDT 24	Apr 15 01:03:02 PM PDT 24	27088173472 ps
T335	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3327347192	Apr 15 01:01:44 PM PDT 24	Apr 15 01:01:51 PM PDT 24	2457756114 ps
T344	/workspace/coverage/default/43.sysrst_ctrl_smoke.1782327996	Apr 15 01:02:48 PM PDT 24	Apr 15 01:02:55 PM PDT 24	2114125703 ps
T130	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2736083676	Apr 15 01:02:56 PM PDT 24	Apr 15 01:04:10 PM PDT 24	57626871345 ps
T176	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.3644150016	Apr 15 01:02:42 PM PDT 24	Apr 15 01:02:50 PM PDT 24	3487763115 ps
T420	/workspace/coverage/default/29.sysrst_ctrl_alert_test.4009549890	Apr 15 01:02:17 PM PDT 24	Apr 15 01:02:23 PM PDT 24	2011113500 ps
T421	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1380740598	Apr 15 01:03:18 PM PDT 24	Apr 15 01:04:27 PM PDT 24	45688838577 ps
T405	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.167299947	Apr 15 01:01:16 PM PDT 24	Apr 15 01:01:59 PM PDT 24	721299513120 ps
T81	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3380876964	Apr 15 01:02:17 PM PDT 24	Apr 15 01:02:21 PM PDT 24	5832740731 ps
T100	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1990250522	Apr 15 01:03:06 PM PDT 24	Apr 15 01:04:25 PM PDT 24	28580550966 ps
T422	/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.2590549324	Apr 15 01:01:53 PM PDT 24	Apr 15 01:01:59 PM PDT 24	2042039490 ps
T423	/workspace/coverage/default/5.sysrst_ctrl_smoke.1331695844	Apr 15 01:01:17 PM PDT 24	Apr 15 01:01:20 PM PDT 24	2130642789 ps
T366	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2156237005	Apr 15 01:01:21 PM PDT 24	Apr 15 01:04:36 PM PDT 24	78182610586 ps
T424	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2849237597	Apr 15 01:01:35 PM PDT 24	Apr 15 01:01:43 PM PDT 24	2510954857 ps
T425	/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.1476715385	Apr 15 01:01:59 PM PDT 24	Apr 15 01:02:09 PM PDT 24	3300893572 ps
T393	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.1559743078	Apr 15 01:02:07 PM PDT 24	Apr 15 01:05:07 PM PDT 24	130420953234 ps
T82	/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2984372276	Apr 15 01:02:03 PM PDT 24	Apr 15 01:02:11 PM PDT 24	4473818058 ps
T426	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.903963953	Apr 15 01:01:22 PM PDT 24	Apr 15 01:01:26 PM PDT 24	2473226318 ps
T293	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2038241030	Apr 15 01:02:11 PM PDT 24	Apr 15 01:03:38 PM PDT 24	159704292085 ps
T427	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1703447422	Apr 15 01:01:50 PM PDT 24	Apr 15 01:01:57 PM PDT 24	2471923127 ps
T428	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.200854646	Apr 15 01:01:11 PM PDT 24	Apr 15 01:01:14 PM PDT 24	3626741579 ps
T429	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.2768740374	Apr 15 01:02:44 PM PDT 24	Apr 15 01:02:46 PM PDT 24	2206250470 ps
T368	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.3010186688	Apr 15 01:02:06 PM PDT 24	Apr 15 01:09:02 PM PDT 24	178183654978 ps
T133	/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3462527924	Apr 15 01:01:12 PM PDT 24	Apr 15 01:01:21 PM PDT 24	3108655119 ps
T430	/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2094819343	Apr 15 01:02:32 PM PDT 24	Apr 15 01:02:34 PM PDT 24	2538757100 ps
T101	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.3262734429	Apr 15 01:01:41 PM PDT 24	Apr 15 01:02:07 PM PDT 24	29093984181 ps
T102	/workspace/coverage/default/17.sysrst_ctrl_stress_all.110019479	Apr 15 01:01:55 PM PDT 24	Apr 15 01:08:25 PM PDT 24	155448718699 ps
T431	/workspace/coverage/default/20.sysrst_ctrl_alert_test.3146662749	Apr 15 01:02:05 PM PDT 24	Apr 15 01:02:08 PM PDT 24	2029850220 ps
T432	/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3797460182	Apr 15 01:02:33 PM PDT 24	Apr 15 01:02:45 PM PDT 24	3720118727 ps
T103	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.70903660	Apr 15 01:01:44 PM PDT 24	Apr 15 01:02:55 PM PDT 24	57192931433 ps
T160	/workspace/coverage/default/4.sysrst_ctrl_stress_all.4262655477	Apr 15 01:01:16 PM PDT 24	Apr 15 01:29:43 PM PDT 24	1299857124978 ps
T134	/workspace/coverage/default/15.sysrst_ctrl_stress_all.137238939	Apr 15 01:01:44 PM PDT 24	Apr 15 01:02:09 PM PDT 24	13548760556 ps
T433	/workspace/coverage/default/14.sysrst_ctrl_smoke.2814636391	Apr 15 01:01:41 PM PDT 24	Apr 15 01:01:48 PM PDT 24	2111208458 ps
T365	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.2360897617	Apr 15 01:01:51 PM PDT 24	Apr 15 01:03:01 PM PDT 24	171924061064 ps
T434	/workspace/coverage/default/19.sysrst_ctrl_alert_test.827901075	Apr 15 01:02:00 PM PDT 24	Apr 15 01:02:03 PM PDT 24	2036369296 ps
T289	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2113395120	Apr 15 01:03:08 PM PDT 24	Apr 15 01:05:42 PM PDT 24	56689857313 ps
T435	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.155491893	Apr 15 01:02:43 PM PDT 24	Apr 15 01:02:46 PM PDT 24	2534700275 ps
T436	/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.342338016	Apr 15 01:02:38 PM PDT 24	Apr 15 01:02:43 PM PDT 24	2594903036 ps
T437	/workspace/coverage/default/17.sysrst_ctrl_alert_test.2454279219	Apr 15 01:02:09 PM PDT 24	Apr 15 01:02:16 PM PDT 24	2008628613 ps
T230	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.1047842999	Apr 15 01:01:52 PM PDT 24	Apr 15 01:02:00 PM PDT 24	2681799505 ps
T438	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1489208320	Apr 15 01:01:16 PM PDT 24	Apr 15 01:01:21 PM PDT 24	2474393403 ps
T439	/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1899010005	Apr 15 01:01:39 PM PDT 24	Apr 15 01:01:41 PM PDT 24	2720283144 ps
T396	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.3323694384	Apr 15 01:02:41 PM PDT 24	Apr 15 01:03:07 PM PDT 24	72863126012 ps
T340	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3214215762	Apr 15 01:01:44 PM PDT 24	Apr 15 01:01:47 PM PDT 24	6388367408 ps
T210	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.712424765	Apr 15 01:02:33 PM PDT 24	Apr 15 01:02:36 PM PDT 24	2891190771 ps
T440	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3399716002	Apr 15 01:02:13 PM PDT 24	Apr 15 01:02:19 PM PDT 24	2457622511 ps
T441	/workspace/coverage/default/1.sysrst_ctrl_stress_all.934422947	Apr 15 01:01:04 PM PDT 24	Apr 15 01:01:14 PM PDT 24	6337530327 ps
T442	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.447948206	Apr 15 01:01:07 PM PDT 24	Apr 15 01:01:15 PM PDT 24	2405350563 ps
T83	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1471200417	Apr 15 01:02:09 PM PDT 24	Apr 15 01:03:34 PM PDT 24	70724455162 ps
T233	/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3461800537	Apr 15 01:01:23 PM PDT 24	Apr 15 01:01:29 PM PDT 24	3505444362 ps
T161	/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2040772387	Apr 15 01:01:21 PM PDT 24	Apr 15 01:01:26 PM PDT 24	4767372913 ps
T234	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2670780041	Apr 15 01:02:50 PM PDT 24	Apr 15 01:03:16 PM PDT 24	38308407714 ps
T235	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3393351768	Apr 15 01:03:13 PM PDT 24	Apr 15 01:04:52 PM PDT 24	39144753614 ps
T94	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3066033935	Apr 15 01:01:45 PM PDT 24	Apr 15 01:02:06 PM PDT 24	22107979885 ps
T236	/workspace/coverage/default/32.sysrst_ctrl_alert_test.970079023	Apr 15 01:02:26 PM PDT 24	Apr 15 01:02:32 PM PDT 24	2023399616 ps
T237	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3376206010	Apr 15 01:02:12 PM PDT 24	Apr 15 01:02:16 PM PDT 24	2516908045 ps
T89	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.825153721	Apr 15 01:02:08 PM PDT 24	Apr 15 01:04:24 PM PDT 24	96914336883 ps
T238	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1643341165	Apr 15 01:02:26 PM PDT 24	Apr 15 01:02:34 PM PDT 24	2510000623 ps
T443	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3019539977	Apr 15 01:02:50 PM PDT 24	Apr 15 01:02:58 PM PDT 24	2509674183 ps
T218	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1666411923	Apr 15 01:03:09 PM PDT 24	Apr 15 01:03:12 PM PDT 24	3445793745 ps
T90	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1884510424	Apr 15 01:02:00 PM PDT 24	Apr 15 01:02:08 PM PDT 24	10181422505 ps
T444	/workspace/coverage/default/44.sysrst_ctrl_alert_test.1681463341	Apr 15 01:02:56 PM PDT 24	Apr 15 01:03:03 PM PDT 24	2009920130 ps
T195	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.3799744009	Apr 15 01:01:07 PM PDT 24	Apr 15 01:01:10 PM PDT 24	3920152897 ps
T336	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4246799403	Apr 15 01:02:51 PM PDT 24	Apr 15 01:02:58 PM PDT 24	2466977121 ps
T394	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2439082617	Apr 15 01:02:11 PM PDT 24	Apr 15 01:03:25 PM PDT 24	60263963842 ps
T445	/workspace/coverage/default/22.sysrst_ctrl_alert_test.2368824138	Apr 15 01:02:05 PM PDT 24	Apr 15 01:02:07 PM PDT 24	2093086821 ps
T446	/workspace/coverage/default/35.sysrst_ctrl_smoke.977568629	Apr 15 01:02:33 PM PDT 24	Apr 15 01:02:39 PM PDT 24	2111442808 ps
T395	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.2957664260	Apr 15 01:01:39 PM PDT 24	Apr 15 01:04:45 PM PDT 24	150561679322 ps
T447	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1345181501	Apr 15 01:01:45 PM PDT 24	Apr 15 01:01:48 PM PDT 24	2453249686 ps
T448	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1080838131	Apr 15 01:02:34 PM PDT 24	Apr 15 01:02:40 PM PDT 24	2155285486 ps
T449	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.218966739	Apr 15 01:02:04 PM PDT 24	Apr 15 01:02:07 PM PDT 24	2526604553 ps
T450	/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1905703217	Apr 15 01:02:14 PM PDT 24	Apr 15 01:02:24 PM PDT 24	3535392968 ps
T451	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.603027229	Apr 15 01:02:15 PM PDT 24	Apr 15 01:02:16 PM PDT 24	2569638354 ps
T386	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1909527709	Apr 15 01:03:07 PM PDT 24	Apr 15 01:08:38 PM PDT 24	132919397885 ps
T452	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1920707315	Apr 15 01:03:15 PM PDT 24	Apr 15 01:04:00 PM PDT 24	65945798031 ps
T453	/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2917632915	Apr 15 01:01:33 PM PDT 24	Apr 15 01:01:36 PM PDT 24	2621293045 ps
T454	/workspace/coverage/default/21.sysrst_ctrl_alert_test.1075857242	Apr 15 01:01:59 PM PDT 24	Apr 15 01:02:06 PM PDT 24	2012364617 ps
T455	/workspace/coverage/default/31.sysrst_ctrl_smoke.1178788005	Apr 15 01:02:22 PM PDT 24	Apr 15 01:02:24 PM PDT 24	2176195633 ps
T456	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3722865766	Apr 15 01:02:40 PM PDT 24	Apr 15 01:02:48 PM PDT 24	2508578390 ps
T313	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.685268957	Apr 15 01:01:01 PM PDT 24	Apr 15 01:01:13 PM PDT 24	22117645967 ps
T457	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.624120993	Apr 15 01:02:41 PM PDT 24	Apr 15 01:02:50 PM PDT 24	2446304931 ps
T91	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1268236949	Apr 15 01:01:58 PM PDT 24	Apr 15 01:02:04 PM PDT 24	7940912729 ps
T458	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2907131356	Apr 15 01:02:07 PM PDT 24	Apr 15 01:02:11 PM PDT 24	3765915307 ps
T104	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3363215904	Apr 15 01:01:23 PM PDT 24	Apr 15 01:02:23 PM PDT 24	194829160176 ps
T459	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3891699639	Apr 15 01:02:56 PM PDT 24	Apr 15 01:03:03 PM PDT 24	2448040008 ps
T367	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2066719762	Apr 15 01:03:23 PM PDT 24	Apr 15 01:10:33 PM PDT 24	161165451248 ps
T460	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.177189926	Apr 15 01:01:31 PM PDT 24	Apr 15 01:01:41 PM PDT 24	3176117030 ps
T461	/workspace/coverage/default/16.sysrst_ctrl_smoke.1920825599	Apr 15 01:01:44 PM PDT 24	Apr 15 01:01:50 PM PDT 24	2110399645 ps
T462	/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.589552729	Apr 15 01:02:57 PM PDT 24	Apr 15 01:03:04 PM PDT 24	2227860258 ps
T217	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.852448190	Apr 15 01:02:22 PM PDT 24	Apr 15 01:02:28 PM PDT 24	3361866152 ps
T463	/workspace/coverage/default/34.sysrst_ctrl_stress_all.2090037930	Apr 15 01:02:31 PM PDT 24	Apr 15 01:02:38 PM PDT 24	8869179897 ps
T464	/workspace/coverage/default/36.sysrst_ctrl_stress_all.3210999926	Apr 15 01:02:35 PM PDT 24	Apr 15 01:02:39 PM PDT 24	6787021025 ps
T465	/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1247885151	Apr 15 01:02:56 PM PDT 24	Apr 15 01:03:04 PM PDT 24	2509668624 ps
T466	/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3148994754	Apr 15 01:01:26 PM PDT 24	Apr 15 01:01:35 PM PDT 24	3176780206 ps
T294	/workspace/coverage/default/37.sysrst_ctrl_stress_all.836145074	Apr 15 01:02:39 PM PDT 24	Apr 15 01:09:21 PM PDT 24	282644480991 ps
T467	/workspace/coverage/default/38.sysrst_ctrl_alert_test.3702477968	Apr 15 01:02:45 PM PDT 24	Apr 15 01:02:47 PM PDT 24	2032015810 ps
T190	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.1254856956	Apr 15 01:02:08 PM PDT 24	Apr 15 01:02:17 PM PDT 24	2924657443 ps
T468	/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.2238787124	Apr 15 01:01:53 PM PDT 24	Apr 15 01:01:58 PM PDT 24	2973266676 ps
T469	/workspace/coverage/default/34.sysrst_ctrl_smoke.3867526920	Apr 15 01:02:28 PM PDT 24	Apr 15 01:02:32 PM PDT 24	2120261439 ps
T470	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.4241362032	Apr 15 01:03:01 PM PDT 24	Apr 15 01:03:03 PM PDT 24	2519115751 ps
T471	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.906963203	Apr 15 01:02:14 PM PDT 24	Apr 15 01:02:16 PM PDT 24	2045779003 ps
T472	/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.980532391	Apr 15 01:01:21 PM PDT 24	Apr 15 01:01:25 PM PDT 24	2167857741 ps
T473	/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.224634021	Apr 15 01:02:53 PM PDT 24	Apr 15 01:02:58 PM PDT 24	2462605788 ps
T474	/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1900742803	Apr 15 01:02:21 PM PDT 24	Apr 15 01:02:23 PM PDT 24	3399900543 ps