T416 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2820191397 |
|
|
Apr 16 02:49:26 PM PDT 24 |
Apr 16 02:50:10 PM PDT 24 |
18164641520 ps |
T134 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.3643146399 |
|
|
Apr 16 02:49:39 PM PDT 24 |
Apr 16 02:49:41 PM PDT 24 |
6438233462 ps |
T320 |
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3371941614 |
|
|
Apr 16 02:50:22 PM PDT 24 |
Apr 16 02:51:59 PM PDT 24 |
76950529618 ps |
T417 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3739246952 |
|
|
Apr 16 02:49:35 PM PDT 24 |
Apr 16 02:49:44 PM PDT 24 |
2449771457 ps |
T418 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.417521944 |
|
|
Apr 16 02:48:44 PM PDT 24 |
Apr 16 02:48:51 PM PDT 24 |
2473559807 ps |
T419 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1817411889 |
|
|
Apr 16 02:49:31 PM PDT 24 |
Apr 16 02:49:35 PM PDT 24 |
3741696126 ps |
T420 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3048094473 |
|
|
Apr 16 02:48:47 PM PDT 24 |
Apr 16 02:48:52 PM PDT 24 |
2109574685 ps |
T421 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2820426473 |
|
|
Apr 16 02:48:24 PM PDT 24 |
Apr 16 02:48:28 PM PDT 24 |
2493339031 ps |
T422 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1964460470 |
|
|
Apr 16 02:49:54 PM PDT 24 |
Apr 16 02:50:01 PM PDT 24 |
2072666751 ps |
T423 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.1250796414 |
|
|
Apr 16 02:49:39 PM PDT 24 |
Apr 16 02:49:42 PM PDT 24 |
2640579663 ps |
T424 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.3604684509 |
|
|
Apr 16 02:49:29 PM PDT 24 |
Apr 16 02:49:34 PM PDT 24 |
2029961290 ps |
T267 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.1647696083 |
|
|
Apr 16 02:49:52 PM PDT 24 |
Apr 16 02:49:55 PM PDT 24 |
2930457580 ps |
T425 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1434056930 |
|
|
Apr 16 02:48:46 PM PDT 24 |
Apr 16 02:49:06 PM PDT 24 |
10338169104 ps |
T182 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.3790256636 |
|
|
Apr 16 02:48:47 PM PDT 24 |
Apr 16 02:48:57 PM PDT 24 |
12406830678 ps |
T426 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.4225027077 |
|
|
Apr 16 02:49:25 PM PDT 24 |
Apr 16 02:49:34 PM PDT 24 |
2611551601 ps |
T427 |
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1657751690 |
|
|
Apr 16 02:50:07 PM PDT 24 |
Apr 16 02:50:18 PM PDT 24 |
3908717697 ps |
T93 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.1697501543 |
|
|
Apr 16 02:49:45 PM PDT 24 |
Apr 16 02:51:05 PM PDT 24 |
120775364415 ps |
T428 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3554735354 |
|
|
Apr 16 02:49:10 PM PDT 24 |
Apr 16 02:49:12 PM PDT 24 |
2230701423 ps |
T213 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2495495220 |
|
|
Apr 16 02:49:30 PM PDT 24 |
Apr 16 02:52:58 PM PDT 24 |
76830036457 ps |
T263 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4178840841 |
|
|
Apr 16 02:48:43 PM PDT 24 |
Apr 16 02:48:50 PM PDT 24 |
3647281789 ps |
T305 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3494911334 |
|
|
Apr 16 02:49:32 PM PDT 24 |
Apr 16 02:51:34 PM PDT 24 |
91539609514 ps |
T329 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3508626135 |
|
|
Apr 16 02:50:24 PM PDT 24 |
Apr 16 02:51:06 PM PDT 24 |
63023864448 ps |
T429 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.75071010 |
|
|
Apr 16 02:48:43 PM PDT 24 |
Apr 16 02:48:46 PM PDT 24 |
2051177696 ps |
T316 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2585328804 |
|
|
Apr 16 02:48:38 PM PDT 24 |
Apr 16 02:50:22 PM PDT 24 |
87299046288 ps |
T94 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1800100439 |
|
|
Apr 16 02:50:20 PM PDT 24 |
Apr 16 02:51:31 PM PDT 24 |
29827453628 ps |
T85 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.4086217220 |
|
|
Apr 16 02:49:58 PM PDT 24 |
Apr 16 02:50:01 PM PDT 24 |
4535432222 ps |
T111 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.1251167890 |
|
|
Apr 16 02:48:49 PM PDT 24 |
Apr 16 02:48:57 PM PDT 24 |
7945708810 ps |
T430 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.744396650 |
|
|
Apr 16 02:48:29 PM PDT 24 |
Apr 16 02:48:34 PM PDT 24 |
2464036570 ps |
T431 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.313316759 |
|
|
Apr 16 02:49:28 PM PDT 24 |
Apr 16 02:49:33 PM PDT 24 |
2118894307 ps |
T220 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.3648186408 |
|
|
Apr 16 02:48:28 PM PDT 24 |
Apr 16 02:54:28 PM PDT 24 |
279694133089 ps |
T432 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.4085356578 |
|
|
Apr 16 02:48:43 PM PDT 24 |
Apr 16 02:48:50 PM PDT 24 |
3054079795 ps |
T433 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1997964720 |
|
|
Apr 16 02:49:10 PM PDT 24 |
Apr 16 02:49:16 PM PDT 24 |
3184418754 ps |
T434 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3253320984 |
|
|
Apr 16 02:50:15 PM PDT 24 |
Apr 16 02:50:18 PM PDT 24 |
2525439161 ps |
T165 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.4092526625 |
|
|
Apr 16 02:49:42 PM PDT 24 |
Apr 16 02:49:46 PM PDT 24 |
4647083203 ps |
T435 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1188638757 |
|
|
Apr 16 02:49:22 PM PDT 24 |
Apr 16 02:49:30 PM PDT 24 |
2610709563 ps |
T304 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3005705796 |
|
|
Apr 16 02:50:08 PM PDT 24 |
Apr 16 02:52:20 PM PDT 24 |
52145870086 ps |
T436 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.421748794 |
|
|
Apr 16 02:49:16 PM PDT 24 |
Apr 16 02:49:20 PM PDT 24 |
2135633238 ps |
T166 |
/workspace/coverage/default/25.sysrst_ctrl_edge_detect.244955203 |
|
|
Apr 16 02:49:26 PM PDT 24 |
Apr 16 02:49:38 PM PDT 24 |
3703177289 ps |
T95 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2720418436 |
|
|
Apr 16 02:50:26 PM PDT 24 |
Apr 16 02:50:40 PM PDT 24 |
22854875461 ps |
T170 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2467901516 |
|
|
Apr 16 02:50:08 PM PDT 24 |
Apr 16 02:50:14 PM PDT 24 |
5297376035 ps |
T437 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.962216225 |
|
|
Apr 16 02:50:18 PM PDT 24 |
Apr 16 02:51:50 PM PDT 24 |
71610747883 ps |
T438 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1984398872 |
|
|
Apr 16 02:48:45 PM PDT 24 |
Apr 16 02:48:54 PM PDT 24 |
2137103963 ps |
T439 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3988647759 |
|
|
Apr 16 02:48:51 PM PDT 24 |
Apr 16 02:48:54 PM PDT 24 |
2101192018 ps |
T440 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1789344201 |
|
|
Apr 16 02:49:14 PM PDT 24 |
Apr 16 02:49:22 PM PDT 24 |
2475906003 ps |
T171 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2597048672 |
|
|
Apr 16 02:49:34 PM PDT 24 |
Apr 16 02:50:21 PM PDT 24 |
35976888538 ps |
T441 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.2102637666 |
|
|
Apr 16 02:48:51 PM PDT 24 |
Apr 16 02:49:00 PM PDT 24 |
2609867731 ps |
T160 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2656106661 |
|
|
Apr 16 02:49:56 PM PDT 24 |
Apr 16 02:50:36 PM PDT 24 |
15031362357 ps |
T442 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.429417985 |
|
|
Apr 16 02:50:17 PM PDT 24 |
Apr 16 02:50:23 PM PDT 24 |
3055481395 ps |
T443 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2077560078 |
|
|
Apr 16 02:48:56 PM PDT 24 |
Apr 16 02:49:05 PM PDT 24 |
2449465177 ps |
T321 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.903605156 |
|
|
Apr 16 02:50:17 PM PDT 24 |
Apr 16 02:50:51 PM PDT 24 |
43651981763 ps |
T96 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2504225101 |
|
|
Apr 16 02:48:31 PM PDT 24 |
Apr 16 02:49:06 PM PDT 24 |
32910541718 ps |
T444 |
/workspace/coverage/default/36.sysrst_ctrl_alert_test.3904884439 |
|
|
Apr 16 02:49:52 PM PDT 24 |
Apr 16 02:49:58 PM PDT 24 |
2014502129 ps |
T167 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3912978716 |
|
|
Apr 16 02:48:46 PM PDT 24 |
Apr 16 02:48:51 PM PDT 24 |
2722817527 ps |
T445 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2744232676 |
|
|
Apr 16 02:50:12 PM PDT 24 |
Apr 16 02:50:17 PM PDT 24 |
3344873619 ps |
T446 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.14494273 |
|
|
Apr 16 02:50:28 PM PDT 24 |
Apr 16 02:52:51 PM PDT 24 |
55659906469 ps |
T146 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1246093452 |
|
|
Apr 16 02:48:46 PM PDT 24 |
Apr 16 02:50:01 PM PDT 24 |
72244411325 ps |
T447 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.2018307629 |
|
|
Apr 16 02:49:33 PM PDT 24 |
Apr 16 02:49:38 PM PDT 24 |
2119043850 ps |
T448 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.938831111 |
|
|
Apr 16 02:48:55 PM PDT 24 |
Apr 16 02:48:57 PM PDT 24 |
2511055150 ps |
T449 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2898183178 |
|
|
Apr 16 02:48:29 PM PDT 24 |
Apr 16 02:48:34 PM PDT 24 |
2451377730 ps |
T161 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2696638739 |
|
|
Apr 16 02:50:08 PM PDT 24 |
Apr 16 02:50:37 PM PDT 24 |
12234768174 ps |
T450 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1091137208 |
|
|
Apr 16 02:50:04 PM PDT 24 |
Apr 16 02:50:11 PM PDT 24 |
2509181169 ps |
T451 |
/workspace/coverage/default/21.sysrst_ctrl_edge_detect.4034666958 |
|
|
Apr 16 02:49:14 PM PDT 24 |
Apr 16 02:49:19 PM PDT 24 |
2848035690 ps |
T452 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.224192182 |
|
|
Apr 16 02:50:12 PM PDT 24 |
Apr 16 02:50:17 PM PDT 24 |
2516678389 ps |
T453 |
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2692303617 |
|
|
Apr 16 02:48:43 PM PDT 24 |
Apr 16 02:48:48 PM PDT 24 |
2640924594 ps |
T454 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3993870034 |
|
|
Apr 16 02:50:12 PM PDT 24 |
Apr 16 02:50:21 PM PDT 24 |
2454967334 ps |
T455 |
/workspace/coverage/default/48.sysrst_ctrl_smoke.1637833463 |
|
|
Apr 16 02:50:10 PM PDT 24 |
Apr 16 02:50:15 PM PDT 24 |
2114742198 ps |
T456 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.605266739 |
|
|
Apr 16 02:49:47 PM PDT 24 |
Apr 16 02:49:51 PM PDT 24 |
2643068449 ps |
T457 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.3640337540 |
|
|
Apr 16 02:48:50 PM PDT 24 |
Apr 16 02:48:59 PM PDT 24 |
2612602659 ps |
T458 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.290039128 |
|
|
Apr 16 02:49:12 PM PDT 24 |
Apr 16 02:49:16 PM PDT 24 |
2533861527 ps |
T163 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3433962075 |
|
|
Apr 16 02:49:57 PM PDT 24 |
Apr 16 02:50:02 PM PDT 24 |
4593710604 ps |
T190 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.2750572424 |
|
|
Apr 16 02:49:20 PM PDT 24 |
Apr 16 02:49:26 PM PDT 24 |
3790266296 ps |
T191 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.1917225743 |
|
|
Apr 16 02:49:53 PM PDT 24 |
Apr 16 02:49:57 PM PDT 24 |
4517242510 ps |
T459 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.4194250732 |
|
|
Apr 16 02:49:45 PM PDT 24 |
Apr 16 02:49:53 PM PDT 24 |
2132948657 ps |
T307 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3561262600 |
|
|
Apr 16 02:49:39 PM PDT 24 |
Apr 16 02:51:18 PM PDT 24 |
149702121941 ps |
T460 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2158060793 |
|
|
Apr 16 02:48:53 PM PDT 24 |
Apr 16 02:49:04 PM PDT 24 |
27142827140 ps |
T461 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.1784837046 |
|
|
Apr 16 02:49:51 PM PDT 24 |
Apr 16 02:49:58 PM PDT 24 |
2011376106 ps |
T462 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.741078066 |
|
|
Apr 16 02:50:04 PM PDT 24 |
Apr 16 02:50:12 PM PDT 24 |
2609116276 ps |
T463 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.1336283814 |
|
|
Apr 16 02:49:24 PM PDT 24 |
Apr 16 02:49:32 PM PDT 24 |
2108303570 ps |
T266 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3504465849 |
|
|
Apr 16 02:48:36 PM PDT 24 |
Apr 16 02:49:51 PM PDT 24 |
66837599554 ps |
T464 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2742650941 |
|
|
Apr 16 02:48:47 PM PDT 24 |
Apr 16 02:48:51 PM PDT 24 |
3964114727 ps |
T113 |
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2305524262 |
|
|
Apr 16 02:49:54 PM PDT 24 |
Apr 16 02:50:02 PM PDT 24 |
4921664320 ps |
T97 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.2676079382 |
|
|
Apr 16 02:49:33 PM PDT 24 |
Apr 16 02:50:52 PM PDT 24 |
120827579297 ps |
T465 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.2425909226 |
|
|
Apr 16 02:49:21 PM PDT 24 |
Apr 16 02:49:28 PM PDT 24 |
2109741303 ps |
T466 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.3695251275 |
|
|
Apr 16 02:49:59 PM PDT 24 |
Apr 16 02:50:06 PM PDT 24 |
2133583379 ps |
T467 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3249868715 |
|
|
Apr 16 02:49:50 PM PDT 24 |
Apr 16 02:50:49 PM PDT 24 |
22579774996 ps |
T468 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1556895607 |
|
|
Apr 16 02:49:30 PM PDT 24 |
Apr 16 02:58:49 PM PDT 24 |
809378871856 ps |
T315 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2089953723 |
|
|
Apr 16 02:50:23 PM PDT 24 |
Apr 16 02:51:59 PM PDT 24 |
91903497059 ps |
T469 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1308044063 |
|
|
Apr 16 02:48:26 PM PDT 24 |
Apr 16 02:48:29 PM PDT 24 |
2324463063 ps |
T98 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.2278485928 |
|
|
Apr 16 02:49:53 PM PDT 24 |
Apr 16 02:51:07 PM PDT 24 |
44667091229 ps |
T470 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2710680395 |
|
|
Apr 16 02:48:32 PM PDT 24 |
Apr 16 02:48:40 PM PDT 24 |
2612879421 ps |
T471 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1132541095 |
|
|
Apr 16 02:48:42 PM PDT 24 |
Apr 16 02:48:47 PM PDT 24 |
2470790734 ps |
T472 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3348467599 |
|
|
Apr 16 02:50:06 PM PDT 24 |
Apr 16 02:50:14 PM PDT 24 |
2468352059 ps |
T473 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3201665659 |
|
|
Apr 16 02:48:36 PM PDT 24 |
Apr 16 02:48:41 PM PDT 24 |
2617907432 ps |
T474 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.4043590402 |
|
|
Apr 16 02:50:12 PM PDT 24 |
Apr 16 02:50:19 PM PDT 24 |
2473559721 ps |
T475 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3154826754 |
|
|
Apr 16 02:50:01 PM PDT 24 |
Apr 16 02:50:25 PM PDT 24 |
48871023364 ps |
T181 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2135984600 |
|
|
Apr 16 02:48:56 PM PDT 24 |
Apr 16 02:53:06 PM PDT 24 |
102053403864 ps |
T221 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.757924083 |
|
|
Apr 16 02:48:49 PM PDT 24 |
Apr 16 02:51:13 PM PDT 24 |
105593029378 ps |
T476 |
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.4114080012 |
|
|
Apr 16 02:49:21 PM PDT 24 |
Apr 16 02:49:28 PM PDT 24 |
2258595827 ps |
T477 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1815783263 |
|
|
Apr 16 02:50:08 PM PDT 24 |
Apr 16 02:50:13 PM PDT 24 |
2621789547 ps |
T478 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.536479562 |
|
|
Apr 16 02:49:16 PM PDT 24 |
Apr 16 02:49:19 PM PDT 24 |
2622491957 ps |
T479 |
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.4029346877 |
|
|
Apr 16 02:49:19 PM PDT 24 |
Apr 16 02:49:26 PM PDT 24 |
3500049385 ps |
T147 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.1758755552 |
|
|
Apr 16 02:49:20 PM PDT 24 |
Apr 16 02:49:28 PM PDT 24 |
16056988946 ps |
T480 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.2372878441 |
|
|
Apr 16 02:49:26 PM PDT 24 |
Apr 16 02:49:29 PM PDT 24 |
2033330780 ps |
T481 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.176363790 |
|
|
Apr 16 02:50:20 PM PDT 24 |
Apr 16 02:53:25 PM PDT 24 |
74436261016 ps |
T482 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.1005780135 |
|
|
Apr 16 02:48:54 PM PDT 24 |
Apr 16 02:48:57 PM PDT 24 |
3111727487 ps |
T296 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2858785584 |
|
|
Apr 16 02:50:01 PM PDT 24 |
Apr 16 02:57:19 PM PDT 24 |
158108445160 ps |
T483 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.2716001300 |
|
|
Apr 16 02:49:05 PM PDT 24 |
Apr 16 02:49:12 PM PDT 24 |
3993998245 ps |
T484 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.1767139263 |
|
|
Apr 16 02:48:47 PM PDT 24 |
Apr 16 02:48:52 PM PDT 24 |
5334853460 ps |
T485 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1377746999 |
|
|
Apr 16 02:48:46 PM PDT 24 |
Apr 16 02:48:54 PM PDT 24 |
2087030062 ps |
T243 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2755745894 |
|
|
Apr 16 02:49:08 PM PDT 24 |
Apr 16 02:50:18 PM PDT 24 |
101930801483 ps |
T486 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.4095109427 |
|
|
Apr 16 02:49:23 PM PDT 24 |
Apr 16 02:49:27 PM PDT 24 |
2119198258 ps |
T487 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2037968098 |
|
|
Apr 16 02:48:48 PM PDT 24 |
Apr 16 02:48:53 PM PDT 24 |
2490657254 ps |
T488 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.1240238427 |
|
|
Apr 16 02:48:38 PM PDT 24 |
Apr 16 02:48:43 PM PDT 24 |
2621692529 ps |
T112 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.1182644435 |
|
|
Apr 16 02:49:30 PM PDT 24 |
Apr 16 02:49:36 PM PDT 24 |
8612115199 ps |
T489 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.899868253 |
|
|
Apr 16 02:48:48 PM PDT 24 |
Apr 16 02:48:54 PM PDT 24 |
2516391922 ps |
T490 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4021385501 |
|
|
Apr 16 02:50:23 PM PDT 24 |
Apr 16 02:51:03 PM PDT 24 |
63594659279 ps |
T491 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2952915267 |
|
|
Apr 16 02:48:42 PM PDT 24 |
Apr 16 02:49:05 PM PDT 24 |
54432942357 ps |
T325 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.4145000746 |
|
|
Apr 16 02:50:04 PM PDT 24 |
Apr 16 02:55:02 PM PDT 24 |
134634476449 ps |
T492 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.220453313 |
|
|
Apr 16 02:49:41 PM PDT 24 |
Apr 16 02:49:49 PM PDT 24 |
2510553568 ps |
T306 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1945586878 |
|
|
Apr 16 02:50:23 PM PDT 24 |
Apr 16 02:51:59 PM PDT 24 |
137428780763 ps |
T493 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.565182546 |
|
|
Apr 16 02:49:01 PM PDT 24 |
Apr 16 02:50:18 PM PDT 24 |
2350719210496 ps |
T494 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1554728297 |
|
|
Apr 16 02:49:52 PM PDT 24 |
Apr 16 02:51:00 PM PDT 24 |
25333309333 ps |
T275 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2152573227 |
|
|
Apr 16 02:49:55 PM PDT 24 |
Apr 16 02:52:08 PM PDT 24 |
51850381601 ps |
T495 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1558123921 |
|
|
Apr 16 02:49:10 PM PDT 24 |
Apr 16 02:49:29 PM PDT 24 |
25354237939 ps |
T496 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.1244229338 |
|
|
Apr 16 02:48:32 PM PDT 24 |
Apr 16 02:48:37 PM PDT 24 |
2018313687 ps |
T497 |
/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.370207279 |
|
|
Apr 16 02:49:43 PM PDT 24 |
Apr 16 02:49:47 PM PDT 24 |
4126040239 ps |
T297 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.2966453963 |
|
|
Apr 16 02:49:27 PM PDT 24 |
Apr 16 02:49:48 PM PDT 24 |
73062405512 ps |
T498 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.1099999715 |
|
|
Apr 16 02:49:33 PM PDT 24 |
Apr 16 02:49:37 PM PDT 24 |
2627805099 ps |
T499 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3056519753 |
|
|
Apr 16 02:49:12 PM PDT 24 |
Apr 16 02:49:19 PM PDT 24 |
2175804293 ps |
T500 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3405024073 |
|
|
Apr 16 02:49:29 PM PDT 24 |
Apr 16 02:49:33 PM PDT 24 |
3040572967 ps |
T330 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2050108773 |
|
|
Apr 16 02:48:44 PM PDT 24 |
Apr 16 02:56:39 PM PDT 24 |
176745655805 ps |
T222 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2418149625 |
|
|
Apr 16 02:50:08 PM PDT 24 |
Apr 16 02:51:12 PM PDT 24 |
96053894634 ps |
T501 |
/workspace/coverage/default/40.sysrst_ctrl_alert_test.2198222503 |
|
|
Apr 16 02:49:55 PM PDT 24 |
Apr 16 02:50:02 PM PDT 24 |
2010237873 ps |
T502 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.909659429 |
|
|
Apr 16 02:50:05 PM PDT 24 |
Apr 16 02:50:10 PM PDT 24 |
2517322407 ps |
T503 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.506238013 |
|
|
Apr 16 02:49:51 PM PDT 24 |
Apr 16 02:49:58 PM PDT 24 |
3787271687 ps |
T214 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2307559065 |
|
|
Apr 16 02:49:07 PM PDT 24 |
Apr 16 02:49:34 PM PDT 24 |
37103508834 ps |
T241 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.64925018 |
|
|
Apr 16 02:48:36 PM PDT 24 |
Apr 16 02:48:52 PM PDT 24 |
22066221950 ps |
T504 |
/workspace/coverage/default/29.sysrst_ctrl_smoke.3345681767 |
|
|
Apr 16 02:49:34 PM PDT 24 |
Apr 16 02:49:39 PM PDT 24 |
2118847308 ps |
T505 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.586358929 |
|
|
Apr 16 02:48:32 PM PDT 24 |
Apr 16 02:48:35 PM PDT 24 |
2216074100 ps |
T223 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.748792084 |
|
|
Apr 16 02:48:44 PM PDT 24 |
Apr 16 02:51:41 PM PDT 24 |
65717272011 ps |
T506 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.759135651 |
|
|
Apr 16 02:48:30 PM PDT 24 |
Apr 16 02:48:37 PM PDT 24 |
2168600601 ps |
T507 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2966043532 |
|
|
Apr 16 02:50:00 PM PDT 24 |
Apr 16 02:50:03 PM PDT 24 |
3087253091 ps |
T508 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1943062399 |
|
|
Apr 16 02:49:41 PM PDT 24 |
Apr 16 02:49:44 PM PDT 24 |
2221697021 ps |
T509 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.204857458 |
|
|
Apr 16 02:50:05 PM PDT 24 |
Apr 16 02:50:12 PM PDT 24 |
2013302074 ps |
T510 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.952937112 |
|
|
Apr 16 02:48:44 PM PDT 24 |
Apr 16 02:48:52 PM PDT 24 |
2615167390 ps |
T511 |
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1365051415 |
|
|
Apr 16 02:49:52 PM PDT 24 |
Apr 16 02:49:55 PM PDT 24 |
2461040109 ps |
T512 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1111602444 |
|
|
Apr 16 02:49:13 PM PDT 24 |
Apr 16 02:49:18 PM PDT 24 |
2519532144 ps |
T513 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1815195815 |
|
|
Apr 16 02:48:32 PM PDT 24 |
Apr 16 02:48:37 PM PDT 24 |
2514576493 ps |
T201 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1141411182 |
|
|
Apr 16 02:49:19 PM PDT 24 |
Apr 16 02:49:52 PM PDT 24 |
85355870392 ps |
T514 |
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.55544445 |
|
|
Apr 16 02:49:36 PM PDT 24 |
Apr 16 02:49:43 PM PDT 24 |
2091264491 ps |
T515 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3554721252 |
|
|
Apr 16 02:49:24 PM PDT 24 |
Apr 16 02:49:31 PM PDT 24 |
2615109686 ps |
T224 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.803898354 |
|
|
Apr 16 02:48:34 PM PDT 24 |
Apr 16 02:50:30 PM PDT 24 |
44800356781 ps |
T516 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.2799458024 |
|
|
Apr 16 02:49:14 PM PDT 24 |
Apr 16 02:49:20 PM PDT 24 |
2011181990 ps |
T517 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.4148137366 |
|
|
Apr 16 02:49:02 PM PDT 24 |
Apr 16 02:49:10 PM PDT 24 |
2611659784 ps |
T518 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.108140803 |
|
|
Apr 16 02:50:09 PM PDT 24 |
Apr 16 02:50:16 PM PDT 24 |
2014844269 ps |
T519 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3757992399 |
|
|
Apr 16 02:48:50 PM PDT 24 |
Apr 16 02:49:02 PM PDT 24 |
15808265849 ps |
T520 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3809653016 |
|
|
Apr 16 02:50:18 PM PDT 24 |
Apr 16 02:50:59 PM PDT 24 |
30997511312 ps |
T521 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3758291100 |
|
|
Apr 16 02:50:06 PM PDT 24 |
Apr 16 02:56:45 PM PDT 24 |
148773247169 ps |
T522 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.2218171429 |
|
|
Apr 16 02:49:06 PM PDT 24 |
Apr 16 02:49:08 PM PDT 24 |
2023357536 ps |
T523 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1214320815 |
|
|
Apr 16 02:49:30 PM PDT 24 |
Apr 16 02:49:33 PM PDT 24 |
2199569215 ps |
T524 |
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1589614860 |
|
|
Apr 16 02:50:19 PM PDT 24 |
Apr 16 02:51:11 PM PDT 24 |
84435907121 ps |
T525 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.1667598103 |
|
|
Apr 16 02:48:44 PM PDT 24 |
Apr 16 02:48:49 PM PDT 24 |
2225266695 ps |
T526 |
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.1109430761 |
|
|
Apr 16 02:48:43 PM PDT 24 |
Apr 16 02:48:48 PM PDT 24 |
3084896741 ps |
T527 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.3742436750 |
|
|
Apr 16 02:49:45 PM PDT 24 |
Apr 16 02:49:48 PM PDT 24 |
2487991996 ps |
T318 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3113000015 |
|
|
Apr 16 02:50:10 PM PDT 24 |
Apr 16 02:53:14 PM PDT 24 |
68622718561 ps |
T528 |
/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.4249576767 |
|
|
Apr 16 02:49:34 PM PDT 24 |
Apr 16 02:49:38 PM PDT 24 |
2532610210 ps |
T529 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3206919492 |
|
|
Apr 16 02:49:26 PM PDT 24 |
Apr 16 02:49:30 PM PDT 24 |
3849423124 ps |
T322 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3103652778 |
|
|
Apr 16 02:50:09 PM PDT 24 |
Apr 16 02:51:07 PM PDT 24 |
83233728075 ps |
T530 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2293552949 |
|
|
Apr 16 02:49:57 PM PDT 24 |
Apr 16 02:50:00 PM PDT 24 |
2489913208 ps |
T338 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3388328241 |
|
|
Apr 16 02:49:09 PM PDT 24 |
Apr 16 02:49:46 PM PDT 24 |
53188962893 ps |
T531 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.900248171 |
|
|
Apr 16 02:48:51 PM PDT 24 |
Apr 16 02:49:02 PM PDT 24 |
3914869310 ps |
T199 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.651840583 |
|
|
Apr 16 02:50:06 PM PDT 24 |
Apr 16 02:50:18 PM PDT 24 |
4237019913 ps |
T532 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3695392729 |
|
|
Apr 16 02:49:51 PM PDT 24 |
Apr 16 02:50:01 PM PDT 24 |
3425257045 ps |
T533 |
/workspace/coverage/default/35.sysrst_ctrl_alert_test.3021694516 |
|
|
Apr 16 02:49:44 PM PDT 24 |
Apr 16 02:49:52 PM PDT 24 |
2008814279 ps |
T534 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.1907227340 |
|
|
Apr 16 02:50:22 PM PDT 24 |
Apr 16 02:50:26 PM PDT 24 |
2119119140 ps |
T535 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1741691390 |
|
|
Apr 16 02:49:05 PM PDT 24 |
Apr 16 02:49:21 PM PDT 24 |
26611472202 ps |
T536 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2998880990 |
|
|
Apr 16 02:50:04 PM PDT 24 |
Apr 16 02:50:08 PM PDT 24 |
2231021776 ps |
T537 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3243376968 |
|
|
Apr 16 02:49:45 PM PDT 24 |
Apr 16 02:49:48 PM PDT 24 |
2497868719 ps |
T538 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.335598642 |
|
|
Apr 16 02:50:15 PM PDT 24 |
Apr 16 02:50:19 PM PDT 24 |
2014854216 ps |
T539 |
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1102985872 |
|
|
Apr 16 02:48:44 PM PDT 24 |
Apr 16 02:48:48 PM PDT 24 |
2614716051 ps |
T540 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1192902450 |
|
|
Apr 16 02:48:53 PM PDT 24 |
Apr 16 02:48:58 PM PDT 24 |
2516351820 ps |
T541 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.642214584 |
|
|
Apr 16 02:49:12 PM PDT 24 |
Apr 16 02:49:19 PM PDT 24 |
2114981591 ps |
T542 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1999702931 |
|
|
Apr 16 02:48:42 PM PDT 24 |
Apr 16 02:48:48 PM PDT 24 |
2013628668 ps |
T235 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.3721521164 |
|
|
Apr 16 02:49:24 PM PDT 24 |
Apr 16 02:52:12 PM PDT 24 |
65392162906 ps |
T543 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2149188982 |
|
|
Apr 16 02:50:22 PM PDT 24 |
Apr 16 02:50:24 PM PDT 24 |
2487703186 ps |
T189 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3810408468 |
|
|
Apr 16 02:48:45 PM PDT 24 |
Apr 16 02:48:58 PM PDT 24 |
3626891778 ps |
T544 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1511390131 |
|
|
Apr 16 02:50:01 PM PDT 24 |
Apr 16 02:51:08 PM PDT 24 |
25831539132 ps |
T545 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all.157032764 |
|
|
Apr 16 02:49:43 PM PDT 24 |
Apr 16 02:49:58 PM PDT 24 |
9248426173 ps |
T546 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3275395930 |
|
|
Apr 16 02:48:40 PM PDT 24 |
Apr 16 02:48:44 PM PDT 24 |
5862452493 ps |
T547 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1005638191 |
|
|
Apr 16 02:49:02 PM PDT 24 |
Apr 16 02:58:51 PM PDT 24 |
216964075862 ps |
T323 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.942554016 |
|
|
Apr 16 02:50:17 PM PDT 24 |
Apr 16 02:51:47 PM PDT 24 |
31646222471 ps |
T548 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.4018835946 |
|
|
Apr 16 02:48:39 PM PDT 24 |
Apr 16 02:48:43 PM PDT 24 |
3818848235 ps |
T549 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.627901491 |
|
|
Apr 16 02:48:43 PM PDT 24 |
Apr 16 02:48:46 PM PDT 24 |
2904837699 ps |
T550 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3253631794 |
|
|
Apr 16 02:50:08 PM PDT 24 |
Apr 16 02:50:16 PM PDT 24 |
2149722981 ps |
T551 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3800004389 |
|
|
Apr 16 02:50:10 PM PDT 24 |
Apr 16 02:50:13 PM PDT 24 |
2500877775 ps |
T552 |
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.4210465558 |
|
|
Apr 16 02:49:36 PM PDT 24 |
Apr 16 03:23:00 PM PDT 24 |
760793342006 ps |
T553 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.2101848500 |
|
|
Apr 16 02:49:06 PM PDT 24 |
Apr 16 02:49:10 PM PDT 24 |
3547033762 ps |
T554 |
/workspace/coverage/default/34.sysrst_ctrl_smoke.2483409190 |
|
|
Apr 16 02:49:39 PM PDT 24 |
Apr 16 02:49:46 PM PDT 24 |
2113466832 ps |
T555 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.379147777 |
|
|
Apr 16 02:48:54 PM PDT 24 |
Apr 16 02:49:07 PM PDT 24 |
4212615245 ps |
T556 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3955517196 |
|
|
Apr 16 02:49:47 PM PDT 24 |
Apr 16 02:49:50 PM PDT 24 |
3237027465 ps |
T557 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1462108023 |
|
|
Apr 16 02:48:27 PM PDT 24 |
Apr 16 02:48:35 PM PDT 24 |
141274959381 ps |
T130 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1031732287 |
|
|
Apr 16 02:50:03 PM PDT 24 |
Apr 16 02:50:10 PM PDT 24 |
4314250161 ps |
T558 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.2245827618 |
|
|
Apr 16 02:49:36 PM PDT 24 |
Apr 16 02:49:44 PM PDT 24 |
2607551162 ps |
T303 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.2321698690 |
|
|
Apr 16 02:49:27 PM PDT 24 |
Apr 16 02:53:04 PM PDT 24 |
76449184585 ps |
T559 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3432835860 |
|
|
Apr 16 02:48:45 PM PDT 24 |
Apr 16 02:48:49 PM PDT 24 |
2258499270 ps |
T560 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2949083961 |
|
|
Apr 16 02:50:06 PM PDT 24 |
Apr 16 02:50:13 PM PDT 24 |
2615324087 ps |
T561 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.3407566490 |
|
|
Apr 16 02:49:34 PM PDT 24 |
Apr 16 02:49:41 PM PDT 24 |
2010605312 ps |
T562 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.3968782576 |
|
|
Apr 16 02:48:56 PM PDT 24 |
Apr 16 02:49:04 PM PDT 24 |
2611424352 ps |
T300 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1503223155 |
|
|
Apr 16 02:48:50 PM PDT 24 |
Apr 16 02:51:38 PM PDT 24 |
61123912961 ps |
T563 |
/workspace/coverage/default/39.sysrst_ctrl_smoke.1801890294 |
|
|
Apr 16 02:49:55 PM PDT 24 |
Apr 16 02:49:59 PM PDT 24 |
2117132393 ps |
T564 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.142090001 |
|
|
Apr 16 02:49:05 PM PDT 24 |
Apr 16 02:49:12 PM PDT 24 |
2950816583 ps |
T78 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1635112885 |
|
|
Apr 16 02:48:36 PM PDT 24 |
Apr 16 02:49:02 PM PDT 24 |
35777502239 ps |
T565 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1085087887 |
|
|
Apr 16 02:50:12 PM PDT 24 |
Apr 16 02:52:47 PM PDT 24 |
326437651085 ps |
T566 |
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.570983307 |
|
|
Apr 16 02:48:41 PM PDT 24 |
Apr 16 02:48:43 PM PDT 24 |
2211387544 ps |
T567 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1828933587 |
|
|
Apr 16 02:49:30 PM PDT 24 |
Apr 16 02:49:34 PM PDT 24 |
3331522334 ps |
T81 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3685185896 |
|
|
Apr 16 02:49:41 PM PDT 24 |
Apr 16 02:52:10 PM PDT 24 |
911249471555 ps |
T568 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1550964325 |
|
|
Apr 16 02:50:05 PM PDT 24 |
Apr 16 02:50:13 PM PDT 24 |
2574987764 ps |
T569 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.802967298 |
|
|
Apr 16 02:49:29 PM PDT 24 |
Apr 16 02:49:32 PM PDT 24 |
2087991079 ps |
T570 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.1436019215 |
|
|
Apr 16 02:49:49 PM PDT 24 |
Apr 16 02:49:56 PM PDT 24 |
2010458654 ps |
T337 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1029444497 |
|
|
Apr 16 02:48:44 PM PDT 24 |
Apr 16 02:48:55 PM PDT 24 |
58595195072 ps |
T571 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.1803944729 |
|
|
Apr 16 02:49:54 PM PDT 24 |
Apr 16 02:49:56 PM PDT 24 |
2065178563 ps |
T135 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.429975056 |
|
|
Apr 16 02:49:10 PM PDT 24 |
Apr 16 02:51:49 PM PDT 24 |
83776362683 ps |
T572 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1507390340 |
|
|
Apr 16 02:49:36 PM PDT 24 |
Apr 16 02:49:41 PM PDT 24 |
2120456878 ps |
T573 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.787023729 |
|
|
Apr 16 02:49:30 PM PDT 24 |
Apr 16 02:51:21 PM PDT 24 |
80802746906 ps |
T574 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1748383576 |
|
|
Apr 16 02:50:01 PM PDT 24 |
Apr 16 02:50:03 PM PDT 24 |
2027446034 ps |
T173 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.2712391009 |
|
|
Apr 16 02:49:31 PM PDT 24 |
Apr 16 02:49:37 PM PDT 24 |
4862843639 ps |
T575 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1349452082 |
|
|
Apr 16 02:48:47 PM PDT 24 |
Apr 16 02:50:10 PM PDT 24 |
59526413597 ps |
T576 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.2560043674 |
|
|
Apr 16 02:49:38 PM PDT 24 |
Apr 16 02:49:44 PM PDT 24 |
2031575611 ps |
T577 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.1653358187 |
|
|
Apr 16 02:48:44 PM PDT 24 |
Apr 16 02:48:48 PM PDT 24 |
2972760251 ps |
T578 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.3172760043 |
|
|
Apr 16 02:49:34 PM PDT 24 |
Apr 16 02:49:37 PM PDT 24 |
5047383901 ps |
T579 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2993708186 |
|
|
Apr 16 02:50:05 PM PDT 24 |
Apr 16 02:50:53 PM PDT 24 |
671946228613 ps |
T580 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.4186660134 |
|
|
Apr 16 02:50:04 PM PDT 24 |
Apr 16 02:50:08 PM PDT 24 |
3711976397 ps |
T581 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3175078180 |
|
|
Apr 16 02:49:13 PM PDT 24 |
Apr 16 02:49:16 PM PDT 24 |
2630683989 ps |
T582 |
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2513780457 |
|
|
Apr 16 02:49:23 PM PDT 24 |
Apr 16 02:49:27 PM PDT 24 |
2466281658 ps |
T583 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1279054396 |
|
|
Apr 16 02:48:44 PM PDT 24 |
Apr 16 02:48:52 PM PDT 24 |
3722006065 ps |
T584 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.2505290414 |
|
|
Apr 16 02:49:06 PM PDT 24 |
Apr 16 02:49:15 PM PDT 24 |
2510902367 ps |
T585 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.317638456 |
|
|
Apr 16 02:50:06 PM PDT 24 |
Apr 16 02:50:39 PM PDT 24 |
11422064834 ps |
T586 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.2106474893 |
|
|
Apr 16 02:48:59 PM PDT 24 |
Apr 16 02:49:03 PM PDT 24 |
4523728696 ps |
T313 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1454123251 |
|
|
Apr 16 02:50:20 PM PDT 24 |
Apr 16 02:51:35 PM PDT 24 |
110502185649 ps |
T587 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.3327398506 |
|
|
Apr 16 02:49:27 PM PDT 24 |
Apr 16 02:49:36 PM PDT 24 |
2993224247 ps |
T588 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.1560991774 |
|
|
Apr 16 02:49:06 PM PDT 24 |
Apr 16 02:49:10 PM PDT 24 |
2622575940 ps |
T589 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.456195946 |
|
|
Apr 16 02:49:24 PM PDT 24 |
Apr 16 02:49:31 PM PDT 24 |
2192457562 ps |
T590 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.2031278066 |
|
|
Apr 16 02:49:16 PM PDT 24 |
Apr 16 02:49:24 PM PDT 24 |
10349366742 ps |
T591 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3062696632 |
|
|
Apr 16 02:50:01 PM PDT 24 |
Apr 16 02:50:03 PM PDT 24 |
3612849344 ps |
T218 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3257607551 |
|
|
Apr 16 02:50:24 PM PDT 24 |
Apr 16 02:53:15 PM PDT 24 |
63593879825 ps |
T592 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.291721189 |
|
|
Apr 16 02:49:36 PM PDT 24 |
Apr 16 02:49:39 PM PDT 24 |
2121889332 ps |
T593 |
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.211769079 |
|
|
Apr 16 02:50:25 PM PDT 24 |
Apr 16 02:50:48 PM PDT 24 |
54538558487 ps |
T594 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2581331169 |
|
|
Apr 16 02:48:48 PM PDT 24 |
Apr 16 02:48:53 PM PDT 24 |
2478238713 ps |
T136 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.1825765877 |
|
|
Apr 16 02:49:15 PM PDT 24 |
Apr 16 02:49:28 PM PDT 24 |
4390260400 ps |
T595 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3397132489 |
|
|
Apr 16 02:49:57 PM PDT 24 |
Apr 16 02:49:59 PM PDT 24 |
3304765606 ps |