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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.71 99.37 96.41 100.00 96.79 98.85 99.52 93.02


Total test records in report: 909
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T225 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.4026166969 Apr 16 02:48:48 PM PDT 24 Apr 16 02:50:23 PM PDT 24 35741289229 ps
T596 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1795088033 Apr 16 02:50:08 PM PDT 24 Apr 16 02:50:11 PM PDT 24 2535759359 ps
T597 /workspace/coverage/default/34.sysrst_ctrl_stress_all.1466277853 Apr 16 02:49:43 PM PDT 24 Apr 16 02:53:07 PM PDT 24 78479179496 ps
T99 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.1739135522 Apr 16 02:49:16 PM PDT 24 Apr 16 02:52:31 PM PDT 24 67988550135 ps
T598 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2879057009 Apr 16 02:50:22 PM PDT 24 Apr 16 02:50:37 PM PDT 24 20103518005 ps
T258 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1717422917 Apr 16 02:49:10 PM PDT 24 Apr 16 02:50:42 PM PDT 24 40719021569 ps
T599 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3761855893 Apr 16 02:48:45 PM PDT 24 Apr 16 02:48:52 PM PDT 24 2623231313 ps
T600 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.1873152247 Apr 16 02:49:23 PM PDT 24 Apr 16 02:49:31 PM PDT 24 3269938095 ps
T309 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.1830201093 Apr 16 02:49:38 PM PDT 24 Apr 16 02:52:22 PM PDT 24 129866302368 ps
T601 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2436647481 Apr 16 02:48:48 PM PDT 24 Apr 16 02:48:52 PM PDT 24 3685775721 ps
T602 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.4210798153 Apr 16 02:48:42 PM PDT 24 Apr 16 02:48:47 PM PDT 24 2193723200 ps
T145 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.4111999007 Apr 16 02:50:09 PM PDT 24 Apr 16 02:51:54 PM PDT 24 85931560782 ps
T603 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3034952033 Apr 16 02:50:20 PM PDT 24 Apr 16 02:52:50 PM PDT 24 56683569712 ps
T604 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.1688231231 Apr 16 02:49:25 PM PDT 24 Apr 16 02:49:29 PM PDT 24 2470318013 ps
T605 /workspace/coverage/default/39.sysrst_ctrl_stress_all.357142579 Apr 16 02:49:52 PM PDT 24 Apr 16 02:50:32 PM PDT 24 15334824946 ps
T229 /workspace/coverage/default/20.sysrst_ctrl_stress_all.2800999366 Apr 16 02:49:07 PM PDT 24 Apr 16 02:49:50 PM PDT 24 33497590048 ps
T301 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.2678250418 Apr 16 02:49:55 PM PDT 24 Apr 16 02:51:42 PM PDT 24 157667518014 ps
T606 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4057509090 Apr 16 02:50:12 PM PDT 24 Apr 16 02:50:17 PM PDT 24 2519089749 ps
T607 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1886292434 Apr 16 02:49:28 PM PDT 24 Apr 16 02:49:32 PM PDT 24 3295201783 ps
T608 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2718353256 Apr 16 02:49:14 PM PDT 24 Apr 16 02:49:16 PM PDT 24 4474133505 ps
T609 /workspace/coverage/default/14.sysrst_ctrl_smoke.2725929098 Apr 16 02:48:57 PM PDT 24 Apr 16 02:49:00 PM PDT 24 2125737107 ps
T610 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3448107213 Apr 16 02:48:44 PM PDT 24 Apr 16 02:50:02 PM PDT 24 55481586398 ps
T611 /workspace/coverage/default/5.sysrst_ctrl_alert_test.3195654507 Apr 16 02:48:47 PM PDT 24 Apr 16 02:48:55 PM PDT 24 2012084572 ps
T612 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2541618653 Apr 16 02:50:22 PM PDT 24 Apr 16 02:53:35 PM PDT 24 71598367155 ps
T613 /workspace/coverage/default/37.sysrst_ctrl_stress_all.957943698 Apr 16 02:49:48 PM PDT 24 Apr 16 02:49:56 PM PDT 24 7615823026 ps
T614 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2939337486 Apr 16 02:49:42 PM PDT 24 Apr 16 02:49:47 PM PDT 24 2791417084 ps
T615 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2083976951 Apr 16 02:48:48 PM PDT 24 Apr 16 02:48:56 PM PDT 24 2010421874 ps
T616 /workspace/coverage/default/34.sysrst_ctrl_alert_test.151825525 Apr 16 02:49:44 PM PDT 24 Apr 16 02:49:51 PM PDT 24 2017092835 ps
T617 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1037082354 Apr 16 02:49:53 PM PDT 24 Apr 16 02:50:02 PM PDT 24 2511785176 ps
T618 /workspace/coverage/default/19.sysrst_ctrl_smoke.2311612021 Apr 16 02:49:05 PM PDT 24 Apr 16 02:49:11 PM PDT 24 2111337612 ps
T302 /workspace/coverage/default/27.sysrst_ctrl_stress_all.3085459198 Apr 16 02:49:26 PM PDT 24 Apr 16 02:51:52 PM PDT 24 119468515824 ps
T619 /workspace/coverage/default/3.sysrst_ctrl_alert_test.2190794056 Apr 16 02:48:44 PM PDT 24 Apr 16 02:48:48 PM PDT 24 2037214456 ps
T620 /workspace/coverage/default/45.sysrst_ctrl_smoke.1164167194 Apr 16 02:50:06 PM PDT 24 Apr 16 02:50:09 PM PDT 24 2132497427 ps
T621 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.1622944544 Apr 16 02:48:55 PM PDT 24 Apr 16 02:49:00 PM PDT 24 2447996845 ps
T622 /workspace/coverage/default/9.sysrst_ctrl_smoke.430076174 Apr 16 02:48:44 PM PDT 24 Apr 16 02:48:53 PM PDT 24 2115069596 ps
T114 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.830224049 Apr 16 02:49:24 PM PDT 24 Apr 16 02:49:29 PM PDT 24 8673998565 ps
T623 /workspace/coverage/default/2.sysrst_ctrl_alert_test.3174721038 Apr 16 02:48:39 PM PDT 24 Apr 16 02:48:45 PM PDT 24 2014611195 ps
T624 /workspace/coverage/default/35.sysrst_ctrl_smoke.197787653 Apr 16 02:49:42 PM PDT 24 Apr 16 02:49:45 PM PDT 24 2127878033 ps
T202 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.1603967120 Apr 16 02:49:16 PM PDT 24 Apr 16 02:49:20 PM PDT 24 4432203508 ps
T203 /workspace/coverage/default/37.sysrst_ctrl_smoke.2130953612 Apr 16 02:49:49 PM PDT 24 Apr 16 02:49:56 PM PDT 24 2111086875 ps
T204 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2792270312 Apr 16 02:49:23 PM PDT 24 Apr 16 02:49:44 PM PDT 24 83377385924 ps
T205 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3370612887 Apr 16 02:49:25 PM PDT 24 Apr 16 02:49:27 PM PDT 24 2291744728 ps
T206 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.2786743039 Apr 16 02:48:48 PM PDT 24 Apr 16 02:48:56 PM PDT 24 2118533186 ps
T207 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.1382036779 Apr 16 02:49:36 PM PDT 24 Apr 16 02:49:39 PM PDT 24 3693983824 ps
T208 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.121847887 Apr 16 02:49:00 PM PDT 24 Apr 16 02:49:07 PM PDT 24 2120569332 ps
T209 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2953685638 Apr 16 02:49:22 PM PDT 24 Apr 16 02:49:25 PM PDT 24 3603755536 ps
T210 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3706849205 Apr 16 02:49:55 PM PDT 24 Apr 16 02:49:59 PM PDT 24 3138182060 ps
T211 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.915923755 Apr 16 02:48:55 PM PDT 24 Apr 16 02:52:49 PM PDT 24 89148785855 ps
T299 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.2176464524 Apr 16 02:49:47 PM PDT 24 Apr 16 02:50:55 PM PDT 24 109420684282 ps
T625 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1453153885 Apr 16 02:49:44 PM PDT 24 Apr 16 02:49:48 PM PDT 24 2623888340 ps
T626 /workspace/coverage/default/15.sysrst_ctrl_smoke.1824838933 Apr 16 02:49:06 PM PDT 24 Apr 16 02:49:09 PM PDT 24 2123159187 ps
T627 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1491010502 Apr 16 02:49:47 PM PDT 24 Apr 16 02:49:54 PM PDT 24 2024671673 ps
T188 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.4225118540 Apr 16 02:48:41 PM PDT 24 Apr 16 02:49:35 PM PDT 24 263213865131 ps
T628 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.4135530425 Apr 16 02:49:53 PM PDT 24 Apr 16 02:50:57 PM PDT 24 24584745853 ps
T629 /workspace/coverage/default/2.sysrst_ctrl_smoke.1037334063 Apr 16 02:48:35 PM PDT 24 Apr 16 02:48:39 PM PDT 24 2114979841 ps
T630 /workspace/coverage/default/22.sysrst_ctrl_alert_test.4119330388 Apr 16 02:49:20 PM PDT 24 Apr 16 02:49:27 PM PDT 24 2010001311 ps
T631 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1745344207 Apr 16 02:48:33 PM PDT 24 Apr 16 02:48:55 PM PDT 24 7504167757 ps
T632 /workspace/coverage/default/3.sysrst_ctrl_smoke.3381915318 Apr 16 02:48:41 PM PDT 24 Apr 16 02:48:44 PM PDT 24 2122903123 ps
T633 /workspace/coverage/default/16.sysrst_ctrl_stress_all.159199218 Apr 16 02:48:57 PM PDT 24 Apr 16 02:51:39 PM PDT 24 60671543901 ps
T230 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1614336921 Apr 16 02:49:21 PM PDT 24 Apr 16 02:54:40 PM PDT 24 118981504570 ps
T634 /workspace/coverage/default/43.sysrst_ctrl_alert_test.3825594359 Apr 16 02:50:13 PM PDT 24 Apr 16 02:50:20 PM PDT 24 2010409736 ps
T635 /workspace/coverage/default/19.sysrst_ctrl_stress_all.1134375617 Apr 16 02:49:12 PM PDT 24 Apr 16 03:02:40 PM PDT 24 334303363687 ps
T636 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.2899756427 Apr 16 02:49:09 PM PDT 24 Apr 16 02:49:13 PM PDT 24 3742673426 ps
T260 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1502010531 Apr 16 02:48:29 PM PDT 24 Apr 16 02:49:00 PM PDT 24 42101119841 ps
T637 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1351811048 Apr 16 02:49:12 PM PDT 24 Apr 16 02:49:21 PM PDT 24 2611959365 ps
T638 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3183705968 Apr 16 02:49:28 PM PDT 24 Apr 16 02:49:32 PM PDT 24 2531073621 ps
T639 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3907872356 Apr 16 02:49:41 PM PDT 24 Apr 16 02:49:47 PM PDT 24 2150213504 ps
T640 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1769962518 Apr 16 02:49:12 PM PDT 24 Apr 16 02:51:28 PM PDT 24 106714103772 ps
T331 /workspace/coverage/default/10.sysrst_ctrl_stress_all.3746827037 Apr 16 02:48:50 PM PDT 24 Apr 16 02:51:38 PM PDT 24 131271642796 ps
T641 /workspace/coverage/default/36.sysrst_ctrl_smoke.3818326070 Apr 16 02:49:45 PM PDT 24 Apr 16 02:49:52 PM PDT 24 2112906440 ps
T642 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1757181096 Apr 16 02:49:08 PM PDT 24 Apr 16 02:49:13 PM PDT 24 8065175794 ps
T643 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.252583542 Apr 16 02:49:03 PM PDT 24 Apr 16 02:49:14 PM PDT 24 3827298316 ps
T339 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3483622403 Apr 16 02:50:21 PM PDT 24 Apr 16 02:52:59 PM PDT 24 134499806197 ps
T644 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1179082144 Apr 16 02:50:17 PM PDT 24 Apr 16 02:50:26 PM PDT 24 8409635299 ps
T231 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1086093794 Apr 16 02:50:08 PM PDT 24 Apr 16 02:51:26 PM PDT 24 57202708414 ps
T645 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.841428166 Apr 16 02:49:22 PM PDT 24 Apr 16 02:49:29 PM PDT 24 2478101195 ps
T646 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3723887313 Apr 16 02:49:43 PM PDT 24 Apr 16 02:49:53 PM PDT 24 3338270961 ps
T647 /workspace/coverage/default/47.sysrst_ctrl_smoke.1470842397 Apr 16 02:50:09 PM PDT 24 Apr 16 02:50:12 PM PDT 24 2152429653 ps
T127 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3713320340 Apr 16 02:49:15 PM PDT 24 Apr 16 02:49:20 PM PDT 24 2940141610 ps
T648 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2022480955 Apr 16 02:49:37 PM PDT 24 Apr 16 02:49:45 PM PDT 24 2512480057 ps
T649 /workspace/coverage/default/28.sysrst_ctrl_stress_all.3560963850 Apr 16 02:49:36 PM PDT 24 Apr 16 02:50:14 PM PDT 24 15053278162 ps
T650 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3017975343 Apr 16 02:49:35 PM PDT 24 Apr 16 02:49:41 PM PDT 24 3166535818 ps
T651 /workspace/coverage/default/30.sysrst_ctrl_alert_test.249889950 Apr 16 02:49:31 PM PDT 24 Apr 16 02:49:35 PM PDT 24 2030478889 ps
T652 /workspace/coverage/default/17.sysrst_ctrl_alert_test.3082690568 Apr 16 02:50:11 PM PDT 24 Apr 16 02:50:19 PM PDT 24 2010590786 ps
T653 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.2542566816 Apr 16 02:49:27 PM PDT 24 Apr 16 02:49:33 PM PDT 24 6084982075 ps
T654 /workspace/coverage/default/21.sysrst_ctrl_smoke.2784455139 Apr 16 02:49:15 PM PDT 24 Apr 16 02:49:19 PM PDT 24 2118595844 ps
T655 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.2949938665 Apr 16 02:49:25 PM PDT 24 Apr 16 02:50:48 PM PDT 24 34394602902 ps
T656 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.2701334917 Apr 16 02:48:59 PM PDT 24 Apr 16 02:49:05 PM PDT 24 4768106050 ps
T657 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.4222092836 Apr 16 02:49:29 PM PDT 24 Apr 16 02:49:32 PM PDT 24 2465259201 ps
T658 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2841429364 Apr 16 02:48:47 PM PDT 24 Apr 16 02:48:59 PM PDT 24 3380114490 ps
T659 /workspace/coverage/default/16.sysrst_ctrl_smoke.4254242687 Apr 16 02:49:01 PM PDT 24 Apr 16 02:49:04 PM PDT 24 2126426750 ps
T200 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3093837188 Apr 16 02:50:17 PM PDT 24 Apr 16 02:52:53 PM PDT 24 118376992865 ps
T327 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2888870614 Apr 16 02:49:34 PM PDT 24 Apr 16 02:50:12 PM PDT 24 53570915120 ps
T660 /workspace/coverage/default/4.sysrst_ctrl_alert_test.488751273 Apr 16 02:48:46 PM PDT 24 Apr 16 02:48:54 PM PDT 24 2010182051 ps
T661 /workspace/coverage/default/21.sysrst_ctrl_alert_test.3035522543 Apr 16 02:49:11 PM PDT 24 Apr 16 02:49:14 PM PDT 24 2029658966 ps
T662 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3450969456 Apr 16 02:49:24 PM PDT 24 Apr 16 02:49:32 PM PDT 24 2514079086 ps
T663 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1872485996 Apr 16 02:49:36 PM PDT 24 Apr 16 02:49:41 PM PDT 24 8385130481 ps
T664 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3469619277 Apr 16 02:49:48 PM PDT 24 Apr 16 02:52:13 PM PDT 24 56911294110 ps
T665 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2280660537 Apr 16 02:49:01 PM PDT 24 Apr 16 02:49:13 PM PDT 24 4032824712 ps
T666 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.1877103276 Apr 16 02:48:42 PM PDT 24 Apr 16 02:48:53 PM PDT 24 5093772599 ps
T667 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2186321666 Apr 16 02:48:46 PM PDT 24 Apr 16 02:49:50 PM PDT 24 57841275699 ps
T668 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1841603436 Apr 16 02:48:43 PM PDT 24 Apr 16 02:48:50 PM PDT 24 2514330585 ps
T669 /workspace/coverage/default/3.sysrst_ctrl_stress_all.3326751474 Apr 16 02:48:37 PM PDT 24 Apr 16 02:48:42 PM PDT 24 7412489413 ps
T670 /workspace/coverage/default/38.sysrst_ctrl_stress_all.3358334364 Apr 16 02:49:51 PM PDT 24 Apr 16 02:50:09 PM PDT 24 11126513863 ps
T122 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.3470212760 Apr 16 02:49:29 PM PDT 24 Apr 16 02:49:32 PM PDT 24 11914513923 ps
T310 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3460247924 Apr 16 02:49:47 PM PDT 24 Apr 16 02:50:43 PM PDT 24 59938109880 ps
T671 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1341975097 Apr 16 02:49:32 PM PDT 24 Apr 16 02:50:50 PM PDT 24 64754710383 ps
T672 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.631076081 Apr 16 02:48:40 PM PDT 24 Apr 16 02:54:18 PM PDT 24 137552743066 ps
T673 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2470073554 Apr 16 02:49:05 PM PDT 24 Apr 16 02:49:08 PM PDT 24 2487579836 ps
T674 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1737985393 Apr 16 02:50:06 PM PDT 24 Apr 16 02:50:09 PM PDT 24 2483244230 ps
T675 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.2328652734 Apr 16 02:48:52 PM PDT 24 Apr 16 02:49:01 PM PDT 24 2677637708 ps
T676 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.77197870 Apr 16 02:48:57 PM PDT 24 Apr 16 02:49:03 PM PDT 24 2882891324 ps
T677 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.3175650805 Apr 16 02:48:54 PM PDT 24 Apr 16 02:49:02 PM PDT 24 3681076968 ps
T326 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3781150524 Apr 16 02:50:26 PM PDT 24 Apr 16 02:53:28 PM PDT 24 142610013117 ps
T236 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3722223400 Apr 16 02:49:13 PM PDT 24 Apr 16 02:49:24 PM PDT 24 65618730823 ps
T678 /workspace/coverage/default/8.sysrst_ctrl_stress_all.1654329812 Apr 16 02:48:48 PM PDT 24 Apr 16 02:49:29 PM PDT 24 161025725595 ps
T679 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3401712228 Apr 16 02:49:27 PM PDT 24 Apr 16 02:49:37 PM PDT 24 2612845156 ps
T680 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.277694227 Apr 16 02:49:01 PM PDT 24 Apr 16 02:51:29 PM PDT 24 58080081752 ps
T115 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.4122562232 Apr 16 02:48:42 PM PDT 24 Apr 16 02:48:45 PM PDT 24 3887766669 ps
T681 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.102850217 Apr 16 02:49:37 PM PDT 24 Apr 16 02:49:45 PM PDT 24 4668300991 ps
T682 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1266825246 Apr 16 02:48:45 PM PDT 24 Apr 16 02:49:37 PM PDT 24 35383413888 ps
T683 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.3383464121 Apr 16 02:49:51 PM PDT 24 Apr 16 02:49:53 PM PDT 24 5771852679 ps
T684 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3315304404 Apr 16 02:49:54 PM PDT 24 Apr 16 02:50:29 PM PDT 24 373546508655 ps
T685 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.2027786759 Apr 16 02:50:20 PM PDT 24 Apr 16 02:58:50 PM PDT 24 190460005090 ps
T686 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2357894209 Apr 16 02:49:28 PM PDT 24 Apr 16 02:49:34 PM PDT 24 2477746648 ps
T273 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3494711005 Apr 16 02:49:26 PM PDT 24 Apr 16 02:51:35 PM PDT 24 47062115011 ps
T687 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.3748907522 Apr 16 02:49:04 PM PDT 24 Apr 16 02:49:14 PM PDT 24 3904537228 ps
T688 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.3131944798 Apr 16 02:48:34 PM PDT 24 Apr 16 02:48:38 PM PDT 24 5317807261 ps
T100 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3877472456 Apr 16 02:48:25 PM PDT 24 Apr 16 02:50:32 PM PDT 24 47630073293 ps
T689 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.59156281 Apr 16 02:49:48 PM PDT 24 Apr 16 02:51:43 PM PDT 24 163891208348 ps
T690 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.1521846610 Apr 16 02:48:40 PM PDT 24 Apr 16 02:48:49 PM PDT 24 3166917203 ps
T691 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3614719533 Apr 16 02:48:39 PM PDT 24 Apr 16 02:48:42 PM PDT 24 2200237534 ps
T692 /workspace/coverage/default/14.sysrst_ctrl_stress_all.3035439336 Apr 16 02:48:53 PM PDT 24 Apr 16 02:49:32 PM PDT 24 63095331696 ps
T693 /workspace/coverage/default/49.sysrst_ctrl_stress_all.794806788 Apr 16 02:50:14 PM PDT 24 Apr 16 02:50:25 PM PDT 24 16646298407 ps
T694 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.413181091 Apr 16 02:50:02 PM PDT 24 Apr 16 02:50:04 PM PDT 24 2691702176 ps
T695 /workspace/coverage/default/23.sysrst_ctrl_alert_test.1063198253 Apr 16 02:49:22 PM PDT 24 Apr 16 02:49:25 PM PDT 24 2055476145 ps
T696 /workspace/coverage/default/46.sysrst_ctrl_alert_test.990011708 Apr 16 02:50:10 PM PDT 24 Apr 16 02:50:17 PM PDT 24 2015223466 ps
T697 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3904083640 Apr 16 02:49:57 PM PDT 24 Apr 16 02:50:01 PM PDT 24 2681919360 ps
T698 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2983305317 Apr 16 02:49:14 PM PDT 24 Apr 16 02:51:19 PM PDT 24 49398149606 ps
T699 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.1194247619 Apr 16 02:48:24 PM PDT 24 Apr 16 02:48:27 PM PDT 24 2526645555 ps
T700 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1099333386 Apr 16 02:49:50 PM PDT 24 Apr 16 02:49:59 PM PDT 24 2471245333 ps
T701 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.1722077963 Apr 16 02:50:04 PM PDT 24 Apr 16 02:52:37 PM PDT 24 63972970670 ps
T702 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1947606989 Apr 16 02:48:36 PM PDT 24 Apr 16 02:49:01 PM PDT 24 541310499483 ps
T312 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.887301080 Apr 16 02:50:09 PM PDT 24 Apr 16 02:51:58 PM PDT 24 78611891293 ps
T703 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2296026525 Apr 16 02:49:32 PM PDT 24 Apr 16 02:49:40 PM PDT 24 2512716868 ps
T704 /workspace/coverage/default/24.sysrst_ctrl_stress_all.1683684001 Apr 16 02:49:23 PM PDT 24 Apr 16 02:49:33 PM PDT 24 10686872378 ps
T705 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1472702014 Apr 16 02:49:26 PM PDT 24 Apr 16 02:52:28 PM PDT 24 329410844825 ps
T706 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1900560327 Apr 16 02:50:15 PM PDT 24 Apr 16 02:50:24 PM PDT 24 2445172722 ps
T707 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.227509221 Apr 16 02:48:44 PM PDT 24 Apr 16 02:48:53 PM PDT 24 3189475554 ps
T708 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2220145731 Apr 16 02:48:34 PM PDT 24 Apr 16 02:48:42 PM PDT 24 2512845013 ps
T709 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.2842570044 Apr 16 02:50:11 PM PDT 24 Apr 16 02:50:17 PM PDT 24 2516101692 ps
T710 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3470310851 Apr 16 02:49:27 PM PDT 24 Apr 16 02:49:32 PM PDT 24 3729784740 ps
T711 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3122675972 Apr 16 02:50:07 PM PDT 24 Apr 16 02:50:16 PM PDT 24 3023743481 ps
T712 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2165602277 Apr 16 02:48:48 PM PDT 24 Apr 16 02:48:55 PM PDT 24 2521295682 ps
T713 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2466308415 Apr 16 02:49:55 PM PDT 24 Apr 16 02:50:03 PM PDT 24 2610623587 ps
T714 /workspace/coverage/default/42.sysrst_ctrl_smoke.4081489585 Apr 16 02:50:04 PM PDT 24 Apr 16 02:50:08 PM PDT 24 2117978650 ps
T715 /workspace/coverage/default/11.sysrst_ctrl_alert_test.4196114429 Apr 16 02:49:03 PM PDT 24 Apr 16 02:49:07 PM PDT 24 2018918954 ps
T716 /workspace/coverage/default/5.sysrst_ctrl_stress_all.236732213 Apr 16 02:48:44 PM PDT 24 Apr 16 02:48:53 PM PDT 24 14835976497 ps
T234 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2352380666 Apr 16 02:50:12 PM PDT 24 Apr 16 02:52:14 PM PDT 24 44351455000 ps
T717 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1692654710 Apr 16 02:48:55 PM PDT 24 Apr 16 02:48:58 PM PDT 24 2628746418 ps
T718 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3972263263 Apr 16 02:49:06 PM PDT 24 Apr 16 02:52:12 PM PDT 24 69063114914 ps
T719 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.1476256641 Apr 16 02:49:12 PM PDT 24 Apr 16 02:49:18 PM PDT 24 2513981898 ps
T720 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3968526190 Apr 16 02:50:06 PM PDT 24 Apr 16 02:50:09 PM PDT 24 2637598796 ps
T721 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.1054307676 Apr 16 02:48:52 PM PDT 24 Apr 16 02:49:00 PM PDT 24 2462170333 ps
T722 /workspace/coverage/default/44.sysrst_ctrl_alert_test.800969440 Apr 16 02:50:05 PM PDT 24 Apr 16 02:50:08 PM PDT 24 2039096766 ps
T723 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.701798860 Apr 16 02:50:01 PM PDT 24 Apr 16 02:50:04 PM PDT 24 2253800524 ps
T311 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3079122082 Apr 16 02:50:24 PM PDT 24 Apr 16 02:51:25 PM PDT 24 90181624578 ps
T724 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3657709348 Apr 16 02:49:06 PM PDT 24 Apr 16 02:49:10 PM PDT 24 2521383801 ps
T725 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1185082250 Apr 16 02:50:24 PM PDT 24 Apr 16 02:54:39 PM PDT 24 218946607638 ps
T726 /workspace/coverage/default/15.sysrst_ctrl_alert_test.884030404 Apr 16 02:49:08 PM PDT 24 Apr 16 02:49:15 PM PDT 24 2013305662 ps
T727 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.4138495142 Apr 16 02:48:51 PM PDT 24 Apr 16 02:49:03 PM PDT 24 28869325462 ps
T728 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.2846863049 Apr 16 02:48:35 PM PDT 24 Apr 16 02:48:39 PM PDT 24 2435949448 ps
T729 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.862191349 Apr 16 02:49:47 PM PDT 24 Apr 16 02:49:51 PM PDT 24 2501678327 ps
T730 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1210694453 Apr 16 02:49:36 PM PDT 24 Apr 16 02:51:16 PM PDT 24 160127179161 ps
T731 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3834279632 Apr 16 02:48:42 PM PDT 24 Apr 16 02:48:50 PM PDT 24 2546222644 ps
T172 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.76665831 Apr 16 02:49:19 PM PDT 24 Apr 16 02:49:28 PM PDT 24 3045941238 ps
T732 /workspace/coverage/default/9.sysrst_ctrl_alert_test.2268822798 Apr 16 02:48:44 PM PDT 24 Apr 16 02:48:48 PM PDT 24 2047090901 ps
T232 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.168536778 Apr 16 02:49:00 PM PDT 24 Apr 16 02:50:18 PM PDT 24 85495168586 ps
T733 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2346233356 Apr 16 02:50:17 PM PDT 24 Apr 16 02:50:27 PM PDT 24 2789292203 ps
T734 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3709434377 Apr 16 02:49:18 PM PDT 24 Apr 16 02:49:26 PM PDT 24 2714081580 ps
T735 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.652129755 Apr 16 02:49:43 PM PDT 24 Apr 16 02:49:54 PM PDT 24 3406700826 ps
T736 /workspace/coverage/default/12.sysrst_ctrl_alert_test.956100823 Apr 16 02:48:50 PM PDT 24 Apr 16 02:48:54 PM PDT 24 2037345400 ps
T274 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2990794244 Apr 16 02:49:47 PM PDT 24 Apr 16 02:51:04 PM PDT 24 29520107131 ps
T737 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.672816287 Apr 16 02:49:21 PM PDT 24 Apr 16 02:49:31 PM PDT 24 45397594020 ps
T738 /workspace/coverage/default/25.sysrst_ctrl_stress_all.1409666456 Apr 16 02:49:22 PM PDT 24 Apr 16 02:59:28 PM PDT 24 426269211027 ps
T739 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1103245718 Apr 16 02:50:10 PM PDT 24 Apr 16 02:50:18 PM PDT 24 5585876785 ps
T740 /workspace/coverage/default/45.sysrst_ctrl_stress_all.529652840 Apr 16 02:50:06 PM PDT 24 Apr 16 02:53:37 PM PDT 24 152278178587 ps
T741 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.23662992 Apr 16 02:49:55 PM PDT 24 Apr 16 02:50:02 PM PDT 24 4301925427 ps
T742 /workspace/coverage/default/26.sysrst_ctrl_alert_test.920205044 Apr 16 02:49:25 PM PDT 24 Apr 16 02:49:32 PM PDT 24 2014542970 ps
T743 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.2921708750 Apr 16 02:49:10 PM PDT 24 Apr 16 02:49:18 PM PDT 24 2164833939 ps
T744 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2326600719 Apr 16 02:49:41 PM PDT 24 Apr 16 02:49:47 PM PDT 24 3786502973 ps
T745 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1302960596 Apr 16 02:48:27 PM PDT 24 Apr 16 02:48:32 PM PDT 24 2517289568 ps
T261 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.1929903697 Apr 16 02:48:44 PM PDT 24 Apr 16 02:49:47 PM PDT 24 22009770834 ps
T319 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1339994728 Apr 16 02:50:22 PM PDT 24 Apr 16 02:52:52 PM PDT 24 78126839618 ps
T746 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2153176097 Apr 16 02:50:07 PM PDT 24 Apr 16 02:50:18 PM PDT 24 3605762420 ps
T747 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.633851224 Apr 16 02:48:54 PM PDT 24 Apr 16 02:48:58 PM PDT 24 3612579436 ps
T748 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.500849346 Apr 16 02:50:06 PM PDT 24 Apr 16 02:50:09 PM PDT 24 5183968097 ps
T749 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.982420492 Apr 16 02:48:47 PM PDT 24 Apr 16 02:48:54 PM PDT 24 3212319233 ps
T750 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.775551592 Apr 16 02:49:13 PM PDT 24 Apr 16 02:49:15 PM PDT 24 2596056546 ps
T751 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.186891985 Apr 16 02:50:17 PM PDT 24 Apr 16 02:50:24 PM PDT 24 27305568847 ps
T752 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2319792984 Apr 16 02:49:33 PM PDT 24 Apr 16 02:49:36 PM PDT 24 2479786251 ps
T753 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3851390974 Apr 16 02:48:49 PM PDT 24 Apr 16 02:49:10 PM PDT 24 33614177706 ps
T754 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.633206362 Apr 16 02:49:39 PM PDT 24 Apr 16 02:52:09 PM PDT 24 111073965045 ps
T755 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1854630251 Apr 16 02:49:55 PM PDT 24 Apr 16 02:50:04 PM PDT 24 2508914285 ps
T756 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.2893851153 Apr 16 02:49:28 PM PDT 24 Apr 16 02:52:37 PM PDT 24 163707234219 ps
T757 /workspace/coverage/default/6.sysrst_ctrl_smoke.697168045 Apr 16 02:48:39 PM PDT 24 Apr 16 02:48:41 PM PDT 24 2134625675 ps
T758 /workspace/coverage/default/44.sysrst_ctrl_smoke.3854443420 Apr 16 02:50:07 PM PDT 24 Apr 16 02:50:14 PM PDT 24 2110959960 ps
T759 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.2213958700 Apr 16 02:48:50 PM PDT 24 Apr 16 02:50:42 PM PDT 24 166261090778 ps
T276 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.4138124261 Apr 16 02:49:45 PM PDT 24 Apr 16 02:51:31 PM PDT 24 37646314546 ps
T760 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2486620329 Apr 16 02:50:22 PM PDT 24 Apr 16 02:50:34 PM PDT 24 29117363702 ps
T761 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3923272869 Apr 16 02:49:19 PM PDT 24 Apr 16 02:51:18 PM PDT 24 41515706233 ps
T762 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.3480378187 Apr 16 02:49:44 PM PDT 24 Apr 16 02:49:49 PM PDT 24 2413377824 ps
T763 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1884450176 Apr 16 02:50:08 PM PDT 24 Apr 16 02:50:12 PM PDT 24 2504666198 ps
T308 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.3957984825 Apr 16 02:48:45 PM PDT 24 Apr 16 02:50:50 PM PDT 24 110953627644 ps
T764 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3848054764 Apr 16 02:49:50 PM PDT 24 Apr 16 02:49:57 PM PDT 24 2118168671 ps
T765 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2710988272 Apr 16 02:50:01 PM PDT 24 Apr 16 02:50:06 PM PDT 24 2613781747 ps
T766 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2747974816 Apr 16 02:50:15 PM PDT 24 Apr 16 02:51:44 PM PDT 24 98780903785 ps
T767 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.3697915721 Apr 16 02:49:34 PM PDT 24 Apr 16 02:49:38 PM PDT 24 4315144523 ps
T768 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.2058957761 Apr 16 02:50:15 PM PDT 24 Apr 16 02:53:59 PM PDT 24 93216584221 ps
T769 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.3952014090 Apr 16 02:49:24 PM PDT 24 Apr 16 02:50:59 PM PDT 24 164575601245 ps
T770 /workspace/coverage/default/29.sysrst_ctrl_alert_test.1240352858 Apr 16 02:49:29 PM PDT 24 Apr 16 02:49:34 PM PDT 24 2022062499 ps
T771 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1990211603 Apr 16 02:49:24 PM PDT 24 Apr 16 02:49:28 PM PDT 24 2488381950 ps
T772 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.3708717351 Apr 16 02:49:08 PM PDT 24 Apr 16 02:49:11 PM PDT 24 2636223241 ps
T773 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3596170489 Apr 16 02:49:34 PM PDT 24 Apr 16 02:49:41 PM PDT 24 2207725533 ps
T774 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.722194665 Apr 16 02:49:13 PM PDT 24 Apr 16 02:49:17 PM PDT 24 3015070435 ps
T116 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3981365332 Apr 16 02:49:31 PM PDT 24 Apr 16 02:50:49 PM PDT 24 217488042939 ps
T775 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.1208926427 Apr 16 02:49:32 PM PDT 24 Apr 16 02:50:22 PM PDT 24 74158255216 ps
T776 /workspace/coverage/default/7.sysrst_ctrl_stress_all.1824959887 Apr 16 02:48:43 PM PDT 24 Apr 16 02:53:06 PM PDT 24 191907158215 ps
T777 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.504212419 Apr 16 02:48:36 PM PDT 24 Apr 16 02:48:48 PM PDT 24 3673777766 ps
T778 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.2448350625 Apr 16 02:49:36 PM PDT 24 Apr 16 02:49:43 PM PDT 24 2515380133 ps
T779 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3324041912 Apr 16 02:50:09 PM PDT 24 Apr 16 02:50:18 PM PDT 24 3854601221 ps
T780 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1621746164 Apr 16 02:49:50 PM PDT 24 Apr 16 02:49:55 PM PDT 24 2478559023 ps
T781 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.511428811 Apr 16 02:49:36 PM PDT 24 Apr 16 02:50:37 PM PDT 24 96396085998 ps
T782 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.854319977 Apr 16 02:50:08 PM PDT 24 Apr 16 02:50:40 PM PDT 24 26518312498 ps
T783 /workspace/coverage/default/33.sysrst_ctrl_stress_all.2943607292 Apr 16 02:49:41 PM PDT 24 Apr 16 02:50:23 PM PDT 24 17257873272 ps
T784 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1477428864 Apr 16 02:49:36 PM PDT 24 Apr 16 02:49:41 PM PDT 24 4573732090 ps
T785 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3580340885 Apr 16 02:48:46 PM PDT 24 Apr 16 02:48:52 PM PDT 24 2635809728 ps
T786 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2973681407 Apr 16 02:49:59 PM PDT 24 Apr 16 02:50:02 PM PDT 24 2455857228 ps
T787 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3773556894 Apr 16 02:50:06 PM PDT 24 Apr 16 02:50:11 PM PDT 24 2162369648 ps
T788 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2531565566 Apr 16 02:48:44 PM PDT 24 Apr 16 02:48:48 PM PDT 24 8825150614 ps
T789 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1742595193 Apr 16 02:49:55 PM PDT 24 Apr 16 02:50:06 PM PDT 24 3908417139 ps
T790 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2357532035 Apr 16 02:50:29 PM PDT 24 Apr 16 02:50:42 PM PDT 24 24606601468 ps
T314 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1893948602 Apr 16 02:49:41 PM PDT 24 Apr 16 02:50:31 PM PDT 24 77590430436 ps
T791 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.493639660 Apr 16 02:49:24 PM PDT 24 Apr 16 02:49:35 PM PDT 24 6267450622 ps
T792 /workspace/coverage/cover_reg_top/41.sysrst_ctrl_intr_test.2118314961 Apr 16 02:02:49 PM PDT 24 Apr 16 02:02:52 PM PDT 24 2026200026 ps
T793 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3363394738 Apr 16 02:02:21 PM PDT 24 Apr 16 02:02:23 PM PDT 24 2059902034 ps
T26 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2564914105 Apr 16 02:02:33 PM PDT 24 Apr 16 02:02:41 PM PDT 24 2054242012 ps
T27 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1536442725 Apr 16 02:02:15 PM PDT 24 Apr 16 02:02:21 PM PDT 24 2046743849 ps
T19 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_same_csr_outstanding.921200524 Apr 16 02:02:29 PM PDT 24 Apr 16 02:02:39 PM PDT 24 9658906582 ps
T20 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.527977941 Apr 16 02:02:25 PM PDT 24 Apr 16 02:02:33 PM PDT 24 8416988263 ps
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