Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.71	99.37	96.41	100.00	96.79	98.85	99.52	93.02

Total tests in report: 909

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
70.08	70.08	86.32	86.32	76.57	76.57	87.21	87.21	47.44	47.44	87.69	87.69	81.02	81.02	24.29	24.29	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.674010464
77.83	7.76	93.23	6.90	85.67	9.10	89.04	1.83	58.97	11.54	93.27	5.58	90.08	9.06	34.58	10.28	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1650304266
82.37	4.54	94.89	1.66	87.56	1.90	89.04	0.00	70.51	11.54	94.68	1.40	94.12	4.05	45.80	11.23	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3981844492
85.89	3.52	96.62	1.74	90.04	2.48	90.18	1.14	73.08	2.56	96.27	1.59	96.34	2.22	58.71	12.91	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2300885383
88.91	3.02	98.04	1.42	91.91	1.87	90.18	0.00	89.10	16.03	97.63	1.37	96.72	0.39	58.76	0.05	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3960916035
90.08	1.17	98.06	0.02	92.97	1.06	90.87	0.68	89.10	0.00	97.67	0.04	96.72	0.00	65.16	6.40	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1151015501
91.19	1.11	98.06	0.00	92.97	0.00	90.87	0.00	89.10	0.00	97.67	0.00	96.72	0.00	72.93	7.76	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2135984600
92.29	1.10	98.06	0.00	93.40	0.43	97.95	7.08	89.10	0.00	97.67	0.00	96.82	0.10	73.03	0.10	/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1306124569
92.97	0.68	98.12	0.06	93.45	0.05	97.95	0.00	89.74	0.64	97.74	0.07	96.92	0.10	76.86	3.83	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.4111999007
93.54	0.57	98.34	0.22	93.66	0.20	97.95	0.00	91.67	1.92	97.93	0.18	97.21	0.29	78.02	1.15	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2439921184
93.95	0.42	98.40	0.06	93.68	0.03	97.95	0.00	91.67	0.00	97.93	0.00	97.21	0.00	80.85	2.83	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.812099185
94.24	0.28	98.40	0.00	93.71	0.03	99.54	1.60	91.67	0.00	97.93	0.00	97.30	0.10	81.11	0.26	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3982517073
94.50	0.27	98.49	0.09	93.81	0.10	99.54	0.00	92.95	1.28	98.04	0.11	97.59	0.29	81.11	0.00	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.1744867054
94.76	0.26	98.69	0.21	94.14	0.33	99.54	0.00	92.95	0.00	98.04	0.00	97.59	0.00	82.37	1.26	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1438752041
95.02	0.25	98.75	0.06	94.26	0.13	99.54	0.00	93.59	0.64	98.11	0.07	97.69	0.10	83.16	0.79	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3132235194
95.27	0.25	98.82	0.07	94.34	0.08	99.54	0.00	94.87	1.28	98.19	0.07	97.88	0.19	83.21	0.05	/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3981365332
95.51	0.24	98.82	0.00	94.34	0.00	99.54	0.00	94.87	0.00	98.19	0.00	97.88	0.00	84.89	1.68	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.4009866458
95.71	0.20	98.88	0.06	94.64	0.30	99.54	0.00	94.87	0.00	98.26	0.07	98.65	0.77	85.10	0.21	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.1175524414
95.90	0.19	98.92	0.04	94.64	0.00	99.54	0.00	94.87	0.00	98.34	0.07	98.65	0.00	86.31	1.21	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3504465849
96.05	0.16	98.94	0.02	94.67	0.03	99.54	0.00	94.87	0.00	98.34	0.00	98.65	0.00	87.36	1.05	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3766024312
96.20	0.15	98.99	0.06	94.69	0.03	99.54	0.00	95.51	0.64	98.37	0.04	98.75	0.10	87.57	0.21	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3870722368
96.35	0.14	99.05	0.06	94.77	0.08	99.54	0.00	96.15	0.64	98.45	0.07	98.84	0.10	87.62	0.05	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3215292137
96.47	0.13	99.09	0.04	94.79	0.03	99.54	0.00	96.79	0.64	98.48	0.04	98.94	0.10	87.67	0.05	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3093837188
96.60	0.12	99.10	0.02	94.82	0.03	99.54	0.00	96.79	0.00	98.48	0.00	99.23	0.29	88.20	0.52	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1430110672
96.71	0.11	99.10	0.00	95.55	0.73	99.54	0.00	96.79	0.00	98.48	0.00	99.23	0.00	88.25	0.05	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.674294248
96.82	0.11	99.10	0.00	95.60	0.05	99.54	0.00	96.79	0.00	98.48	0.00	99.42	0.19	88.77	0.52	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.748792084
96.91	0.09	99.12	0.02	95.93	0.33	99.77	0.23	96.79	0.00	98.52	0.04	99.42	0.00	88.77	0.00	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3816661139
96.98	0.08	99.14	0.02	95.93	0.00	99.77	0.00	96.79	0.00	98.52	0.00	99.42	0.00	89.30	0.52	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3561262600
97.05	0.07	99.14	0.00	95.96	0.03	99.77	0.00	96.79	0.00	98.52	0.00	99.52	0.10	89.66	0.37	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.758545880
97.11	0.05	99.18	0.04	96.11	0.15	99.77	0.00	96.79	0.00	98.60	0.07	99.52	0.00	89.77	0.10	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3958572805
97.16	0.05	99.18	0.00	96.11	0.00	99.77	0.00	96.79	0.00	98.60	0.00	99.52	0.00	90.14	0.37	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.448596960
97.21	0.05	99.23	0.06	96.18	0.08	100.00	0.23	96.79	0.00	98.60	0.00	99.52	0.00	90.14	0.00	/workspace/coverage/default/1.sysrst_ctrl_alert_test.3526351344
97.26	0.05	99.25	0.02	96.21	0.03	100.00	0.00	96.79	0.00	98.63	0.04	99.52	0.00	90.40	0.26	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.429975056
97.30	0.04	99.25	0.00	96.21	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	90.71	0.31	/workspace/coverage/default/7.sysrst_ctrl_stress_all.1824959887
97.34	0.03	99.25	0.00	96.23	0.03	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	90.92	0.21	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.4224847803
97.37	0.03	99.25	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.63	0.00	99.52	0.00	91.13	0.21	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1154688232
97.39	0.02	99.31	0.06	96.23	0.00	100.00	0.00	96.79	0.00	98.74	0.11	99.52	0.00	91.13	0.00	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3924660304
97.41	0.02	99.31	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	91.29	0.16	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.1460687874
97.44	0.02	99.31	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	91.45	0.16	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3460247924
97.46	0.02	99.31	0.00	96.23	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	91.61	0.16	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3079122082
97.48	0.02	99.31	0.00	96.26	0.03	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	91.71	0.10	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.2538919539
97.49	0.02	99.35	0.04	96.26	0.00	100.00	0.00	96.79	0.00	98.82	0.07	99.52	0.00	91.71	0.00	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.1917225743
97.51	0.01	99.35	0.00	96.26	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	91.82	0.10	/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1717422917
97.52	0.01	99.35	0.00	96.26	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	91.92	0.10	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.3722223400
97.54	0.01	99.35	0.00	96.26	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	92.03	0.10	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1328191084
97.55	0.01	99.35	0.00	96.26	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	92.13	0.10	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3113000015
97.57	0.01	99.35	0.00	96.26	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	92.24	0.10	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2089953723
97.58	0.01	99.35	0.00	96.33	0.08	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	92.24	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1635112885
97.59	0.01	99.37	0.02	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.04	99.52	0.00	92.24	0.00	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1031732287
97.59	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.29	0.05	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.967404225
97.60	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.34	0.05	/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3907001683
97.61	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.39	0.05	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3388328241
97.62	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.44	0.05	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2573899528
97.62	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.50	0.05	/workspace/coverage/default/15.sysrst_ctrl_stress_all.4153241353
97.63	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.55	0.05	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.3791330730
97.64	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.60	0.05	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2968892159
97.65	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.65	0.05	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2495495220
97.65	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.71	0.05	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2888870614
97.66	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.76	0.05	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1893948602
97.67	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.81	0.05	/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3103652778
97.68	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.86	0.05	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3483622403
97.68	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.92	0.05	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1800100439
97.69	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	92.97	0.05	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2720418436
97.70	0.01	99.37	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	93.02	0.05	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4112546131
97.71	0.01	99.37	0.00	96.39	0.05	100.00	0.00	96.79	0.00	98.85	0.00	99.52	0.00	93.02	0.00	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1160839238

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.742754
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1305602598
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2098577557
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1243940407
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.445966575
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2352438517
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2623432702
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1322403154
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.555783784
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.838542566
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3785876356
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2744009539
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.421914405
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.836580897
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.387803538
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2621789579
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2116255488
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1536442725
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3363394738
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2031483329
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.4207490607
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.2498088753
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1945515476
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3985750445
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.313614220
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.3139977258
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1255301072
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2564914105
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.376161946
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1405307419
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.723247356
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.267248713
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.901950145
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1770577570
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1543114502
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2720898294
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1560560389
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.1891431192
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2189720333
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3949422232
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1641895063
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.191570393
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3445003692
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2874723158
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1547752750
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3748094715
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3923639841
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3868084410
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2114885456
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1837387340
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.413634275
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.4098290252
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.869712971
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.733675951
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.481484129
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/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2692303617
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3618501490
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1220449910
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.4048804925
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1929903697
/workspace/coverage/default/4.sysrst_ctrl_smoke.2713695238
/workspace/coverage/default/4.sysrst_ctrl_stress_all.4117141797
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.734945799
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.133817037
/workspace/coverage/default/40.sysrst_ctrl_alert_test.2198222503
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1742595193
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2678250418
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.4074255939
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2966043532
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3433962075
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2807514640
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1365051415
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1964460470
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.125429589
/workspace/coverage/default/40.sysrst_ctrl_smoke.2058707414
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2656106661
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1943173703
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3904083640
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1748383576
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3397132489
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3758291100
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.23662992
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.413181091
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3586006108
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2293552949
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.3695251275
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2775026051
/workspace/coverage/default/41.sysrst_ctrl_smoke.2299746812
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2993708186
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.4086217220
/workspace/coverage/default/42.sysrst_ctrl_alert_test.204857458
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.4186660134
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2858785584
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.4145000746
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3062696632
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.741078066
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1737985393
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.701798860
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.909659429
/workspace/coverage/default/42.sysrst_ctrl_smoke.4081489585
/workspace/coverage/default/42.sysrst_ctrl_stress_all.2202482562
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2916530264
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3825594359
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3154826754
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1722077963
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1511390131
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2973681407
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1550964325
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2710988272
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3348467599
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2998880990
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1091137208
/workspace/coverage/default/43.sysrst_ctrl_smoke.2013553514
/workspace/coverage/default/43.sysrst_ctrl_stress_all.317638456
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3046746359
/workspace/coverage/default/44.sysrst_ctrl_alert_test.800969440
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3465782496
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.854319977
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3005705796
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3122675972
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.651840583
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2949083961
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1729360872
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2299292680
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1795088033
/workspace/coverage/default/44.sysrst_ctrl_smoke.3854443420
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2929641011
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.910023404
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1103245718
/workspace/coverage/default/45.sysrst_ctrl_alert_test.108140803
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2153176097
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3139617349
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2983330056
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.500849346
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4091549084
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1884450176
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3773556894
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4057509090
/workspace/coverage/default/45.sysrst_ctrl_smoke.1164167194
/workspace/coverage/default/45.sysrst_ctrl_stress_all.529652840
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2035939942
/workspace/coverage/default/46.sysrst_ctrl_alert_test.990011708
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2952394499
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1086093794
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.887301080
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.824802140
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2467901516
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3968526190
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3993870034
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3253631794
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1372418082
/workspace/coverage/default/46.sysrst_ctrl_smoke.2538859550
/workspace/coverage/default/46.sysrst_ctrl_stress_all.4088092892
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1605249816
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1626183677
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3324041912
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2418149625
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1657751690
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.4043590402
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1815783263
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3427603098
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1947245407
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.224192182
/workspace/coverage/default/47.sysrst_ctrl_smoke.1470842397
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2696638739
/workspace/coverage/default/48.sysrst_ctrl_alert_test.335598642
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1085087887
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2027786759
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2346233356
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3335298811
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3891018831
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3800004389
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1362091090
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3205079855
/workspace/coverage/default/48.sysrst_ctrl_smoke.1637833463
/workspace/coverage/default/48.sysrst_ctrl_stress_all.844105132
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3303544819
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1179082144
/workspace/coverage/default/49.sysrst_ctrl_alert_test.534524570
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2744232676
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2058957761
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1160472086
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.429417985
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2912026628
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1900560327
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2677782038
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3253320984
/workspace/coverage/default/49.sysrst_ctrl_smoke.2401641951
/workspace/coverage/default/49.sysrst_ctrl_stress_all.794806788
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.350195879
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3195654507
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4178840841
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1029444497
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2952915267
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.627901491
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3912978716
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.952937112
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1132541095
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3614719533
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1841603436
/workspace/coverage/default/5.sysrst_ctrl_smoke.3756976706
/workspace/coverage/default/5.sysrst_ctrl_stress_all.236732213
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.959289525
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2352380666
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3702165286
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2747974816
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3712681166
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1589614860
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1138189257
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1999702931
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2742650941
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3978629205
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.4051322826
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3580340885
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2707549015
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.570983307
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1102985872
/workspace/coverage/default/6.sysrst_ctrl_smoke.697168045
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1434056930
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.4225118540
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1210654887
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.903605156
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.211769079
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3809653016
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.942554016
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.186891985
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.712406547
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2913503093
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.936594270
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2973392297
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.901137179
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.757924083
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2965916976
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3810408468
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.682671764
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1812965618
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1241674827
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3004939092
/workspace/coverage/default/7.sysrst_ctrl_smoke.1697014556
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.4122562232
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.962216225
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4021385501
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1339994728
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3034952033
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3371941614
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1185082250
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3781150524
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1454123251
/workspace/coverage/default/8.sysrst_ctrl_alert_test.75071010
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.982420492
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2050108773
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2186321666
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1279054396
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1877103276
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1629179153
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2037968098
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1984398872
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1540070290
/workspace/coverage/default/8.sysrst_ctrl_smoke.234856065
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1654329812
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1246093452
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.227509221
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2486620329
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.435065829
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2533835858
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2541618653
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2879057009
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.176363790
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3257607551
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2268822798
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2841429364
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1503223155
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.4138495142
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2803384720
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2467203090
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3761855893
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.916158041
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3048094473
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2165602277
/workspace/coverage/default/9.sysrst_ctrl_smoke.430076174
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3757992399
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3448107213
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2531565566
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3148134597
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1945586878
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.79608907
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3409445904
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3884488393
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2357532035
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.14494273
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3508626135

Total test records in report: 909

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.772719826	Apr 16 02:49:05 PM PDT 24	Apr 16 02:50:25 PM PDT 24	1012502958413 ps
T5	/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.890705398	Apr 16 02:49:22 PM PDT 24	Apr 16 02:49:30 PM PDT 24	3987832330 ps
T1	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.674010464	Apr 16 02:50:06 PM PDT 24	Apr 16 02:50:37 PM PDT 24	107205657085 ps
T2	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1430110672	Apr 16 02:50:15 PM PDT 24	Apr 16 02:51:01 PM PDT 24	69512973670 ps
T3	/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3139617349	Apr 16 02:50:05 PM PDT 24	Apr 16 02:50:30 PM PDT 24	84640814024 ps
T13	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1729360872	Apr 16 02:50:06 PM PDT 24	Apr 16 02:50:11 PM PDT 24	2482771808 ps
T14	/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.1176118884	Apr 16 02:49:22 PM PDT 24	Apr 16 02:49:25 PM PDT 24	2634784995 ps
T15	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1059223302	Apr 16 02:49:01 PM PDT 24	Apr 16 02:49:10 PM PDT 24	2464685251 ps
T16	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2280058182	Apr 16 02:49:47 PM PDT 24	Apr 16 02:49:55 PM PDT 24	39420333348 ps
T17	/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.125429589	Apr 16 02:49:55 PM PDT 24	Apr 16 02:49:59 PM PDT 24	2522324439 ps
T18	/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3205079855	Apr 16 02:50:08 PM PDT 24	Apr 16 02:50:15 PM PDT 24	2516928000 ps
T6	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1650304266	Apr 16 02:49:10 PM PDT 24	Apr 16 02:50:01 PM PDT 24	76499164725 ps
T50	/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.824802140	Apr 16 02:50:07 PM PDT 24	Apr 16 02:50:12 PM PDT 24	3913138157 ps
T7	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3409445904	Apr 16 02:50:20 PM PDT 24	Apr 16 02:51:03 PM PDT 24	34407956594 ps
T8	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.4055575673	Apr 16 02:48:42 PM PDT 24	Apr 16 02:48:55 PM PDT 24	4659203925 ps
T39	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3148134597	Apr 16 02:50:21 PM PDT 24	Apr 16 02:50:35 PM PDT 24	30368354123 ps
T107	/workspace/coverage/default/8.sysrst_ctrl_smoke.234856065	Apr 16 02:48:44 PM PDT 24	Apr 16 02:48:51 PM PDT 24	2118742983 ps
T40	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.474765751	Apr 16 02:49:26 PM PDT 24	Apr 16 02:49:53 PM PDT 24	18809295139 ps
T108	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.637078094	Apr 16 02:49:22 PM PDT 24	Apr 16 02:49:27 PM PDT 24	2244616983 ps
T24	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3870722368	Apr 16 02:48:51 PM PDT 24	Apr 16 02:49:41 PM PDT 24	103508408883 ps
T51	/workspace/coverage/default/17.sysrst_ctrl_smoke.1817431065	Apr 16 02:48:58 PM PDT 24	Apr 16 02:49:01 PM PDT 24	2129489709 ps
T52	/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.164461487	Apr 16 02:48:48 PM PDT 24	Apr 16 02:48:52 PM PDT 24	2053089159 ps
T53	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3982517073	Apr 16 02:48:32 PM PDT 24	Apr 16 02:48:45 PM PDT 24	22077566732 ps
T54	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.2538919539	Apr 16 02:48:47 PM PDT 24	Apr 16 02:48:57 PM PDT 24	2510689580 ps
T9	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.4074989481	Apr 16 02:49:48 PM PDT 24	Apr 16 02:49:52 PM PDT 24	4375707063 ps
T10	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3007849623	Apr 16 02:49:23 PM PDT 24	Apr 16 02:49:47 PM PDT 24	24370418403 ps
T55	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.682671764	Apr 16 02:48:43 PM PDT 24	Apr 16 02:48:48 PM PDT 24	2629443770 ps
T11	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3215292137	Apr 16 02:50:16 PM PDT 24	Apr 16 02:50:19 PM PDT 24	4239446247 ps
T56	/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.454424536	Apr 16 02:49:08 PM PDT 24	Apr 16 02:49:12 PM PDT 24	2627335825 ps
T57	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1309304977	Apr 16 02:48:36 PM PDT 24	Apr 16 02:48:43 PM PDT 24	3974424074 ps
T149	/workspace/coverage/default/20.sysrst_ctrl_alert_test.2449518861	Apr 16 02:49:09 PM PDT 24	Apr 16 02:49:15 PM PDT 24	2014110592 ps
T66	/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.4220066703	Apr 16 02:49:27 PM PDT 24	Apr 16 02:49:33 PM PDT 24	2616621097 ps
T12	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1438752041	Apr 16 02:50:24 PM PDT 24	Apr 16 02:51:11 PM PDT 24	67907408710 ps
T36	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3335298811	Apr 16 02:50:16 PM PDT 24	Apr 16 02:50:20 PM PDT 24	5761278243 ps
T41	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.812099185	Apr 16 02:48:27 PM PDT 24	Apr 16 02:50:11 PM PDT 24	38669146396 ps
T58	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.959289525	Apr 16 02:48:47 PM PDT 24	Apr 16 02:48:52 PM PDT 24	4974676959 ps
T67	/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1540070290	Apr 16 02:48:48 PM PDT 24	Apr 16 02:48:53 PM PDT 24	2524798138 ps
T259	/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3207383636	Apr 16 02:49:32 PM PDT 24	Apr 16 02:49:41 PM PDT 24	2613809186 ps
T63	/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2594930275	Apr 16 02:49:27 PM PDT 24	Apr 16 02:49:33 PM PDT 24	2456819113 ps
T270	/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1372418082	Apr 16 02:50:12 PM PDT 24	Apr 16 02:50:18 PM PDT 24	2514806649 ps
T342	/workspace/coverage/default/23.sysrst_ctrl_smoke.452680907	Apr 16 02:49:22 PM PDT 24	Apr 16 02:49:28 PM PDT 24	2109393280 ps
T42	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.4024058238	Apr 16 02:48:28 PM PDT 24	Apr 16 02:49:05 PM PDT 24	29091683912 ps
T59	/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1306124569	Apr 16 02:49:08 PM PDT 24	Apr 16 02:50:29 PM PDT 24	252689241731 ps
T68	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1022234101	Apr 16 02:48:27 PM PDT 24	Apr 16 02:48:30 PM PDT 24	2270094221 ps
T60	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.350195879	Apr 16 02:50:14 PM PDT 24	Apr 16 02:50:21 PM PDT 24	4033724959 ps
T249	/workspace/coverage/default/33.sysrst_ctrl_alert_test.3115842788	Apr 16 02:49:36 PM PDT 24	Apr 16 02:49:43 PM PDT 24	2013822664 ps
T28	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3702165286	Apr 16 02:50:13 PM PDT 24	Apr 16 02:50:55 PM PDT 24	63888574376 ps
T340	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1241674827	Apr 16 02:48:45 PM PDT 24	Apr 16 02:48:53 PM PDT 24	2120134670 ps
T23	/workspace/coverage/default/30.sysrst_ctrl_stress_all.1223232235	Apr 16 02:49:31 PM PDT 24	Apr 16 02:49:58 PM PDT 24	11959266620 ps
T117	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.759442502	Apr 16 02:49:51 PM PDT 24	Apr 16 02:49:59 PM PDT 24	5295804005 ps
T118	/workspace/coverage/default/47.sysrst_ctrl_alert_test.1626183677	Apr 16 02:50:12 PM PDT 24	Apr 16 02:50:15 PM PDT 24	2049190301 ps
T119	/workspace/coverage/default/13.sysrst_ctrl_smoke.4176787816	Apr 16 02:49:11 PM PDT 24	Apr 16 02:49:14 PM PDT 24	2125835232 ps
T38	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.79608907	Apr 16 02:50:20 PM PDT 24	Apr 16 02:50:49 PM PDT 24	40180330825 ps
T86	/workspace/coverage/default/4.sysrst_ctrl_stress_all.4117141797	Apr 16 02:48:45 PM PDT 24	Apr 16 02:49:17 PM PDT 24	11754569408 ps
T120	/workspace/coverage/default/20.sysrst_ctrl_smoke.3322709847	Apr 16 02:49:08 PM PDT 24	Apr 16 02:49:11 PM PDT 24	2135039208 ps
T121	/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1629179153	Apr 16 02:48:45 PM PDT 24	Apr 16 02:48:49 PM PDT 24	2634177362 ps
T29	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.4018078855	Apr 16 02:48:51 PM PDT 24	Apr 16 02:49:27 PM PDT 24	53734964947 ps
T61	/workspace/coverage/default/21.sysrst_ctrl_stress_all.1179325043	Apr 16 02:49:12 PM PDT 24	Apr 16 02:49:42 PM PDT 24	14747095652 ps
T25	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3132235194	Apr 16 02:48:47 PM PDT 24	Apr 16 02:51:07 PM PDT 24	52461009666 ps
T64	/workspace/coverage/default/44.sysrst_ctrl_stress_all.2929641011	Apr 16 02:50:05 PM PDT 24	Apr 16 02:56:57 PM PDT 24	167664188195 ps
T30	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.917851293	Apr 16 02:49:07 PM PDT 24	Apr 16 02:49:27 PM PDT 24	31466160904 ps
T183	/workspace/coverage/default/43.sysrst_ctrl_smoke.2013553514	Apr 16 02:50:03 PM PDT 24	Apr 16 02:50:10 PM PDT 24	2108260634 ps
T184	/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.285093311	Apr 16 02:49:26 PM PDT 24	Apr 16 02:49:35 PM PDT 24	2510421173 ps
T62	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1605249816	Apr 16 02:50:09 PM PDT 24	Apr 16 02:50:17 PM PDT 24	8172426971 ps
T185	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1154688232	Apr 16 02:49:06 PM PDT 24	Apr 16 02:49:52 PM PDT 24	33979253476 ps
T186	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.3822141138	Apr 16 02:49:12 PM PDT 24	Apr 16 02:49:16 PM PDT 24	2517822671 ps
T187	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3702550315	Apr 16 02:49:48 PM PDT 24	Apr 16 02:49:57 PM PDT 24	2679167336 ps
T71	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3816661139	Apr 16 02:49:26 PM PDT 24	Apr 16 02:49:33 PM PDT 24	11320826576 ps
T226	/workspace/coverage/default/1.sysrst_ctrl_smoke.2710302491	Apr 16 02:48:29 PM PDT 24	Apr 16 02:48:32 PM PDT 24	2129868373 ps
T227	/workspace/coverage/default/0.sysrst_ctrl_smoke.3626541305	Apr 16 02:48:29 PM PDT 24	Apr 16 02:48:34 PM PDT 24	2115623195 ps
T343	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3646312125	Apr 16 02:49:50 PM PDT 24	Apr 16 02:49:55 PM PDT 24	3607255384 ps
T43	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3115361004	Apr 16 02:49:19 PM PDT 24	Apr 16 02:49:23 PM PDT 24	3305472978 ps
T44	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1208556555	Apr 16 02:49:40 PM PDT 24	Apr 16 02:49:50 PM PDT 24	3875440007 ps
T344	/workspace/coverage/default/40.sysrst_ctrl_smoke.2058707414	Apr 16 02:49:52 PM PDT 24	Apr 16 02:49:59 PM PDT 24	2107374888 ps
T45	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2300885383	Apr 16 02:49:19 PM PDT 24	Apr 16 02:49:53 PM PDT 24	43754902561 ps
T76	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.758545880	Apr 16 02:48:55 PM PDT 24	Apr 16 02:50:19 PM PDT 24	62394213427 ps
T65	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.916158041	Apr 16 02:48:47 PM PDT 24	Apr 16 02:48:57 PM PDT 24	2453226807 ps
T101	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.4048804925	Apr 16 02:48:36 PM PDT 24	Apr 16 02:48:40 PM PDT 24	2518980996 ps
T69	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2106198698	Apr 16 02:49:02 PM PDT 24	Apr 16 02:49:45 PM PDT 24	69108065678 ps
T102	/workspace/coverage/default/48.sysrst_ctrl_stress_all.844105132	Apr 16 02:50:15 PM PDT 24	Apr 16 02:50:35 PM PDT 24	6921860033 ps
T103	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3891018831	Apr 16 02:50:12 PM PDT 24	Apr 16 02:50:20 PM PDT 24	2613299241 ps
T104	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1822538064	Apr 16 02:49:12 PM PDT 24	Apr 16 02:49:18 PM PDT 24	2515274219 ps
T72	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2555587743	Apr 16 02:49:15 PM PDT 24	Apr 16 02:49:24 PM PDT 24	5534695773 ps
T105	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2299292680	Apr 16 02:50:07 PM PDT 24	Apr 16 02:50:09 PM PDT 24	2177718324 ps
T106	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3799213758	Apr 16 02:49:21 PM PDT 24	Apr 16 02:49:24 PM PDT 24	2485310227 ps
T123	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3927839184	Apr 16 02:48:59 PM PDT 24	Apr 16 02:49:02 PM PDT 24	4347439914 ps
T73	/workspace/coverage/default/42.sysrst_ctrl_stress_all.2202482562	Apr 16 02:50:03 PM PDT 24	Apr 16 02:51:00 PM PDT 24	1449148631314 ps
T124	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3151259752	Apr 16 02:49:12 PM PDT 24	Apr 16 02:49:17 PM PDT 24	2194610542 ps
T125	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4091549084	Apr 16 02:50:13 PM PDT 24	Apr 16 02:50:22 PM PDT 24	2609600989 ps
T70	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.60549499	Apr 16 02:48:42 PM PDT 24	Apr 16 02:50:01 PM PDT 24	27831464721 ps
T46	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2289001946	Apr 16 02:49:39 PM PDT 24	Apr 16 02:50:03 PM PDT 24	102708044030 ps
T126	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.192361062	Apr 16 02:48:49 PM PDT 24	Apr 16 02:48:57 PM PDT 24	4412688012 ps
T345	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3310162257	Apr 16 02:49:50 PM PDT 24	Apr 16 02:49:55 PM PDT 24	2514920790 ps
T346	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3004939092	Apr 16 02:48:44 PM PDT 24	Apr 16 02:48:53 PM PDT 24	2507942228 ps
T37	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.2466428154	Apr 16 02:48:53 PM PDT 24	Apr 16 02:48:57 PM PDT 24	4142566286 ps
T347	/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.2684020643	Apr 16 02:49:18 PM PDT 24	Apr 16 02:49:23 PM PDT 24	2471022749 ps
T348	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1527649316	Apr 16 02:49:12 PM PDT 24	Apr 16 02:49:15 PM PDT 24	2183726884 ps
T215	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2573899528	Apr 16 02:48:58 PM PDT 24	Apr 16 02:49:19 PM PDT 24	116343310756 ps
T74	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3046746359	Apr 16 02:50:05 PM PDT 24	Apr 16 02:51:16 PM PDT 24	953601237340 ps
T47	/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.4199183157	Apr 16 02:49:10 PM PDT 24	Apr 16 02:49:16 PM PDT 24	3197017416 ps
T31	/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.2777339752	Apr 16 02:49:13 PM PDT 24	Apr 16 02:50:01 PM PDT 24	174289544768 ps
T228	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.3791330730	Apr 16 02:49:03 PM PDT 24	Apr 16 02:50:51 PM PDT 24	83857547874 ps
T48	/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.579160849	Apr 16 02:49:29 PM PDT 24	Apr 16 02:49:33 PM PDT 24	3160460520 ps
T216	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2913503093	Apr 16 02:50:18 PM PDT 24	Apr 16 02:57:31 PM PDT 24	162450706014 ps
T349	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2983330056	Apr 16 02:50:07 PM PDT 24	Apr 16 02:50:15 PM PDT 24	4732261342 ps
T49	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.734945799	Apr 16 02:48:38 PM PDT 24	Apr 16 02:48:53 PM PDT 24	24895239741 ps
T272	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2875199564	Apr 16 02:49:08 PM PDT 24	Apr 16 02:49:12 PM PDT 24	9942775543 ps
T35	/workspace/coverage/default/46.sysrst_ctrl_stress_all.4088092892	Apr 16 02:50:09 PM PDT 24	Apr 16 02:50:21 PM PDT 24	15164296758 ps
T174	/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3465782496	Apr 16 02:50:08 PM PDT 24	Apr 16 02:50:14 PM PDT 24	3877358270 ps
T32	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.591844526	Apr 16 02:49:25 PM PDT 24	Apr 16 02:49:29 PM PDT 24	3051361532 ps
T33	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.910023404	Apr 16 02:50:13 PM PDT 24	Apr 16 02:51:50 PM PDT 24	37583623947 ps
T175	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2912026628	Apr 16 02:50:13 PM PDT 24	Apr 16 02:50:21 PM PDT 24	2612489007 ps
T176	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.255295963	Apr 16 02:48:56 PM PDT 24	Apr 16 02:49:02 PM PDT 24	3516625512 ps
T177	/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3978629205	Apr 16 02:48:44 PM PDT 24	Apr 16 02:48:48 PM PDT 24	2819806355 ps
T178	/workspace/coverage/default/29.sysrst_ctrl_stress_all.3280587566	Apr 16 02:49:29 PM PDT 24	Apr 16 02:49:41 PM PDT 24	14564222322 ps
T87	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.1532821338	Apr 16 02:49:41 PM PDT 24	Apr 16 02:51:20 PM PDT 24	139716220689 ps
T179	/workspace/coverage/default/1.sysrst_ctrl_stress_all.1265125857	Apr 16 02:48:36 PM PDT 24	Apr 16 02:48:51 PM PDT 24	13034687220 ps
T350	/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2301999188	Apr 16 02:49:19 PM PDT 24	Apr 16 02:49:23 PM PDT 24	2465875740 ps
T351	/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.818072290	Apr 16 02:49:16 PM PDT 24	Apr 16 02:49:19 PM PDT 24	2528115310 ps
T233	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.1777314982	Apr 16 02:49:55 PM PDT 24	Apr 16 02:52:06 PM PDT 24	192200109937 ps
T352	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.901137179	Apr 16 02:48:46 PM PDT 24	Apr 16 03:02:46 PM PDT 24	312900682010 ps
T217	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1328191084	Apr 16 02:49:22 PM PDT 24	Apr 16 03:00:37 PM PDT 24	242769219420 ps
T271	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3903542473	Apr 16 02:49:48 PM PDT 24	Apr 16 02:49:56 PM PDT 24	2511302225 ps
T353	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3618501490	Apr 16 02:48:44 PM PDT 24	Apr 16 02:48:49 PM PDT 24	2475801021 ps
T75	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.133817037	Apr 16 02:48:44 PM PDT 24	Apr 16 02:48:48 PM PDT 24	5647253458 ps
T354	/workspace/coverage/default/46.sysrst_ctrl_smoke.2538859550	Apr 16 02:50:11 PM PDT 24	Apr 16 02:50:14 PM PDT 24	2126486265 ps
T34	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2439921184	Apr 16 02:49:05 PM PDT 24	Apr 16 02:53:43 PM PDT 24	1456167360694 ps
T137	/workspace/coverage/default/18.sysrst_ctrl_stress_all.126100210	Apr 16 02:49:08 PM PDT 24	Apr 16 02:49:15 PM PDT 24	9251555972 ps
T138	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.1460687874	Apr 16 02:49:24 PM PDT 24	Apr 16 02:50:56 PM PDT 24	78078232332 ps
T128	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3981844492	Apr 16 02:50:08 PM PDT 24	Apr 16 02:52:11 PM PDT 24	176196501627 ps
T139	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2707549015	Apr 16 02:48:42 PM PDT 24	Apr 16 02:48:46 PM PDT 24	2480364420 ps
T140	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.4077611513	Apr 16 02:49:28 PM PDT 24	Apr 16 02:49:33 PM PDT 24	2022055339 ps
T141	/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3884488393	Apr 16 02:50:33 PM PDT 24	Apr 16 02:50:56 PM PDT 24	30791608971 ps
T142	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2677782038	Apr 16 02:50:15 PM PDT 24	Apr 16 02:50:17 PM PDT 24	2217971134 ps
T77	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3960916035	Apr 16 02:48:28 PM PDT 24	Apr 16 02:48:51 PM PDT 24	31287382836 ps
T143	/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1055416232	Apr 16 02:48:38 PM PDT 24	Apr 16 02:48:42 PM PDT 24	2513974136 ps
T355	/workspace/coverage/default/49.sysrst_ctrl_alert_test.534524570	Apr 16 02:50:17 PM PDT 24	Apr 16 02:50:21 PM PDT 24	2038488053 ps
T168	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.1511973907	Apr 16 02:49:45 PM PDT 24	Apr 16 02:49:55 PM PDT 24	3126274989 ps
T219	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.4074255939	Apr 16 02:49:58 PM PDT 24	Apr 16 02:51:43 PM PDT 24	40383412414 ps
T129	/workspace/coverage/default/17.sysrst_ctrl_stress_all.3873941741	Apr 16 02:50:22 PM PDT 24	Apr 16 02:50:30 PM PDT 24	10438123792 ps
T148	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2467203090	Apr 16 02:48:43 PM PDT 24	Apr 16 02:48:46 PM PDT 24	5156870865 ps
T356	/workspace/coverage/default/41.sysrst_ctrl_smoke.2299746812	Apr 16 02:49:57 PM PDT 24	Apr 16 02:50:01 PM PDT 24	2124031305 ps
T357	/workspace/coverage/default/7.sysrst_ctrl_smoke.1697014556	Apr 16 02:48:38 PM PDT 24	Apr 16 02:48:44 PM PDT 24	2109596872 ps
T358	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.17644522	Apr 16 02:50:11 PM PDT 24	Apr 16 02:50:15 PM PDT 24	2498291838 ps
T359	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.2503093313	Apr 16 02:49:52 PM PDT 24	Apr 16 02:49:59 PM PDT 24	2055374813 ps
T360	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2775026051	Apr 16 02:50:02 PM PDT 24	Apr 16 02:50:05 PM PDT 24	2528955615 ps
T361	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.4238754891	Apr 16 02:49:23 PM PDT 24	Apr 16 02:49:27 PM PDT 24	4499165894 ps
T362	/workspace/coverage/default/24.sysrst_ctrl_alert_test.1232737416	Apr 16 02:49:24 PM PDT 24	Apr 16 02:49:27 PM PDT 24	2029127774 ps
T363	/workspace/coverage/default/5.sysrst_ctrl_smoke.3756976706	Apr 16 02:48:44 PM PDT 24	Apr 16 02:48:49 PM PDT 24	2122107532 ps
T212	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4112546131	Apr 16 02:50:23 PM PDT 24	Apr 16 02:53:14 PM PDT 24	136771294697 ps
T364	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.582668353	Apr 16 02:49:00 PM PDT 24	Apr 16 02:49:04 PM PDT 24	3863789227 ps
T365	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3743949975	Apr 16 02:48:59 PM PDT 24	Apr 16 02:49:04 PM PDT 24	2516362487 ps
T366	/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.1639701168	Apr 16 02:49:34 PM PDT 24	Apr 16 02:49:40 PM PDT 24	2613393759 ps
T367	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3586006108	Apr 16 02:49:54 PM PDT 24	Apr 16 02:49:59 PM PDT 24	2611244273 ps
T268	/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1812965618	Apr 16 02:48:44 PM PDT 24	Apr 16 02:48:50 PM PDT 24	2478803127 ps
T80	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1943173703	Apr 16 02:49:59 PM PDT 24	Apr 16 02:51:28 PM PDT 24	135483305132 ps
T368	/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2163155902	Apr 16 02:48:35 PM PDT 24	Apr 16 02:48:37 PM PDT 24	2185239293 ps
T262	/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2952394499	Apr 16 02:50:07 PM PDT 24	Apr 16 02:50:17 PM PDT 24	3327525963 ps
T159	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1971968074	Apr 16 02:49:39 PM PDT 24	Apr 16 02:52:44 PM PDT 24	75013054716 ps
T269	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2830647669	Apr 16 02:48:33 PM PDT 24	Apr 16 02:48:38 PM PDT 24	2456990824 ps
T369	/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.891482267	Apr 16 02:49:13 PM PDT 24	Apr 16 02:49:21 PM PDT 24	2091188270 ps
T298	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.712406547	Apr 16 02:50:18 PM PDT 24	Apr 16 02:52:38 PM PDT 24	54647031100 ps
T370	/workspace/coverage/default/30.sysrst_ctrl_smoke.2267048415	Apr 16 02:49:29 PM PDT 24	Apr 16 02:49:33 PM PDT 24	2134367422 ps
T371	/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.1150358127	Apr 16 02:49:28 PM PDT 24	Apr 16 02:52:55 PM PDT 24	524324766349 ps
T372	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.95423139	Apr 16 02:49:07 PM PDT 24	Apr 16 02:50:23 PM PDT 24	29470915582 ps
T88	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3451479099	Apr 16 02:50:10 PM PDT 24	Apr 16 02:50:44 PM PDT 24	25088137857 ps
T109	/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2857110237	Apr 16 02:49:08 PM PDT 24	Apr 16 02:49:18 PM PDT 24	6512610764 ps
T82	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2035939942	Apr 16 02:50:09 PM PDT 24	Apr 16 02:50:17 PM PDT 24	6474539690 ps
T373	/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1739942431	Apr 16 02:49:35 PM PDT 24	Apr 16 02:49:38 PM PDT 24	2534923861 ps
T374	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2807514640	Apr 16 02:49:57 PM PDT 24	Apr 16 02:50:06 PM PDT 24	2608627629 ps
T375	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.154043642	Apr 16 02:49:32 PM PDT 24	Apr 16 02:49:36 PM PDT 24	2502698772 ps
T89	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1160472086	Apr 16 02:50:17 PM PDT 24	Apr 16 02:51:08 PM PDT 24	38602307596 ps
T265	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1138189257	Apr 16 02:50:20 PM PDT 24	Apr 16 02:52:09 PM PDT 24	41861396959 ps
T110	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3895679743	Apr 16 02:49:01 PM PDT 24	Apr 16 02:52:46 PM PDT 24	97306069871 ps
T376	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.3651422715	Apr 16 02:49:27 PM PDT 24	Apr 16 02:49:36 PM PDT 24	2120810295 ps
T164	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.4281628656	Apr 16 02:48:52 PM PDT 24	Apr 16 02:49:48 PM PDT 24	20611598212 ps
T377	/workspace/coverage/default/4.sysrst_ctrl_smoke.2713695238	Apr 16 02:48:39 PM PDT 24	Apr 16 02:48:43 PM PDT 24	2120237498 ps
T378	/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2965916976	Apr 16 02:48:43 PM PDT 24	Apr 16 02:48:52 PM PDT 24	4207630831 ps
T379	/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.21374973	Apr 16 02:48:59 PM PDT 24	Apr 16 02:49:08 PM PDT 24	2612845503 ps
T380	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2628286251	Apr 16 02:49:24 PM PDT 24	Apr 16 02:49:33 PM PDT 24	2510039717 ps
T264	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.100227160	Apr 16 02:48:45 PM PDT 24	Apr 16 02:48:58 PM PDT 24	3760505971 ps
T381	/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1362091090	Apr 16 02:50:07 PM PDT 24	Apr 16 02:50:09 PM PDT 24	2268699059 ps
T382	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3427603098	Apr 16 02:50:09 PM PDT 24	Apr 16 02:50:17 PM PDT 24	2466822646 ps
T383	/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.1415168446	Apr 16 02:49:26 PM PDT 24	Apr 16 02:49:31 PM PDT 24	4107770143 ps
T131	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.1744867054	Apr 16 02:50:11 PM PDT 24	Apr 16 02:50:21 PM PDT 24	3125244496 ps
T192	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.4009866458	Apr 16 02:48:43 PM PDT 24	Apr 16 02:55:42 PM PDT 24	165995980474 ps
T193	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.4282486503	Apr 16 02:48:38 PM PDT 24	Apr 16 02:49:56 PM PDT 24	31175947935 ps
T194	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3766024312	Apr 16 02:50:16 PM PDT 24	Apr 16 02:59:53 PM PDT 24	232832833124 ps
T195	/workspace/coverage/default/12.sysrst_ctrl_smoke.684396347	Apr 16 02:48:54 PM PDT 24	Apr 16 02:48:58 PM PDT 24	2113665649 ps
T196	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3414783133	Apr 16 02:49:20 PM PDT 24	Apr 16 02:49:24 PM PDT 24	2525129755 ps
T197	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1855751467	Apr 16 02:48:35 PM PDT 24	Apr 16 02:49:32 PM PDT 24	91913220776 ps
T83	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3285947634	Apr 16 02:49:39 PM PDT 24	Apr 16 02:49:43 PM PDT 24	3700901776 ps
T169	/workspace/coverage/default/6.sysrst_ctrl_edge_detect.4051322826	Apr 16 02:48:50 PM PDT 24	Apr 16 02:49:01 PM PDT 24	4494038272 ps
T198	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.435065829	Apr 16 02:50:22 PM PDT 24	Apr 16 02:52:17 PM PDT 24	90008266844 ps
T162	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3924660304	Apr 16 02:50:16 PM PDT 24	Apr 16 02:51:18 PM PDT 24	24962111601 ps
T384	/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.918274221	Apr 16 02:49:38 PM PDT 24	Apr 16 02:49:47 PM PDT 24	3027768481 ps
T328	/workspace/coverage/default/12.sysrst_ctrl_stress_all.23950406	Apr 16 02:49:09 PM PDT 24	Apr 16 02:52:38 PM PDT 24	155483641713 ps
T144	/workspace/coverage/default/0.sysrst_ctrl_edge_detect.1655281696	Apr 16 02:48:25 PM PDT 24	Apr 16 02:48:30 PM PDT 24	3088383417 ps
T150	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.13720790	Apr 16 02:49:12 PM PDT 24	Apr 16 02:54:00 PM PDT 24	111586178046 ps
T151	/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1210654887	Apr 16 02:48:46 PM PDT 24	Apr 16 02:48:55 PM PDT 24	10761422770 ps
T152	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3303544819	Apr 16 02:50:18 PM PDT 24	Apr 16 02:51:10 PM PDT 24	18335315975 ps
T153	/workspace/coverage/default/16.sysrst_ctrl_alert_test.961573535	Apr 16 02:49:12 PM PDT 24	Apr 16 02:49:15 PM PDT 24	2044037121 ps
T154	/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.2269917237	Apr 16 02:49:36 PM PDT 24	Apr 16 02:49:42 PM PDT 24	2516453387 ps
T155	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.2757287477	Apr 16 02:48:31 PM PDT 24	Apr 16 02:48:45 PM PDT 24	5415259114 ps
T156	/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.3666832434	Apr 16 02:49:50 PM PDT 24	Apr 16 02:49:51 PM PDT 24	2781728825 ps
T157	/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.1794763099	Apr 16 02:48:58 PM PDT 24	Apr 16 02:49:02 PM PDT 24	2079806339 ps
T158	/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3534676874	Apr 16 02:49:22 PM PDT 24	Apr 16 02:49:27 PM PDT 24	5042231140 ps
T341	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2582444936	Apr 16 02:49:06 PM PDT 24	Apr 16 02:52:58 PM PDT 24	2274575226506 ps
T385	/workspace/coverage/default/14.sysrst_ctrl_alert_test.4194878839	Apr 16 02:48:57 PM PDT 24	Apr 16 02:49:04 PM PDT 24	2011458302 ps
T386	/workspace/coverage/default/13.sysrst_ctrl_stress_all.2316020716	Apr 16 02:49:09 PM PDT 24	Apr 16 02:49:16 PM PDT 24	8714026595 ps
T180	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3536466662	Apr 16 02:49:30 PM PDT 24	Apr 16 02:50:13 PM PDT 24	67437147420 ps
T387	/workspace/coverage/default/31.sysrst_ctrl_alert_test.3225442075	Apr 16 02:49:35 PM PDT 24	Apr 16 02:49:42 PM PDT 24	2015930250 ps
T90	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.2863369689	Apr 16 02:49:26 PM PDT 24	Apr 16 02:50:32 PM PDT 24	119293531943 ps
T388	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.4245621381	Apr 16 02:48:57 PM PDT 24	Apr 16 02:50:37 PM PDT 24	70709712563 ps
T389	/workspace/coverage/default/7.sysrst_ctrl_alert_test.2973392297	Apr 16 02:48:51 PM PDT 24	Apr 16 02:48:56 PM PDT 24	2019628370 ps
T390	/workspace/coverage/default/38.sysrst_ctrl_smoke.1860067090	Apr 16 02:49:51 PM PDT 24	Apr 16 02:49:53 PM PDT 24	2134473943 ps
T391	/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1718112145	Apr 16 02:49:47 PM PDT 24	Apr 16 02:49:55 PM PDT 24	2611981929 ps
T392	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2803384720	Apr 16 02:48:47 PM PDT 24	Apr 16 02:48:52 PM PDT 24	3255195333 ps
T79	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2533835858	Apr 16 02:50:20 PM PDT 24	Apr 16 02:52:58 PM PDT 24	64646204416 ps
T393	/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.282711256	Apr 16 02:48:39 PM PDT 24	Apr 16 02:48:41 PM PDT 24	2227912814 ps
T394	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1095524067	Apr 16 02:49:53 PM PDT 24	Apr 16 02:50:02 PM PDT 24	2960406644 ps
T395	/workspace/coverage/default/49.sysrst_ctrl_smoke.2401641951	Apr 16 02:50:15 PM PDT 24	Apr 16 02:50:17 PM PDT 24	2134624405 ps
T396	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3963808625	Apr 16 02:48:23 PM PDT 24	Apr 16 02:48:27 PM PDT 24	2628007115 ps
T91	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3712681166	Apr 16 02:50:21 PM PDT 24	Apr 16 02:51:02 PM PDT 24	30590044945 ps
T397	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.3663885040	Apr 16 02:48:43 PM PDT 24	Apr 16 02:48:53 PM PDT 24	2243012681 ps
T398	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.2027864185	Apr 16 02:49:10 PM PDT 24	Apr 16 02:49:15 PM PDT 24	2620526926 ps
T399	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1042728926	Apr 16 02:49:32 PM PDT 24	Apr 16 02:49:36 PM PDT 24	2632975209 ps
T400	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.211757252	Apr 16 02:48:33 PM PDT 24	Apr 16 02:48:39 PM PDT 24	2954320437 ps
T401	/workspace/coverage/default/32.sysrst_ctrl_stress_all.1151519013	Apr 16 02:49:35 PM PDT 24	Apr 16 02:49:39 PM PDT 24	16714606762 ps
T132	/workspace/coverage/default/15.sysrst_ctrl_stress_all.4153241353	Apr 16 02:49:00 PM PDT 24	Apr 16 02:50:01 PM PDT 24	440197821834 ps
T402	/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1220449910	Apr 16 02:48:33 PM PDT 24	Apr 16 02:48:36 PM PDT 24	2056645161 ps
T403	/workspace/coverage/default/26.sysrst_ctrl_smoke.4107338545	Apr 16 02:49:18 PM PDT 24	Apr 16 02:49:21 PM PDT 24	2136651305 ps
T404	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1947245407	Apr 16 02:50:09 PM PDT 24	Apr 16 02:50:11 PM PDT 24	2126852678 ps
T405	/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.664101723	Apr 16 02:48:31 PM PDT 24	Apr 16 03:03:26 PM PDT 24	318877915141 ps
T406	/workspace/coverage/default/1.sysrst_ctrl_alert_test.3526351344	Apr 16 02:48:39 PM PDT 24	Apr 16 02:48:43 PM PDT 24	2021637988 ps
T407	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.1295057043	Apr 16 02:48:35 PM PDT 24	Apr 16 02:48:43 PM PDT 24	2612434497 ps
T408	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2916530264	Apr 16 02:50:05 PM PDT 24	Apr 16 02:50:09 PM PDT 24	2473146881 ps
T240	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.240572503	Apr 16 02:48:35 PM PDT 24	Apr 16 02:48:42 PM PDT 24	22214006287 ps
T133	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.3774127775	Apr 16 02:49:30 PM PDT 24	Apr 16 02:49:35 PM PDT 24	3261368337 ps
T409	/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.2828361951	Apr 16 02:49:40 PM PDT 24	Apr 16 02:49:48 PM PDT 24	2470455330 ps
T410	/workspace/coverage/default/33.sysrst_ctrl_smoke.1571238829	Apr 16 02:49:36 PM PDT 24	Apr 16 02:49:39 PM PDT 24	2142224834 ps
T411	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.48787621	Apr 16 02:49:08 PM PDT 24	Apr 16 02:49:16 PM PDT 24	4259222805 ps
T412	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2074213219	Apr 16 02:48:41 PM PDT 24	Apr 16 02:48:49 PM PDT 24	2298760059 ps
T413	/workspace/coverage/default/11.sysrst_ctrl_smoke.1920984250	Apr 16 02:48:52 PM PDT 24	Apr 16 02:48:58 PM PDT 24	2107749983 ps
T414	/workspace/coverage/default/10.sysrst_ctrl_smoke.2356671491	Apr 16 02:48:48 PM PDT 24	Apr 16 02:48:53 PM PDT 24	2120063218 ps
T317	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.448596960	Apr 16 02:50:18 PM PDT 24	Apr 16 02:51:06 PM PDT 24	77312036926 ps
T84	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.2882233377	Apr 16 02:49:37 PM PDT 24	Apr 16 02:49:40 PM PDT 24	7926056802 ps
T92	/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.936594270	Apr 16 02:50:21 PM PDT 24	Apr 16 02:52:09 PM PDT 24	93453237641 ps
T324	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2968892159	Apr 16 02:49:21 PM PDT 24	Apr 16 02:51:47 PM PDT 24	57799390638 ps
T415	/workspace/coverage/default/13.sysrst_ctrl_alert_test.4284850304	Apr 16 02:48:50 PM PDT 24	Apr 16 02:48:53 PM PDT 24	2024758911 ps