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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.33 96.81 100.00 97.44 98.74 99.61 93.69


Total test records in report: 915
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T247 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1500049665 Apr 23 02:23:50 PM PDT 24 Apr 23 02:24:48 PM PDT 24 68252266552 ps
T248 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.533249185 Apr 23 02:22:19 PM PDT 24 Apr 23 02:24:03 PM PDT 24 76937674633 ps
T249 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3517089786 Apr 23 02:23:24 PM PDT 24 Apr 23 02:23:34 PM PDT 24 4241606477 ps
T250 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.825348231 Apr 23 02:22:34 PM PDT 24 Apr 23 02:22:37 PM PDT 24 4920351498 ps
T625 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1220352210 Apr 23 02:22:40 PM PDT 24 Apr 23 02:22:48 PM PDT 24 2613544052 ps
T626 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2844736887 Apr 23 02:24:15 PM PDT 24 Apr 23 02:24:18 PM PDT 24 2470716974 ps
T627 /workspace/coverage/default/23.sysrst_ctrl_stress_all.1288817580 Apr 23 02:23:21 PM PDT 24 Apr 23 02:23:28 PM PDT 24 6362502018 ps
T156 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.2929324979 Apr 23 02:23:49 PM PDT 24 Apr 23 02:23:57 PM PDT 24 7669966340 ps
T628 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.154802434 Apr 23 02:23:07 PM PDT 24 Apr 23 02:23:12 PM PDT 24 2517210159 ps
T629 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1459554428 Apr 23 02:23:13 PM PDT 24 Apr 23 02:23:19 PM PDT 24 2018970895 ps
T630 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.476260961 Apr 23 02:23:17 PM PDT 24 Apr 23 02:23:20 PM PDT 24 2629513198 ps
T631 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3748854741 Apr 23 02:22:40 PM PDT 24 Apr 23 02:22:43 PM PDT 24 2496512708 ps
T632 /workspace/coverage/default/15.sysrst_ctrl_stress_all.3893927820 Apr 23 02:22:57 PM PDT 24 Apr 23 02:23:14 PM PDT 24 10942125730 ps
T633 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.3778663674 Apr 23 02:23:14 PM PDT 24 Apr 23 02:23:22 PM PDT 24 2608997829 ps
T634 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3730416709 Apr 23 02:23:36 PM PDT 24 Apr 23 02:23:41 PM PDT 24 2615246030 ps
T635 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1638535656 Apr 23 02:24:24 PM PDT 24 Apr 23 02:25:59 PM PDT 24 139251337167 ps
T636 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3980378129 Apr 23 02:22:39 PM PDT 24 Apr 23 02:22:47 PM PDT 24 8103653000 ps
T637 /workspace/coverage/default/47.sysrst_ctrl_stress_all.1371967652 Apr 23 02:24:16 PM PDT 24 Apr 23 02:24:27 PM PDT 24 6530219826 ps
T287 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.560725256 Apr 23 02:22:39 PM PDT 24 Apr 23 02:24:33 PM PDT 24 42009675586 ps
T638 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2092050719 Apr 23 02:24:00 PM PDT 24 Apr 23 02:24:08 PM PDT 24 2512116916 ps
T282 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2786233237 Apr 23 02:23:36 PM PDT 24 Apr 23 02:24:12 PM PDT 24 91338771023 ps
T639 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1438748688 Apr 23 02:24:01 PM PDT 24 Apr 23 02:24:10 PM PDT 24 3006794139 ps
T640 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1368640208 Apr 23 02:23:35 PM PDT 24 Apr 23 02:23:41 PM PDT 24 2088919830 ps
T168 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1807949255 Apr 23 02:22:29 PM PDT 24 Apr 23 02:24:17 PM PDT 24 679141087847 ps
T178 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.2844559848 Apr 23 02:23:36 PM PDT 24 Apr 23 02:27:51 PM PDT 24 95018549014 ps
T179 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.798571222 Apr 23 02:23:49 PM PDT 24 Apr 23 02:24:18 PM PDT 24 118362474786 ps
T180 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1113578316 Apr 23 02:25:04 PM PDT 24 Apr 23 02:25:06 PM PDT 24 2641286536 ps
T181 /workspace/coverage/default/46.sysrst_ctrl_smoke.3793626142 Apr 23 02:24:15 PM PDT 24 Apr 23 02:24:22 PM PDT 24 2107190583 ps
T182 /workspace/coverage/default/11.sysrst_ctrl_stress_all.82905350 Apr 23 02:22:44 PM PDT 24 Apr 23 02:23:05 PM PDT 24 7509192720 ps
T183 /workspace/coverage/default/38.sysrst_ctrl_smoke.3184929044 Apr 23 02:23:50 PM PDT 24 Apr 23 02:23:57 PM PDT 24 2110811922 ps
T184 /workspace/coverage/default/14.sysrst_ctrl_stress_all.1552143257 Apr 23 02:22:56 PM PDT 24 Apr 23 02:23:07 PM PDT 24 7140337374 ps
T185 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.464576053 Apr 23 02:23:28 PM PDT 24 Apr 23 02:25:43 PM PDT 24 48501321251 ps
T186 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2292367384 Apr 23 02:24:02 PM PDT 24 Apr 23 02:24:50 PM PDT 24 68436188822 ps
T288 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.855901920 Apr 23 02:22:39 PM PDT 24 Apr 23 02:23:39 PM PDT 24 22008956268 ps
T377 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1823956481 Apr 23 02:22:36 PM PDT 24 Apr 23 02:23:08 PM PDT 24 54527165798 ps
T641 /workspace/coverage/default/8.sysrst_ctrl_stress_all.406496537 Apr 23 02:22:42 PM PDT 24 Apr 23 02:22:52 PM PDT 24 7043684743 ps
T370 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3925202208 Apr 23 02:24:28 PM PDT 24 Apr 23 02:27:12 PM PDT 24 128892207748 ps
T642 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.168091997 Apr 23 02:22:42 PM PDT 24 Apr 23 02:22:50 PM PDT 24 2676703294 ps
T643 /workspace/coverage/default/48.sysrst_ctrl_stress_all.2359676562 Apr 23 02:24:21 PM PDT 24 Apr 23 02:24:41 PM PDT 24 6787793646 ps
T644 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.666291502 Apr 23 02:22:30 PM PDT 24 Apr 23 02:22:34 PM PDT 24 2621142089 ps
T645 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.2301883323 Apr 23 02:23:04 PM PDT 24 Apr 23 02:23:15 PM PDT 24 3663718821 ps
T646 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.3731490532 Apr 23 02:23:09 PM PDT 24 Apr 23 02:23:14 PM PDT 24 2522613222 ps
T647 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3387468939 Apr 23 02:23:34 PM PDT 24 Apr 23 02:23:42 PM PDT 24 5408053183 ps
T388 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.4152821258 Apr 23 02:24:31 PM PDT 24 Apr 23 02:25:44 PM PDT 24 25577721490 ps
T380 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.2788221974 Apr 23 02:23:35 PM PDT 24 Apr 23 02:26:18 PM PDT 24 61451131300 ps
T354 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1167166986 Apr 23 02:24:28 PM PDT 24 Apr 23 02:27:37 PM PDT 24 146868221795 ps
T648 /workspace/coverage/default/37.sysrst_ctrl_smoke.4119064064 Apr 23 02:23:52 PM PDT 24 Apr 23 02:23:55 PM PDT 24 2131103755 ps
T87 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3848788944 Apr 23 02:22:37 PM PDT 24 Apr 23 02:22:49 PM PDT 24 43699441247 ps
T355 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.960055634 Apr 23 02:23:51 PM PDT 24 Apr 23 02:24:23 PM PDT 24 84479449204 ps
T649 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3201375317 Apr 23 02:23:50 PM PDT 24 Apr 23 02:23:53 PM PDT 24 2493717856 ps
T650 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1672495484 Apr 23 02:24:15 PM PDT 24 Apr 23 02:24:21 PM PDT 24 2517057125 ps
T651 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2638634960 Apr 23 02:24:13 PM PDT 24 Apr 23 02:25:10 PM PDT 24 23080615212 ps
T652 /workspace/coverage/default/26.sysrst_ctrl_alert_test.66787866 Apr 23 02:23:18 PM PDT 24 Apr 23 02:23:25 PM PDT 24 2015791721 ps
T227 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1333054899 Apr 23 02:24:16 PM PDT 24 Apr 23 02:25:06 PM PDT 24 76079195878 ps
T161 /workspace/coverage/default/4.sysrst_ctrl_stress_all.752023742 Apr 23 02:22:42 PM PDT 24 Apr 23 02:22:48 PM PDT 24 11099259701 ps
T228 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2682048033 Apr 23 02:23:03 PM PDT 24 Apr 23 02:23:10 PM PDT 24 2226589100 ps
T229 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1768289994 Apr 23 02:23:36 PM PDT 24 Apr 23 02:25:31 PM PDT 24 87713261692 ps
T230 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1506312866 Apr 23 02:22:46 PM PDT 24 Apr 23 02:22:51 PM PDT 24 25648766675 ps
T231 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3310977104 Apr 23 02:23:29 PM PDT 24 Apr 23 02:23:33 PM PDT 24 4842832064 ps
T232 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3062123340 Apr 23 02:23:48 PM PDT 24 Apr 23 02:25:42 PM PDT 24 125816725524 ps
T188 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.2266433867 Apr 23 02:22:54 PM PDT 24 Apr 23 02:23:04 PM PDT 24 4504733092 ps
T233 /workspace/coverage/default/34.sysrst_ctrl_alert_test.3033564837 Apr 23 02:25:06 PM PDT 24 Apr 23 02:25:09 PM PDT 24 2023434894 ps
T234 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1671768837 Apr 23 02:23:10 PM PDT 24 Apr 23 02:23:19 PM PDT 24 2756556097 ps
T653 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.487755841 Apr 23 02:24:19 PM PDT 24 Apr 23 02:24:28 PM PDT 24 6049137824 ps
T654 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2102282196 Apr 23 02:24:01 PM PDT 24 Apr 23 02:24:04 PM PDT 24 3033957414 ps
T655 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.948265557 Apr 23 02:22:59 PM PDT 24 Apr 23 02:23:05 PM PDT 24 2019671438 ps
T656 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1484641743 Apr 23 02:23:37 PM PDT 24 Apr 23 02:23:39 PM PDT 24 2509177908 ps
T657 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1097183688 Apr 23 02:22:41 PM PDT 24 Apr 23 02:22:44 PM PDT 24 5178241678 ps
T350 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.1800972529 Apr 23 02:24:06 PM PDT 24 Apr 23 02:26:29 PM PDT 24 60496858753 ps
T658 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1601183444 Apr 23 02:23:39 PM PDT 24 Apr 23 02:23:47 PM PDT 24 2471218715 ps
T659 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1012464424 Apr 23 02:22:43 PM PDT 24 Apr 23 02:22:48 PM PDT 24 2617060052 ps
T660 /workspace/coverage/default/21.sysrst_ctrl_smoke.1941776292 Apr 23 02:23:10 PM PDT 24 Apr 23 02:23:17 PM PDT 24 2111664819 ps
T661 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1367764174 Apr 23 02:22:31 PM PDT 24 Apr 23 02:22:37 PM PDT 24 2619322568 ps
T662 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2868704692 Apr 23 02:22:31 PM PDT 24 Apr 23 02:22:41 PM PDT 24 3028054019 ps
T663 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.2700054015 Apr 23 02:23:53 PM PDT 24 Apr 23 02:23:56 PM PDT 24 2534885789 ps
T283 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.3703694287 Apr 23 02:23:28 PM PDT 24 Apr 23 02:24:57 PM PDT 24 129296349102 ps
T664 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.2646551930 Apr 23 02:24:02 PM PDT 24 Apr 23 02:26:22 PM PDT 24 135897808861 ps
T665 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2520358080 Apr 23 02:22:51 PM PDT 24 Apr 23 02:22:59 PM PDT 24 4685387030 ps
T666 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1004348450 Apr 23 02:22:54 PM PDT 24 Apr 23 02:22:57 PM PDT 24 3319655401 ps
T667 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.4177796198 Apr 23 02:23:49 PM PDT 24 Apr 23 02:23:54 PM PDT 24 5464285407 ps
T668 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1555366467 Apr 23 02:22:55 PM PDT 24 Apr 23 02:23:22 PM PDT 24 44635732077 ps
T669 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.86679144 Apr 23 02:22:46 PM PDT 24 Apr 23 02:23:53 PM PDT 24 24827308402 ps
T670 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1785524177 Apr 23 02:24:29 PM PDT 24 Apr 23 02:24:47 PM PDT 24 24601764842 ps
T671 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2885285148 Apr 23 02:23:42 PM PDT 24 Apr 23 02:23:45 PM PDT 24 2623166908 ps
T672 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1044726239 Apr 23 02:22:41 PM PDT 24 Apr 23 02:23:16 PM PDT 24 56077058746 ps
T673 /workspace/coverage/default/49.sysrst_ctrl_stress_all.3241815908 Apr 23 02:24:24 PM PDT 24 Apr 23 02:25:05 PM PDT 24 14429528419 ps
T359 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2493194773 Apr 23 02:24:33 PM PDT 24 Apr 23 02:25:32 PM PDT 24 125409515588 ps
T674 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.544771509 Apr 23 02:24:20 PM PDT 24 Apr 23 02:24:23 PM PDT 24 2531726484 ps
T675 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.18697470 Apr 23 02:24:18 PM PDT 24 Apr 23 02:24:23 PM PDT 24 2942903721 ps
T676 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3553909415 Apr 23 02:22:25 PM PDT 24 Apr 23 02:22:31 PM PDT 24 2026476099 ps
T677 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.754988928 Apr 23 02:22:36 PM PDT 24 Apr 23 02:22:44 PM PDT 24 2529548515 ps
T678 /workspace/coverage/default/42.sysrst_ctrl_alert_test.1169205525 Apr 23 02:24:08 PM PDT 24 Apr 23 02:24:14 PM PDT 24 2015610961 ps
T117 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.1474424187 Apr 23 02:22:38 PM PDT 24 Apr 23 02:22:41 PM PDT 24 3438573611 ps
T679 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3818726376 Apr 23 02:24:13 PM PDT 24 Apr 23 02:24:15 PM PDT 24 2523676909 ps
T357 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.1744725962 Apr 23 02:22:48 PM PDT 24 Apr 23 02:23:16 PM PDT 24 59432249761 ps
T680 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.605193294 Apr 23 02:23:29 PM PDT 24 Apr 23 02:23:32 PM PDT 24 3286363507 ps
T681 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.2146483776 Apr 23 02:23:14 PM PDT 24 Apr 23 02:24:52 PM PDT 24 71537607812 ps
T682 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.4008015732 Apr 23 02:24:11 PM PDT 24 Apr 23 02:24:15 PM PDT 24 2452928826 ps
T351 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.1234838315 Apr 23 02:23:08 PM PDT 24 Apr 23 02:25:07 PM PDT 24 143942859846 ps
T361 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2840153792 Apr 23 02:24:27 PM PDT 24 Apr 23 02:25:09 PM PDT 24 113127087212 ps
T683 /workspace/coverage/default/31.sysrst_ctrl_alert_test.499040267 Apr 23 02:23:31 PM PDT 24 Apr 23 02:23:38 PM PDT 24 2015286143 ps
T684 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.1328763816 Apr 23 02:22:38 PM PDT 24 Apr 23 02:22:45 PM PDT 24 4360035694 ps
T685 /workspace/coverage/default/43.sysrst_ctrl_alert_test.213626117 Apr 23 02:24:05 PM PDT 24 Apr 23 02:24:09 PM PDT 24 2017281721 ps
T686 /workspace/coverage/default/18.sysrst_ctrl_alert_test.3729826607 Apr 23 02:22:56 PM PDT 24 Apr 23 02:23:00 PM PDT 24 2016579130 ps
T358 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3556624332 Apr 23 02:24:27 PM PDT 24 Apr 23 02:27:48 PM PDT 24 81088372135 ps
T687 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.965254997 Apr 23 02:24:18 PM PDT 24 Apr 23 02:24:26 PM PDT 24 2248181957 ps
T688 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.4277115846 Apr 23 02:22:43 PM PDT 24 Apr 23 02:25:04 PM PDT 24 168616588091 ps
T689 /workspace/coverage/default/44.sysrst_ctrl_stress_all.2471390248 Apr 23 02:24:07 PM PDT 24 Apr 23 03:32:46 PM PDT 24 1670913406282 ps
T690 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2405004908 Apr 23 02:24:09 PM PDT 24 Apr 23 02:24:20 PM PDT 24 3898545519 ps
T376 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1633176424 Apr 23 02:24:29 PM PDT 24 Apr 23 02:25:07 PM PDT 24 56676963626 ps
T279 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1733127040 Apr 23 02:24:18 PM PDT 24 Apr 23 02:30:13 PM PDT 24 125175853676 ps
T691 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3178259677 Apr 23 02:23:49 PM PDT 24 Apr 23 02:23:51 PM PDT 24 2211071093 ps
T692 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1459593520 Apr 23 02:24:20 PM PDT 24 Apr 23 02:24:24 PM PDT 24 2634232122 ps
T693 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3680643646 Apr 23 02:24:27 PM PDT 24 Apr 23 02:24:48 PM PDT 24 56193609936 ps
T694 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3630587423 Apr 23 02:23:40 PM PDT 24 Apr 23 02:23:42 PM PDT 24 2319920595 ps
T364 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.4265930899 Apr 23 02:24:26 PM PDT 24 Apr 23 02:25:13 PM PDT 24 71910521359 ps
T695 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.4266736850 Apr 23 02:22:46 PM PDT 24 Apr 23 02:22:50 PM PDT 24 2231905275 ps
T696 /workspace/coverage/default/44.sysrst_ctrl_smoke.2876610660 Apr 23 02:24:11 PM PDT 24 Apr 23 02:24:14 PM PDT 24 2133530108 ps
T346 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1263314690 Apr 23 02:24:03 PM PDT 24 Apr 23 02:24:46 PM PDT 24 34206364036 ps
T697 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.330116809 Apr 23 02:23:39 PM PDT 24 Apr 23 02:23:47 PM PDT 24 2513259284 ps
T374 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2877798846 Apr 23 02:24:28 PM PDT 24 Apr 23 02:25:29 PM PDT 24 94524007260 ps
T698 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.147631964 Apr 23 02:22:59 PM PDT 24 Apr 23 02:23:06 PM PDT 24 4735892089 ps
T699 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3489468657 Apr 23 02:24:14 PM PDT 24 Apr 23 02:24:25 PM PDT 24 3389581614 ps
T700 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1940646371 Apr 23 02:23:09 PM PDT 24 Apr 23 02:24:14 PM PDT 24 24307210665 ps
T701 /workspace/coverage/default/5.sysrst_ctrl_alert_test.1070715883 Apr 23 02:22:28 PM PDT 24 Apr 23 02:22:30 PM PDT 24 2099444076 ps
T702 /workspace/coverage/default/4.sysrst_ctrl_smoke.140080192 Apr 23 02:22:30 PM PDT 24 Apr 23 02:22:35 PM PDT 24 2122042322 ps
T703 /workspace/coverage/default/13.sysrst_ctrl_smoke.3354163959 Apr 23 02:22:43 PM PDT 24 Apr 23 02:22:46 PM PDT 24 2127219419 ps
T352 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.328849635 Apr 23 02:25:04 PM PDT 24 Apr 23 02:29:25 PM PDT 24 102236442785 ps
T223 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3960169689 Apr 23 02:22:31 PM PDT 24 Apr 23 02:23:53 PM PDT 24 133195316873 ps
T704 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3975344705 Apr 23 02:24:07 PM PDT 24 Apr 23 02:24:13 PM PDT 24 3821489535 ps
T705 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2616800172 Apr 23 02:24:13 PM PDT 24 Apr 23 02:24:24 PM PDT 24 3378106860 ps
T706 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2225354816 Apr 23 02:24:22 PM PDT 24 Apr 23 02:24:25 PM PDT 24 3090499299 ps
T707 /workspace/coverage/default/41.sysrst_ctrl_smoke.508145614 Apr 23 02:23:55 PM PDT 24 Apr 23 02:23:58 PM PDT 24 2130830122 ps
T708 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2844502640 Apr 23 02:24:55 PM PDT 24 Apr 23 02:25:07 PM PDT 24 3822330617 ps
T323 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3341758685 Apr 23 02:23:39 PM PDT 24 Apr 23 02:25:25 PM PDT 24 97188399979 ps
T709 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3124949698 Apr 23 02:22:46 PM PDT 24 Apr 23 02:22:48 PM PDT 24 2490202852 ps
T710 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1650872640 Apr 23 02:22:30 PM PDT 24 Apr 23 02:22:43 PM PDT 24 5027291924 ps
T711 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.461064141 Apr 23 02:23:56 PM PDT 24 Apr 23 02:24:06 PM PDT 24 3572760234 ps
T712 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3914967595 Apr 23 02:22:43 PM PDT 24 Apr 23 02:22:47 PM PDT 24 3226925590 ps
T713 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1641155967 Apr 23 02:22:26 PM PDT 24 Apr 23 02:22:40 PM PDT 24 3034367719 ps
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T731 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2955748548 Apr 23 02:25:05 PM PDT 24 Apr 23 02:25:09 PM PDT 24 2521861632 ps
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T747 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3441651863 Apr 23 02:23:55 PM PDT 24 Apr 23 02:24:03 PM PDT 24 4074730487 ps
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T758 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1758595701 Apr 23 02:22:52 PM PDT 24 Apr 23 02:22:58 PM PDT 24 2615488582 ps
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T328 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1602360612 Apr 23 02:24:23 PM PDT 24 Apr 23 02:25:25 PM PDT 24 48421792062 ps
T764 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.1517591252 Apr 23 02:22:58 PM PDT 24 Apr 23 02:23:01 PM PDT 24 3331101355 ps
T765 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1615577901 Apr 23 02:22:26 PM PDT 24 Apr 23 02:22:29 PM PDT 24 2528043689 ps
T766 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.595035059 Apr 23 02:22:29 PM PDT 24 Apr 23 02:22:34 PM PDT 24 4184427003 ps
T767 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.4161457577 Apr 23 02:23:11 PM PDT 24 Apr 23 02:23:14 PM PDT 24 2627821164 ps
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T769 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.73844877 Apr 23 02:24:30 PM PDT 24 Apr 23 02:24:47 PM PDT 24 113710451883 ps
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T771 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1291109402 Apr 23 02:23:01 PM PDT 24 Apr 23 02:23:50 PM PDT 24 36840785497 ps
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T778 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.381445434 Apr 23 02:23:37 PM PDT 24 Apr 23 02:23:40 PM PDT 24 8967520262 ps
T779 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.802064185 Apr 23 02:22:34 PM PDT 24 Apr 23 02:23:58 PM PDT 24 35138205686 ps
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T781 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1251299205 Apr 23 02:23:37 PM PDT 24 Apr 23 02:23:40 PM PDT 24 2053670683 ps
T782 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3209116611 Apr 23 02:24:04 PM PDT 24 Apr 23 02:24:14 PM PDT 24 3538235591 ps
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T324 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1786101639 Apr 23 02:23:09 PM PDT 24 Apr 23 02:25:07 PM PDT 24 50719066515 ps
T784 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.2383162303 Apr 23 02:23:24 PM PDT 24 Apr 23 02:27:29 PM PDT 24 96762599953 ps
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T785 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.231216969 Apr 23 02:24:19 PM PDT 24 Apr 23 02:24:40 PM PDT 24 37368296415 ps
T786 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.261426418 Apr 23 02:24:19 PM PDT 24 Apr 23 02:24:35 PM PDT 24 5431152591 ps
T787 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3035635222 Apr 23 02:23:24 PM PDT 24 Apr 23 02:23:35 PM PDT 24 3560007941 ps
T788 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1822943128 Apr 23 02:22:48 PM PDT 24 Apr 23 02:22:50 PM PDT 24 4024250374 ps
T789 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2929048030 Apr 23 02:22:44 PM PDT 24 Apr 23 02:22:48 PM PDT 24 3527864723 ps
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T791 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.4051410617 Apr 23 02:23:26 PM PDT 24 Apr 23 02:23:33 PM PDT 24 2461132227 ps
T792 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.2427499870 Apr 23 02:22:42 PM PDT 24 Apr 23 02:22:47 PM PDT 24 2071647891 ps
T793 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.3844442959 Apr 23 02:24:20 PM PDT 24 Apr 23 02:25:55 PM PDT 24 131130348807 ps
T794 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3315412099 Apr 23 02:24:17 PM PDT 24 Apr 23 02:24:22 PM PDT 24 2474793045 ps
T795 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.437831312 Apr 23 02:22:43 PM PDT 24 Apr 23 02:22:52 PM PDT 24 2443088080 ps
T796 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.484590797 Apr 23 02:23:20 PM PDT 24 Apr 23 02:28:11 PM PDT 24 118011561144 ps
T797 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1094352652 Apr 23 02:23:06 PM PDT 24 Apr 23 02:23:09 PM PDT 24 2249958600 ps
T308 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.2363099368 Apr 23 02:22:40 PM PDT 24 Apr 23 02:24:36 PM PDT 24 42009343731 ps
T798 /workspace/coverage/default/25.sysrst_ctrl_alert_test.3767592865 Apr 23 02:23:25 PM PDT 24 Apr 23 02:23:31 PM PDT 24 2012336693 ps
T799 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.411519103 Apr 23 02:24:26 PM PDT 24 Apr 23 02:27:27 PM PDT 24 71329493813 ps
T375 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1263676053 Apr 23 02:22:31 PM PDT 24 Apr 23 02:26:35 PM PDT 24 95141367554 ps
T800 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1185554318 Apr 23 02:23:34 PM PDT 24 Apr 23 02:23:42 PM PDT 24 2514523732 ps
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