T446 |
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.3519962313 |
|
|
Apr 25 12:50:54 PM PDT 24 |
Apr 25 12:51:05 PM PDT 24 |
2613354719 ps |
T350 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3017092371 |
|
|
Apr 25 12:52:06 PM PDT 24 |
Apr 25 12:53:02 PM PDT 24 |
71409482741 ps |
T447 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3321165561 |
|
|
Apr 25 12:50:25 PM PDT 24 |
Apr 25 12:50:30 PM PDT 24 |
2534314426 ps |
T448 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.1408696270 |
|
|
Apr 25 12:51:16 PM PDT 24 |
Apr 25 12:51:20 PM PDT 24 |
2043007429 ps |
T449 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all.1247554988 |
|
|
Apr 25 12:50:55 PM PDT 24 |
Apr 25 12:51:33 PM PDT 24 |
12677043520 ps |
T176 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3685481998 |
|
|
Apr 25 12:51:10 PM PDT 24 |
Apr 25 12:51:50 PM PDT 24 |
137735272527 ps |
T450 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.138236759 |
|
|
Apr 25 12:50:46 PM PDT 24 |
Apr 25 12:50:54 PM PDT 24 |
2009052481 ps |
T451 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2266096874 |
|
|
Apr 25 12:51:57 PM PDT 24 |
Apr 25 12:52:06 PM PDT 24 |
543248676220 ps |
T294 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.971391474 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 12:51:28 PM PDT 24 |
3988905667 ps |
T452 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.147615871 |
|
|
Apr 25 12:51:04 PM PDT 24 |
Apr 25 12:51:08 PM PDT 24 |
2132306702 ps |
T453 |
/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2650883821 |
|
|
Apr 25 12:50:58 PM PDT 24 |
Apr 25 12:51:05 PM PDT 24 |
2159478058 ps |
T454 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.474532490 |
|
|
Apr 25 12:51:24 PM PDT 24 |
Apr 25 12:51:29 PM PDT 24 |
2481477673 ps |
T295 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.1711012221 |
|
|
Apr 25 12:50:34 PM PDT 24 |
Apr 25 12:50:41 PM PDT 24 |
3343649566 ps |
T455 |
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.2919311037 |
|
|
Apr 25 12:51:24 PM PDT 24 |
Apr 25 12:51:28 PM PDT 24 |
3318234651 ps |
T456 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.2639008616 |
|
|
Apr 25 12:50:55 PM PDT 24 |
Apr 25 12:51:02 PM PDT 24 |
2469571148 ps |
T362 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.1771263367 |
|
|
Apr 25 12:50:49 PM PDT 24 |
Apr 25 12:54:37 PM PDT 24 |
89386934537 ps |
T371 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2180894011 |
|
|
Apr 25 12:52:08 PM PDT 24 |
Apr 25 12:56:47 PM PDT 24 |
180138916380 ps |
T457 |
/workspace/coverage/default/3.sysrst_ctrl_smoke.3934349007 |
|
|
Apr 25 12:50:26 PM PDT 24 |
Apr 25 12:50:30 PM PDT 24 |
2137343926 ps |
T275 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.601576325 |
|
|
Apr 25 12:52:02 PM PDT 24 |
Apr 25 12:52:56 PM PDT 24 |
137759505713 ps |
T273 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.131187070 |
|
|
Apr 25 12:50:23 PM PDT 24 |
Apr 25 12:54:59 PM PDT 24 |
105527942971 ps |
T458 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.2371781550 |
|
|
Apr 25 12:51:08 PM PDT 24 |
Apr 25 12:51:13 PM PDT 24 |
2019727571 ps |
T459 |
/workspace/coverage/default/32.sysrst_ctrl_alert_test.2070613089 |
|
|
Apr 25 12:51:18 PM PDT 24 |
Apr 25 12:51:26 PM PDT 24 |
2012304896 ps |
T460 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.538168041 |
|
|
Apr 25 12:51:18 PM PDT 24 |
Apr 25 12:51:30 PM PDT 24 |
5336515585 ps |
T461 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.4281729134 |
|
|
Apr 25 12:52:00 PM PDT 24 |
Apr 25 12:52:05 PM PDT 24 |
2113265255 ps |
T393 |
/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1027373841 |
|
|
Apr 25 12:50:46 PM PDT 24 |
Apr 25 12:55:33 PM PDT 24 |
111755047754 ps |
T462 |
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.4068618763 |
|
|
Apr 25 12:51:07 PM PDT 24 |
Apr 25 12:51:13 PM PDT 24 |
2469661129 ps |
T360 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3420510244 |
|
|
Apr 25 12:51:18 PM PDT 24 |
Apr 25 12:54:57 PM PDT 24 |
85045558218 ps |
T463 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1223148795 |
|
|
Apr 25 12:50:28 PM PDT 24 |
Apr 25 12:50:39 PM PDT 24 |
3372034991 ps |
T464 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2891750967 |
|
|
Apr 25 12:51:00 PM PDT 24 |
Apr 25 12:51:09 PM PDT 24 |
2519574368 ps |
T465 |
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3086039471 |
|
|
Apr 25 12:51:34 PM PDT 24 |
Apr 25 12:51:42 PM PDT 24 |
2048164392 ps |
T301 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.2511890608 |
|
|
Apr 25 12:50:53 PM PDT 24 |
Apr 25 12:51:31 PM PDT 24 |
12983834327 ps |
T466 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3258566952 |
|
|
Apr 25 12:51:44 PM PDT 24 |
Apr 25 12:51:49 PM PDT 24 |
2460120677 ps |
T467 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.1825124519 |
|
|
Apr 25 12:50:21 PM PDT 24 |
Apr 25 12:50:28 PM PDT 24 |
2023618747 ps |
T468 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3392794284 |
|
|
Apr 25 12:51:14 PM PDT 24 |
Apr 25 12:51:18 PM PDT 24 |
2540650190 ps |
T361 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2841286617 |
|
|
Apr 25 12:51:15 PM PDT 24 |
Apr 25 12:54:13 PM PDT 24 |
65796945085 ps |
T116 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.3717973008 |
|
|
Apr 25 12:50:21 PM PDT 24 |
Apr 25 12:50:28 PM PDT 24 |
4025302513 ps |
T177 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.1774034032 |
|
|
Apr 25 12:51:11 PM PDT 24 |
Apr 25 12:51:20 PM PDT 24 |
2111268967 ps |
T178 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2036778589 |
|
|
Apr 25 12:51:41 PM PDT 24 |
Apr 25 12:51:44 PM PDT 24 |
2504752616 ps |
T179 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.821737795 |
|
|
Apr 25 12:51:54 PM PDT 24 |
Apr 25 12:51:57 PM PDT 24 |
2047618498 ps |
T180 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4102030945 |
|
|
Apr 25 12:51:55 PM PDT 24 |
Apr 25 12:51:59 PM PDT 24 |
4248715836 ps |
T181 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1198575038 |
|
|
Apr 25 12:51:26 PM PDT 24 |
Apr 25 12:53:50 PM PDT 24 |
50496384029 ps |
T182 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.759907252 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:51:02 PM PDT 24 |
2453379086 ps |
T183 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3963058419 |
|
|
Apr 25 12:50:43 PM PDT 24 |
Apr 25 12:50:54 PM PDT 24 |
2680515804 ps |
T184 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2137017174 |
|
|
Apr 25 12:52:03 PM PDT 24 |
Apr 25 12:52:07 PM PDT 24 |
4143194776 ps |
T185 |
/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2276256617 |
|
|
Apr 25 12:50:50 PM PDT 24 |
Apr 25 12:50:58 PM PDT 24 |
2508552307 ps |
T221 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3846358348 |
|
|
Apr 25 12:50:45 PM PDT 24 |
Apr 25 12:50:51 PM PDT 24 |
2515602623 ps |
T222 |
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1332767653 |
|
|
Apr 25 12:52:00 PM PDT 24 |
Apr 25 12:52:03 PM PDT 24 |
2458002742 ps |
T223 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2997738063 |
|
|
Apr 25 12:51:55 PM PDT 24 |
Apr 25 12:52:01 PM PDT 24 |
2619139474 ps |
T224 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2840254287 |
|
|
Apr 25 12:51:22 PM PDT 24 |
Apr 25 12:52:15 PM PDT 24 |
65300163842 ps |
T469 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1939475539 |
|
|
Apr 25 12:52:13 PM PDT 24 |
Apr 25 12:52:24 PM PDT 24 |
2510187046 ps |
T470 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.192173842 |
|
|
Apr 25 12:51:45 PM PDT 24 |
Apr 25 12:51:50 PM PDT 24 |
2135666830 ps |
T471 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.539780894 |
|
|
Apr 25 12:51:17 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
2537800495 ps |
T472 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4032235365 |
|
|
Apr 25 12:50:35 PM PDT 24 |
Apr 25 12:50:41 PM PDT 24 |
3350012190 ps |
T172 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2494220590 |
|
|
Apr 25 12:51:32 PM PDT 24 |
Apr 25 12:52:37 PM PDT 24 |
66492954479 ps |
T140 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.188779748 |
|
|
Apr 25 12:51:35 PM PDT 24 |
Apr 25 12:51:40 PM PDT 24 |
5461625941 ps |
T473 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3047522875 |
|
|
Apr 25 12:50:47 PM PDT 24 |
Apr 25 12:50:52 PM PDT 24 |
2163999670 ps |
T141 |
/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3982920322 |
|
|
Apr 25 12:51:05 PM PDT 24 |
Apr 25 12:51:28 PM PDT 24 |
699493412522 ps |
T312 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1382415159 |
|
|
Apr 25 12:51:11 PM PDT 24 |
Apr 25 12:51:28 PM PDT 24 |
467419872523 ps |
T474 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.2703052315 |
|
|
Apr 25 12:51:21 PM PDT 24 |
Apr 25 12:51:31 PM PDT 24 |
2147304175 ps |
T475 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2318153098 |
|
|
Apr 25 12:51:58 PM PDT 24 |
Apr 25 12:52:08 PM PDT 24 |
3069523122 ps |
T476 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3874452020 |
|
|
Apr 25 12:50:26 PM PDT 24 |
Apr 25 12:50:31 PM PDT 24 |
2476071378 ps |
T385 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.3946383131 |
|
|
Apr 25 12:50:47 PM PDT 24 |
Apr 25 12:55:15 PM PDT 24 |
104226599328 ps |
T477 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.807384008 |
|
|
Apr 25 12:51:11 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
2482379874 ps |
T384 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1210277967 |
|
|
Apr 25 12:51:53 PM PDT 24 |
Apr 25 12:52:39 PM PDT 24 |
72462270467 ps |
T478 |
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1486989402 |
|
|
Apr 25 12:51:48 PM PDT 24 |
Apr 25 12:51:58 PM PDT 24 |
2609986604 ps |
T479 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.1024172696 |
|
|
Apr 25 12:50:12 PM PDT 24 |
Apr 25 12:51:02 PM PDT 24 |
16101801371 ps |
T480 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.3489048892 |
|
|
Apr 25 12:51:03 PM PDT 24 |
Apr 25 12:51:06 PM PDT 24 |
2041390352 ps |
T481 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1409789206 |
|
|
Apr 25 12:50:47 PM PDT 24 |
Apr 25 12:50:53 PM PDT 24 |
3760444510 ps |
T482 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all.1151933501 |
|
|
Apr 25 12:50:55 PM PDT 24 |
Apr 25 12:51:05 PM PDT 24 |
8461425068 ps |
T483 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2940892248 |
|
|
Apr 25 12:51:40 PM PDT 24 |
Apr 25 12:51:43 PM PDT 24 |
3058880612 ps |
T484 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.52667741 |
|
|
Apr 25 12:51:00 PM PDT 24 |
Apr 25 12:51:26 PM PDT 24 |
8726897771 ps |
T270 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect.1082520906 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:51:31 PM PDT 24 |
62997816880 ps |
T394 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2833197570 |
|
|
Apr 25 12:52:09 PM PDT 24 |
Apr 25 12:55:05 PM PDT 24 |
63282200116 ps |
T485 |
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1431397956 |
|
|
Apr 25 12:50:28 PM PDT 24 |
Apr 25 12:50:37 PM PDT 24 |
2233717531 ps |
T486 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.199322282 |
|
|
Apr 25 12:50:36 PM PDT 24 |
Apr 25 12:50:42 PM PDT 24 |
2113482923 ps |
T487 |
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.2486886021 |
|
|
Apr 25 12:51:31 PM PDT 24 |
Apr 25 12:51:34 PM PDT 24 |
2030453992 ps |
T488 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.446188576 |
|
|
Apr 25 12:51:43 PM PDT 24 |
Apr 25 12:51:51 PM PDT 24 |
2613503406 ps |
T302 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.2038895342 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:26 PM PDT 24 |
3203608694 ps |
T489 |
/workspace/coverage/default/10.sysrst_ctrl_alert_test.3342120355 |
|
|
Apr 25 12:50:53 PM PDT 24 |
Apr 25 12:51:03 PM PDT 24 |
2012721393 ps |
T490 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2453922832 |
|
|
Apr 25 12:51:00 PM PDT 24 |
Apr 25 12:51:11 PM PDT 24 |
2465802544 ps |
T491 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.322002527 |
|
|
Apr 25 12:50:40 PM PDT 24 |
Apr 25 12:50:46 PM PDT 24 |
3327234291 ps |
T492 |
/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2155905781 |
|
|
Apr 25 12:51:05 PM PDT 24 |
Apr 25 12:51:09 PM PDT 24 |
2639579111 ps |
T253 |
/workspace/coverage/default/0.sysrst_ctrl_edge_detect.2554268366 |
|
|
Apr 25 12:50:19 PM PDT 24 |
Apr 25 12:50:26 PM PDT 24 |
2802319334 ps |
T493 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3993786119 |
|
|
Apr 25 12:50:39 PM PDT 24 |
Apr 25 12:50:49 PM PDT 24 |
32635461740 ps |
T494 |
/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1679622999 |
|
|
Apr 25 12:51:24 PM PDT 24 |
Apr 25 12:51:37 PM PDT 24 |
3601489563 ps |
T296 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.252006051 |
|
|
Apr 25 12:50:28 PM PDT 24 |
Apr 25 12:53:50 PM PDT 24 |
78767825981 ps |
T495 |
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1842007758 |
|
|
Apr 25 12:51:42 PM PDT 24 |
Apr 25 12:51:47 PM PDT 24 |
2529356558 ps |
T496 |
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1466651266 |
|
|
Apr 25 12:51:30 PM PDT 24 |
Apr 25 12:51:34 PM PDT 24 |
3551361131 ps |
T382 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3041754015 |
|
|
Apr 25 12:52:07 PM PDT 24 |
Apr 25 12:57:41 PM PDT 24 |
117670458104 ps |
T113 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3291578448 |
|
|
Apr 25 12:52:01 PM PDT 24 |
Apr 25 12:52:51 PM PDT 24 |
70799197722 ps |
T497 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.3357993963 |
|
|
Apr 25 12:50:55 PM PDT 24 |
Apr 25 12:51:09 PM PDT 24 |
3365696679 ps |
T498 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2050068458 |
|
|
Apr 25 12:51:48 PM PDT 24 |
Apr 25 12:51:58 PM PDT 24 |
2474773034 ps |
T499 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.4042580135 |
|
|
Apr 25 12:50:28 PM PDT 24 |
Apr 25 01:03:39 PM PDT 24 |
1060919433706 ps |
T500 |
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2074687921 |
|
|
Apr 25 12:50:13 PM PDT 24 |
Apr 25 12:50:25 PM PDT 24 |
2608917783 ps |
T208 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2351674440 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:29 PM PDT 24 |
5421116839 ps |
T501 |
/workspace/coverage/default/4.sysrst_ctrl_alert_test.212758014 |
|
|
Apr 25 12:50:50 PM PDT 24 |
Apr 25 12:50:54 PM PDT 24 |
2029639789 ps |
T502 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2993898494 |
|
|
Apr 25 12:51:57 PM PDT 24 |
Apr 25 12:52:06 PM PDT 24 |
2511068862 ps |
T503 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1896414208 |
|
|
Apr 25 12:51:13 PM PDT 24 |
Apr 25 12:51:16 PM PDT 24 |
2101198855 ps |
T504 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.2964595299 |
|
|
Apr 25 12:51:53 PM PDT 24 |
Apr 25 12:51:56 PM PDT 24 |
2131994599 ps |
T505 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3652002494 |
|
|
Apr 25 12:51:53 PM PDT 24 |
Apr 25 12:52:02 PM PDT 24 |
2507867339 ps |
T209 |
/workspace/coverage/default/1.sysrst_ctrl_edge_detect.1744818174 |
|
|
Apr 25 12:50:27 PM PDT 24 |
Apr 25 12:50:39 PM PDT 24 |
4131707790 ps |
T506 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3850784078 |
|
|
Apr 25 12:51:15 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
2612416087 ps |
T142 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all.2812729514 |
|
|
Apr 25 12:50:47 PM PDT 24 |
Apr 25 12:50:56 PM PDT 24 |
12069391808 ps |
T507 |
/workspace/coverage/default/22.sysrst_ctrl_smoke.1937098799 |
|
|
Apr 25 12:51:13 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
2109856762 ps |
T508 |
/workspace/coverage/default/48.sysrst_ctrl_alert_test.133088413 |
|
|
Apr 25 12:51:56 PM PDT 24 |
Apr 25 12:52:00 PM PDT 24 |
2023295732 ps |
T509 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1412539710 |
|
|
Apr 25 12:51:40 PM PDT 24 |
Apr 25 12:54:55 PM PDT 24 |
81051934600 ps |
T510 |
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2302569822 |
|
|
Apr 25 12:51:25 PM PDT 24 |
Apr 25 12:51:34 PM PDT 24 |
2508009429 ps |
T375 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.118955061 |
|
|
Apr 25 12:51:59 PM PDT 24 |
Apr 25 12:56:23 PM PDT 24 |
91312255619 ps |
T511 |
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3496450396 |
|
|
Apr 25 12:51:00 PM PDT 24 |
Apr 25 12:51:05 PM PDT 24 |
2202341634 ps |
T512 |
/workspace/coverage/default/34.sysrst_ctrl_smoke.1921410399 |
|
|
Apr 25 12:51:25 PM PDT 24 |
Apr 25 12:51:29 PM PDT 24 |
2122879602 ps |
T513 |
/workspace/coverage/default/29.sysrst_ctrl_smoke.3769253431 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:24 PM PDT 24 |
2159413463 ps |
T514 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1926839318 |
|
|
Apr 25 12:51:47 PM PDT 24 |
Apr 25 12:51:51 PM PDT 24 |
2056833158 ps |
T133 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.168795122 |
|
|
Apr 25 12:51:18 PM PDT 24 |
Apr 25 12:52:15 PM PDT 24 |
82230430571 ps |
T515 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1228773882 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 12:51:30 PM PDT 24 |
2073960951 ps |
T119 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3963342573 |
|
|
Apr 25 12:50:54 PM PDT 24 |
Apr 25 12:51:02 PM PDT 24 |
10989997072 ps |
T516 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2353977356 |
|
|
Apr 25 12:50:26 PM PDT 24 |
Apr 25 12:50:32 PM PDT 24 |
2334450340 ps |
T517 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3130662346 |
|
|
Apr 25 12:50:47 PM PDT 24 |
Apr 25 12:50:51 PM PDT 24 |
2105209470 ps |
T186 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1070232338 |
|
|
Apr 25 12:51:46 PM PDT 24 |
Apr 25 12:54:40 PM PDT 24 |
72057612143 ps |
T356 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.4460210 |
|
|
Apr 25 12:52:19 PM PDT 24 |
Apr 25 12:53:18 PM PDT 24 |
87208082833 ps |
T518 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.1173483650 |
|
|
Apr 25 12:51:10 PM PDT 24 |
Apr 25 12:51:15 PM PDT 24 |
2020416489 ps |
T353 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.3506113924 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:53:33 PM PDT 24 |
174740320674 ps |
T519 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.1510601077 |
|
|
Apr 25 12:51:25 PM PDT 24 |
Apr 25 12:51:45 PM PDT 24 |
13256524252 ps |
T60 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.346677449 |
|
|
Apr 25 12:50:05 PM PDT 24 |
Apr 25 12:51:33 PM PDT 24 |
36258028545 ps |
T520 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.423485907 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:51:08 PM PDT 24 |
2609363707 ps |
T372 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2238374258 |
|
|
Apr 25 12:51:35 PM PDT 24 |
Apr 25 12:54:09 PM PDT 24 |
117892280499 ps |
T278 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2333216492 |
|
|
Apr 25 12:51:26 PM PDT 24 |
Apr 25 12:58:20 PM PDT 24 |
159276032391 ps |
T134 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect.3521549165 |
|
|
Apr 25 12:50:45 PM PDT 24 |
Apr 25 12:51:33 PM PDT 24 |
76272415423 ps |
T521 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all.2526635301 |
|
|
Apr 25 12:51:05 PM PDT 24 |
Apr 25 12:51:32 PM PDT 24 |
10675529589 ps |
T386 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1819984639 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 12:52:21 PM PDT 24 |
69484395632 ps |
T522 |
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1770197675 |
|
|
Apr 25 12:52:16 PM PDT 24 |
Apr 25 12:54:14 PM PDT 24 |
88724861036 ps |
T523 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3454548672 |
|
|
Apr 25 12:50:45 PM PDT 24 |
Apr 25 12:52:38 PM PDT 24 |
41453889027 ps |
T309 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1584881942 |
|
|
Apr 25 12:50:57 PM PDT 24 |
Apr 25 12:51:05 PM PDT 24 |
2515052802 ps |
T524 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.682180788 |
|
|
Apr 25 12:50:34 PM PDT 24 |
Apr 25 12:50:37 PM PDT 24 |
5312354067 ps |
T525 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.2153795367 |
|
|
Apr 25 12:51:45 PM PDT 24 |
Apr 25 12:54:54 PM PDT 24 |
71567275530 ps |
T526 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.2189166197 |
|
|
Apr 25 12:50:21 PM PDT 24 |
Apr 25 12:50:32 PM PDT 24 |
2407687797 ps |
T310 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.4069402595 |
|
|
Apr 25 12:50:45 PM PDT 24 |
Apr 25 12:50:50 PM PDT 24 |
2525857680 ps |
T527 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1800059283 |
|
|
Apr 25 12:50:43 PM PDT 24 |
Apr 25 12:50:48 PM PDT 24 |
3132433999 ps |
T528 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.1331591701 |
|
|
Apr 25 12:51:45 PM PDT 24 |
Apr 25 12:52:05 PM PDT 24 |
11562699503 ps |
T143 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1843528766 |
|
|
Apr 25 12:50:45 PM PDT 24 |
Apr 25 12:51:43 PM PDT 24 |
81933980238 ps |
T212 |
/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1982111251 |
|
|
Apr 25 12:50:16 PM PDT 24 |
Apr 25 12:50:26 PM PDT 24 |
2205936142 ps |
T213 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3592186467 |
|
|
Apr 25 12:51:01 PM PDT 24 |
Apr 25 12:54:35 PM PDT 24 |
77154088913 ps |
T214 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2561883755 |
|
|
Apr 25 12:51:39 PM PDT 24 |
Apr 25 12:51:44 PM PDT 24 |
2474951672 ps |
T215 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.308982249 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:58:14 PM PDT 24 |
181703685729 ps |
T120 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2562776706 |
|
|
Apr 25 12:51:47 PM PDT 24 |
Apr 25 12:51:53 PM PDT 24 |
8448030810 ps |
T216 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all.485895125 |
|
|
Apr 25 12:50:46 PM PDT 24 |
Apr 25 12:51:26 PM PDT 24 |
18589932220 ps |
T217 |
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.104905014 |
|
|
Apr 25 12:51:44 PM PDT 24 |
Apr 25 12:51:50 PM PDT 24 |
2217805821 ps |
T218 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.3572895188 |
|
|
Apr 25 12:50:25 PM PDT 24 |
Apr 25 12:50:37 PM PDT 24 |
3083748443 ps |
T219 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1798167816 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:53:08 PM PDT 24 |
48722276770 ps |
T392 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1556759723 |
|
|
Apr 25 12:51:14 PM PDT 24 |
Apr 25 12:51:51 PM PDT 24 |
56258501619 ps |
T529 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1185635806 |
|
|
Apr 25 12:50:10 PM PDT 24 |
Apr 25 12:50:16 PM PDT 24 |
3848771387 ps |
T381 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.4096731442 |
|
|
Apr 25 12:52:11 PM PDT 24 |
Apr 25 12:53:16 PM PDT 24 |
118466998875 ps |
T530 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3932565712 |
|
|
Apr 25 12:52:03 PM PDT 24 |
Apr 25 12:52:11 PM PDT 24 |
2055213510 ps |
T531 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1779899107 |
|
|
Apr 25 12:51:43 PM PDT 24 |
Apr 25 12:51:55 PM PDT 24 |
9121623963 ps |
T532 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.2666579991 |
|
|
Apr 25 12:50:29 PM PDT 24 |
Apr 25 12:50:44 PM PDT 24 |
69337488116 ps |
T533 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.3274369053 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:24 PM PDT 24 |
2164809362 ps |
T297 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3091579919 |
|
|
Apr 25 12:50:33 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
246928096960 ps |
T534 |
/workspace/coverage/default/19.sysrst_ctrl_alert_test.263609974 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 12:51:29 PM PDT 24 |
2013016565 ps |
T535 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3614350292 |
|
|
Apr 25 12:52:32 PM PDT 24 |
Apr 25 12:52:53 PM PDT 24 |
25848195010 ps |
T187 |
/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.161883536 |
|
|
Apr 25 12:50:44 PM PDT 24 |
Apr 25 12:51:12 PM PDT 24 |
45820240369 ps |
T536 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3575163517 |
|
|
Apr 25 12:51:36 PM PDT 24 |
Apr 25 12:51:39 PM PDT 24 |
2169360732 ps |
T379 |
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1701607081 |
|
|
Apr 25 12:52:09 PM PDT 24 |
Apr 25 12:52:38 PM PDT 24 |
44476303767 ps |
T276 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.3996453049 |
|
|
Apr 25 12:51:06 PM PDT 24 |
Apr 25 12:55:31 PM PDT 24 |
102012244052 ps |
T537 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.4216058383 |
|
|
Apr 25 12:50:55 PM PDT 24 |
Apr 25 12:51:02 PM PDT 24 |
3108033905 ps |
T538 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.3416354672 |
|
|
Apr 25 12:51:18 PM PDT 24 |
Apr 25 12:51:32 PM PDT 24 |
3873825120 ps |
T539 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.798319004 |
|
|
Apr 25 12:50:51 PM PDT 24 |
Apr 25 12:51:34 PM PDT 24 |
27340787513 ps |
T540 |
/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3953086030 |
|
|
Apr 25 12:50:48 PM PDT 24 |
Apr 25 12:51:01 PM PDT 24 |
4380919471 ps |
T233 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1336424966 |
|
|
Apr 25 12:52:05 PM PDT 24 |
Apr 25 12:52:30 PM PDT 24 |
35463617912 ps |
T541 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.2763895765 |
|
|
Apr 25 12:51:10 PM PDT 24 |
Apr 25 12:52:32 PM PDT 24 |
63327455257 ps |
T93 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.199812535 |
|
|
Apr 25 12:50:21 PM PDT 24 |
Apr 25 12:50:40 PM PDT 24 |
22057541357 ps |
T251 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.2415077645 |
|
|
Apr 25 12:51:16 PM PDT 24 |
Apr 25 12:51:44 PM PDT 24 |
13219282251 ps |
T283 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.1534179494 |
|
|
Apr 25 12:51:17 PM PDT 24 |
Apr 25 12:51:24 PM PDT 24 |
4185506063 ps |
T284 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.3992112418 |
|
|
Apr 25 12:50:37 PM PDT 24 |
Apr 25 12:50:44 PM PDT 24 |
2112632563 ps |
T285 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1193689467 |
|
|
Apr 25 12:51:18 PM PDT 24 |
Apr 25 12:51:22 PM PDT 24 |
3078315285 ps |
T286 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1636320722 |
|
|
Apr 25 12:51:59 PM PDT 24 |
Apr 25 12:52:04 PM PDT 24 |
2515351525 ps |
T287 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.132244517 |
|
|
Apr 25 12:51:16 PM PDT 24 |
Apr 25 12:51:20 PM PDT 24 |
2743591382 ps |
T288 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.2276668671 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:29 PM PDT 24 |
2508536228 ps |
T289 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3164762109 |
|
|
Apr 25 12:51:18 PM PDT 24 |
Apr 25 12:51:25 PM PDT 24 |
2615836806 ps |
T290 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3127507271 |
|
|
Apr 25 12:50:30 PM PDT 24 |
Apr 25 01:03:04 PM PDT 24 |
307331441477 ps |
T542 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1113260659 |
|
|
Apr 25 12:51:48 PM PDT 24 |
Apr 25 12:51:52 PM PDT 24 |
2297943538 ps |
T349 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3375612206 |
|
|
Apr 25 12:50:43 PM PDT 24 |
Apr 25 12:51:22 PM PDT 24 |
51740092227 ps |
T226 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2621574530 |
|
|
Apr 25 12:51:41 PM PDT 24 |
Apr 25 12:51:45 PM PDT 24 |
4428508525 ps |
T543 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.4225132787 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 12:51:27 PM PDT 24 |
2616980360 ps |
T188 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2098676579 |
|
|
Apr 25 12:50:47 PM PDT 24 |
Apr 25 12:51:19 PM PDT 24 |
22360044066 ps |
T544 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.238779771 |
|
|
Apr 25 12:51:36 PM PDT 24 |
Apr 25 12:51:44 PM PDT 24 |
2262802357 ps |
T545 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.2511774084 |
|
|
Apr 25 12:51:30 PM PDT 24 |
Apr 25 12:51:38 PM PDT 24 |
2201434279 ps |
T546 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3711882578 |
|
|
Apr 25 12:51:24 PM PDT 24 |
Apr 25 12:51:32 PM PDT 24 |
4184726497 ps |
T148 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.219819384 |
|
|
Apr 25 12:50:58 PM PDT 24 |
Apr 25 12:53:56 PM PDT 24 |
949570662934 ps |
T547 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3751150655 |
|
|
Apr 25 12:50:32 PM PDT 24 |
Apr 25 12:50:36 PM PDT 24 |
2556820370 ps |
T548 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.3262206528 |
|
|
Apr 25 12:51:33 PM PDT 24 |
Apr 25 12:58:12 PM PDT 24 |
150820088006 ps |
T374 |
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.134932086 |
|
|
Apr 25 12:52:03 PM PDT 24 |
Apr 25 12:54:58 PM PDT 24 |
66089299264 ps |
T359 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.3450658609 |
|
|
Apr 25 12:50:36 PM PDT 24 |
Apr 25 12:55:40 PM PDT 24 |
119405209967 ps |
T189 |
/workspace/coverage/default/15.sysrst_ctrl_edge_detect.2108768133 |
|
|
Apr 25 12:50:44 PM PDT 24 |
Apr 25 12:50:53 PM PDT 24 |
3518317346 ps |
T549 |
/workspace/coverage/default/46.sysrst_ctrl_smoke.2080506704 |
|
|
Apr 25 12:52:00 PM PDT 24 |
Apr 25 12:52:08 PM PDT 24 |
2112887404 ps |
T550 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1542130508 |
|
|
Apr 25 12:52:03 PM PDT 24 |
Apr 25 12:52:09 PM PDT 24 |
2516574669 ps |
T551 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.292951249 |
|
|
Apr 25 12:52:06 PM PDT 24 |
Apr 25 12:52:18 PM PDT 24 |
3641195746 ps |
T552 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.4244303893 |
|
|
Apr 25 12:51:54 PM PDT 24 |
Apr 25 12:52:03 PM PDT 24 |
2613465860 ps |
T553 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.529512844 |
|
|
Apr 25 12:50:26 PM PDT 24 |
Apr 25 12:50:31 PM PDT 24 |
2632341366 ps |
T554 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2909072935 |
|
|
Apr 25 12:50:25 PM PDT 24 |
Apr 25 12:50:31 PM PDT 24 |
2298794103 ps |
T555 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1534753678 |
|
|
Apr 25 12:51:56 PM PDT 24 |
Apr 25 12:53:10 PM PDT 24 |
26582144380 ps |
T556 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2375533036 |
|
|
Apr 25 12:52:04 PM PDT 24 |
Apr 25 12:53:11 PM PDT 24 |
26081715766 ps |
T557 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.2918435365 |
|
|
Apr 25 12:50:47 PM PDT 24 |
Apr 25 12:50:52 PM PDT 24 |
3246136388 ps |
T558 |
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.1803125055 |
|
|
Apr 25 12:51:25 PM PDT 24 |
Apr 25 12:51:30 PM PDT 24 |
2624569182 ps |
T559 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3980255915 |
|
|
Apr 25 12:50:21 PM PDT 24 |
Apr 25 12:50:27 PM PDT 24 |
2492172354 ps |
T94 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.279894915 |
|
|
Apr 25 12:50:20 PM PDT 24 |
Apr 25 12:52:09 PM PDT 24 |
42013112892 ps |
T560 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.2447287183 |
|
|
Apr 25 12:51:28 PM PDT 24 |
Apr 25 12:51:37 PM PDT 24 |
2458899506 ps |
T376 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.3879483152 |
|
|
Apr 25 12:51:34 PM PDT 24 |
Apr 25 12:54:20 PM PDT 24 |
63199746533 ps |
T561 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.400214123 |
|
|
Apr 25 12:51:48 PM PDT 24 |
Apr 25 12:51:56 PM PDT 24 |
3206938799 ps |
T354 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3017917514 |
|
|
Apr 25 12:52:23 PM PDT 24 |
Apr 25 12:58:01 PM PDT 24 |
121058206542 ps |
T562 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.3347902690 |
|
|
Apr 25 12:51:41 PM PDT 24 |
Apr 25 12:51:49 PM PDT 24 |
2112430813 ps |
T227 |
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3589065989 |
|
|
Apr 25 12:51:55 PM PDT 24 |
Apr 25 01:04:15 PM PDT 24 |
1083648991479 ps |
T563 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1307586114 |
|
|
Apr 25 12:50:51 PM PDT 24 |
Apr 25 12:51:02 PM PDT 24 |
2749037669 ps |
T564 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2989367739 |
|
|
Apr 25 12:50:51 PM PDT 24 |
Apr 25 12:51:01 PM PDT 24 |
2191183958 ps |
T565 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.2168349953 |
|
|
Apr 25 12:51:23 PM PDT 24 |
Apr 25 12:51:28 PM PDT 24 |
2138455563 ps |
T566 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2995481183 |
|
|
Apr 25 12:51:42 PM PDT 24 |
Apr 25 12:51:51 PM PDT 24 |
2614127087 ps |
T567 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.1254642233 |
|
|
Apr 25 12:51:11 PM PDT 24 |
Apr 25 12:51:15 PM PDT 24 |
2395199721 ps |
T234 |
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.4224104670 |
|
|
Apr 25 12:51:06 PM PDT 24 |
Apr 25 12:51:18 PM PDT 24 |
3654316906 ps |
T388 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1785207306 |
|
|
Apr 25 12:50:54 PM PDT 24 |
Apr 25 12:51:17 PM PDT 24 |
27858371434 ps |
T568 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3451876172 |
|
|
Apr 25 12:50:49 PM PDT 24 |
Apr 25 12:50:53 PM PDT 24 |
2233064081 ps |
T569 |
/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2277137005 |
|
|
Apr 25 12:50:49 PM PDT 24 |
Apr 25 12:57:36 PM PDT 24 |
170495422916 ps |
T570 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3004316981 |
|
|
Apr 25 12:52:11 PM PDT 24 |
Apr 25 12:52:50 PM PDT 24 |
22584073726 ps |
T571 |
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.1580181168 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 12:51:29 PM PDT 24 |
2183969768 ps |
T572 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.702963246 |
|
|
Apr 25 12:50:55 PM PDT 24 |
Apr 25 12:51:01 PM PDT 24 |
3138366998 ps |
T573 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.3190269569 |
|
|
Apr 25 12:50:42 PM PDT 24 |
Apr 25 12:54:11 PM PDT 24 |
79306032112 ps |
T574 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.188876239 |
|
|
Apr 25 12:50:41 PM PDT 24 |
Apr 25 12:50:43 PM PDT 24 |
2237930290 ps |
T575 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.977452196 |
|
|
Apr 25 12:50:27 PM PDT 24 |
Apr 25 12:50:33 PM PDT 24 |
2473839166 ps |
T190 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3286951047 |
|
|
Apr 25 12:51:15 PM PDT 24 |
Apr 25 12:52:42 PM PDT 24 |
72597512585 ps |
T576 |
/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.195270544 |
|
|
Apr 25 12:50:53 PM PDT 24 |
Apr 25 12:51:06 PM PDT 24 |
3433067472 ps |
T577 |
/workspace/coverage/default/42.sysrst_ctrl_smoke.4048147582 |
|
|
Apr 25 12:51:44 PM PDT 24 |
Apr 25 12:51:50 PM PDT 24 |
2117889784 ps |
T578 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3279629084 |
|
|
Apr 25 12:51:33 PM PDT 24 |
Apr 25 12:51:37 PM PDT 24 |
2539850956 ps |
T173 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2998075691 |
|
|
Apr 25 12:51:52 PM PDT 24 |
Apr 25 12:53:05 PM PDT 24 |
50178328768 ps |
T579 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1774266524 |
|
|
Apr 25 12:51:21 PM PDT 24 |
Apr 25 12:51:28 PM PDT 24 |
7484443345 ps |
T580 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.3474085675 |
|
|
Apr 25 12:51:29 PM PDT 24 |
Apr 25 12:51:36 PM PDT 24 |
2011837489 ps |
T298 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2496096497 |
|
|
Apr 25 12:51:51 PM PDT 24 |
Apr 25 12:53:30 PM PDT 24 |
40436740316 ps |
T581 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.1440983839 |
|
|
Apr 25 12:50:50 PM PDT 24 |
Apr 25 12:50:53 PM PDT 24 |
2231280621 ps |
T582 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.976557411 |
|
|
Apr 25 12:51:59 PM PDT 24 |
Apr 25 12:52:04 PM PDT 24 |
2015393180 ps |
T583 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.642923328 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:51:03 PM PDT 24 |
2536339884 ps |
T95 |
/workspace/coverage/default/3.sysrst_ctrl_sec_cm.1100124701 |
|
|
Apr 25 12:50:33 PM PDT 24 |
Apr 25 12:50:49 PM PDT 24 |
22077107257 ps |
T584 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3774480308 |
|
|
Apr 25 12:50:19 PM PDT 24 |
Apr 25 12:50:33 PM PDT 24 |
3307738991 ps |
T585 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3450059248 |
|
|
Apr 25 12:52:02 PM PDT 24 |
Apr 25 12:53:15 PM PDT 24 |
55191270492 ps |
T586 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2856042130 |
|
|
Apr 25 12:50:31 PM PDT 24 |
Apr 25 12:50:35 PM PDT 24 |
5249989352 ps |
T220 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.4151277764 |
|
|
Apr 25 12:51:40 PM PDT 24 |
Apr 25 12:54:08 PM PDT 24 |
1567383869285 ps |
T587 |
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.21788010 |
|
|
Apr 25 12:51:06 PM PDT 24 |
Apr 25 12:51:10 PM PDT 24 |
2632542422 ps |
T588 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.820132352 |
|
|
Apr 25 12:51:04 PM PDT 24 |
Apr 25 12:51:09 PM PDT 24 |
2228768952 ps |
T589 |
/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1946290832 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 12:51:25 PM PDT 24 |
2049118086 ps |
T244 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1456747769 |
|
|
Apr 25 12:50:46 PM PDT 24 |
Apr 25 12:50:55 PM PDT 24 |
15717110051 ps |
T590 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.3923816551 |
|
|
Apr 25 12:50:54 PM PDT 24 |
Apr 25 12:51:05 PM PDT 24 |
2464293116 ps |
T591 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all.1392784628 |
|
|
Apr 25 12:51:10 PM PDT 24 |
Apr 25 12:51:52 PM PDT 24 |
13655975484 ps |
T592 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.4004982716 |
|
|
Apr 25 12:51:10 PM PDT 24 |
Apr 25 12:51:19 PM PDT 24 |
2236606161 ps |
T593 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.2209012768 |
|
|
Apr 25 12:51:25 PM PDT 24 |
Apr 25 12:51:40 PM PDT 24 |
11753912119 ps |
T594 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1622805972 |
|
|
Apr 25 12:51:55 PM PDT 24 |
Apr 25 12:51:59 PM PDT 24 |
2033555225 ps |