| T595 |
/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.897573780 |
|
|
Apr 25 12:50:33 PM PDT 24 |
Apr 25 12:50:38 PM PDT 24 |
7592900842 ps |
| T596 |
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3082268370 |
|
|
Apr 25 12:52:02 PM PDT 24 |
Apr 25 12:52:08 PM PDT 24 |
5251318181 ps |
| T597 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.393501904 |
|
|
Apr 25 12:50:37 PM PDT 24 |
Apr 25 12:50:46 PM PDT 24 |
2611388212 ps |
| T598 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.217127664 |
|
|
Apr 25 12:50:27 PM PDT 24 |
Apr 25 12:50:32 PM PDT 24 |
2635363338 ps |
| T599 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.1920246479 |
|
|
Apr 25 12:51:38 PM PDT 24 |
Apr 25 12:51:41 PM PDT 24 |
2975396164 ps |
| T600 |
/workspace/coverage/default/24.sysrst_ctrl_edge_detect.1755142592 |
|
|
Apr 25 12:51:11 PM PDT 24 |
Apr 25 12:51:22 PM PDT 24 |
3485232824 ps |
| T601 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2470147519 |
|
|
Apr 25 12:51:30 PM PDT 24 |
Apr 25 12:51:33 PM PDT 24 |
2470862081 ps |
| T602 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.4002734021 |
|
|
Apr 25 12:50:21 PM PDT 24 |
Apr 25 12:50:29 PM PDT 24 |
2620824453 ps |
| T603 |
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1025003736 |
|
|
Apr 25 12:50:37 PM PDT 24 |
Apr 25 12:50:46 PM PDT 24 |
2465545777 ps |
| T604 |
/workspace/coverage/default/21.sysrst_ctrl_alert_test.2257067119 |
|
|
Apr 25 12:50:57 PM PDT 24 |
Apr 25 12:51:03 PM PDT 24 |
2035454972 ps |
| T255 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.4265402376 |
|
|
Apr 25 12:50:34 PM PDT 24 |
Apr 25 12:50:47 PM PDT 24 |
6047178979 ps |
| T210 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1954820250 |
|
|
Apr 25 12:51:14 PM PDT 24 |
Apr 25 12:52:33 PM PDT 24 |
141764888971 ps |
| T228 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.3960060268 |
|
|
Apr 25 12:51:29 PM PDT 24 |
Apr 25 12:51:32 PM PDT 24 |
4796077667 ps |
| T605 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all.1490186021 |
|
|
Apr 25 12:51:23 PM PDT 24 |
Apr 25 12:52:05 PM PDT 24 |
13862011829 ps |
| T606 |
/workspace/coverage/default/35.sysrst_ctrl_smoke.653505018 |
|
|
Apr 25 12:51:34 PM PDT 24 |
Apr 25 12:51:42 PM PDT 24 |
2112275786 ps |
| T607 |
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.2850149387 |
|
|
Apr 25 12:51:42 PM PDT 24 |
Apr 25 12:51:45 PM PDT 24 |
2595061910 ps |
| T608 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all.2308425436 |
|
|
Apr 25 12:50:32 PM PDT 24 |
Apr 25 12:50:54 PM PDT 24 |
7094361151 ps |
| T609 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1719104368 |
|
|
Apr 25 12:51:09 PM PDT 24 |
Apr 25 12:51:12 PM PDT 24 |
2255353373 ps |
| T610 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3497116009 |
|
|
Apr 25 12:50:40 PM PDT 24 |
Apr 25 12:50:45 PM PDT 24 |
2022011175 ps |
| T611 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.4192935638 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:51:10 PM PDT 24 |
14574549728 ps |
| T612 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.704695268 |
|
|
Apr 25 12:51:48 PM PDT 24 |
Apr 25 12:54:13 PM PDT 24 |
210251094946 ps |
| T613 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2914996405 |
|
|
Apr 25 12:50:49 PM PDT 24 |
Apr 25 12:50:52 PM PDT 24 |
2178529685 ps |
| T614 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1460865925 |
|
|
Apr 25 12:51:57 PM PDT 24 |
Apr 25 12:52:10 PM PDT 24 |
11637268302 ps |
| T615 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2672406004 |
|
|
Apr 25 12:52:12 PM PDT 24 |
Apr 25 12:52:39 PM PDT 24 |
34931686933 ps |
| T389 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2788634577 |
|
|
Apr 25 12:50:26 PM PDT 24 |
Apr 25 12:51:26 PM PDT 24 |
22581448112 ps |
| T616 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.4272193088 |
|
|
Apr 25 12:51:55 PM PDT 24 |
Apr 25 12:51:59 PM PDT 24 |
2484962597 ps |
| T617 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1476804736 |
|
|
Apr 25 12:50:55 PM PDT 24 |
Apr 25 12:51:34 PM PDT 24 |
26838032747 ps |
| T618 |
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.319665059 |
|
|
Apr 25 12:51:47 PM PDT 24 |
Apr 25 12:51:57 PM PDT 24 |
2513015366 ps |
| T619 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.1213464064 |
|
|
Apr 25 12:51:09 PM PDT 24 |
Apr 25 12:51:16 PM PDT 24 |
2064596798 ps |
| T620 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.3989619543 |
|
|
Apr 25 12:50:22 PM PDT 24 |
Apr 25 12:50:31 PM PDT 24 |
2113196904 ps |
| T621 |
/workspace/coverage/default/14.sysrst_ctrl_alert_test.1450462220 |
|
|
Apr 25 12:51:06 PM PDT 24 |
Apr 25 12:51:11 PM PDT 24 |
2016244463 ps |
| T622 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.896190223 |
|
|
Apr 25 12:51:13 PM PDT 24 |
Apr 25 12:51:25 PM PDT 24 |
3937229649 ps |
| T358 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2799858334 |
|
|
Apr 25 12:51:41 PM PDT 24 |
Apr 25 12:57:32 PM PDT 24 |
131291743917 ps |
| T623 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.382954099 |
|
|
Apr 25 12:51:55 PM PDT 24 |
Apr 25 12:52:06 PM PDT 24 |
3564141219 ps |
| T624 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.554034625 |
|
|
Apr 25 12:50:59 PM PDT 24 |
Apr 25 12:51:07 PM PDT 24 |
2616924777 ps |
| T625 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3266563894 |
|
|
Apr 25 12:51:32 PM PDT 24 |
Apr 25 12:51:37 PM PDT 24 |
5292638722 ps |
| T230 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.1234074396 |
|
|
Apr 25 12:51:13 PM PDT 24 |
Apr 25 12:54:58 PM PDT 24 |
949253833742 ps |
| T626 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.5420330 |
|
|
Apr 25 12:51:48 PM PDT 24 |
Apr 25 12:51:54 PM PDT 24 |
2616027056 ps |
| T627 |
/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2504911473 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:24 PM PDT 24 |
2531953486 ps |
| T628 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3222217665 |
|
|
Apr 25 12:50:40 PM PDT 24 |
Apr 25 12:50:48 PM PDT 24 |
3629574130 ps |
| T629 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.4024879300 |
|
|
Apr 25 12:50:26 PM PDT 24 |
Apr 25 12:50:31 PM PDT 24 |
2219339186 ps |
| T630 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.1870669121 |
|
|
Apr 25 12:51:26 PM PDT 24 |
Apr 25 12:51:32 PM PDT 24 |
2803532260 ps |
| T631 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3543401141 |
|
|
Apr 25 12:50:54 PM PDT 24 |
Apr 25 12:51:00 PM PDT 24 |
2533201065 ps |
| T632 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.1788897340 |
|
|
Apr 25 12:51:23 PM PDT 24 |
Apr 25 12:51:27 PM PDT 24 |
3822014150 ps |
| T633 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.2441790066 |
|
|
Apr 25 12:50:53 PM PDT 24 |
Apr 25 12:51:18 PM PDT 24 |
7283413018 ps |
| T634 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.2899824314 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:31 PM PDT 24 |
13960836064 ps |
| T635 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2735839695 |
|
|
Apr 25 12:51:17 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
2528289640 ps |
| T636 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.182907405 |
|
|
Apr 25 12:51:39 PM PDT 24 |
Apr 25 12:51:44 PM PDT 24 |
4806043053 ps |
| T637 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.4107248972 |
|
|
Apr 25 12:51:07 PM PDT 24 |
Apr 25 12:52:33 PM PDT 24 |
120966630386 ps |
| T638 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.4216144669 |
|
|
Apr 25 12:52:10 PM PDT 24 |
Apr 25 12:53:13 PM PDT 24 |
42867166227 ps |
| T639 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1982359039 |
|
|
Apr 25 12:50:50 PM PDT 24 |
Apr 25 12:50:54 PM PDT 24 |
2182324405 ps |
| T640 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.1259510134 |
|
|
Apr 25 12:51:16 PM PDT 24 |
Apr 25 12:53:25 PM PDT 24 |
68547738116 ps |
| T641 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1451867171 |
|
|
Apr 25 12:51:32 PM PDT 24 |
Apr 25 12:51:38 PM PDT 24 |
2609044092 ps |
| T642 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.2598143841 |
|
|
Apr 25 12:51:51 PM PDT 24 |
Apr 25 12:51:56 PM PDT 24 |
2120983175 ps |
| T357 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.808702560 |
|
|
Apr 25 12:51:15 PM PDT 24 |
Apr 25 12:53:08 PM PDT 24 |
162215040996 ps |
| T643 |
/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.3362540112 |
|
|
Apr 25 12:51:12 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
2210756812 ps |
| T355 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.1132643481 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:52:32 PM PDT 24 |
95166450359 ps |
| T644 |
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.4157005527 |
|
|
Apr 25 12:51:33 PM PDT 24 |
Apr 25 12:51:42 PM PDT 24 |
2441058129 ps |
| T645 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.2138940785 |
|
|
Apr 25 12:50:47 PM PDT 24 |
Apr 25 12:50:57 PM PDT 24 |
2873225090 ps |
| T281 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1593744078 |
|
|
Apr 25 12:50:35 PM PDT 24 |
Apr 25 12:51:31 PM PDT 24 |
22008939607 ps |
| T252 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1934631227 |
|
|
Apr 25 12:50:30 PM PDT 24 |
Apr 25 12:53:08 PM PDT 24 |
230216396792 ps |
| T646 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1099633080 |
|
|
Apr 25 12:50:14 PM PDT 24 |
Apr 25 12:50:20 PM PDT 24 |
4758605578 ps |
| T647 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.527993148 |
|
|
Apr 25 12:51:36 PM PDT 24 |
Apr 25 12:51:45 PM PDT 24 |
2877359349 ps |
| T648 |
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.1851135366 |
|
|
Apr 25 12:51:05 PM PDT 24 |
Apr 25 12:51:13 PM PDT 24 |
2217865301 ps |
| T271 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2743575988 |
|
|
Apr 25 12:51:27 PM PDT 24 |
Apr 25 12:52:29 PM PDT 24 |
432162875428 ps |
| T229 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.14167570 |
|
|
Apr 25 12:51:30 PM PDT 24 |
Apr 25 12:52:17 PM PDT 24 |
95755663638 ps |
| T299 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.113815375 |
|
|
Apr 25 12:50:21 PM PDT 24 |
Apr 25 12:51:36 PM PDT 24 |
27043234764 ps |
| T279 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect.454418757 |
|
|
Apr 25 12:51:16 PM PDT 24 |
Apr 25 12:51:44 PM PDT 24 |
41978707432 ps |
| T649 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.1402066263 |
|
|
Apr 25 12:51:43 PM PDT 24 |
Apr 25 12:51:53 PM PDT 24 |
2752440437 ps |
| T650 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.8597268 |
|
|
Apr 25 12:51:23 PM PDT 24 |
Apr 25 12:51:31 PM PDT 24 |
2463424150 ps |
| T651 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1714399824 |
|
|
Apr 25 12:51:06 PM PDT 24 |
Apr 25 12:51:15 PM PDT 24 |
2453633584 ps |
| T652 |
/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.4219467264 |
|
|
Apr 25 12:50:49 PM PDT 24 |
Apr 25 12:50:53 PM PDT 24 |
3652276645 ps |
| T653 |
/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2209276796 |
|
|
Apr 25 12:51:10 PM PDT 24 |
Apr 25 12:51:15 PM PDT 24 |
2520885272 ps |
| T654 |
/workspace/coverage/default/20.sysrst_ctrl_smoke.1753141462 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:51:08 PM PDT 24 |
2111808922 ps |
| T655 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2903297273 |
|
|
Apr 25 12:50:41 PM PDT 24 |
Apr 25 12:50:48 PM PDT 24 |
2011370916 ps |
| T656 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.1177919849 |
|
|
Apr 25 12:50:25 PM PDT 24 |
Apr 25 12:50:30 PM PDT 24 |
2444684808 ps |
| T657 |
/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2186952974 |
|
|
Apr 25 12:51:30 PM PDT 24 |
Apr 25 12:51:35 PM PDT 24 |
3646777328 ps |
| T658 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.3934147503 |
|
|
Apr 25 12:51:01 PM PDT 24 |
Apr 25 12:58:34 PM PDT 24 |
193241149851 ps |
| T380 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3022714713 |
|
|
Apr 25 12:52:10 PM PDT 24 |
Apr 25 12:53:29 PM PDT 24 |
57676195378 ps |
| T659 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.4121073329 |
|
|
Apr 25 12:51:25 PM PDT 24 |
Apr 25 12:51:35 PM PDT 24 |
2541691221 ps |
| T114 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.868276766 |
|
|
Apr 25 12:50:50 PM PDT 24 |
Apr 25 12:50:54 PM PDT 24 |
5041010266 ps |
| T660 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.1464555093 |
|
|
Apr 25 12:50:31 PM PDT 24 |
Apr 25 12:50:34 PM PDT 24 |
2079735500 ps |
| T661 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.866868533 |
|
|
Apr 25 12:51:59 PM PDT 24 |
Apr 25 12:52:02 PM PDT 24 |
2635773119 ps |
| T662 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.624561032 |
|
|
Apr 25 12:50:57 PM PDT 24 |
Apr 25 12:51:07 PM PDT 24 |
2484350174 ps |
| T377 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4160243135 |
|
|
Apr 25 12:52:05 PM PDT 24 |
Apr 25 12:54:41 PM PDT 24 |
66624739999 ps |
| T663 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3499370234 |
|
|
Apr 25 12:50:23 PM PDT 24 |
Apr 25 12:50:29 PM PDT 24 |
3899789469 ps |
| T232 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.968546498 |
|
|
Apr 25 12:51:52 PM PDT 24 |
Apr 25 12:51:57 PM PDT 24 |
2513377666 ps |
| T664 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.4142414385 |
|
|
Apr 25 12:50:53 PM PDT 24 |
Apr 25 12:50:59 PM PDT 24 |
2634107649 ps |
| T363 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1966027931 |
|
|
Apr 25 12:50:50 PM PDT 24 |
Apr 25 12:54:02 PM PDT 24 |
74638860609 ps |
| T665 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3951119242 |
|
|
Apr 25 12:50:22 PM PDT 24 |
Apr 25 12:50:35 PM PDT 24 |
3050477106 ps |
| T666 |
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.923784254 |
|
|
Apr 25 12:51:12 PM PDT 24 |
Apr 25 12:51:16 PM PDT 24 |
2479506851 ps |
| T667 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all.346891265 |
|
|
Apr 25 12:51:44 PM PDT 24 |
Apr 25 12:52:09 PM PDT 24 |
16906743380 ps |
| T668 |
/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.2324762189 |
|
|
Apr 25 12:50:46 PM PDT 24 |
Apr 25 12:50:51 PM PDT 24 |
11014081736 ps |
| T669 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3835761169 |
|
|
Apr 25 12:51:07 PM PDT 24 |
Apr 25 12:52:17 PM PDT 24 |
26334648504 ps |
| T670 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.4220328598 |
|
|
Apr 25 12:50:19 PM PDT 24 |
Apr 25 12:50:27 PM PDT 24 |
3166868419 ps |
| T671 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1967564101 |
|
|
Apr 25 12:52:01 PM PDT 24 |
Apr 25 12:52:04 PM PDT 24 |
2090710829 ps |
| T378 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3274106132 |
|
|
Apr 25 12:50:36 PM PDT 24 |
Apr 25 12:52:50 PM PDT 24 |
53812908638 ps |
| T672 |
/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3173422259 |
|
|
Apr 25 12:51:02 PM PDT 24 |
Apr 25 12:51:07 PM PDT 24 |
2483610008 ps |
| T673 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.928636336 |
|
|
Apr 25 12:50:44 PM PDT 24 |
Apr 25 12:50:49 PM PDT 24 |
2638459285 ps |
| T272 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1324938792 |
|
|
Apr 25 12:51:52 PM PDT 24 |
Apr 25 12:53:25 PM PDT 24 |
137454101790 ps |
| T674 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.1180787899 |
|
|
Apr 25 12:51:34 PM PDT 24 |
Apr 25 12:51:38 PM PDT 24 |
2147470474 ps |
| T675 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3224998482 |
|
|
Apr 25 12:52:07 PM PDT 24 |
Apr 25 12:53:21 PM PDT 24 |
25078920380 ps |
| T387 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3655888271 |
|
|
Apr 25 12:52:08 PM PDT 24 |
Apr 25 12:53:48 PM PDT 24 |
68989387193 ps |
| T676 |
/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.4074252333 |
|
|
Apr 25 12:51:17 PM PDT 24 |
Apr 25 12:51:22 PM PDT 24 |
3695679370 ps |
| T677 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3114175461 |
|
|
Apr 25 12:51:59 PM PDT 24 |
Apr 25 12:52:02 PM PDT 24 |
2473784007 ps |
| T678 |
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.229435959 |
|
|
Apr 25 12:51:58 PM PDT 24 |
Apr 25 12:52:05 PM PDT 24 |
9978271908 ps |
| T679 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.3395857796 |
|
|
Apr 25 12:50:59 PM PDT 24 |
Apr 25 12:51:06 PM PDT 24 |
2118503723 ps |
| T680 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2730605406 |
|
|
Apr 25 12:51:49 PM PDT 24 |
Apr 25 12:51:59 PM PDT 24 |
2610451775 ps |
| T110 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3432640402 |
|
|
Apr 25 12:52:12 PM PDT 24 |
Apr 25 12:52:41 PM PDT 24 |
35440707370 ps |
| T390 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.789561450 |
|
|
Apr 25 12:52:05 PM PDT 24 |
Apr 25 12:54:57 PM PDT 24 |
60977352727 ps |
| T681 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3049321652 |
|
|
Apr 25 12:50:33 PM PDT 24 |
Apr 25 12:52:13 PM PDT 24 |
73036781996 ps |
| T682 |
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3383875738 |
|
|
Apr 25 12:50:36 PM PDT 24 |
Apr 25 12:50:42 PM PDT 24 |
2458152402 ps |
| T352 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.1961519903 |
|
|
Apr 25 12:50:42 PM PDT 24 |
Apr 25 12:54:24 PM PDT 24 |
84061202204 ps |
| T683 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.4036434645 |
|
|
Apr 25 12:50:53 PM PDT 24 |
Apr 25 12:51:00 PM PDT 24 |
3608200261 ps |
| T684 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.3581217331 |
|
|
Apr 25 12:50:33 PM PDT 24 |
Apr 25 12:50:38 PM PDT 24 |
2511940103 ps |
| T685 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.2739521253 |
|
|
Apr 25 12:51:22 PM PDT 24 |
Apr 25 12:51:33 PM PDT 24 |
12179152110 ps |
| T686 |
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3776000 |
|
|
Apr 25 12:51:25 PM PDT 24 |
Apr 25 12:51:35 PM PDT 24 |
2510706124 ps |
| T280 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect.45100358 |
|
|
Apr 25 12:51:27 PM PDT 24 |
Apr 25 12:58:03 PM PDT 24 |
140657955796 ps |
| T687 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1890692291 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 01:03:00 PM PDT 24 |
900778921076 ps |
| T688 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3518948205 |
|
|
Apr 25 12:52:09 PM PDT 24 |
Apr 25 12:52:21 PM PDT 24 |
6501722256 ps |
| T689 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.3553585317 |
|
|
Apr 25 12:51:21 PM PDT 24 |
Apr 25 12:51:26 PM PDT 24 |
2466873758 ps |
| T690 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.3403378377 |
|
|
Apr 25 12:50:38 PM PDT 24 |
Apr 25 12:50:46 PM PDT 24 |
2108395312 ps |
| T691 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.2222828198 |
|
|
Apr 25 12:51:17 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
2127165558 ps |
| T692 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1609027334 |
|
|
Apr 25 12:51:59 PM PDT 24 |
Apr 25 01:00:07 PM PDT 24 |
195207972449 ps |
| T160 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.2942375166 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:51:07 PM PDT 24 |
7788003066 ps |
| T693 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1466031049 |
|
|
Apr 25 12:50:27 PM PDT 24 |
Apr 25 12:51:44 PM PDT 24 |
311456837078 ps |
| T694 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.1338977014 |
|
|
Apr 25 12:50:58 PM PDT 24 |
Apr 25 12:51:06 PM PDT 24 |
2517023617 ps |
| T695 |
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.4084830411 |
|
|
Apr 25 12:50:24 PM PDT 24 |
Apr 25 12:50:32 PM PDT 24 |
3157023199 ps |
| T370 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2015001453 |
|
|
Apr 25 12:51:16 PM PDT 24 |
Apr 25 12:52:23 PM PDT 24 |
60126293751 ps |
| T696 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.4023784809 |
|
|
Apr 25 12:51:53 PM PDT 24 |
Apr 25 12:51:55 PM PDT 24 |
2241071430 ps |
| T697 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.21907914 |
|
|
Apr 25 12:50:07 PM PDT 24 |
Apr 25 12:51:18 PM PDT 24 |
27081361666 ps |
| T698 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.3350116720 |
|
|
Apr 25 12:51:28 PM PDT 24 |
Apr 25 12:51:37 PM PDT 24 |
2358884529 ps |
| T699 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2914861543 |
|
|
Apr 25 12:50:43 PM PDT 24 |
Apr 25 12:50:46 PM PDT 24 |
2631233810 ps |
| T700 |
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.751173745 |
|
|
Apr 25 12:50:54 PM PDT 24 |
Apr 25 01:06:37 PM PDT 24 |
330950405263 ps |
| T701 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.619883076 |
|
|
Apr 25 12:50:24 PM PDT 24 |
Apr 25 12:50:28 PM PDT 24 |
2635559173 ps |
| T702 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.1275417649 |
|
|
Apr 25 12:50:20 PM PDT 24 |
Apr 25 12:50:26 PM PDT 24 |
2135430764 ps |
| T703 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.4157628161 |
|
|
Apr 25 12:51:10 PM PDT 24 |
Apr 25 12:51:16 PM PDT 24 |
11650024281 ps |
| T704 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.2008620116 |
|
|
Apr 25 12:50:36 PM PDT 24 |
Apr 25 12:50:39 PM PDT 24 |
2229952443 ps |
| T705 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.2805226404 |
|
|
Apr 25 12:51:14 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
2109695842 ps |
| T706 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.599076757 |
|
|
Apr 25 12:50:45 PM PDT 24 |
Apr 25 12:50:54 PM PDT 24 |
2612060893 ps |
| T707 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1943998089 |
|
|
Apr 25 12:50:59 PM PDT 24 |
Apr 25 12:51:21 PM PDT 24 |
25849249387 ps |
| T708 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.3795083482 |
|
|
Apr 25 12:51:07 PM PDT 24 |
Apr 25 12:51:09 PM PDT 24 |
2592952064 ps |
| T709 |
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1612898838 |
|
|
Apr 25 12:50:28 PM PDT 24 |
Apr 25 12:50:34 PM PDT 24 |
2615508622 ps |
| T161 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.890328312 |
|
|
Apr 25 12:50:23 PM PDT 24 |
Apr 25 12:52:35 PM PDT 24 |
258618619899 ps |
| T710 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.2675618176 |
|
|
Apr 25 12:51:23 PM PDT 24 |
Apr 25 12:52:13 PM PDT 24 |
71273368883 ps |
| T711 |
/workspace/coverage/default/32.sysrst_ctrl_combo_detect.2469703716 |
|
|
Apr 25 12:51:15 PM PDT 24 |
Apr 25 12:53:34 PM PDT 24 |
138705277383 ps |
| T712 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1912782065 |
|
|
Apr 25 12:51:46 PM PDT 24 |
Apr 25 12:51:55 PM PDT 24 |
2011701015 ps |
| T713 |
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2546131021 |
|
|
Apr 25 12:50:47 PM PDT 24 |
Apr 25 12:50:58 PM PDT 24 |
5935340919 ps |
| T714 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3095935361 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:29 PM PDT 24 |
2610510548 ps |
| T715 |
/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.2984247776 |
|
|
Apr 25 12:51:31 PM PDT 24 |
Apr 25 12:51:40 PM PDT 24 |
4125068937 ps |
| T716 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2708245932 |
|
|
Apr 25 12:51:44 PM PDT 24 |
Apr 25 12:51:49 PM PDT 24 |
2635845039 ps |
| T717 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all.1465697741 |
|
|
Apr 25 12:51:21 PM PDT 24 |
Apr 25 12:51:33 PM PDT 24 |
12412135199 ps |
| T718 |
/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.2615111258 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:27 PM PDT 24 |
3577667644 ps |
| T162 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.2877389249 |
|
|
Apr 25 12:50:14 PM PDT 24 |
Apr 25 12:50:25 PM PDT 24 |
11123763419 ps |
| T115 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1249115653 |
|
|
Apr 25 12:50:23 PM PDT 24 |
Apr 25 12:50:30 PM PDT 24 |
4510593758 ps |
| T719 |
/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3989546136 |
|
|
Apr 25 12:51:29 PM PDT 24 |
Apr 25 12:51:38 PM PDT 24 |
2473716175 ps |
| T720 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.658491332 |
|
|
Apr 25 12:50:48 PM PDT 24 |
Apr 25 12:50:55 PM PDT 24 |
2468110573 ps |
| T721 |
/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1222832493 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:52:59 PM PDT 24 |
164732047886 ps |
| T300 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1964533233 |
|
|
Apr 25 12:51:39 PM PDT 24 |
Apr 25 12:52:17 PM PDT 24 |
109851872282 ps |
| T722 |
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.4175967131 |
|
|
Apr 25 12:51:43 PM PDT 24 |
Apr 25 12:51:48 PM PDT 24 |
2091345330 ps |
| T163 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4025352374 |
|
|
Apr 25 12:50:44 PM PDT 24 |
Apr 25 12:54:14 PM PDT 24 |
80487777328 ps |
| T723 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.1710345791 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 12:51:26 PM PDT 24 |
2120858260 ps |
| T724 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3134326981 |
|
|
Apr 25 12:51:46 PM PDT 24 |
Apr 25 12:51:53 PM PDT 24 |
2117781186 ps |
| T725 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3490657900 |
|
|
Apr 25 12:51:38 PM PDT 24 |
Apr 25 12:51:41 PM PDT 24 |
4021729792 ps |
| T726 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1673837295 |
|
|
Apr 25 12:50:34 PM PDT 24 |
Apr 25 12:50:37 PM PDT 24 |
2567321785 ps |
| T727 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3270725625 |
|
|
Apr 25 12:51:05 PM PDT 24 |
Apr 25 12:57:31 PM PDT 24 |
139821859956 ps |
| T728 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1887644551 |
|
|
Apr 25 12:51:59 PM PDT 24 |
Apr 25 12:52:05 PM PDT 24 |
3290792442 ps |
| T373 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2103098837 |
|
|
Apr 25 12:52:12 PM PDT 24 |
Apr 25 12:57:41 PM PDT 24 |
124371700953 ps |
| T729 |
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.4178604955 |
|
|
Apr 25 12:52:07 PM PDT 24 |
Apr 25 12:52:11 PM PDT 24 |
2492891071 ps |
| T730 |
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3565515936 |
|
|
Apr 25 12:51:54 PM PDT 24 |
Apr 25 12:52:00 PM PDT 24 |
4183517575 ps |
| T731 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3757411460 |
|
|
Apr 25 12:52:02 PM PDT 24 |
Apr 25 12:52:06 PM PDT 24 |
3639584909 ps |
| T732 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.835667551 |
|
|
Apr 25 12:52:36 PM PDT 24 |
Apr 25 12:53:07 PM PDT 24 |
75500097568 ps |
| T733 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1654882243 |
|
|
Apr 25 12:51:57 PM PDT 24 |
Apr 25 12:52:02 PM PDT 24 |
2514393697 ps |
| T734 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.3758838583 |
|
|
Apr 25 12:51:45 PM PDT 24 |
Apr 25 12:52:18 PM PDT 24 |
11107193351 ps |
| T735 |
/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3946674510 |
|
|
Apr 25 12:51:07 PM PDT 24 |
Apr 25 12:51:22 PM PDT 24 |
20820471118 ps |
| T736 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.4148708309 |
|
|
Apr 25 12:52:03 PM PDT 24 |
Apr 25 12:52:08 PM PDT 24 |
7257350838 ps |
| T737 |
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2877532169 |
|
|
Apr 25 12:51:46 PM PDT 24 |
Apr 25 12:59:23 PM PDT 24 |
1808624220961 ps |
| T282 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.4049833212 |
|
|
Apr 25 12:50:20 PM PDT 24 |
Apr 25 12:52:14 PM PDT 24 |
42012114083 ps |
| T738 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1540874567 |
|
|
Apr 25 12:51:31 PM PDT 24 |
Apr 25 12:51:42 PM PDT 24 |
3723189037 ps |
| T739 |
/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.2109338742 |
|
|
Apr 25 12:51:04 PM PDT 24 |
Apr 25 12:51:08 PM PDT 24 |
3680998716 ps |
| T740 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.1812537326 |
|
|
Apr 25 12:51:15 PM PDT 24 |
Apr 25 12:51:24 PM PDT 24 |
2112051260 ps |
| T741 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.1463330728 |
|
|
Apr 25 12:51:14 PM PDT 24 |
Apr 25 12:51:18 PM PDT 24 |
4777117883 ps |
| T742 |
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2569662134 |
|
|
Apr 25 12:50:42 PM PDT 24 |
Apr 25 12:50:46 PM PDT 24 |
4783558211 ps |
| T171 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.735070891 |
|
|
Apr 25 12:51:40 PM PDT 24 |
Apr 25 12:53:04 PM PDT 24 |
654524132957 ps |
| T235 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.1716357215 |
|
|
Apr 25 12:51:43 PM PDT 24 |
Apr 25 12:51:47 PM PDT 24 |
2045665439 ps |
| T236 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.814875772 |
|
|
Apr 25 12:51:23 PM PDT 24 |
Apr 25 12:51:28 PM PDT 24 |
2623333727 ps |
| T237 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1342853768 |
|
|
Apr 25 12:50:34 PM PDT 24 |
Apr 25 12:50:38 PM PDT 24 |
3573348656 ps |
| T238 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all.3402332528 |
|
|
Apr 25 12:51:53 PM PDT 24 |
Apr 25 12:53:35 PM PDT 24 |
157188600321 ps |
| T239 |
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3682540228 |
|
|
Apr 25 12:51:45 PM PDT 24 |
Apr 25 12:51:59 PM PDT 24 |
5348406083 ps |
| T240 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.3464427271 |
|
|
Apr 25 12:51:40 PM PDT 24 |
Apr 25 12:51:44 PM PDT 24 |
2027973423 ps |
| T241 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.105815917 |
|
|
Apr 25 12:52:02 PM PDT 24 |
Apr 25 12:54:12 PM PDT 24 |
59801477926 ps |
| T242 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.1240657564 |
|
|
Apr 25 12:50:41 PM PDT 24 |
Apr 25 12:50:44 PM PDT 24 |
2127667123 ps |
| T243 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.791769595 |
|
|
Apr 25 12:51:30 PM PDT 24 |
Apr 25 12:51:40 PM PDT 24 |
4232036861 ps |
| T743 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.2735255785 |
|
|
Apr 25 12:50:46 PM PDT 24 |
Apr 25 12:50:52 PM PDT 24 |
2796566449 ps |
| T391 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.577073192 |
|
|
Apr 25 12:52:15 PM PDT 24 |
Apr 25 12:53:10 PM PDT 24 |
68029411831 ps |
| T396 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.414048143 |
|
|
Apr 25 12:50:59 PM PDT 24 |
Apr 25 12:52:08 PM PDT 24 |
284236187866 ps |
| T744 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2127347898 |
|
|
Apr 25 12:51:38 PM PDT 24 |
Apr 25 12:51:46 PM PDT 24 |
2512399108 ps |
| T745 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.479762936 |
|
|
Apr 25 12:52:06 PM PDT 24 |
Apr 25 12:53:45 PM PDT 24 |
138060290177 ps |
| T746 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1171785586 |
|
|
Apr 25 12:50:46 PM PDT 24 |
Apr 25 12:50:52 PM PDT 24 |
2629633575 ps |
| T747 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.843305208 |
|
|
Apr 25 12:51:41 PM PDT 24 |
Apr 25 12:51:54 PM PDT 24 |
27883449313 ps |
| T748 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3984662858 |
|
|
Apr 25 12:50:13 PM PDT 24 |
Apr 25 12:50:24 PM PDT 24 |
2111083635 ps |
| T749 |
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.363212207 |
|
|
Apr 25 12:51:19 PM PDT 24 |
Apr 25 12:51:24 PM PDT 24 |
2272733894 ps |
| T750 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.3269706420 |
|
|
Apr 25 12:50:21 PM PDT 24 |
Apr 25 12:50:26 PM PDT 24 |
2064762728 ps |
| T751 |
/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3074288478 |
|
|
Apr 25 12:50:51 PM PDT 24 |
Apr 25 12:51:01 PM PDT 24 |
2438831323 ps |
| T752 |
/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.4279068177 |
|
|
Apr 25 12:51:14 PM PDT 24 |
Apr 25 12:54:25 PM PDT 24 |
1318441374091 ps |
| T753 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3874819072 |
|
|
Apr 25 12:50:40 PM PDT 24 |
Apr 25 12:50:44 PM PDT 24 |
2623582685 ps |
| T754 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.588527590 |
|
|
Apr 25 12:51:34 PM PDT 24 |
Apr 25 12:51:39 PM PDT 24 |
2023314727 ps |
| T265 |
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.4092884742 |
|
|
Apr 25 12:52:03 PM PDT 24 |
Apr 25 12:53:44 PM PDT 24 |
69944875138 ps |
| T755 |
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4165782163 |
|
|
Apr 25 12:50:30 PM PDT 24 |
Apr 25 12:53:58 PM PDT 24 |
891499111196 ps |
| T756 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.2503347372 |
|
|
Apr 25 12:50:48 PM PDT 24 |
Apr 25 12:50:54 PM PDT 24 |
2014739285 ps |
| T757 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.3131440080 |
|
|
Apr 25 12:51:20 PM PDT 24 |
Apr 25 12:52:56 PM PDT 24 |
74045999572 ps |
| T758 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1888736929 |
|
|
Apr 25 12:51:39 PM PDT 24 |
Apr 25 12:51:41 PM PDT 24 |
2589682352 ps |
| T759 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1621705123 |
|
|
Apr 25 12:52:03 PM PDT 24 |
Apr 25 12:53:18 PM PDT 24 |
26082366002 ps |
| T760 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2115080513 |
|
|
Apr 25 12:50:44 PM PDT 24 |
Apr 25 12:50:47 PM PDT 24 |
2042088225 ps |
| T761 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1124659346 |
|
|
Apr 25 12:51:52 PM PDT 24 |
Apr 25 12:52:10 PM PDT 24 |
47999085158 ps |
| T762 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.1482255612 |
|
|
Apr 25 12:51:31 PM PDT 24 |
Apr 25 12:51:36 PM PDT 24 |
2021037652 ps |
| T763 |
/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2390624006 |
|
|
Apr 25 12:51:06 PM PDT 24 |
Apr 25 12:51:09 PM PDT 24 |
2478951168 ps |
| T196 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3420424896 |
|
|
Apr 25 12:51:47 PM PDT 24 |
Apr 25 12:54:08 PM PDT 24 |
58209426547 ps |
| T266 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4274775905 |
|
|
Apr 25 12:52:10 PM PDT 24 |
Apr 25 12:52:51 PM PDT 24 |
72541265189 ps |
| T764 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.522597644 |
|
|
Apr 25 12:50:04 PM PDT 24 |
Apr 25 12:50:11 PM PDT 24 |
2479805814 ps |
| T765 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1022862991 |
|
|
Apr 25 12:50:31 PM PDT 24 |
Apr 25 12:50:40 PM PDT 24 |
2511166780 ps |
| T766 |
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1855572583 |
|
|
Apr 25 12:51:45 PM PDT 24 |
Apr 25 12:51:53 PM PDT 24 |
3989047712 ps |
| T767 |
/workspace/coverage/default/13.sysrst_ctrl_alert_test.3641217755 |
|
|
Apr 25 12:50:43 PM PDT 24 |
Apr 25 12:50:47 PM PDT 24 |
2066484246 ps |
| T768 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.476484809 |
|
|
Apr 25 12:51:37 PM PDT 24 |
Apr 25 12:51:51 PM PDT 24 |
8311168947 ps |
| T769 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1073776610 |
|
|
Apr 25 12:51:59 PM PDT 24 |
Apr 25 12:52:22 PM PDT 24 |
7888629026 ps |
| T770 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.991329386 |
|
|
Apr 25 12:51:49 PM PDT 24 |
Apr 25 12:57:37 PM PDT 24 |
141128188422 ps |
| T771 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.370079391 |
|
|
Apr 25 12:51:40 PM PDT 24 |
Apr 25 12:51:43 PM PDT 24 |
2535107088 ps |
| T772 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.3518844268 |
|
|
Apr 25 12:51:32 PM PDT 24 |
Apr 25 12:53:14 PM PDT 24 |
37345613662 ps |
| T773 |
/workspace/coverage/default/21.sysrst_ctrl_smoke.1256859979 |
|
|
Apr 25 12:50:56 PM PDT 24 |
Apr 25 12:51:03 PM PDT 24 |
2114648247 ps |
| T774 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1633772491 |
|
|
Apr 25 12:52:12 PM PDT 24 |
Apr 25 12:52:23 PM PDT 24 |
2509320649 ps |
| T775 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.3734739853 |
|
|
Apr 25 12:50:40 PM PDT 24 |
Apr 25 12:50:42 PM PDT 24 |
2155400706 ps |
| T776 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1540795055 |
|
|
Apr 25 12:51:08 PM PDT 24 |
Apr 25 12:51:20 PM PDT 24 |
3646529149 ps |
| T777 |
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.485402053 |
|
|
Apr 25 12:50:40 PM PDT 24 |
Apr 25 12:51:47 PM PDT 24 |
25834443625 ps |
| T778 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2265436605 |
|
|
Apr 25 12:52:01 PM PDT 24 |
Apr 25 12:53:45 PM PDT 24 |
153377507645 ps |
| T779 |
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.1668256268 |
|
|
Apr 25 12:51:05 PM PDT 24 |
Apr 25 12:51:15 PM PDT 24 |
3199363690 ps |
| T780 |
/workspace/coverage/default/26.sysrst_ctrl_stress_all.975853313 |
|
|
Apr 25 12:51:29 PM PDT 24 |
Apr 25 12:51:34 PM PDT 24 |
6787685403 ps |
| T781 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.3240091363 |
|
|
Apr 25 12:51:16 PM PDT 24 |
Apr 25 12:51:23 PM PDT 24 |
2012889634 ps |
| T782 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.3326792263 |
|
|
Apr 25 12:51:12 PM PDT 24 |
Apr 25 12:51:16 PM PDT 24 |
2037119233 ps |
| T365 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4193850337 |
|
|
Apr 25 12:52:07 PM PDT 24 |
Apr 25 12:52:48 PM PDT 24 |
86648948529 ps |
| T783 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.880288182 |
|
|
Apr 25 12:51:33 PM PDT 24 |
Apr 25 12:53:31 PM PDT 24 |
83170615028 ps |
| T784 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2700397371 |
|
|
Apr 25 12:50:46 PM PDT 24 |
Apr 25 12:50:59 PM PDT 24 |
3754545338 ps |
| T91 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.415784215 |
|
|
Apr 25 12:35:36 PM PDT 24 |
Apr 25 12:35:46 PM PDT 24 |
2089624329 ps |
| T29 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.1513333760 |
|
|
Apr 25 12:35:23 PM PDT 24 |
Apr 25 12:36:22 PM PDT 24 |
22228832407 ps |
| T92 |
/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.574786446 |
|
|
Apr 25 12:35:40 PM PDT 24 |
Apr 25 12:35:48 PM PDT 24 |
2329294498 ps |
| T785 |
/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.2280918191 |
|
|
Apr 25 12:35:52 PM PDT 24 |
Apr 25 12:35:55 PM PDT 24 |
2080310917 ps |
| T786 |
/workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.2141731229 |
|
|
Apr 25 12:36:09 PM PDT 24 |
Apr 25 12:36:13 PM PDT 24 |
2044028653 ps |
| T787 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2532789570 |
|
|
Apr 25 12:36:00 PM PDT 24 |
Apr 25 12:36:09 PM PDT 24 |
2011883656 ps |
| T30 |
/workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.2429460642 |
|
|
Apr 25 12:35:41 PM PDT 24 |
Apr 25 12:35:45 PM PDT 24 |
2091200023 ps |
| T788 |
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.2102743018 |
|
|
Apr 25 12:35:46 PM PDT 24 |
Apr 25 12:35:54 PM PDT 24 |
2014000107 ps |
| T31 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3544595970 |
|
|
Apr 25 12:35:42 PM PDT 24 |
Apr 25 12:36:44 PM PDT 24 |
22188485503 ps |