Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.04 99.09 96.94 100.00 98.72 98.56 99.52 93.43


Total tests in report: 906
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
63.02 63.02 81.58 81.58 70.98 70.98 86.53 86.53 23.08 23.08 83.29 83.29 68.59 68.59 27.07 27.07 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2940337182
73.12 10.10 87.05 5.47 77.48 6.50 86.76 0.23 64.10 41.03 88.13 4.84 80.35 11.75 27.99 0.91 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.1086374120
80.67 7.55 93.62 6.57 86.00 8.52 91.89 5.14 71.79 7.69 93.53 5.40 89.02 8.67 38.86 10.87 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.4186990156
84.62 3.95 95.60 1.98 88.45 2.45 93.04 1.14 76.92 5.13 94.94 1.40 92.20 3.18 51.24 12.38 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3482189192
86.65 2.03 97.22 1.62 91.81 3.36 97.49 4.45 77.56 0.64 96.64 1.70 92.87 0.67 52.96 1.72 /workspace/coverage/default/30.sysrst_ctrl_stress_all.3061024795
88.39 1.74 97.29 0.07 91.86 0.05 97.49 0.00 78.85 1.28 96.71 0.07 93.16 0.29 63.40 10.44 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.735070891
89.75 1.35 97.31 0.02 92.95 1.09 98.17 0.68 78.85 0.00 96.75 0.04 93.26 0.10 70.94 7.53 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2264477166
90.85 1.10 97.80 0.49 93.20 0.25 98.17 0.00 85.26 6.41 97.23 0.48 93.35 0.10 70.94 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.346677449
91.93 1.08 97.91 0.11 93.63 0.43 98.17 0.00 85.90 0.64 97.30 0.07 95.09 1.73 75.51 4.57 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1327596014
92.56 0.63 98.12 0.21 93.96 0.33 98.17 0.00 88.46 2.56 97.49 0.18 96.15 1.06 75.57 0.05 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1843528766
93.08 0.52 98.17 0.06 94.06 0.10 98.17 0.00 89.74 1.28 97.60 0.11 96.44 0.29 77.40 1.83 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2340486837
93.56 0.48 98.23 0.06 94.29 0.23 98.17 0.00 90.38 0.64 97.67 0.07 96.92 0.48 79.28 1.88 /workspace/coverage/default/23.sysrst_ctrl_stress_all.2529139297
93.93 0.37 98.40 0.17 94.57 0.28 98.17 0.00 91.03 0.64 97.82 0.15 97.30 0.39 80.25 0.97 /workspace/coverage/default/6.sysrst_ctrl_stress_all.2806345242
94.26 0.33 98.40 0.00 94.57 0.00 98.17 0.00 92.95 1.92 97.82 0.00 97.30 0.00 80.62 0.38 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1896331854
94.57 0.31 98.53 0.13 94.97 0.40 98.17 0.00 94.23 1.28 97.97 0.15 97.50 0.19 80.62 0.00 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2285767287
94.84 0.27 98.53 0.00 94.97 0.00 98.17 0.00 94.23 0.00 97.97 0.00 97.50 0.00 82.51 1.88 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.3450658609
95.11 0.27 98.53 0.00 94.97 0.00 98.17 0.00 94.23 0.00 97.97 0.00 97.50 0.00 84.39 1.88 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2998075691
95.38 0.27 98.58 0.06 95.07 0.10 99.54 1.37 94.23 0.00 97.97 0.00 97.69 0.19 84.55 0.16 /workspace/coverage/default/40.sysrst_ctrl_alert_test.1954261026
95.62 0.24 98.58 0.00 95.10 0.03 99.54 0.00 95.51 1.28 97.97 0.00 97.78 0.10 84.82 0.27 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2879043422
95.81 0.19 98.66 0.07 95.10 0.00 99.54 0.00 95.51 0.00 97.97 0.00 97.98 0.19 85.90 1.08 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1884978671
95.99 0.18 98.69 0.04 96.13 1.04 99.54 0.00 95.51 0.00 97.97 0.00 97.98 0.00 86.11 0.22 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.415784215
96.16 0.17 98.73 0.04 96.16 0.03 99.54 0.00 96.15 0.64 98.00 0.04 98.07 0.10 86.49 0.38 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.890328312
96.32 0.15 98.75 0.02 96.36 0.20 99.54 0.00 96.15 0.00 98.08 0.07 98.84 0.77 86.49 0.00 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1627217466
96.46 0.14 98.79 0.04 96.46 0.10 99.54 0.00 96.79 0.64 98.11 0.04 98.94 0.10 86.54 0.05 /workspace/coverage/default/41.sysrst_ctrl_stress_all.168377310
96.59 0.13 98.81 0.02 96.51 0.05 99.54 0.00 97.44 0.64 98.15 0.04 99.13 0.19 86.54 0.00 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.4102030945
96.72 0.13 98.82 0.02 96.54 0.03 99.54 0.00 98.08 0.64 98.19 0.04 99.13 0.00 86.76 0.22 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3470398957
96.85 0.13 98.86 0.04 96.54 0.00 99.54 0.00 98.08 0.00 98.19 0.00 99.13 0.00 87.62 0.86 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3944658289
96.96 0.11 98.86 0.00 96.56 0.03 99.54 0.00 98.08 0.00 98.19 0.00 99.23 0.10 88.27 0.65 /workspace/coverage/default/7.sysrst_ctrl_stress_all.1934631227
97.06 0.10 98.86 0.00 96.56 0.00 99.54 0.00 98.08 0.00 98.19 0.00 99.23 0.00 88.97 0.70 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.845821462
97.16 0.10 98.88 0.02 96.56 0.00 99.54 0.00 98.72 0.64 98.23 0.04 99.23 0.00 88.97 0.00 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1242808614
97.26 0.10 98.88 0.00 96.59 0.03 100.00 0.46 98.72 0.00 98.23 0.00 99.33 0.10 89.07 0.11 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.279894915
97.35 0.09 98.90 0.02 96.59 0.00 100.00 0.00 98.72 0.00 98.23 0.00 99.33 0.00 89.72 0.65 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.84756718
97.44 0.08 98.90 0.00 96.59 0.00 100.00 0.00 98.72 0.00 98.23 0.00 99.33 0.00 90.31 0.59 /workspace/coverage/default/5.sysrst_ctrl_stress_all.552434294
97.49 0.06 98.92 0.02 96.59 0.00 100.00 0.00 98.72 0.00 98.23 0.00 99.33 0.00 90.69 0.38 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3886622593
97.54 0.05 98.92 0.00 96.59 0.00 100.00 0.00 98.72 0.00 98.23 0.00 99.33 0.00 91.01 0.32 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2238374258
97.58 0.04 98.94 0.02 96.59 0.00 100.00 0.00 98.72 0.00 98.26 0.04 99.33 0.00 91.23 0.22 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2494220590
97.62 0.04 98.94 0.00 96.59 0.00 100.00 0.00 98.72 0.00 98.26 0.00 99.33 0.00 91.50 0.27 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1216306731
97.66 0.04 98.97 0.04 96.74 0.15 100.00 0.00 98.72 0.00 98.34 0.07 99.33 0.00 91.50 0.00 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.712028320
97.69 0.04 98.99 0.02 96.79 0.05 100.00 0.00 98.72 0.00 98.37 0.04 99.42 0.10 91.55 0.05 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3919944260
97.72 0.03 98.99 0.00 96.79 0.00 100.00 0.00 98.72 0.00 98.37 0.00 99.42 0.00 91.77 0.22 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.3879483152
97.75 0.02 98.99 0.00 96.79 0.00 100.00 0.00 98.72 0.00 98.37 0.00 99.42 0.00 91.93 0.16 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.3506113924
97.77 0.02 98.99 0.00 96.79 0.00 100.00 0.00 98.72 0.00 98.37 0.00 99.42 0.00 92.09 0.16 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3041754015
97.79 0.02 98.99 0.00 96.81 0.03 100.00 0.00 98.72 0.00 98.37 0.00 99.52 0.10 92.09 0.00 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.802167539
97.80 0.02 99.03 0.04 96.81 0.00 100.00 0.00 98.72 0.00 98.45 0.07 99.52 0.00 92.09 0.00 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3685481998
97.82 0.02 99.05 0.02 96.81 0.00 100.00 0.00 98.72 0.00 98.48 0.04 99.52 0.00 92.14 0.05 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.4151277764
97.83 0.02 99.05 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.48 0.00 99.52 0.00 92.25 0.11 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3270725625
97.85 0.02 99.05 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.48 0.00 99.52 0.00 92.36 0.11 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2743575988
97.86 0.02 99.05 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.48 0.00 99.52 0.00 92.47 0.11 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4193850337
97.88 0.02 99.05 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.48 0.00 99.52 0.00 92.57 0.11 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.4096731442
97.89 0.01 99.05 0.00 96.84 0.03 100.00 0.00 98.72 0.00 98.48 0.00 99.52 0.00 92.63 0.05 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2585502172
97.90 0.01 99.07 0.02 96.84 0.00 100.00 0.00 98.72 0.00 98.52 0.04 99.52 0.00 92.63 0.00 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.4224104670
97.91 0.01 99.09 0.02 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.04 99.52 0.00 92.63 0.00 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3420424896
97.91 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 92.68 0.05 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1847912893
97.92 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 92.73 0.05 /workspace/coverage/default/1.sysrst_ctrl_stress_all.1616003061
97.93 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 92.79 0.05 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.404835900
97.94 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 92.84 0.05 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.3946383131
97.95 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 92.90 0.05 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1785207306
97.95 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 92.95 0.05 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.4053163676
97.96 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.00 0.05 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2840254287
97.97 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.06 0.05 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1819984639
97.98 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.11 0.05 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3022714713
97.98 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.16 0.05 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.789561450
97.99 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.22 0.05 /workspace/coverage/default/48.sysrst_ctrl_stress_all.3655888271
98.00 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.27 0.05 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1210277967
98.01 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.33 0.05 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3017092371
98.01 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.38 0.05 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.118955061
98.02 0.01 99.09 0.00 96.84 0.00 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.43 0.05 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4274775905
98.03 0.01 99.09 0.00 96.89 0.05 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.43 0.00 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3683269293
98.03 0.01 99.09 0.00 96.92 0.03 100.00 0.00 98.72 0.00 98.56 0.00 99.52 0.00 93.43 0.00 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1099633080

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3459623607
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.3309834448
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3957100961
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2296595910
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1677662612
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.1806628054
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.811883035
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1475273325
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.266343537
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.999762642
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3729126224
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.162015060
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1336147161
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.889914041
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.383950828
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2604350634
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3483728548
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.4023999495
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1144784090
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2314786702
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2801975616
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1133168365
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2814992914
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.2476311877
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.3673837348
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4151357884
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.724459028
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2055990351
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3211835541
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1156371225
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.154115852
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2477012887
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2448193624
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1537643861
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1838179102
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1507437817
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.385940007
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2277936532
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2049685361
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3999995592
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3610205471
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.216788060
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1783439602
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3672950388
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3461063160
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.467826025
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2630847635
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.1889194045
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3602780331
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2532789570
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.4254676159
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1739560615
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1620668538
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1240997668
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.8524125
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.32406605
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.1263831573
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1018173497
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.4706619
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.4202640691
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.3632679544
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2834147469
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2431754986
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.2010817067
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3544595970
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.3409895034
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.3108634517
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.2295620440
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.2664465901
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.325913821
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3567752696
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.86737503
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.3935732041
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.3383539747
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.858160765
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2683814271
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.1245265567
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.1405410312
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/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.4287124317
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1842007758
/workspace/coverage/default/41.sysrst_ctrl_smoke.2598143841
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2704154292
/workspace/coverage/default/42.sysrst_ctrl_alert_test.821737795
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2506045581
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3855859820
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.3987844683
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2622557559
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.968546498
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.5420330
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.153633645
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.4175967131
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3652002494
/workspace/coverage/default/42.sysrst_ctrl_smoke.4048147582
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1073776610
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1779899107
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3760897483
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3538663804
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.84357510
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1534753678
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3565515936
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2931248521
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2997738063
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3258566952
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3134326981
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1654882243
/workspace/coverage/default/43.sysrst_ctrl_smoke.3630600026
/workspace/coverage/default/43.sysrst_ctrl_stress_all.346891265
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3682540228
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1622805972
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.611092526
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1609027334
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2675697244
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2824069021
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2730605406
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2036778589
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1967564101
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.319665059
/workspace/coverage/default/44.sysrst_ctrl_smoke.3347902690
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3589065989
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1336424966
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2137017174
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1912782065
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.823431117
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.105815917
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1124659346
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3082268370
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.4178604955
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1575675343
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.4272193088
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.4023784809
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1542130508
/workspace/coverage/default/45.sysrst_ctrl_smoke.2964595299
/workspace/coverage/default/45.sysrst_ctrl_stress_all.4031765346
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2562776706
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1926839318
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.400214123
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2265436605
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4160243135
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2318153098
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2266096874
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.4244303893
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.476622332
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3932565712
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2993898494
/workspace/coverage/default/46.sysrst_ctrl_smoke.2080506704
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1460865925
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.229435959
/workspace/coverage/default/47.sysrst_ctrl_alert_test.976557411
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.704695268
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1324938792
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.306456021
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1042979337
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3128405919
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3114175461
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3079879727
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1939475539
/workspace/coverage/default/47.sysrst_ctrl_smoke.2643798491
/workspace/coverage/default/47.sysrst_ctrl_stress_all.995031204
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3757411460
/workspace/coverage/default/48.sysrst_ctrl_alert_test.133088413
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2288967829
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.601576325
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.220308484
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.866868533
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1332767653
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3781324788
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1633772491
/workspace/coverage/default/48.sysrst_ctrl_smoke.2871172934
/workspace/coverage/default/49.sysrst_ctrl_alert_test.996030992
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1887644551
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3040368085
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.292951249
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3634897862
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1486989402
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3110665170
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1113260659
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1636320722
/workspace/coverage/default/49.sysrst_ctrl_smoke.4281729134
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3518948205
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.4148708309
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2115080513
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4032235365
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.112696970
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3454548672
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1223148795
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3127507271
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1612898838
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.399450139
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1431397956
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.4114320732
/workspace/coverage/default/5.sysrst_ctrl_smoke.3989619543
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3091579919
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4165782163
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1701607081
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.134932086
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.562444296
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.4092884742
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2672406004
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.479762936
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.577073192
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3986631751
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.322002527
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.335934569
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3274106132
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1881643284
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2546131021
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3874819072
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1025003736
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.553789679
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1578140137
/workspace/coverage/default/6.sysrst_ctrl_smoke.199322282
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3375612206
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2856042130
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3291578448
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3072643594
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3450059248
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1247580021
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.998869703
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2180894011
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2878005158
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3224998482
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2903297273
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1321758217
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3049321652
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.485402053
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1800059283
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.4265402376
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.903943178
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2751784860
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.4082176549
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1777142590
/workspace/coverage/default/7.sysrst_ctrl_smoke.1240657564
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.414048143
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3963058419
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2375533036
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1621705123
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1728821604
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2833197570
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.851163080
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1708259728
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3497116009
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3222217665
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2441154140
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.798319004
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3639734771
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2200103976
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.529512844
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3874452020
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1966220511
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.4042765873
/workspace/coverage/default/8.sysrst_ctrl_smoke.3403378377
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1966027931
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.682180788
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.4085479957
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3181480451
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.685291043
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.4216144669
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3843706219
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.4460210
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2103098837
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3614350292
/workspace/coverage/default/9.sysrst_ctrl_alert_test.138236759
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1761485732
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2631589453
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3752929907
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.4036434645
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1342853768
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1171785586
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1673837295
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1982359039
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3846358348
/workspace/coverage/default/9.sysrst_ctrl_smoke.1440983839
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1456747769
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4025352374
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3017917514
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3944249018
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3004316981
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.835667551
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1770197675
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.972608668
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3432640402



Total test records in report: 906
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/41.sysrst_ctrl_stress_all.168377310 Apr 25 12:51:48 PM PDT 24 Apr 25 12:52:24 PM PDT 24 12041476655 ps
T1 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2940337182 Apr 25 12:50:58 PM PDT 24 Apr 25 12:52:31 PM PDT 24 142901540529 ps
T2 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.49879642 Apr 25 12:51:34 PM PDT 24 Apr 25 12:51:38 PM PDT 24 3031563058 ps
T12 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.823431117 Apr 25 12:51:56 PM PDT 24 Apr 25 12:54:09 PM PDT 24 314652441169 ps
T13 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2517089765 Apr 25 12:50:57 PM PDT 24 Apr 25 12:51:03 PM PDT 24 2536250680 ps
T14 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.903943178 Apr 25 12:50:37 PM PDT 24 Apr 25 12:50:41 PM PDT 24 2620014156 ps
T15 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1115027369 Apr 25 12:50:28 PM PDT 24 Apr 25 12:50:39 PM PDT 24 26055429025 ps
T3 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.1529763399 Apr 25 12:51:01 PM PDT 24 Apr 25 12:57:24 PM PDT 24 146751686166 ps
T16 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.2984618902 Apr 25 12:50:35 PM PDT 24 Apr 25 12:50:39 PM PDT 24 2047027734 ps
T17 /workspace/coverage/default/40.sysrst_ctrl_alert_test.1954261026 Apr 25 12:51:47 PM PDT 24 Apr 25 12:51:56 PM PDT 24 2008393045 ps
T5 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.2292548202 Apr 25 12:50:18 PM PDT 24 Apr 25 12:51:36 PM PDT 24 107778777550 ps
T27 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1884978671 Apr 25 12:52:05 PM PDT 24 Apr 25 12:52:42 PM PDT 24 52850062212 ps
T26 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.4233530277 Apr 25 12:51:13 PM PDT 24 Apr 25 12:51:22 PM PDT 24 2613563954 ps
T55 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3950842192 Apr 25 12:51:20 PM PDT 24 Apr 25 12:51:26 PM PDT 24 2620874732 ps
T56 /workspace/coverage/default/11.sysrst_ctrl_alert_test.3616722432 Apr 25 12:50:46 PM PDT 24 Apr 25 12:50:52 PM PDT 24 2020504216 ps
T6 /workspace/coverage/default/45.sysrst_ctrl_stress_all.4031765346 Apr 25 12:51:47 PM PDT 24 Apr 25 12:52:40 PM PDT 24 80796326570 ps
T48 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1853345870 Apr 25 12:51:25 PM PDT 24 Apr 25 12:51:32 PM PDT 24 3396152136 ps
T103 /workspace/coverage/default/43.sysrst_ctrl_alert_test.3760897483 Apr 25 12:51:45 PM PDT 24 Apr 25 12:51:49 PM PDT 24 2032176092 ps
T74 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1016877143 Apr 25 12:50:17 PM PDT 24 Apr 25 12:50:25 PM PDT 24 2515495403 ps
T7 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.2302226337 Apr 25 12:51:10 PM PDT 24 Apr 25 12:51:19 PM PDT 24 2842346575 ps
T61 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.306456021 Apr 25 12:51:55 PM PDT 24 Apr 25 12:51:58 PM PDT 24 3513233595 ps
T49 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.2806529274 Apr 25 12:51:15 PM PDT 24 Apr 25 12:53:01 PM PDT 24 75991863269 ps
T8 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.1042979337 Apr 25 12:51:48 PM PDT 24 Apr 25 12:51:53 PM PDT 24 2714461041 ps
T28 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.84756718 Apr 25 12:51:41 PM PDT 24 Apr 25 12:56:46 PM PDT 24 156539097332 ps
T9 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.704238330 Apr 25 12:51:46 PM PDT 24 Apr 25 12:51:54 PM PDT 24 3828447196 ps
T50 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.1241909635 Apr 25 12:51:21 PM PDT 24 Apr 25 12:51:25 PM PDT 24 3546571469 ps
T51 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1761485732 Apr 25 12:50:36 PM PDT 24 Apr 25 12:50:43 PM PDT 24 3103586970 ps
T32 /workspace/coverage/default/30.sysrst_ctrl_stress_all.3061024795 Apr 25 12:51:18 PM PDT 24 Apr 25 12:53:33 PM PDT 24 107970165631 ps
T57 /workspace/coverage/default/26.sysrst_ctrl_smoke.801423826 Apr 25 12:51:24 PM PDT 24 Apr 25 12:51:29 PM PDT 24 2121987226 ps
T58 /workspace/coverage/default/15.sysrst_ctrl_alert_test.3532111031 Apr 25 12:50:51 PM PDT 24 Apr 25 12:50:59 PM PDT 24 2020572361 ps
T45 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.4186990156 Apr 25 12:52:12 PM PDT 24 Apr 25 12:56:48 PM PDT 24 110393518983 ps
T59 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3850228063 Apr 25 12:50:31 PM PDT 24 Apr 25 12:50:41 PM PDT 24 2612946000 ps
T10 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3598470985 Apr 25 12:50:24 PM PDT 24 Apr 25 12:52:54 PM PDT 24 60405398683 ps
T52 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3752929907 Apr 25 12:50:25 PM PDT 24 Apr 25 12:50:36 PM PDT 24 25500729843 ps
T67 /workspace/coverage/default/25.sysrst_ctrl_alert_test.922280365 Apr 25 12:51:24 PM PDT 24 Apr 25 12:51:30 PM PDT 24 2016204431 ps
T11 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.802167539 Apr 25 12:50:47 PM PDT 24 Apr 25 12:50:52 PM PDT 24 4196619326 ps
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T65 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.3440920513 Apr 25 12:51:00 PM PDT 24 Apr 25 12:51:12 PM PDT 24 9963780718 ps
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T306 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3192379154 Apr 25 12:51:08 PM PDT 24 Apr 25 12:51:15 PM PDT 24 2514183889 ps
T66 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.2539494386 Apr 25 12:50:50 PM PDT 24 Apr 25 12:50:55 PM PDT 24 6628880680 ps
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T404 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.643167067 Apr 25 12:50:14 PM PDT 24 Apr 25 12:50:26 PM PDT 24 2184981955 ps
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T405 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2506045581 Apr 25 12:51:44 PM PDT 24 Apr 25 12:51:52 PM PDT 24 3863607822 ps
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T101 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1896331854 Apr 25 12:50:30 PM PDT 24 Apr 25 12:51:18 PM PDT 24 75428502960 ps
T73 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.2309599244 Apr 25 12:51:34 PM PDT 24 Apr 25 12:51:38 PM PDT 24 2469068804 ps
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T211 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.3634897862 Apr 25 12:52:06 PM PDT 24 Apr 25 12:52:12 PM PDT 24 2518679304 ps
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T398 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.2449304418 Apr 25 12:50:44 PM PDT 24 Apr 25 12:50:50 PM PDT 24 2514889502 ps
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T274 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.2441154140 Apr 25 12:50:46 PM PDT 24 Apr 25 12:56:24 PM PDT 24 147857241055 ps
T395 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.660404175 Apr 25 12:50:50 PM PDT 24 Apr 25 12:56:13 PM PDT 24 1072691780636 ps
T263 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.685291043 Apr 25 12:53:09 PM PDT 24 Apr 25 12:53:52 PM PDT 24 76711213718 ps
T83 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3919944260 Apr 25 12:51:13 PM PDT 24 Apr 25 12:52:48 PM PDT 24 198190714416 ps
T125 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.998869703 Apr 25 12:52:00 PM PDT 24 Apr 25 12:53:03 PM PDT 24 36065567901 ps
T324 /workspace/coverage/default/49.sysrst_ctrl_alert_test.996030992 Apr 25 12:51:55 PM PDT 24 Apr 25 12:52:02 PM PDT 24 2013251993 ps
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T329 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1209119790 Apr 25 12:51:26 PM PDT 24 Apr 25 12:51:31 PM PDT 24 2049302599 ps
T311 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2704154292 Apr 25 12:51:50 PM PDT 24 Apr 25 12:51:56 PM PDT 24 6288754586 ps
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T127 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.562444296 Apr 25 12:52:01 PM PDT 24 Apr 25 12:52:34 PM PDT 24 42883528811 ps
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T128 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.3987844683 Apr 25 12:51:46 PM PDT 24 Apr 25 12:52:52 PM PDT 24 25331178346 ps
T165 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3639734771 Apr 25 12:50:42 PM PDT 24 Apr 25 12:50:54 PM PDT 24 3997528944 ps
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T85 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.426568182 Apr 25 12:51:43 PM PDT 24 Apr 25 01:00:48 PM PDT 24 2648939087058 ps
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T416 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.306534338 Apr 25 12:51:19 PM PDT 24 Apr 25 12:51:27 PM PDT 24 3300871047 ps
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T264 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3843706219 Apr 25 12:53:08 PM PDT 24 Apr 25 12:56:17 PM PDT 24 68347801235 ps
T418 /workspace/coverage/default/36.sysrst_ctrl_alert_test.2348477182 Apr 25 12:51:40 PM PDT 24 Apr 25 12:51:47 PM PDT 24 2012187744 ps
T419 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1575675343 Apr 25 12:51:46 PM PDT 24 Apr 25 12:51:51 PM PDT 24 2678310281 ps
T420 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1253161732 Apr 25 12:51:23 PM PDT 24 Apr 25 12:51:27 PM PDT 24 2464390870 ps
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T304 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2409017582 Apr 25 12:50:50 PM PDT 24 Apr 25 12:50:59 PM PDT 24 2449194591 ps
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T422 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2356358260 Apr 25 12:51:32 PM PDT 24 Apr 25 12:51:40 PM PDT 24 2611511435 ps
T130 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1728821604 Apr 25 12:51:54 PM PDT 24 Apr 25 12:52:09 PM PDT 24 23623454951 ps
T348 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.1647524428 Apr 25 12:50:53 PM PDT 24 Apr 25 12:57:28 PM PDT 24 138740061167 ps
T292 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2850149393 Apr 25 12:51:20 PM PDT 24 Apr 25 12:51:26 PM PDT 24 3640934883 ps
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T305 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.399450139 Apr 25 12:50:36 PM PDT 24 Apr 25 12:50:39 PM PDT 24 2483690669 ps
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T351 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3886622593 Apr 25 12:51:56 PM PDT 24 Apr 25 12:58:46 PM PDT 24 155625841431 ps
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T439 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2326076063 Apr 25 12:51:40 PM PDT 24 Apr 25 12:51:49 PM PDT 24 2555704847 ps
T440 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.4114320732 Apr 25 12:50:26 PM PDT 24 Apr 25 12:50:37 PM PDT 24 2509106594 ps
T441 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1817567973 Apr 25 12:51:09 PM PDT 24 Apr 25 12:51:13 PM PDT 24 2633640287 ps
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T443 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.833569047 Apr 25 12:51:00 PM PDT 24 Apr 25 12:52:30 PM PDT 24 128567146869 ps
T444 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.2856609624 Apr 25 12:51:26 PM PDT 24 Apr 25 12:51:30 PM PDT 24 2531896419 ps
T445 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.220308484 Apr 25 12:52:12 PM PDT 24 Apr 25 12:52:20 PM PDT 24 3433990351 ps
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