Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.05 99.38 96.78 100.00 97.44 98.85 99.61 94.26


Total test records in report: 915
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T592 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.3509005715 Apr 30 12:38:03 PM PDT 24 Apr 30 12:38:10 PM PDT 24 4336709331 ps
T246 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.3623599720 Apr 30 12:36:55 PM PDT 24 Apr 30 12:38:07 PM PDT 24 115059266632 ps
T214 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.4178786889 Apr 30 12:37:48 PM PDT 24 Apr 30 12:47:14 PM PDT 24 1348968763608 ps
T593 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.2120494665 Apr 30 12:38:00 PM PDT 24 Apr 30 12:38:02 PM PDT 24 6780566933 ps
T594 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2779288320 Apr 30 12:38:33 PM PDT 24 Apr 30 12:38:37 PM PDT 24 4304438679 ps
T595 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.647451703 Apr 30 12:36:36 PM PDT 24 Apr 30 12:36:39 PM PDT 24 3417506041 ps
T596 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2253025373 Apr 30 12:37:26 PM PDT 24 Apr 30 12:37:34 PM PDT 24 2610308371 ps
T597 /workspace/coverage/default/35.sysrst_ctrl_smoke.2317398974 Apr 30 12:37:46 PM PDT 24 Apr 30 12:37:52 PM PDT 24 2109869083 ps
T598 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1584525685 Apr 30 12:38:53 PM PDT 24 Apr 30 12:39:14 PM PDT 24 26847874042 ps
T208 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.2214458721 Apr 30 12:37:15 PM PDT 24 Apr 30 12:37:25 PM PDT 24 4684234248 ps
T599 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1610954477 Apr 30 12:37:19 PM PDT 24 Apr 30 12:37:22 PM PDT 24 2465672091 ps
T600 /workspace/coverage/default/42.sysrst_ctrl_smoke.1838480201 Apr 30 12:38:06 PM PDT 24 Apr 30 12:38:11 PM PDT 24 2110613195 ps
T347 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2832543495 Apr 30 12:38:43 PM PDT 24 Apr 30 12:39:34 PM PDT 24 80632051083 ps
T601 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.1842621712 Apr 30 12:37:21 PM PDT 24 Apr 30 12:37:26 PM PDT 24 6634699819 ps
T602 /workspace/coverage/default/45.sysrst_ctrl_stress_all.1934384840 Apr 30 12:38:29 PM PDT 24 Apr 30 12:43:34 PM PDT 24 108834502679 ps
T603 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1239719293 Apr 30 12:38:32 PM PDT 24 Apr 30 12:38:40 PM PDT 24 2468162190 ps
T604 /workspace/coverage/default/15.sysrst_ctrl_stress_all.1090902219 Apr 30 12:36:56 PM PDT 24 Apr 30 12:37:19 PM PDT 24 8337287325 ps
T605 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.317118292 Apr 30 12:37:48 PM PDT 24 Apr 30 12:37:57 PM PDT 24 2612583514 ps
T606 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3833888999 Apr 30 12:37:23 PM PDT 24 Apr 30 12:37:30 PM PDT 24 2511396571 ps
T607 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3239871756 Apr 30 12:36:13 PM PDT 24 Apr 30 12:36:19 PM PDT 24 2040412520 ps
T608 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.4253067095 Apr 30 12:37:56 PM PDT 24 Apr 30 12:38:03 PM PDT 24 2514255562 ps
T609 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.1454612069 Apr 30 12:37:06 PM PDT 24 Apr 30 12:37:09 PM PDT 24 2532282891 ps
T328 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.3763619534 Apr 30 12:37:15 PM PDT 24 Apr 30 12:38:29 PM PDT 24 85015473556 ps
T610 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3572365090 Apr 30 12:36:27 PM PDT 24 Apr 30 12:36:30 PM PDT 24 2652555972 ps
T611 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2958035065 Apr 30 12:37:33 PM PDT 24 Apr 30 12:37:40 PM PDT 24 2510439220 ps
T612 /workspace/coverage/default/37.sysrst_ctrl_smoke.1920708563 Apr 30 12:37:58 PM PDT 24 Apr 30 12:38:01 PM PDT 24 2126766234 ps
T181 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.514106078 Apr 30 12:38:15 PM PDT 24 Apr 30 12:38:28 PM PDT 24 5909476838 ps
T613 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.153084859 Apr 30 12:37:37 PM PDT 24 Apr 30 12:37:46 PM PDT 24 3489495666 ps
T75 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.762092203 Apr 30 12:37:17 PM PDT 24 Apr 30 12:45:22 PM PDT 24 2261526794237 ps
T614 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3462684057 Apr 30 12:38:36 PM PDT 24 Apr 30 12:38:40 PM PDT 24 4811376160 ps
T615 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3544960841 Apr 30 12:38:07 PM PDT 24 Apr 30 12:38:09 PM PDT 24 2507932713 ps
T616 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.3590160801 Apr 30 12:36:26 PM PDT 24 Apr 30 12:39:14 PM PDT 24 64707824509 ps
T617 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.3630599253 Apr 30 12:37:15 PM PDT 24 Apr 30 12:41:22 PM PDT 24 99227757633 ps
T364 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.2559523792 Apr 30 12:37:47 PM PDT 24 Apr 30 12:39:58 PM PDT 24 191237704053 ps
T618 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.331020827 Apr 30 12:37:07 PM PDT 24 Apr 30 12:37:14 PM PDT 24 2466272021 ps
T619 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3598009734 Apr 30 12:37:57 PM PDT 24 Apr 30 12:38:02 PM PDT 24 3485594345 ps
T136 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1280688895 Apr 30 12:38:12 PM PDT 24 Apr 30 12:38:19 PM PDT 24 4065498336 ps
T93 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1659519709 Apr 30 12:36:33 PM PDT 24 Apr 30 12:37:40 PM PDT 24 99342659587 ps
T620 /workspace/coverage/default/1.sysrst_ctrl_alert_test.2995936497 Apr 30 12:36:17 PM PDT 24 Apr 30 12:36:24 PM PDT 24 2012333010 ps
T351 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1417044909 Apr 30 12:37:17 PM PDT 24 Apr 30 12:38:15 PM PDT 24 83935280101 ps
T621 /workspace/coverage/default/47.sysrst_ctrl_smoke.400144168 Apr 30 12:38:21 PM PDT 24 Apr 30 12:38:23 PM PDT 24 2155977855 ps
T374 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1747943435 Apr 30 12:37:07 PM PDT 24 Apr 30 12:40:24 PM PDT 24 630765103889 ps
T215 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.569357213 Apr 30 12:36:19 PM PDT 24 Apr 30 12:36:30 PM PDT 24 5393262012 ps
T622 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3522703151 Apr 30 12:37:39 PM PDT 24 Apr 30 12:37:41 PM PDT 24 2682565915 ps
T623 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.747656526 Apr 30 12:38:13 PM PDT 24 Apr 30 12:38:18 PM PDT 24 2615471208 ps
T624 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.119542820 Apr 30 12:36:20 PM PDT 24 Apr 30 12:36:28 PM PDT 24 2510925991 ps
T625 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.405473179 Apr 30 12:36:52 PM PDT 24 Apr 30 12:37:23 PM PDT 24 35220732866 ps
T368 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.442055714 Apr 30 12:37:48 PM PDT 24 Apr 30 12:38:52 PM PDT 24 92234709665 ps
T279 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3724347067 Apr 30 12:36:29 PM PDT 24 Apr 30 12:37:36 PM PDT 24 25533788588 ps
T626 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2790587649 Apr 30 12:36:20 PM PDT 24 Apr 30 12:36:29 PM PDT 24 6553731165 ps
T94 /workspace/coverage/default/42.sysrst_ctrl_stress_all.1752223991 Apr 30 12:38:13 PM PDT 24 Apr 30 12:40:28 PM PDT 24 194297082557 ps
T627 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.954972405 Apr 30 12:36:09 PM PDT 24 Apr 30 12:40:46 PM PDT 24 108600509717 ps
T324 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.1842131968 Apr 30 12:38:29 PM PDT 24 Apr 30 12:39:37 PM PDT 24 109112730761 ps
T628 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.4271090100 Apr 30 12:38:45 PM PDT 24 Apr 30 12:39:08 PM PDT 24 32604711039 ps
T629 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.2183763238 Apr 30 12:36:34 PM PDT 24 Apr 30 12:37:27 PM PDT 24 123268297436 ps
T630 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3213949067 Apr 30 12:36:27 PM PDT 24 Apr 30 12:36:37 PM PDT 24 9947140651 ps
T631 /workspace/coverage/default/32.sysrst_ctrl_alert_test.1145332904 Apr 30 12:37:39 PM PDT 24 Apr 30 12:37:41 PM PDT 24 2037383588 ps
T137 /workspace/coverage/default/41.sysrst_ctrl_stress_all.2488158666 Apr 30 12:38:06 PM PDT 24 Apr 30 12:38:20 PM PDT 24 10947826213 ps
T632 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.997089928 Apr 30 12:38:43 PM PDT 24 Apr 30 12:39:21 PM PDT 24 24337299099 ps
T633 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1155314254 Apr 30 12:38:55 PM PDT 24 Apr 30 12:39:56 PM PDT 24 84767698726 ps
T634 /workspace/coverage/default/19.sysrst_ctrl_stress_all.3183096509 Apr 30 12:36:59 PM PDT 24 Apr 30 12:37:18 PM PDT 24 7224071470 ps
T635 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4021300390 Apr 30 12:36:28 PM PDT 24 Apr 30 12:36:34 PM PDT 24 2453824566 ps
T636 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3020838962 Apr 30 12:37:25 PM PDT 24 Apr 30 12:37:33 PM PDT 24 2611509254 ps
T637 /workspace/coverage/default/8.sysrst_ctrl_smoke.3934132376 Apr 30 12:36:26 PM PDT 24 Apr 30 12:36:28 PM PDT 24 2178543409 ps
T638 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2066998087 Apr 30 12:37:38 PM PDT 24 Apr 30 12:38:10 PM PDT 24 45159230998 ps
T639 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.1520197102 Apr 30 12:37:09 PM PDT 24 Apr 30 12:37:21 PM PDT 24 31200102744 ps
T640 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1686930881 Apr 30 12:38:04 PM PDT 24 Apr 30 12:38:11 PM PDT 24 2512509969 ps
T209 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.3022000644 Apr 30 12:38:21 PM PDT 24 Apr 30 12:38:24 PM PDT 24 3097110738 ps
T326 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3714832872 Apr 30 12:36:56 PM PDT 24 Apr 30 12:39:25 PM PDT 24 61574795058 ps
T641 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1388696724 Apr 30 12:36:20 PM PDT 24 Apr 30 12:36:22 PM PDT 24 2306550712 ps
T642 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2140715748 Apr 30 12:38:21 PM PDT 24 Apr 30 12:38:24 PM PDT 24 2471667240 ps
T643 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3833135506 Apr 30 12:36:34 PM PDT 24 Apr 30 12:36:39 PM PDT 24 8739044862 ps
T644 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3029321335 Apr 30 12:38:44 PM PDT 24 Apr 30 12:39:28 PM PDT 24 68352744701 ps
T645 /workspace/coverage/default/36.sysrst_ctrl_smoke.3616711309 Apr 30 12:37:46 PM PDT 24 Apr 30 12:37:53 PM PDT 24 2110296300 ps
T646 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.289930195 Apr 30 12:38:07 PM PDT 24 Apr 30 12:38:10 PM PDT 24 2269709963 ps
T647 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2430037094 Apr 30 12:36:26 PM PDT 24 Apr 30 12:36:29 PM PDT 24 2528986810 ps
T648 /workspace/coverage/default/43.sysrst_ctrl_stress_all.2972743074 Apr 30 12:38:10 PM PDT 24 Apr 30 12:38:25 PM PDT 24 10434706975 ps
T649 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3414729166 Apr 30 12:38:31 PM PDT 24 Apr 30 12:39:59 PM PDT 24 37762535955 ps
T650 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.3086706014 Apr 30 12:38:04 PM PDT 24 Apr 30 12:38:13 PM PDT 24 3720118116 ps
T284 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3918600167 Apr 30 12:38:05 PM PDT 24 Apr 30 12:40:32 PM PDT 24 63439309123 ps
T325 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.3902075250 Apr 30 12:36:35 PM PDT 24 Apr 30 12:42:16 PM PDT 24 159017392902 ps
T118 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.934408545 Apr 30 12:38:30 PM PDT 24 Apr 30 12:38:52 PM PDT 24 23736242152 ps
T651 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.837493131 Apr 30 12:37:40 PM PDT 24 Apr 30 12:37:45 PM PDT 24 5378807282 ps
T652 /workspace/coverage/default/22.sysrst_ctrl_smoke.2454604216 Apr 30 12:37:06 PM PDT 24 Apr 30 12:37:10 PM PDT 24 2117063205 ps
T653 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.3160213820 Apr 30 12:36:11 PM PDT 24 Apr 30 12:36:18 PM PDT 24 2194672798 ps
T349 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.748603561 Apr 30 12:38:42 PM PDT 24 Apr 30 12:40:48 PM PDT 24 99518847785 ps
T654 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.674185249 Apr 30 12:37:08 PM PDT 24 Apr 30 12:37:19 PM PDT 24 3909187798 ps
T335 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3314726291 Apr 30 12:38:04 PM PDT 24 Apr 30 12:38:27 PM PDT 24 56301249062 ps
T655 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.987967912 Apr 30 12:37:54 PM PDT 24 Apr 30 12:37:57 PM PDT 24 3897154611 ps
T656 /workspace/coverage/default/21.sysrst_ctrl_smoke.1919156201 Apr 30 12:37:07 PM PDT 24 Apr 30 12:37:09 PM PDT 24 2123284899 ps
T657 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1515274649 Apr 30 12:38:00 PM PDT 24 Apr 30 12:38:05 PM PDT 24 2621160396 ps
T658 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3121554463 Apr 30 12:36:58 PM PDT 24 Apr 30 12:37:16 PM PDT 24 23352231661 ps
T659 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1071817299 Apr 30 12:37:55 PM PDT 24 Apr 30 12:38:07 PM PDT 24 3791526465 ps
T660 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.557644905 Apr 30 12:36:57 PM PDT 24 Apr 30 12:37:00 PM PDT 24 2530124726 ps
T661 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1100659401 Apr 30 12:38:19 PM PDT 24 Apr 30 12:40:52 PM PDT 24 65879703576 ps
T327 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.1130657739 Apr 30 12:36:52 PM PDT 24 Apr 30 12:37:38 PM PDT 24 114769021166 ps
T662 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.1328268398 Apr 30 12:36:12 PM PDT 24 Apr 30 12:36:26 PM PDT 24 4948184154 ps
T663 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1055896816 Apr 30 12:36:33 PM PDT 24 Apr 30 12:36:40 PM PDT 24 5651824821 ps
T664 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.444313273 Apr 30 12:37:06 PM PDT 24 Apr 30 12:37:58 PM PDT 24 20570358553 ps
T665 /workspace/coverage/default/34.sysrst_ctrl_smoke.2978134023 Apr 30 12:37:40 PM PDT 24 Apr 30 12:37:44 PM PDT 24 2118656880 ps
T333 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.621896159 Apr 30 12:37:14 PM PDT 24 Apr 30 12:38:54 PM PDT 24 65227745490 ps
T210 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.414462641 Apr 30 12:36:12 PM PDT 24 Apr 30 12:52:29 PM PDT 24 880353226550 ps
T666 /workspace/coverage/default/29.sysrst_ctrl_stress_all.1579223360 Apr 30 12:37:28 PM PDT 24 Apr 30 12:37:56 PM PDT 24 11024470858 ps
T667 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.1078553357 Apr 30 12:36:58 PM PDT 24 Apr 30 12:37:06 PM PDT 24 36842769547 ps
T668 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3120007204 Apr 30 12:38:44 PM PDT 24 Apr 30 12:38:50 PM PDT 24 27157529206 ps
T669 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1325214750 Apr 30 12:38:10 PM PDT 24 Apr 30 12:38:13 PM PDT 24 2149551117 ps
T670 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.964991258 Apr 30 12:37:30 PM PDT 24 Apr 30 12:37:41 PM PDT 24 3821299025 ps
T671 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.4057423356 Apr 30 12:37:58 PM PDT 24 Apr 30 12:38:02 PM PDT 24 2107783537 ps
T672 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.161622169 Apr 30 12:38:05 PM PDT 24 Apr 30 12:38:12 PM PDT 24 2422221959 ps
T673 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.425382965 Apr 30 12:38:44 PM PDT 24 Apr 30 12:39:15 PM PDT 24 45160677574 ps
T674 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.745331845 Apr 30 12:37:30 PM PDT 24 Apr 30 12:37:40 PM PDT 24 3281141113 ps
T675 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.2246030036 Apr 30 12:36:21 PM PDT 24 Apr 30 12:36:23 PM PDT 24 2201428275 ps
T676 /workspace/coverage/default/1.sysrst_ctrl_smoke.3204980294 Apr 30 12:36:10 PM PDT 24 Apr 30 12:36:13 PM PDT 24 2131909878 ps
T677 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.2552813146 Apr 30 12:36:29 PM PDT 24 Apr 30 12:36:33 PM PDT 24 3541072936 ps
T678 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.4214396591 Apr 30 12:37:46 PM PDT 24 Apr 30 12:37:50 PM PDT 24 2514247355 ps
T679 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3392245576 Apr 30 12:36:31 PM PDT 24 Apr 30 12:36:40 PM PDT 24 2609365812 ps
T680 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3350295476 Apr 30 12:36:27 PM PDT 24 Apr 30 12:43:47 PM PDT 24 163993800529 ps
T681 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.2418200881 Apr 30 12:38:06 PM PDT 24 Apr 30 12:41:00 PM PDT 24 64827105314 ps
T682 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2127969512 Apr 30 12:36:33 PM PDT 24 Apr 30 12:36:34 PM PDT 24 2737022703 ps
T683 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3924584491 Apr 30 12:38:28 PM PDT 24 Apr 30 12:38:32 PM PDT 24 2617293068 ps
T684 /workspace/coverage/default/12.sysrst_ctrl_smoke.1092479131 Apr 30 12:36:32 PM PDT 24 Apr 30 12:36:36 PM PDT 24 2118872889 ps
T685 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2146498605 Apr 30 12:36:19 PM PDT 24 Apr 30 12:36:28 PM PDT 24 2613285502 ps
T686 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2915701322 Apr 30 12:38:45 PM PDT 24 Apr 30 12:39:51 PM PDT 24 25081160340 ps
T687 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.2695381225 Apr 30 12:36:57 PM PDT 24 Apr 30 12:37:00 PM PDT 24 2628756670 ps
T688 /workspace/coverage/default/31.sysrst_ctrl_stress_all.578798787 Apr 30 12:37:32 PM PDT 24 Apr 30 12:37:50 PM PDT 24 9076725538 ps
T689 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.924752966 Apr 30 12:36:21 PM PDT 24 Apr 30 12:37:52 PM PDT 24 33643085837 ps
T690 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2458193814 Apr 30 12:38:05 PM PDT 24 Apr 30 12:38:15 PM PDT 24 11424489827 ps
T332 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.4187190895 Apr 30 12:38:43 PM PDT 24 Apr 30 12:40:09 PM PDT 24 133077838905 ps
T358 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.4288987700 Apr 30 12:36:46 PM PDT 24 Apr 30 12:43:36 PM PDT 24 148169096012 ps
T369 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.141350308 Apr 30 12:37:24 PM PDT 24 Apr 30 12:38:18 PM PDT 24 70580269881 ps
T691 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2652527637 Apr 30 12:36:18 PM PDT 24 Apr 30 12:36:23 PM PDT 24 2617854419 ps
T692 /workspace/coverage/default/8.sysrst_ctrl_alert_test.1778571476 Apr 30 12:36:37 PM PDT 24 Apr 30 12:36:41 PM PDT 24 2025415570 ps
T693 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3789292109 Apr 30 12:38:13 PM PDT 24 Apr 30 12:38:16 PM PDT 24 2529586156 ps
T694 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.606787954 Apr 30 12:37:16 PM PDT 24 Apr 30 12:37:18 PM PDT 24 3111338186 ps
T695 /workspace/coverage/default/29.sysrst_ctrl_alert_test.1558813470 Apr 30 12:37:29 PM PDT 24 Apr 30 12:37:35 PM PDT 24 2008335297 ps
T696 /workspace/coverage/default/14.sysrst_ctrl_smoke.2567291377 Apr 30 12:36:40 PM PDT 24 Apr 30 12:36:42 PM PDT 24 2140258528 ps
T697 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3782105182 Apr 30 12:36:28 PM PDT 24 Apr 30 12:36:31 PM PDT 24 2507858517 ps
T168 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.1296871311 Apr 30 12:38:00 PM PDT 24 Apr 30 12:38:06 PM PDT 24 4301593610 ps
T698 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1292691979 Apr 30 12:38:00 PM PDT 24 Apr 30 12:38:02 PM PDT 24 5364512017 ps
T138 /workspace/coverage/default/25.sysrst_ctrl_stress_all.2589746102 Apr 30 12:37:14 PM PDT 24 Apr 30 12:38:39 PM PDT 24 62704084582 ps
T699 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.2196688690 Apr 30 12:37:56 PM PDT 24 Apr 30 12:37:59 PM PDT 24 2798637111 ps
T700 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.2616730278 Apr 30 12:37:05 PM PDT 24 Apr 30 12:37:09 PM PDT 24 2024960382 ps
T701 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3949636117 Apr 30 12:38:19 PM PDT 24 Apr 30 12:38:20 PM PDT 24 2327370090 ps
T702 /workspace/coverage/default/38.sysrst_ctrl_stress_all.1074443209 Apr 30 12:37:55 PM PDT 24 Apr 30 12:38:29 PM PDT 24 13554182075 ps
T703 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2774199481 Apr 30 12:38:06 PM PDT 24 Apr 30 12:38:12 PM PDT 24 6881691077 ps
T375 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1570602110 Apr 30 12:37:55 PM PDT 24 Apr 30 12:38:05 PM PDT 24 49547199785 ps
T704 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.82333509 Apr 30 12:36:36 PM PDT 24 Apr 30 12:36:39 PM PDT 24 9507579863 ps
T705 /workspace/coverage/default/14.sysrst_ctrl_stress_all.3657584175 Apr 30 12:36:43 PM PDT 24 Apr 30 12:37:15 PM PDT 24 13259587338 ps
T706 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.3720589042 Apr 30 12:36:55 PM PDT 24 Apr 30 12:37:00 PM PDT 24 2614325558 ps
T707 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1516753426 Apr 30 12:38:33 PM PDT 24 Apr 30 12:38:36 PM PDT 24 2625503208 ps
T350 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1819383723 Apr 30 12:38:42 PM PDT 24 Apr 30 12:42:53 PM PDT 24 87553650754 ps
T708 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4199814142 Apr 30 12:38:43 PM PDT 24 Apr 30 12:41:34 PM PDT 24 67193026385 ps
T95 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1004927497 Apr 30 12:36:14 PM PDT 24 Apr 30 12:36:25 PM PDT 24 3665952481 ps
T709 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.412990399 Apr 30 12:36:33 PM PDT 24 Apr 30 12:40:22 PM PDT 24 99020146414 ps
T710 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1182092975 Apr 30 12:37:05 PM PDT 24 Apr 30 12:37:47 PM PDT 24 29585120609 ps
T711 /workspace/coverage/default/23.sysrst_ctrl_stress_all.1948708938 Apr 30 12:37:15 PM PDT 24 Apr 30 12:37:21 PM PDT 24 8618918676 ps
T712 /workspace/coverage/default/41.sysrst_ctrl_smoke.2568203837 Apr 30 12:38:04 PM PDT 24 Apr 30 12:38:07 PM PDT 24 2126480699 ps
T713 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3554858665 Apr 30 12:36:37 PM PDT 24 Apr 30 12:36:44 PM PDT 24 2224009865 ps
T714 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2562961002 Apr 30 12:36:12 PM PDT 24 Apr 30 12:36:17 PM PDT 24 3323486987 ps
T715 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1042249888 Apr 30 12:38:16 PM PDT 24 Apr 30 12:38:20 PM PDT 24 2171549372 ps
T716 /workspace/coverage/default/24.sysrst_ctrl_alert_test.3781791708 Apr 30 12:37:17 PM PDT 24 Apr 30 12:37:21 PM PDT 24 2018056687 ps
T330 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.3656777681 Apr 30 12:36:35 PM PDT 24 Apr 30 12:37:36 PM PDT 24 95702962745 ps
T717 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.961668516 Apr 30 12:36:51 PM PDT 24 Apr 30 12:36:53 PM PDT 24 2499023988 ps
T718 /workspace/coverage/default/26.sysrst_ctrl_smoke.2672138085 Apr 30 12:37:14 PM PDT 24 Apr 30 12:37:17 PM PDT 24 2126231104 ps
T719 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2274525468 Apr 30 12:36:21 PM PDT 24 Apr 30 12:36:25 PM PDT 24 3971922048 ps
T720 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.4205296762 Apr 30 12:37:49 PM PDT 24 Apr 30 12:37:52 PM PDT 24 8058079436 ps
T721 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2817174222 Apr 30 12:36:46 PM PDT 24 Apr 30 12:38:30 PM PDT 24 37623183544 ps
T722 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3363765551 Apr 30 12:36:59 PM PDT 24 Apr 30 12:37:07 PM PDT 24 2511254569 ps
T723 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1355651504 Apr 30 12:36:59 PM PDT 24 Apr 30 12:37:04 PM PDT 24 8189010508 ps
T724 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1132668446 Apr 30 12:37:32 PM PDT 24 Apr 30 12:38:44 PM PDT 24 54089007750 ps
T725 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1966471058 Apr 30 12:38:00 PM PDT 24 Apr 30 12:38:03 PM PDT 24 3101176853 ps
T726 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2656637803 Apr 30 12:36:14 PM PDT 24 Apr 30 12:36:17 PM PDT 24 3955691215 ps
T727 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.498732424 Apr 30 12:36:28 PM PDT 24 Apr 30 12:36:32 PM PDT 24 2629938520 ps
T728 /workspace/coverage/default/13.sysrst_ctrl_alert_test.3145169129 Apr 30 12:36:54 PM PDT 24 Apr 30 12:36:57 PM PDT 24 2027590453 ps
T729 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.88438420 Apr 30 12:36:17 PM PDT 24 Apr 30 12:36:28 PM PDT 24 3500515071 ps
T730 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2570004744 Apr 30 12:36:46 PM PDT 24 Apr 30 12:36:54 PM PDT 24 2511313378 ps
T731 /workspace/coverage/default/43.sysrst_ctrl_alert_test.442247317 Apr 30 12:38:14 PM PDT 24 Apr 30 12:38:16 PM PDT 24 2046823977 ps
T145 /workspace/coverage/default/1.sysrst_ctrl_stress_all.1393062462 Apr 30 12:36:11 PM PDT 24 Apr 30 12:37:37 PM PDT 24 214046612915 ps
T732 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2123714119 Apr 30 12:38:03 PM PDT 24 Apr 30 12:38:04 PM PDT 24 2620828122 ps
T733 /workspace/coverage/default/27.sysrst_ctrl_alert_test.2597121725 Apr 30 12:37:35 PM PDT 24 Apr 30 12:37:41 PM PDT 24 2012445950 ps
T734 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1052973822 Apr 30 12:36:28 PM PDT 24 Apr 30 12:36:36 PM PDT 24 2469331190 ps
T735 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.696179276 Apr 30 12:37:55 PM PDT 24 Apr 30 12:40:48 PM PDT 24 121917935869 ps
T736 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3981181178 Apr 30 12:38:33 PM PDT 24 Apr 30 12:38:36 PM PDT 24 2519795132 ps
T737 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.4076232278 Apr 30 12:37:49 PM PDT 24 Apr 30 12:38:35 PM PDT 24 32659566333 ps
T738 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.375571389 Apr 30 12:36:19 PM PDT 24 Apr 30 12:41:15 PM PDT 24 121211073334 ps
T271 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.3624818612 Apr 30 12:36:44 PM PDT 24 Apr 30 12:38:19 PM PDT 24 35602161036 ps
T267 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.234134484 Apr 30 12:36:22 PM PDT 24 Apr 30 12:37:09 PM PDT 24 19824182083 ps
T352 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.437619877 Apr 30 12:38:30 PM PDT 24 Apr 30 12:39:25 PM PDT 24 86708883149 ps
T334 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.4050150068 Apr 30 12:38:41 PM PDT 24 Apr 30 12:42:01 PM PDT 24 159360969777 ps
T739 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.1514435333 Apr 30 12:38:01 PM PDT 24 Apr 30 12:38:04 PM PDT 24 4376635887 ps
T740 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.3501137062 Apr 30 12:37:06 PM PDT 24 Apr 30 12:37:10 PM PDT 24 2463011025 ps
T741 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2128897230 Apr 30 12:38:10 PM PDT 24 Apr 30 12:38:22 PM PDT 24 4547528010 ps
T742 /workspace/coverage/default/49.sysrst_ctrl_stress_all.2051410931 Apr 30 12:38:30 PM PDT 24 Apr 30 12:38:49 PM PDT 24 7220363074 ps
T743 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.64280021 Apr 30 12:37:06 PM PDT 24 Apr 30 12:37:10 PM PDT 24 4399861888 ps
T744 /workspace/coverage/default/45.sysrst_ctrl_smoke.1212151538 Apr 30 12:38:11 PM PDT 24 Apr 30 12:38:15 PM PDT 24 2114264677 ps
T745 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2706033608 Apr 30 12:37:55 PM PDT 24 Apr 30 12:37:58 PM PDT 24 3222409501 ps
T746 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2381822525 Apr 30 12:37:23 PM PDT 24 Apr 30 12:38:20 PM PDT 24 85481252007 ps
T747 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.95379120 Apr 30 12:36:58 PM PDT 24 Apr 30 12:37:01 PM PDT 24 2835452139 ps
T748 /workspace/coverage/default/49.sysrst_ctrl_smoke.2931164729 Apr 30 12:38:30 PM PDT 24 Apr 30 12:38:32 PM PDT 24 2130740743 ps
T749 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.446199541 Apr 30 12:37:25 PM PDT 24 Apr 30 12:37:28 PM PDT 24 3940404070 ps
T750 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2213391191 Apr 30 12:38:44 PM PDT 24 Apr 30 12:39:03 PM PDT 24 27854387175 ps
T751 /workspace/coverage/default/4.sysrst_ctrl_alert_test.1611517825 Apr 30 12:36:18 PM PDT 24 Apr 30 12:36:22 PM PDT 24 2022092007 ps
T752 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.747543488 Apr 30 12:36:32 PM PDT 24 Apr 30 12:36:39 PM PDT 24 2112731396 ps
T753 /workspace/coverage/default/46.sysrst_ctrl_stress_all.545580389 Apr 30 12:38:21 PM PDT 24 Apr 30 12:38:27 PM PDT 24 8034112431 ps
T754 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2769122276 Apr 30 12:36:20 PM PDT 24 Apr 30 12:36:24 PM PDT 24 2477833507 ps
T755 /workspace/coverage/default/39.sysrst_ctrl_alert_test.4198242242 Apr 30 12:38:04 PM PDT 24 Apr 30 12:38:11 PM PDT 24 2012311638 ps
T756 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2678919599 Apr 30 12:37:05 PM PDT 24 Apr 30 12:37:08 PM PDT 24 2065497893 ps
T757 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.893282703 Apr 30 12:36:39 PM PDT 24 Apr 30 12:36:42 PM PDT 24 3229721931 ps
T758 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.4055011183 Apr 30 12:38:42 PM PDT 24 Apr 30 12:40:12 PM PDT 24 32625974420 ps
T759 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1347930380 Apr 30 12:37:33 PM PDT 24 Apr 30 12:38:34 PM PDT 24 25958890113 ps
T760 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.381898101 Apr 30 12:38:42 PM PDT 24 Apr 30 12:38:56 PM PDT 24 27152826697 ps
T761 /workspace/coverage/default/20.sysrst_ctrl_smoke.4029993029 Apr 30 12:36:57 PM PDT 24 Apr 30 12:37:01 PM PDT 24 2116899580 ps
T342 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1403459108 Apr 30 12:38:44 PM PDT 24 Apr 30 12:43:25 PM PDT 24 106768406221 ps
T762 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.4216883659 Apr 30 12:36:22 PM PDT 24 Apr 30 12:36:24 PM PDT 24 2556793952 ps
T763 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3729570424 Apr 30 12:36:28 PM PDT 24 Apr 30 12:37:21 PM PDT 24 39359588823 ps
T764 /workspace/coverage/default/5.sysrst_ctrl_smoke.2016731515 Apr 30 12:36:23 PM PDT 24 Apr 30 12:36:26 PM PDT 24 2123624020 ps
T292 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.4032020636 Apr 30 12:38:14 PM PDT 24 Apr 30 12:38:47 PM PDT 24 38407281723 ps
T765 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.3323024452 Apr 30 12:36:12 PM PDT 24 Apr 30 12:36:17 PM PDT 24 3209629587 ps
T766 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3194925208 Apr 30 12:38:14 PM PDT 24 Apr 30 12:38:55 PM PDT 24 55322295885 ps
T767 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.3852399914 Apr 30 12:37:30 PM PDT 24 Apr 30 12:37:33 PM PDT 24 2476541982 ps
T768 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2891080627 Apr 30 12:36:58 PM PDT 24 Apr 30 12:37:02 PM PDT 24 5872260499 ps
T769 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.211375783 Apr 30 12:36:20 PM PDT 24 Apr 30 12:36:25 PM PDT 24 2169475332 ps
T770 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3233890432 Apr 30 12:36:35 PM PDT 24 Apr 30 12:36:39 PM PDT 24 2461641988 ps
T346 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3624710754 Apr 30 12:36:19 PM PDT 24 Apr 30 12:36:45 PM PDT 24 48035565037 ps
T771 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.422762662 Apr 30 12:37:23 PM PDT 24 Apr 30 12:37:25 PM PDT 24 2569633277 ps
T772 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.881583057 Apr 30 12:38:06 PM PDT 24 Apr 30 12:38:11 PM PDT 24 2146360890 ps
T773 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.3830260277 Apr 30 12:36:56 PM PDT 24 Apr 30 12:37:02 PM PDT 24 2876280125 ps
T774 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2250281361 Apr 30 12:38:42 PM PDT 24 Apr 30 12:38:57 PM PDT 24 19099336066 ps
T775 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3461377215 Apr 30 12:37:55 PM PDT 24 Apr 30 12:38:00 PM PDT 24 2523008777 ps
T776 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1995143146 Apr 30 12:36:34 PM PDT 24 Apr 30 12:36:37 PM PDT 24 2831317150 ps
T777 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.2199188943 Apr 30 12:37:35 PM PDT 24 Apr 30 12:37:44 PM PDT 24 2955297350 ps
T778 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.469233914 Apr 30 12:38:44 PM PDT 24 Apr 30 12:39:35 PM PDT 24 35367755707 ps
T233 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2326945198 Apr 30 12:36:56 PM PDT 24 Apr 30 12:39:23 PM PDT 24 58297096027 ps
T779 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.569211355 Apr 30 12:36:22 PM PDT 24 Apr 30 12:36:26 PM PDT 24 2230766428 ps
T780 /workspace/coverage/default/34.sysrst_ctrl_stress_all.774486555 Apr 30 12:37:46 PM PDT 24 Apr 30 12:43:32 PM PDT 24 126400941175 ps
T781 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.415809140 Apr 30 12:36:34 PM PDT 24 Apr 30 12:36:42 PM PDT 24 2610208120 ps
T782 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.862683040 Apr 30 12:37:28 PM PDT 24 Apr 30 12:37:29 PM PDT 24 5026146146 ps
T783 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.3822020011 Apr 30 12:37:08 PM PDT 24 Apr 30 12:37:15 PM PDT 24 2548970462 ps
T300 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2569165057 Apr 30 12:36:32 PM PDT 24 Apr 30 12:37:18 PM PDT 24 72257853603 ps
T784 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2376884899 Apr 30 12:38:19 PM PDT 24 Apr 30 12:38:22 PM PDT 24 2463616472 ps
T785 /workspace/coverage/default/46.sysrst_ctrl_smoke.700854147 Apr 30 12:38:20 PM PDT 24 Apr 30 12:38:22 PM PDT 24 2136597168 ps
T786 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.3760536622 Apr 30 12:36:59 PM PDT 24 Apr 30 12:44:41 PM PDT 24 178209408103 ps
T787 /workspace/coverage/default/20.sysrst_ctrl_alert_test.3226949897 Apr 30 12:37:09 PM PDT 24 Apr 30 12:37:15 PM PDT 24 2013612651 ps
T359 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.2329528861 Apr 30 12:36:21 PM PDT 24 Apr 30 12:41:51 PM PDT 24 126790849054 ps
T788 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2438003218 Apr 30 12:36:27 PM PDT 24 Apr 30 12:36:30 PM PDT 24 2534569398 ps
T789 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.798459368 Apr 30 12:38:02 PM PDT 24 Apr 30 12:38:07 PM PDT 24 2616786868 ps
T790 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1883420087 Apr 30 12:38:11 PM PDT 24 Apr 30 12:38:19 PM PDT 24 2478279433 ps
T791 /workspace/coverage/default/7.sysrst_ctrl_alert_test.2319254842 Apr 30 12:36:28 PM PDT 24 Apr 30 12:36:31 PM PDT 24 2029068450 ps
T792 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.225924122 Apr 30 12:38:06 PM PDT 24 Apr 30 12:38:16 PM PDT 24 3259641937 ps
T793 /workspace/coverage/default/43.sysrst_ctrl_smoke.2777307121 Apr 30 12:38:15 PM PDT 24 Apr 30 12:38:17 PM PDT 24 2164501177 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%