Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.05	99.38	96.78	100.00	97.44	98.85	99.61	94.26

Total tests in report: 915

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
64.36	64.36	78.63	78.63	66.46	66.46	91.78	91.78	39.74	39.74	80.55	80.55	72.06	72.06	21.28	21.28	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.668416955
79.62	15.26	94.23	15.60	87.84	21.39	97.03	5.25	57.69	17.95	94.27	13.72	90.66	18.59	35.64	14.36	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.275262329
84.50	4.88	96.75	2.52	90.70	2.86	97.03	0.00	80.77	23.08	96.64	2.37	93.45	2.79	36.15	0.51	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.437629143
88.08	3.58	97.42	0.67	91.68	0.99	97.03	0.00	84.62	3.85	97.04	0.41	95.09	1.64	53.69	17.54	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3237546830
89.46	1.38	97.97	0.54	92.49	0.81	97.03	0.00	86.54	1.92	97.45	0.41	96.05	0.96	58.72	5.03	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.464610489
90.81	1.35	97.97	0.00	92.49	0.00	97.03	0.00	86.54	0.00	97.45	0.00	96.05	0.00	68.15	9.44	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1570602110
91.97	1.16	97.98	0.02	93.55	1.06	97.72	0.68	86.54	0.00	97.49	0.04	96.05	0.00	74.46	6.31	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2496490103
92.96	0.99	98.30	0.32	93.83	0.28	97.72	0.00	89.10	2.56	97.82	0.33	96.92	0.87	77.03	2.56	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.4008929919
93.55	0.59	98.32	0.02	93.98	0.15	98.17	0.46	89.10	0.00	97.89	0.07	97.21	0.29	80.15	3.13	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.368554355
94.00	0.46	98.36	0.04	94.01	0.03	98.17	0.00	89.74	0.64	97.93	0.04	97.30	0.10	82.51	2.36	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.988616332
94.33	0.32	98.49	0.13	94.08	0.08	98.17	0.00	89.74	0.00	97.93	0.00	97.30	0.00	84.56	2.05	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3828243002
94.61	0.28	98.49	0.00	94.11	0.03	99.77	1.60	89.74	0.00	97.93	0.00	97.40	0.10	84.82	0.26	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.203801696
94.88	0.27	98.58	0.09	94.21	0.10	99.77	0.00	91.03	1.28	98.04	0.11	97.69	0.29	84.82	0.00	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3204200843
95.12	0.24	98.66	0.07	94.26	0.05	99.77	0.00	92.31	1.28	98.11	0.07	97.88	0.19	84.82	0.00	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.603685049
95.33	0.22	98.66	0.00	94.29	0.03	99.77	0.00	92.31	0.00	98.11	0.00	97.88	0.00	86.31	1.49	/workspace/coverage/default/41.sysrst_ctrl_combo_detect.2199425288
95.54	0.21	98.69	0.04	94.31	0.03	99.77	0.00	92.95	0.64	98.15	0.04	97.98	0.10	86.92	0.62	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1060423645
95.74	0.20	98.73	0.04	94.39	0.08	99.77	0.00	93.59	0.64	98.19	0.04	98.07	0.10	87.44	0.51	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3850235274
95.93	0.19	98.79	0.06	94.59	0.20	99.77	0.00	93.59	0.00	98.26	0.07	98.75	0.67	87.74	0.31	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2380059408
96.10	0.17	98.79	0.00	94.62	0.03	99.77	0.00	93.59	0.00	98.26	0.00	98.84	0.10	88.82	1.08	/workspace/coverage/default/30.sysrst_ctrl_combo_detect.1526471497
96.26	0.16	98.82	0.04	94.94	0.33	99.77	0.00	94.23	0.64	98.30	0.04	98.94	0.10	88.82	0.00	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3080035121
96.39	0.13	98.82	0.00	95.80	0.86	99.77	0.00	94.23	0.00	98.30	0.00	98.94	0.00	88.87	0.05	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.1178018840
96.52	0.13	98.88	0.06	95.83	0.03	99.77	0.00	94.87	0.64	98.37	0.07	99.04	0.10	88.87	0.00	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1647618836
96.65	0.13	98.94	0.06	95.85	0.03	99.77	0.00	95.51	0.64	98.45	0.07	99.13	0.10	88.87	0.00	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.514106078
96.77	0.12	98.97	0.04	95.88	0.03	99.77	0.00	96.15	0.64	98.48	0.04	99.23	0.10	88.87	0.00	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1004927497
96.89	0.12	99.01	0.04	95.90	0.03	99.77	0.00	96.79	0.64	98.52	0.04	99.33	0.10	88.87	0.00	/workspace/coverage/default/0.sysrst_ctrl_stress_all.2281726209
97.01	0.12	99.05	0.04	95.93	0.03	99.77	0.00	97.44	0.64	98.56	0.04	99.42	0.10	88.87	0.00	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.528803350
97.12	0.12	99.14	0.09	95.96	0.03	99.77	0.00	97.44	0.00	98.56	0.00	99.42	0.00	89.59	0.72	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3931625446
97.21	0.09	99.14	0.00	95.96	0.00	99.77	0.00	97.44	0.00	98.56	0.00	99.42	0.00	90.21	0.62	/workspace/coverage/default/42.sysrst_ctrl_stress_all.1752223991
97.28	0.07	99.16	0.02	96.41	0.46	99.77	0.00	97.44	0.00	98.56	0.00	99.42	0.00	90.21	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1195089850
97.34	0.06	99.16	0.00	96.41	0.00	99.77	0.00	97.44	0.00	98.56	0.00	99.42	0.00	90.62	0.41	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.781364962
97.39	0.05	99.22	0.06	96.49	0.08	100.00	0.23	97.44	0.00	98.56	0.00	99.42	0.00	90.62	0.00	/workspace/coverage/default/14.sysrst_ctrl_alert_test.2374046493
97.44	0.05	99.25	0.04	96.64	0.15	100.00	0.00	97.44	0.00	98.63	0.07	99.52	0.10	90.62	0.00	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3543715546
97.49	0.05	99.25	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.63	0.00	99.52	0.00	90.97	0.36	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.141350308
97.54	0.05	99.25	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.63	0.00	99.52	0.00	91.33	0.36	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.4187190895
97.58	0.04	99.25	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.63	0.00	99.52	0.00	91.59	0.26	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1951219038
97.62	0.04	99.25	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.63	0.00	99.52	0.00	91.85	0.26	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.4025089486
97.65	0.04	99.25	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.63	0.00	99.61	0.10	92.00	0.15	/workspace/coverage/default/24.sysrst_ctrl_stress_all.3334651495
97.68	0.03	99.25	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.63	0.00	99.61	0.00	92.21	0.21	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.2701226050
97.71	0.03	99.25	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.63	0.00	99.61	0.00	92.41	0.21	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3314726291
97.74	0.02	99.29	0.04	96.64	0.00	100.00	0.00	97.44	0.00	98.71	0.07	99.61	0.00	92.46	0.05	/workspace/coverage/default/5.sysrst_ctrl_stress_all.3282325720
97.76	0.02	99.31	0.02	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.04	99.61	0.00	92.56	0.10	/workspace/coverage/default/16.sysrst_ctrl_stress_all.814924632
97.78	0.02	99.31	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	92.72	0.15	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.1130657739
97.80	0.02	99.31	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	92.87	0.15	/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.4050150068
97.82	0.02	99.31	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	93.03	0.15	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3835541725
97.84	0.02	99.33	0.02	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	93.13	0.10	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1942275452
97.86	0.01	99.33	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	93.23	0.10	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.732569092
97.87	0.01	99.33	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	93.33	0.10	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.2430300604
97.89	0.01	99.33	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	93.44	0.10	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2919187177
97.90	0.01	99.33	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	93.54	0.10	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.437619877
97.91	0.01	99.33	0.00	96.64	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	93.64	0.10	/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2279080208
97.93	0.01	99.33	0.00	96.74	0.10	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	93.64	0.00	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.4151988205
97.94	0.01	99.35	0.02	96.74	0.00	100.00	0.00	97.44	0.00	98.78	0.04	99.61	0.00	93.64	0.00	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2326945198
97.94	0.01	99.37	0.02	96.74	0.00	100.00	0.00	97.44	0.00	98.82	0.04	99.61	0.00	93.64	0.00	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.4129467840
97.95	0.01	99.38	0.02	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.04	99.61	0.00	93.64	0.00	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.2850627601
97.96	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	93.69	0.05	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.3902075250
97.97	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	93.74	0.05	/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1624450991
97.97	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	93.79	0.05	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1865283533
97.98	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	93.85	0.05	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1747943435
97.99	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	93.90	0.05	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.621896159
98.00	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	93.95	0.05	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.2946053643
98.00	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	94.00	0.05	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2315185810
98.01	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	94.05	0.05	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.2559523792
98.02	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	94.10	0.05	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.442055714
98.03	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	94.15	0.05	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3742411889
98.03	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	94.21	0.05	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3786358938
98.04	0.01	99.38	0.00	96.74	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	94.26	0.05	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2244194179
98.04	0.01	99.38	0.00	96.76	0.03	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	94.26	0.00	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.45310938

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2771671363
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1862967121
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.4196891738
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1556995019
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.4197723133
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2278969960
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.38663525
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2016533676
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.125362605
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.345199708
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1548934977
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.360355359
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1156889293
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1457853997
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.4055476924
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3755161494
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2195870333
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.4270674317
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.462220315
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3401331298
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3526582336
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2586496027
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3757692836
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4259100245
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3721462230
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.153086103
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2861996309
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.143548255
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2725412017
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2353968400
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3139705753
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2885087826
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1413868007
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2674815715
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3971862502
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.347653828
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1234152588
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.1095649682
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3149025640
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.602685431
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2108436342
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1551905789
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.996939574
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3665919919
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.3646955927
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.573798532
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3764897672
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1693595625
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3600175754
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3357167220
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/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2329528861
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.211375783
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1388696724
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.3573919928
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.569357213
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2146498605
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3185749600
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.2246030036
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1620407323
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3431440919
/workspace/coverage/default/4.sysrst_ctrl_smoke.33492640
/workspace/coverage/default/4.sysrst_ctrl_stress_all.2603657203
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.234134484
/workspace/coverage/default/40.sysrst_ctrl_alert_test.4257307941
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.4223855311
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2616394150
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3281357506
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3086706014
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2168227395
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3544960841
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.289930195
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3488156068
/workspace/coverage/default/40.sysrst_ctrl_smoke.2805038651
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2240913267
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.4122227406
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2393188275
/workspace/coverage/default/41.sysrst_ctrl_alert_test.751688285
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1881946418
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1645217513
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2130011988
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1182204117
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2575925725
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.881583057
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2123714119
/workspace/coverage/default/41.sysrst_ctrl_smoke.2568203837
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2488158666
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.530609923
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.130872619
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2411027900
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.225924122
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2418200881
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.320771584
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2954085377
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.161622169
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1784502411
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2348034735
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3683497278
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.687559206
/workspace/coverage/default/42.sysrst_ctrl_smoke.1838480201
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3918600167
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2458193814
/workspace/coverage/default/43.sysrst_ctrl_alert_test.442247317
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2893467210
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1143268316
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3194925208
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3984856389
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3536713791
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.769752746
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3065677747
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2057584816
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1880670228
/workspace/coverage/default/43.sysrst_ctrl_smoke.2777307121
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2972743074
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3984399516
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1280688895
/workspace/coverage/default/44.sysrst_ctrl_alert_test.4220096451
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.4153730946
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1298019620
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2896372709
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3531880854
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.747656526
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1883420087
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1325214750
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3789292109
/workspace/coverage/default/44.sysrst_ctrl_smoke.2759949051
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1415095005
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.4032020636
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1070170395
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1711625292
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3173533211
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1842131968
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2128897230
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3022000644
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4043591412
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.647185448
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1042249888
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1824851592
/workspace/coverage/default/45.sysrst_ctrl_smoke.1212151538
/workspace/coverage/default/45.sysrst_ctrl_stress_all.1934384840
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2138861614
/workspace/coverage/default/46.sysrst_ctrl_alert_test.920291931
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3696479356
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2049906531
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1100659401
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2182617910
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1778968401
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3924584491
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2376884899
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1679199591
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2217500531
/workspace/coverage/default/46.sysrst_ctrl_smoke.700854147
/workspace/coverage/default/46.sysrst_ctrl_stress_all.545580389
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2411220375
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.134159006
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1474160165
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2872331147
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2254156299
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3702245152
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1730040551
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1670435376
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3120340141
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2140715748
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3949636117
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4073437752
/workspace/coverage/default/47.sysrst_ctrl_smoke.400144168
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3093565330
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1436203567
/workspace/coverage/default/48.sysrst_ctrl_alert_test.730536753
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.4172295456
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3140515578
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.4093683309
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.448644449
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1193010396
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2732254999
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2183506729
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3981181178
/workspace/coverage/default/48.sysrst_ctrl_smoke.3727936910
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2847585569
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.934408545
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3111996631
/workspace/coverage/default/49.sysrst_ctrl_alert_test.364044307
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1967265842
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3007888465
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2779288320
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.97799076
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1516753426
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1239719293
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3572237849
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4263562211
/workspace/coverage/default/49.sysrst_ctrl_smoke.2931164729
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2051410931
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3414729166
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3462684057
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2800879337
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2211422829
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3590160801
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3938130098
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.725672884
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2552813146
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.498732424
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1052973822
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1171555505
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3256764298
/workspace/coverage/default/5.sysrst_ctrl_smoke.2016731515
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3724347067
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3213949067
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.328883777
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.915854071
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.385676889
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.997089928
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2069397855
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.576441523
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1403459108
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1374932302
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3350295476
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2497473060
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2006988781
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3402957583
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1299737103
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3782105182
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.4252486779
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3915647003
/workspace/coverage/default/6.sysrst_ctrl_smoke.2771245656
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3157608171
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2642624100
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1819383723
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.381898101
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.748603561
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3120007204
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2482221266
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3115626435
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.425382965
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2319254842
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2440838795
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.459308832
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2138279786
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2676845878
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3572365090
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.545072560
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2601560540
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2430037094
/workspace/coverage/default/7.sysrst_ctrl_smoke.1280192941
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2864256192
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2832543495
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2213391191
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3379729000
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2564707164
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1324119571
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1159075860
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2915701322
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1070759205
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1778571476
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.412990399
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3572671642
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1995143146
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1121125923
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.415809140
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4021300390
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1534654925
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2438003218
/workspace/coverage/default/8.sysrst_ctrl_smoke.3934132376
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1037931779
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3729570424
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3833135506
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4199814142
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.4055011183
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1143730329
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3721666064
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3953561268
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2250281361
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2801731412
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2866508838
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1646701449
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2561236236
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2855823915
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3950806233
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3656777681
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.4043373056
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.275498045
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2079792778
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3233890432
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.747543488
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.136361930
/workspace/coverage/default/9.sysrst_ctrl_smoke.3574227125
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3040037806
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1659519709
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1055896816
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3029321335
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2125871778
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.469233914
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.4271090100
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1957441952
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1584525685
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1155314254
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2898762091

Total test records in report: 915

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.668416955	Apr 30 12:36:45 PM PDT 24	Apr 30 12:39:03 PM PDT 24	65506136528 ps
T2	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.275262329	Apr 30 12:38:32 PM PDT 24	Apr 30 12:39:52 PM PDT 24	174498498933 ps
T4	/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.44015816	Apr 30 12:37:39 PM PDT 24	Apr 30 12:37:43 PM PDT 24	3695800636 ps
T3	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3080035121	Apr 30 12:36:28 PM PDT 24	Apr 30 12:36:33 PM PDT 24	10865075703 ps
T12	/workspace/coverage/default/7.sysrst_ctrl_stress_all.2864256192	Apr 30 12:36:26 PM PDT 24	Apr 30 12:36:46 PM PDT 24	7757980553 ps
T13	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3860479920	Apr 30 12:36:41 PM PDT 24	Apr 30 12:38:07 PM PDT 24	34390257352 ps
T5	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.4070640324	Apr 30 12:37:55 PM PDT 24	Apr 30 12:39:00 PM PDT 24	26906656708 ps
T6	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3572671642	Apr 30 12:36:34 PM PDT 24	Apr 30 12:38:30 PM PDT 24	46840162855 ps
T14	/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.4201718637	Apr 30 12:37:08 PM PDT 24	Apr 30 12:37:11 PM PDT 24	2479326213 ps
T15	/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.3599790619	Apr 30 12:36:09 PM PDT 24	Apr 30 12:36:11 PM PDT 24	2493277204 ps
T19	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.2446623780	Apr 30 12:37:03 PM PDT 24	Apr 30 12:37:07 PM PDT 24	2622862255 ps
T80	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3572237849	Apr 30 12:38:32 PM PDT 24	Apr 30 12:38:36 PM PDT 24	2236474838 ps
T7	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.603685049	Apr 30 12:36:57 PM PDT 24	Apr 30 12:37:07 PM PDT 24	3495283847 ps
T46	/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1624450991	Apr 30 12:36:42 PM PDT 24	Apr 30 12:36:46 PM PDT 24	3924918911 ps
T50	/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.545072560	Apr 30 12:36:25 PM PDT 24	Apr 30 12:36:34 PM PDT 24	2458602378 ps
T21	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.45310938	Apr 30 12:36:24 PM PDT 24	Apr 30 12:40:41 PM PDT 24	95335709890 ps
T8	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3140515578	Apr 30 12:38:32 PM PDT 24	Apr 30 12:40:52 PM PDT 24	99690831537 ps
T9	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1252998690	Apr 30 12:36:12 PM PDT 24	Apr 30 12:36:14 PM PDT 24	2508413861 ps
T10	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.2369950277	Apr 30 12:36:19 PM PDT 24	Apr 30 12:37:41 PM PDT 24	118669250396 ps
T54	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3283383257	Apr 30 12:37:10 PM PDT 24	Apr 30 12:37:18 PM PDT 24	2512232591 ps
T11	/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3111996631	Apr 30 12:38:33 PM PDT 24	Apr 30 12:38:34 PM PDT 24	8553247157 ps
T20	/workspace/coverage/default/24.sysrst_ctrl_stress_all.3334651495	Apr 30 12:37:14 PM PDT 24	Apr 30 12:38:00 PM PDT 24	15998418880 ps
T120	/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3922000249	Apr 30 12:37:27 PM PDT 24	Apr 30 12:37:28 PM PDT 24	2095127099 ps
T47	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.353617530	Apr 30 12:36:33 PM PDT 24	Apr 30 12:36:38 PM PDT 24	191228510892 ps
T121	/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3127358493	Apr 30 12:37:54 PM PDT 24	Apr 30 12:38:01 PM PDT 24	2224034455 ps
T51	/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.920407265	Apr 30 12:36:42 PM PDT 24	Apr 30 12:36:50 PM PDT 24	2451912618 ps
T55	/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3120340141	Apr 30 12:38:19 PM PDT 24	Apr 30 12:38:22 PM PDT 24	2627682893 ps
T29	/workspace/coverage/default/9.sysrst_ctrl_stress_all.3040037806	Apr 30 12:36:32 PM PDT 24	Apr 30 12:36:38 PM PDT 24	6957946713 ps
T122	/workspace/coverage/default/40.sysrst_ctrl_alert_test.4257307941	Apr 30 12:38:03 PM PDT 24	Apr 30 12:38:06 PM PDT 24	2028566457 ps
T56	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.4022763868	Apr 30 12:36:43 PM PDT 24	Apr 30 12:36:51 PM PDT 24	2513370950 ps
T192	/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.4093683309	Apr 30 12:38:32 PM PDT 24	Apr 30 12:50:04 PM PDT 24	252567916948 ps
T57	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.687559206	Apr 30 12:38:05 PM PDT 24	Apr 30 12:38:08 PM PDT 24	2527040661 ps
T60	/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3099414330	Apr 30 12:36:55 PM PDT 24	Apr 30 12:37:03 PM PDT 24	2759982089 ps
T193	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.3573919928	Apr 30 12:36:21 PM PDT 24	Apr 30 12:36:24 PM PDT 24	2992431699 ps
T58	/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2832995689	Apr 30 12:36:41 PM PDT 24	Apr 30 12:36:43 PM PDT 24	2636641140 ps
T194	/workspace/coverage/default/46.sysrst_ctrl_alert_test.920291931	Apr 30 12:38:21 PM PDT 24	Apr 30 12:38:28 PM PDT 24	2012646515 ps
T25	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3115626435	Apr 30 12:38:42 PM PDT 24	Apr 30 12:38:55 PM PDT 24	69058407957 ps
T247	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2601560540	Apr 30 12:36:28 PM PDT 24	Apr 30 12:36:31 PM PDT 24	2254255477 ps
T59	/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.4101848122	Apr 30 12:36:34 PM PDT 24	Apr 30 12:36:37 PM PDT 24	2623755408 ps
T248	/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.3860886390	Apr 30 12:36:55 PM PDT 24	Apr 30 12:36:58 PM PDT 24	2273187254 ps
T35	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.3929467419	Apr 30 12:36:34 PM PDT 24	Apr 30 12:36:37 PM PDT 24	3385049736 ps
T36	/workspace/coverage/default/11.sysrst_ctrl_stress_all.1456074874	Apr 30 12:36:38 PM PDT 24	Apr 30 12:37:02 PM PDT 24	8288734153 ps
T249	/workspace/coverage/default/39.sysrst_ctrl_smoke.3188179879	Apr 30 12:37:55 PM PDT 24	Apr 30 12:38:01 PM PDT 24	2112998033 ps
T250	/workspace/coverage/default/23.sysrst_ctrl_smoke.1054690391	Apr 30 12:37:07 PM PDT 24	Apr 30 12:37:13 PM PDT 24	2110101796 ps
T34	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1143730329	Apr 30 12:38:44 PM PDT 24	Apr 30 12:39:12 PM PDT 24	38044621652 ps
T251	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2079792778	Apr 30 12:36:39 PM PDT 24	Apr 30 12:36:44 PM PDT 24	2618016593 ps
T264	/workspace/coverage/default/28.sysrst_ctrl_alert_test.3809993916	Apr 30 12:37:25 PM PDT 24	Apr 30 12:37:27 PM PDT 24	2043889691 ps
T37	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.1397299542	Apr 30 12:37:14 PM PDT 24	Apr 30 12:37:25 PM PDT 24	3401685883 ps
T44	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2611440542	Apr 30 12:36:41 PM PDT 24	Apr 30 12:36:50 PM PDT 24	7135592538 ps
T45	/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.130872619	Apr 30 12:38:04 PM PDT 24	Apr 30 12:38:06 PM PDT 24	5529227864 ps
T139	/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.3504714688	Apr 30 12:37:10 PM PDT 24	Apr 30 12:37:18 PM PDT 24	2612586468 ps
T38	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.4263830391	Apr 30 12:37:22 PM PDT 24	Apr 30 12:38:55 PM PDT 24	136845286158 ps
T140	/workspace/coverage/default/5.sysrst_ctrl_alert_test.2800879337	Apr 30 12:36:28 PM PDT 24	Apr 30 12:36:30 PM PDT 24	2192801959 ps
T141	/workspace/coverage/default/33.sysrst_ctrl_alert_test.546643427	Apr 30 12:37:39 PM PDT 24	Apr 30 12:37:45 PM PDT 24	2012541645 ps
T142	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4043591412	Apr 30 12:38:20 PM PDT 24	Apr 30 12:38:28 PM PDT 24	2610996467 ps
T143	/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.409955732	Apr 30 12:37:05 PM PDT 24	Apr 30 12:37:10 PM PDT 24	2613711982 ps
T48	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2393188275	Apr 30 12:38:04 PM PDT 24	Apr 30 12:38:08 PM PDT 24	7380371633 ps
T39	/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3173533211	Apr 30 12:38:12 PM PDT 24	Apr 30 12:38:15 PM PDT 24	3689581734 ps
T287	/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.3882707612	Apr 30 12:36:12 PM PDT 24	Apr 30 12:36:19 PM PDT 24	2512944765 ps
T280	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.866369235	Apr 30 12:36:18 PM PDT 24	Apr 30 12:36:20 PM PDT 24	3005068926 ps
T378	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3531880854	Apr 30 12:38:13 PM PDT 24	Apr 30 12:38:18 PM PDT 24	2555355428 ps
T40	/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.668184191	Apr 30 12:36:53 PM PDT 24	Apr 30 12:36:59 PM PDT 24	3813369162 ps
T41	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.320771584	Apr 30 12:38:06 PM PDT 24	Apr 30 12:40:43 PM PDT 24	184316286731 ps
T379	/workspace/coverage/default/17.sysrst_ctrl_smoke.225924194	Apr 30 12:36:53 PM PDT 24	Apr 30 12:36:56 PM PDT 24	2137708901 ps
T42	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.437629143	Apr 30 12:36:09 PM PDT 24	Apr 30 12:36:29 PM PDT 24	34013325217 ps
T62	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3885603907	Apr 30 12:36:57 PM PDT 24	Apr 30 12:37:48 PM PDT 24	38732055215 ps
T26	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1298019620	Apr 30 12:38:12 PM PDT 24	Apr 30 12:40:47 PM PDT 24	115607699269 ps
T49	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2138861614	Apr 30 12:38:20 PM PDT 24	Apr 30 12:38:23 PM PDT 24	4901342578 ps
T156	/workspace/coverage/default/16.sysrst_ctrl_alert_test.3671056033	Apr 30 12:36:57 PM PDT 24	Apr 30 12:36:59 PM PDT 24	2059895875 ps
T157	/workspace/coverage/default/13.sysrst_ctrl_smoke.2159193546	Apr 30 12:36:49 PM PDT 24	Apr 30 12:36:51 PM PDT 24	2120403825 ps
T158	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.203801696	Apr 30 12:36:12 PM PDT 24	Apr 30 12:36:23 PM PDT 24	42364945506 ps
T159	/workspace/coverage/default/35.sysrst_ctrl_stress_all.3505934871	Apr 30 12:37:49 PM PDT 24	Apr 30 12:37:55 PM PDT 24	6337763300 ps
T65	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.134159006	Apr 30 12:38:19 PM PDT 24	Apr 30 12:38:27 PM PDT 24	5779452594 ps
T160	/workspace/coverage/default/2.sysrst_ctrl_sec_cm.1367043857	Apr 30 12:36:19 PM PDT 24	Apr 30 12:36:34 PM PDT 24	22070991081 ps
T275	/workspace/coverage/default/37.sysrst_ctrl_alert_test.1996964054	Apr 30 12:38:01 PM PDT 24	Apr 30 12:38:08 PM PDT 24	2009441395 ps
T276	/workspace/coverage/default/14.sysrst_ctrl_alert_test.2374046493	Apr 30 12:36:43 PM PDT 24	Apr 30 12:36:46 PM PDT 24	2030201229 ps
T52	/workspace/coverage/default/20.sysrst_ctrl_stress_all.2988836885	Apr 30 12:36:59 PM PDT 24	Apr 30 12:37:03 PM PDT 24	15487349490 ps
T63	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3091518277	Apr 30 12:36:31 PM PDT 24	Apr 30 12:36:49 PM PDT 24	24847400609 ps
T27	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.448104090	Apr 30 12:36:13 PM PDT 24	Apr 30 12:38:15 PM PDT 24	167904447439 ps
T53	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.4106877806	Apr 30 12:36:59 PM PDT 24	Apr 30 12:37:08 PM PDT 24	2459345718 ps
T376	/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3488156068	Apr 30 12:38:04 PM PDT 24	Apr 30 12:38:12 PM PDT 24	2509681351 ps
T380	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3173531501	Apr 30 12:37:16 PM PDT 24	Apr 30 12:37:20 PM PDT 24	2938856245 ps
T381	/workspace/coverage/default/0.sysrst_ctrl_alert_test.2573988229	Apr 30 12:36:13 PM PDT 24	Apr 30 12:36:17 PM PDT 24	2024020362 ps
T281	/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.61143078	Apr 30 12:37:49 PM PDT 24	Apr 30 12:37:51 PM PDT 24	2562636946 ps
T382	/workspace/coverage/default/41.sysrst_ctrl_alert_test.751688285	Apr 30 12:38:03 PM PDT 24	Apr 30 12:38:05 PM PDT 24	2128913448 ps
T383	/workspace/coverage/default/40.sysrst_ctrl_smoke.2805038651	Apr 30 12:38:04 PM PDT 24	Apr 30 12:38:11 PM PDT 24	2114465235 ps
T384	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2168227395	Apr 30 12:38:06 PM PDT 24	Apr 30 12:38:10 PM PDT 24	2634440787 ps
T385	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2429303057	Apr 30 12:37:39 PM PDT 24	Apr 30 12:37:46 PM PDT 24	2480713940 ps
T386	/workspace/coverage/default/49.sysrst_ctrl_alert_test.364044307	Apr 30 12:38:33 PM PDT 24	Apr 30 12:38:39 PM PDT 24	2011820122 ps
T28	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.464610489	Apr 30 12:37:23 PM PDT 24	Apr 30 12:39:12 PM PDT 24	1848716811264 ps
T30	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3237546830	Apr 30 12:36:28 PM PDT 24	Apr 30 12:37:25 PM PDT 24	77679544639 ps
T96	/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.654246966	Apr 30 12:36:35 PM PDT 24	Apr 30 12:36:38 PM PDT 24	2464713498 ps
T97	/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.2979677665	Apr 30 12:37:15 PM PDT 24	Apr 30 12:37:19 PM PDT 24	2464242989 ps
T98	/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.4209308441	Apr 30 12:36:59 PM PDT 24	Apr 30 12:37:04 PM PDT 24	3179826324 ps
T99	/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.4252486779	Apr 30 12:36:27 PM PDT 24	Apr 30 12:36:30 PM PDT 24	2257817230 ps
T100	/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.1630564237	Apr 30 12:36:35 PM PDT 24	Apr 30 12:36:39 PM PDT 24	2076957483 ps
T101	/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2006032890	Apr 30 12:36:39 PM PDT 24	Apr 30 12:36:44 PM PDT 24	2617536389 ps
T102	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3548066019	Apr 30 12:37:23 PM PDT 24	Apr 30 12:38:18 PM PDT 24	27780133283 ps
T77	/workspace/coverage/default/26.sysrst_ctrl_stress_all.2011612236	Apr 30 12:37:15 PM PDT 24	Apr 30 12:37:24 PM PDT 24	46602440506 ps
T78	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3148463480	Apr 30 12:36:41 PM PDT 24	Apr 30 12:36:51 PM PDT 24	3191289364 ps
T387	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.2103789145	Apr 30 12:36:52 PM PDT 24	Apr 30 12:36:55 PM PDT 24	5378440724 ps
T388	/workspace/coverage/default/11.sysrst_ctrl_smoke.3229765636	Apr 30 12:36:45 PM PDT 24	Apr 30 12:36:47 PM PDT 24	2124576845 ps
T389	/workspace/coverage/default/19.sysrst_ctrl_smoke.2825405207	Apr 30 12:36:55 PM PDT 24	Apr 30 12:36:59 PM PDT 24	2128043334 ps
T390	/workspace/coverage/default/7.sysrst_ctrl_smoke.1280192941	Apr 30 12:36:34 PM PDT 24	Apr 30 12:36:38 PM PDT 24	2112306424 ps
T79	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.582409984	Apr 30 12:37:15 PM PDT 24	Apr 30 12:37:25 PM PDT 24	3432685253 ps
T391	/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2575925725	Apr 30 12:38:05 PM PDT 24	Apr 30 12:38:09 PM PDT 24	2467360488 ps
T61	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.528803350	Apr 30 12:36:36 PM PDT 24	Apr 30 12:36:39 PM PDT 24	2608251588 ps
T31	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3756922748	Apr 30 12:37:16 PM PDT 24	Apr 30 12:38:13 PM PDT 24	46161851900 ps
T112	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.952666456	Apr 30 12:36:52 PM PDT 24	Apr 30 12:36:56 PM PDT 24	2486536637 ps
T113	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1824851592	Apr 30 12:38:16 PM PDT 24	Apr 30 12:38:23 PM PDT 24	2510213859 ps
T33	/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1670435376	Apr 30 12:38:21 PM PDT 24	Apr 30 12:38:30 PM PDT 24	2939424831 ps
T64	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3212668948	Apr 30 12:37:25 PM PDT 24	Apr 30 12:37:30 PM PDT 24	26427753048 ps
T163	/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.746485463	Apr 30 12:37:56 PM PDT 24	Apr 30 12:37:59 PM PDT 24	2625505988 ps
T164	/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.3722981362	Apr 30 12:37:15 PM PDT 24	Apr 30 12:37:20 PM PDT 24	2618619900 ps
T165	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.3199134708	Apr 30 12:36:35 PM PDT 24	Apr 30 12:36:45 PM PDT 24	3709203675 ps
T166	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3931625446	Apr 30 12:36:34 PM PDT 24	Apr 30 12:39:06 PM PDT 24	202124297409 ps
T167	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.3566768115	Apr 30 12:37:23 PM PDT 24	Apr 30 12:41:15 PM PDT 24	89415642915 ps
T227	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3984856389	Apr 30 12:38:11 PM PDT 24	Apr 30 12:38:15 PM PDT 24	3878851615 ps
T228	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1534654925	Apr 30 12:36:29 PM PDT 24	Apr 30 12:36:36 PM PDT 24	2133848954 ps
T229	/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2006988781	Apr 30 12:36:29 PM PDT 24	Apr 30 12:36:31 PM PDT 24	4206411358 ps
T66	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.368554355	Apr 30 12:37:15 PM PDT 24	Apr 30 12:37:55 PM PDT 24	78087276214 ps
T230	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2371522043	Apr 30 12:36:48 PM PDT 24	Apr 30 12:36:52 PM PDT 24	4402133898 ps
T231	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1172403003	Apr 30 12:36:43 PM PDT 24	Apr 30 12:36:47 PM PDT 24	2098592596 ps
T232	/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3431440919	Apr 30 12:36:25 PM PDT 24	Apr 30 12:36:36 PM PDT 24	22167828272 ps
T293	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1222763550	Apr 30 12:36:53 PM PDT 24	Apr 30 12:36:56 PM PDT 24	2176740888 ps
T294	/workspace/coverage/default/28.sysrst_ctrl_smoke.1464690781	Apr 30 12:37:24 PM PDT 24	Apr 30 12:37:31 PM PDT 24	2108259612 ps
T295	/workspace/coverage/default/21.sysrst_ctrl_alert_test.3046359839	Apr 30 12:37:10 PM PDT 24	Apr 30 12:37:13 PM PDT 24	2024043521 ps
T296	/workspace/coverage/default/18.sysrst_ctrl_smoke.2980236674	Apr 30 12:36:55 PM PDT 24	Apr 30 12:37:02 PM PDT 24	2109596428 ps
T297	/workspace/coverage/default/2.sysrst_ctrl_smoke.3905157952	Apr 30 12:36:12 PM PDT 24	Apr 30 12:36:19 PM PDT 24	2110905899 ps
T298	/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.769752746	Apr 30 12:38:13 PM PDT 24	Apr 30 12:38:17 PM PDT 24	2612327678 ps
T392	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1496714649	Apr 30 12:37:24 PM PDT 24	Apr 30 12:37:27 PM PDT 24	2256251228 ps
T377	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3758829242	Apr 30 12:37:17 PM PDT 24	Apr 30 12:37:20 PM PDT 24	2535083144 ps
T320	/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2049906531	Apr 30 12:38:30 PM PDT 24	Apr 30 12:43:23 PM PDT 24	151400734868 ps
T393	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.1116064895	Apr 30 12:36:42 PM PDT 24	Apr 30 12:36:49 PM PDT 24	2020444816 ps
T81	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2254156299	Apr 30 12:38:18 PM PDT 24	Apr 30 12:40:12 PM PDT 24	103719344795 ps
T394	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3087766453	Apr 30 12:36:43 PM PDT 24	Apr 30 12:36:48 PM PDT 24	2477919026 ps
T32	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1060423645	Apr 30 12:36:25 PM PDT 24	Apr 30 12:36:40 PM PDT 24	49896254013 ps
T196	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3582252219	Apr 30 12:37:38 PM PDT 24	Apr 30 12:37:50 PM PDT 24	3683198765 ps
T197	/workspace/coverage/default/25.sysrst_ctrl_alert_test.766384673	Apr 30 12:37:15 PM PDT 24	Apr 30 12:37:18 PM PDT 24	2036420671 ps
T198	/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.1927127936	Apr 30 12:37:24 PM PDT 24	Apr 30 12:37:31 PM PDT 24	2054924123 ps
T199	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.4025089486	Apr 30 12:37:17 PM PDT 24	Apr 30 12:40:37 PM PDT 24	76945725091 ps
T200	/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.1269091795	Apr 30 12:37:22 PM PDT 24	Apr 30 12:37:28 PM PDT 24	3552655612 ps
T201	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3835541725	Apr 30 12:39:07 PM PDT 24	Apr 30 12:43:13 PM PDT 24	98560988596 ps
T202	/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2138279786	Apr 30 12:36:26 PM PDT 24	Apr 30 01:16:01 PM PDT 24	1317512871391 ps
T203	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1865283533	Apr 30 12:37:00 PM PDT 24	Apr 30 12:38:22 PM PDT 24	60015410759 ps
T204	/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2893467210	Apr 30 12:38:16 PM PDT 24	Apr 30 12:38:26 PM PDT 24	3341274095 ps
T76	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2619261932	Apr 30 12:36:43 PM PDT 24	Apr 30 12:37:25 PM PDT 24	32099155191 ps
T395	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.1892251372	Apr 30 12:37:07 PM PDT 24	Apr 30 12:37:15 PM PDT 24	2510862254 ps
T285	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1342628924	Apr 30 12:36:54 PM PDT 24	Apr 30 12:37:02 PM PDT 24	2446643772 ps
T396	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2049596982	Apr 30 12:37:07 PM PDT 24	Apr 30 12:37:09 PM PDT 24	2271307880 ps
T397	/workspace/coverage/default/3.sysrst_ctrl_smoke.3649886647	Apr 30 12:36:25 PM PDT 24	Apr 30 12:36:32 PM PDT 24	2110308336 ps
T398	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2526397641	Apr 30 12:36:32 PM PDT 24	Apr 30 12:36:38 PM PDT 24	2453259136 ps
T399	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1952152325	Apr 30 12:37:09 PM PDT 24	Apr 30 12:37:10 PM PDT 24	4325177219 ps
T400	/workspace/coverage/default/6.sysrst_ctrl_alert_test.1374932302	Apr 30 12:36:26 PM PDT 24	Apr 30 12:36:30 PM PDT 24	2030449707 ps
T170	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1778968401	Apr 30 12:38:24 PM PDT 24	Apr 30 12:38:34 PM PDT 24	3386949990 ps
T70	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.2245521221	Apr 30 12:37:30 PM PDT 24	Apr 30 12:37:34 PM PDT 24	3470220684 ps
T216	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3771018835	Apr 30 12:36:08 PM PDT 24	Apr 30 12:37:31 PM PDT 24	60848025847 ps
T155	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3536713791	Apr 30 12:38:14 PM PDT 24	Apr 30 12:38:21 PM PDT 24	3091693801 ps
T82	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.732569092	Apr 30 12:36:58 PM PDT 24	Apr 30 12:37:13 PM PDT 24	59849171436 ps
T146	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.275498045	Apr 30 12:36:38 PM PDT 24	Apr 30 12:36:48 PM PDT 24	5807123779 ps
T217	/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.832848314	Apr 30 12:37:58 PM PDT 24	Apr 30 12:38:07 PM PDT 24	2611218623 ps
T67	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3204200843	Apr 30 12:36:47 PM PDT 24	Apr 30 12:36:49 PM PDT 24	3178298175 ps
T171	/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3931640660	Apr 30 12:37:35 PM PDT 24	Apr 30 12:37:45 PM PDT 24	3485761382 ps
T172	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3915647003	Apr 30 12:36:24 PM PDT 24	Apr 30 12:36:27 PM PDT 24	2599787043 ps
T173	/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1436203567	Apr 30 12:38:20 PM PDT 24	Apr 30 12:38:26 PM PDT 24	4473033772 ps
T174	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1143268316	Apr 30 12:38:13 PM PDT 24	Apr 30 12:39:55 PM PDT 24	37487025347 ps
T175	/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.1745496601	Apr 30 12:37:21 PM PDT 24	Apr 30 12:37:24 PM PDT 24	2474981433 ps
T147	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2676845878	Apr 30 12:36:28 PM PDT 24	Apr 30 12:36:41 PM PDT 24	4936164181 ps
T176	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1193010396	Apr 30 12:38:31 PM PDT 24	Apr 30 12:38:39 PM PDT 24	2615266971 ps
T177	/workspace/coverage/default/18.sysrst_ctrl_stress_all.1716732469	Apr 30 12:37:04 PM PDT 24	Apr 30 12:37:16 PM PDT 24	7430167543 ps
T178	/workspace/coverage/default/38.sysrst_ctrl_smoke.1929342928	Apr 30 12:37:57 PM PDT 24	Apr 30 12:38:00 PM PDT 24	2136187743 ps
T83	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3721666064	Apr 30 12:38:44 PM PDT 24	Apr 30 12:39:05 PM PDT 24	28848483682 ps
T401	/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.1614137709	Apr 30 12:36:13 PM PDT 24	Apr 30 12:36:18 PM PDT 24	2485705601 ps
T402	/workspace/coverage/default/44.sysrst_ctrl_smoke.2759949051	Apr 30 12:38:10 PM PDT 24	Apr 30 12:38:13 PM PDT 24	2135869182 ps
T148	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.3096038665	Apr 30 12:36:52 PM PDT 24	Apr 30 12:36:55 PM PDT 24	3124621513 ps
T252	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.2430300604	Apr 30 12:36:57 PM PDT 24	Apr 30 12:37:23 PM PDT 24	102917451916 ps
T403	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.516368655	Apr 30 12:37:57 PM PDT 24	Apr 30 12:38:01 PM PDT 24	2464292519 ps
T114	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.2202163109	Apr 30 12:36:25 PM PDT 24	Apr 30 12:36:27 PM PDT 24	10849937904 ps
T84	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.1760694889	Apr 30 12:37:30 PM PDT 24	Apr 30 12:39:06 PM PDT 24	72261280369 ps
T404	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1483625377	Apr 30 12:36:40 PM PDT 24	Apr 30 12:36:42 PM PDT 24	2539361940 ps
T238	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1951219038	Apr 30 12:36:14 PM PDT 24	Apr 30 12:37:27 PM PDT 24	117912321076 ps
T405	/workspace/coverage/default/10.sysrst_ctrl_smoke.2809521187	Apr 30 12:36:32 PM PDT 24	Apr 30 12:36:33 PM PDT 24	2172994283 ps
T321	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.3693562851	Apr 30 12:37:38 PM PDT 24	Apr 30 12:38:25 PM PDT 24	65288934422 ps
T319	/workspace/coverage/default/41.sysrst_ctrl_combo_detect.2199425288	Apr 30 12:38:04 PM PDT 24	Apr 30 12:43:10 PM PDT 24	144208554054 ps
T85	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3938130098	Apr 30 12:36:31 PM PDT 24	Apr 30 12:37:47 PM PDT 24	42829278353 ps
T149	/workspace/coverage/default/38.sysrst_ctrl_edge_detect.51724134	Apr 30 12:37:55 PM PDT 24	Apr 30 12:38:02 PM PDT 24	3546698400 ps
T150	/workspace/coverage/default/8.sysrst_ctrl_stress_all.1037931779	Apr 30 12:36:48 PM PDT 24	Apr 30 12:38:04 PM PDT 24	105533621909 ps
T406	/workspace/coverage/default/17.sysrst_ctrl_alert_test.2970462991	Apr 30 12:36:58 PM PDT 24	Apr 30 12:37:00 PM PDT 24	2039672657 ps
T407	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1456820792	Apr 30 12:37:05 PM PDT 24	Apr 30 12:37:12 PM PDT 24	2127742336 ps
T408	/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1974298100	Apr 30 12:37:04 PM PDT 24	Apr 30 12:37:07 PM PDT 24	2610341492 ps
T409	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1469315559	Apr 30 12:37:14 PM PDT 24	Apr 30 12:37:18 PM PDT 24	3900870338 ps
T410	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.860069040	Apr 30 12:36:51 PM PDT 24	Apr 30 12:37:00 PM PDT 24	3410708533 ps
T411	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1620407323	Apr 30 12:36:21 PM PDT 24	Apr 30 12:36:26 PM PDT 24	2514718349 ps
T291	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.517860418	Apr 30 12:36:55 PM PDT 24	Apr 30 12:37:03 PM PDT 24	3559692646 ps
T273	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.1789193508	Apr 30 12:36:08 PM PDT 24	Apr 30 12:36:36 PM PDT 24	42170209717 ps
T68	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3850235274	Apr 30 12:36:27 PM PDT 24	Apr 30 12:37:30 PM PDT 24	194416303860 ps
T220	/workspace/coverage/default/26.sysrst_ctrl_alert_test.1789923409	Apr 30 12:37:16 PM PDT 24	Apr 30 12:37:22 PM PDT 24	2009845028 ps
T221	/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.725672884	Apr 30 12:36:22 PM PDT 24	Apr 30 12:36:28 PM PDT 24	3988198951 ps
T144	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.4129467840	Apr 30 12:37:07 PM PDT 24	Apr 30 12:37:10 PM PDT 24	3160942604 ps
T222	/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1730040551	Apr 30 12:38:18 PM PDT 24	Apr 30 12:38:25 PM PDT 24	4502711095 ps
T223	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.4269436597	Apr 30 12:36:52 PM PDT 24	Apr 30 12:36:55 PM PDT 24	6941066273 ps
T224	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.100982523	Apr 30 12:36:54 PM PDT 24	Apr 30 12:36:56 PM PDT 24	2653642129 ps
T225	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.3461813592	Apr 30 12:37:15 PM PDT 24	Apr 30 12:37:17 PM PDT 24	2331732782 ps
T226	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3281357506	Apr 30 12:38:02 PM PDT 24	Apr 30 12:38:06 PM PDT 24	4799938480 ps
T86	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.385676889	Apr 30 12:38:44 PM PDT 24	Apr 30 12:39:57 PM PDT 24	26830880085 ps
T412	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2138959852	Apr 30 12:36:12 PM PDT 24	Apr 30 12:36:14 PM PDT 24	2457397182 ps
T239	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.781364962	Apr 30 12:37:33 PM PDT 24	Apr 30 12:37:56 PM PDT 24	114522350732 ps
T161	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2198599634	Apr 30 12:36:19 PM PDT 24	Apr 30 12:36:21 PM PDT 24	3419454088 ps
T87	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2512935345	Apr 30 12:37:48 PM PDT 24	Apr 30 12:38:06 PM PDT 24	25845918333 ps
T286	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2348034735	Apr 30 12:38:04 PM PDT 24	Apr 30 12:38:09 PM PDT 24	2486488233 ps
T373	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.3058487634	Apr 30 12:36:57 PM PDT 24	Apr 30 12:50:53 PM PDT 24	331078345482 ps
T413	/workspace/coverage/default/9.sysrst_ctrl_alert_test.2855823915	Apr 30 12:36:38 PM PDT 24	Apr 30 12:36:44 PM PDT 24	2012878910 ps
T414	/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1784502411	Apr 30 12:38:04 PM PDT 24	Apr 30 12:38:08 PM PDT 24	2632870878 ps
T337	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.576441523	Apr 30 12:38:49 PM PDT 24	Apr 30 12:39:12 PM PDT 24	152139544063 ps
T288	/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3055652432	Apr 30 12:37:37 PM PDT 24	Apr 30 12:37:40 PM PDT 24	2536279490 ps
T415	/workspace/coverage/default/19.sysrst_ctrl_alert_test.3044028972	Apr 30 12:37:03 PM PDT 24	Apr 30 12:37:06 PM PDT 24	2114157780 ps
T416	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1263677069	Apr 30 12:37:46 PM PDT 24	Apr 30 12:37:54 PM PDT 24	2611070418 ps
T417	/workspace/coverage/default/18.sysrst_ctrl_alert_test.2123896192	Apr 30 12:36:59 PM PDT 24	Apr 30 12:37:01 PM PDT 24	2054203702 ps
T418	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2057584816	Apr 30 12:38:13 PM PDT 24	Apr 30 12:38:16 PM PDT 24	2053569704 ps
T69	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.4008929919	Apr 30 12:37:55 PM PDT 24	Apr 30 12:38:32 PM PDT 24	175328860188 ps
T236	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2801731412	Apr 30 12:38:44 PM PDT 24	Apr 30 12:39:03 PM PDT 24	26862862198 ps
T115	/workspace/coverage/default/4.sysrst_ctrl_stress_all.2603657203	Apr 30 12:36:19 PM PDT 24	Apr 30 12:37:08 PM PDT 24	321621990749 ps
T237	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.2718303471	Apr 30 12:37:38 PM PDT 24	Apr 30 12:38:12 PM PDT 24	27844030346 ps
T419	/workspace/coverage/default/9.sysrst_ctrl_smoke.3574227125	Apr 30 12:36:36 PM PDT 24	Apr 30 12:36:42 PM PDT 24	2109701102 ps
T420	/workspace/coverage/default/48.sysrst_ctrl_alert_test.730536753	Apr 30 12:38:32 PM PDT 24	Apr 30 12:38:38 PM PDT 24	2014107733 ps
T116	/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2306414086	Apr 30 12:37:55 PM PDT 24	Apr 30 12:37:58 PM PDT 24	4802871445 ps
T421	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.175773123	Apr 30 12:37:48 PM PDT 24	Apr 30 12:37:54 PM PDT 24	3637568398 ps
T336	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3747629538	Apr 30 12:36:56 PM PDT 24	Apr 30 12:38:36 PM PDT 24	78712291516 ps
T422	/workspace/coverage/default/36.sysrst_ctrl_stress_all.32705202	Apr 30 12:37:55 PM PDT 24	Apr 30 12:38:01 PM PDT 24	6628262454 ps
T423	/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1967265842	Apr 30 12:38:31 PM PDT 24	Apr 30 12:38:41 PM PDT 24	3558093525 ps
T370	/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3702245152	Apr 30 12:38:23 PM PDT 24	Apr 30 12:40:07 PM PDT 24	40243049860 ps
T43	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1195089850	Apr 30 12:36:11 PM PDT 24	Apr 30 12:36:42 PM PDT 24	41879309755 ps
T424	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3904584549	Apr 30 12:37:01 PM PDT 24	Apr 30 12:37:10 PM PDT 24	2509795171 ps
T425	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2487543311	Apr 30 12:36:19 PM PDT 24	Apr 30 12:36:21 PM PDT 24	2583783362 ps
T323	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3828243002	Apr 30 12:36:27 PM PDT 24	Apr 30 12:42:32 PM PDT 24	145738496144 ps
T205	/workspace/coverage/default/28.sysrst_ctrl_edge_detect.297804290	Apr 30 12:37:27 PM PDT 24	Apr 30 12:37:31 PM PDT 24	3201761417 ps
T426	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2922387315	Apr 30 12:36:12 PM PDT 24	Apr 30 12:36:16 PM PDT 24	2487114665 ps
T340	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2898762091	Apr 30 12:38:54 PM PDT 24	Apr 30 12:40:58 PM PDT 24	86592772864 ps
T355	/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3007888465	Apr 30 12:38:32 PM PDT 24	Apr 30 12:41:39 PM PDT 24	73408211329 ps
T427	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2069397855	Apr 30 12:38:42 PM PDT 24	Apr 30 12:38:51 PM PDT 24	37078245367 ps
T428	/workspace/coverage/default/42.sysrst_ctrl_alert_test.2411027900	Apr 30 12:38:14 PM PDT 24	Apr 30 12:38:21 PM PDT 24	2012269366 ps
T290	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.699330696	Apr 30 12:36:16 PM PDT 24	Apr 30 12:36:23 PM PDT 24	3404841322 ps
T429	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3591009104	Apr 30 12:37:10 PM PDT 24	Apr 30 12:37:18 PM PDT 24	2613517641 ps
T430	/workspace/coverage/default/27.sysrst_ctrl_smoke.2135858139	Apr 30 12:37:25 PM PDT 24	Apr 30 12:37:29 PM PDT 24	2114093688 ps
T431	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.4217513786	Apr 30 12:37:37 PM PDT 24	Apr 30 12:37:39 PM PDT 24	2062243664 ps
T119	/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3453869435	Apr 30 12:37:16 PM PDT 24	Apr 30 12:37:24 PM PDT 24	8221749065 ps
T432	/workspace/coverage/default/2.sysrst_ctrl_alert_test.1385767457	Apr 30 12:36:25 PM PDT 24	Apr 30 12:36:27 PM PDT 24	2162483020 ps
T433	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.2590732606	Apr 30 12:37:02 PM PDT 24	Apr 30 12:38:42 PM PDT 24	123365754504 ps
T243	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.459308832	Apr 30 12:36:27 PM PDT 24	Apr 30 12:42:05 PM PDT 24	133463672361 ps
T135	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1663891305	Apr 30 12:37:57 PM PDT 24	Apr 30 12:38:05 PM PDT 24	5214620951 ps