| SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 83.33 | 1 | 100 | 1 | 1 | 64 | 64 |
| NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| sysrst_ctrl_combo_precondition_det_cg0 | 66.67 | 1 | 100 | 1 | 64 | 64 |
| sysrst_ctrl_combo_precondition_det_cg3 | 66.67 | 1 | 100 | 1 | 64 | 64 |
| sysrst_ctrl_combo_precondition_det_cg1 | 100.00 | 1 | 100 | 1 | 64 | 64 |
| sysrst_ctrl_combo_precondition_det_cg2 | 100.00 | 1 | 100 | 1 | 64 | 64 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 66.67 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 3 | 1 | 2 | 66.67 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_precondition_timer | 3 | 1 | 2 | 66.67 | 100 | 1 | 1 | 0 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 66.67 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 3 | 1 | 2 | 66.67 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_precondition_timer | 3 | 1 | 2 | 66.67 | 100 | 1 | 1 | 0 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 3 | 0 | 3 | 100.00 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_precondition_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 3 | 0 | 3 | 100.00 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_precondition_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 3 | 1 | 2 | 66.67 |
| NAME | COUNT | AT LEAST | NUMBER | STATUS |
| mid_range | 0 | 1 | 1 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| max_range | 1 | 1 | T74 | 1 | - | - | - | - | ||||
| min_range | 346 | 1 | T9 | 5 | T25 | 1 | T26 | 1 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 3 | 1 | 2 | 66.67 |
| NAME | COUNT | AT LEAST | NUMBER | STATUS |
| mid_range | 0 | 1 | 1 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| max_range | 13 | 1 | T198 | 2 | T311 | 5 | T317 | 6 | ||||
| min_range | 342 | 1 | T9 | 5 | T25 | 1 | T26 | 1 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 3 | 0 | 3 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| max_range | 1 | 1 | T341 | 1 | - | - | - | - | ||||
| mid_range | 14 | 1 | T318 | 4 | T315 | 10 | - | - | ||||
| min_range | 340 | 1 | T9 | 5 | T25 | 1 | T26 | 1 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 3 | 0 | 3 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| max_range | 8 | 1 | T342 | 4 | T71 | 4 | - | - | ||||
| mid_range | 2 | 1 | T198 | 2 | - | - | - | - | ||||
| min_range | 345 | 1 | T9 | 5 | T25 | 1 | T26 | 1 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |