Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts

Module : sysrst_ctrl_csr_assert_fpv
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_sysrst_ctrl_csr_assert_0/sysrst_ctrl_csr_assert_fpv.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.sysrst_ctrl_csr_assert 100.00 100.00


Module Instance : tb.dut.sysrst_ctrl_csr_assert

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
99.02 100.00 96.08 100.00 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children

Since this is the module's only instance, the coverage report is the same as for the module.
Assert Coverage for Module : sysrst_ctrl_csr_assert_fpv
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 36 36 100.00 36 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 36 36 100.00 36 100.00



Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
TlulOOBAddrErr_A 1020615420 12514 0 0
auto_block_debounce_ctl_rd_A 1020615420 1856 0 0
auto_block_out_ctl_rd_A 1020615420 2567 0 0
com_det_ctl_0_rd_A 1020615420 3334 0 0
com_det_ctl_1_rd_A 1020615420 3260 0 0
com_det_ctl_2_rd_A 1020615420 3602 0 0
com_det_ctl_3_rd_A 1020615420 3347 0 0
com_out_ctl_0_rd_A 1020615420 4164 0 0
com_out_ctl_1_rd_A 1020615420 3922 0 0
com_out_ctl_2_rd_A 1020615420 4194 0 0
com_out_ctl_3_rd_A 1020615420 4023 0 0
com_pre_det_ctl_0_rd_A 1020615420 1151 0 0
com_pre_det_ctl_1_rd_A 1020615420 1299 0 0
com_pre_det_ctl_2_rd_A 1020615420 1304 0 0
com_pre_det_ctl_3_rd_A 1020615420 1307 0 0
com_pre_sel_ctl_0_rd_A 1020615420 3982 0 0
com_pre_sel_ctl_1_rd_A 1020615420 4417 0 0
com_pre_sel_ctl_2_rd_A 1020615420 4386 0 0
com_pre_sel_ctl_3_rd_A 1020615420 4347 0 0
com_sel_ctl_0_rd_A 1020615420 4294 0 0
com_sel_ctl_1_rd_A 1020615420 4393 0 0
com_sel_ctl_2_rd_A 1020615420 4070 0 0
com_sel_ctl_3_rd_A 1020615420 4268 0 0
ec_rst_ctl_rd_A 1020615420 2248 0 0
intr_enable_rd_A 1020615420 1515 0 0
key_intr_ctl_rd_A 1020615420 4346 0 0
key_intr_debounce_ctl_rd_A 1020615420 1116 0 0
key_invert_ctl_rd_A 1020615420 6149 0 0
pin_allowed_ctl_rd_A 1020615420 6489 0 0
pin_out_ctl_rd_A 1020615420 4953 0 0
pin_out_value_rd_A 1020615420 4858 0 0
regwen_rd_A 1020615420 1312 0 0
ulp_ac_debounce_ctl_rd_A 1020615420 1352 0 0
ulp_ctl_rd_A 1020615420 1297 0 0
ulp_lid_debounce_ctl_rd_A 1020615420 1413 0 0
ulp_pwrb_debounce_ctl_rd_A 1020615420 1455 0 0


TlulOOBAddrErr_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 12514 0 0
T1 357911 0 0 0
T4 302761 13 0 0
T5 322966 0 0 0
T6 60909 0 0 0
T13 0 5 0 0
T14 21546 0 0 0
T15 245813 0 0 0
T16 89079 0 0 0
T17 34284 0 0 0
T18 246865 0 0 0
T19 253002 0 0 0
T26 0 14 0 0
T41 0 4 0 0
T44 0 16 0 0
T87 0 28 0 0
T130 0 21 0 0
T179 0 12 0 0
T284 0 16 0 0
T299 0 12 0 0

auto_block_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1856 0 0
T1 357911 0 0 0
T5 322966 14 0 0
T6 60909 0 0 0
T14 21546 0 0 0
T15 245813 0 0 0
T16 89079 0 0 0
T17 34284 0 0 0
T18 246865 0 0 0
T19 253002 0 0 0
T20 220949 0 0 0
T55 0 2 0 0
T110 0 3 0 0
T128 0 14 0 0
T179 0 39 0 0
T189 0 38 0 0
T299 0 46 0 0
T300 0 5 0 0
T301 0 22 0 0
T302 0 2 0 0

auto_block_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 2567 0 0
T1 357911 0 0 0
T5 322966 12 0 0
T6 60909 0 0 0
T14 21546 0 0 0
T15 245813 0 0 0
T16 89079 0 0 0
T17 34284 0 0 0
T18 246865 0 0 0
T19 253002 0 0 0
T20 220949 0 0 0
T90 0 29 0 0
T110 0 5 0 0
T128 0 12 0 0
T179 0 42 0 0
T189 0 28 0 0
T299 0 55 0 0
T300 0 17 0 0
T301 0 3 0 0
T302 0 4 0 0

com_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 3334 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 20 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 29 0 0
T99 0 130 0 0
T127 0 42 0 0
T179 0 149 0 0
T194 0 88 0 0
T205 0 63 0 0
T214 0 77 0 0
T216 0 73 0 0
T270 0 68 0 0

com_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 3260 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 27 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 31 0 0
T99 0 109 0 0
T127 0 48 0 0
T179 0 154 0 0
T194 0 77 0 0
T205 0 65 0 0
T214 0 73 0 0
T216 0 60 0 0
T270 0 61 0 0

com_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 3602 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 26 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 81 0 0
T99 0 158 0 0
T127 0 39 0 0
T179 0 209 0 0
T194 0 70 0 0
T205 0 69 0 0
T214 0 36 0 0
T216 0 62 0 0
T270 0 87 0 0

com_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 3347 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 42 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 57 0 0
T99 0 144 0 0
T127 0 49 0 0
T179 0 170 0 0
T194 0 67 0 0
T205 0 78 0 0
T214 0 56 0 0
T216 0 69 0 0
T270 0 61 0 0

com_out_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4164 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 21 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 55 0 0
T99 0 146 0 0
T127 0 40 0 0
T179 0 161 0 0
T194 0 97 0 0
T205 0 72 0 0
T214 0 70 0 0
T216 0 78 0 0
T270 0 74 0 0

com_out_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 3922 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 29 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 63 0 0
T99 0 177 0 0
T127 0 44 0 0
T179 0 176 0 0
T194 0 63 0 0
T205 0 80 0 0
T214 0 59 0 0
T216 0 95 0 0
T270 0 59 0 0

com_out_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4194 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 38 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 38 0 0
T99 0 119 0 0
T127 0 42 0 0
T179 0 158 0 0
T194 0 59 0 0
T205 0 66 0 0
T214 0 66 0 0
T216 0 78 0 0
T270 0 95 0 0

com_out_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4023 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 34 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 25 0 0
T99 0 148 0 0
T127 0 43 0 0
T179 0 171 0 0
T194 0 59 0 0
T205 0 71 0 0
T214 0 69 0 0
T216 0 69 0 0
T270 0 94 0 0

com_pre_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1151 0 0
T87 504917 0 0 0
T90 0 14 0 0
T100 598670 0 0 0
T130 386012 0 0 0
T179 474489 39 0 0
T189 0 39 0 0
T192 51130 0 0 0
T195 0 6 0 0
T230 0 16 0 0
T299 0 12 0 0
T303 0 34 0 0
T304 0 13 0 0
T305 0 17 0 0
T306 0 23 0 0
T307 118207 0 0 0
T308 44855 0 0 0
T309 323116 0 0 0
T310 460303 0 0 0
T311 210817 0 0 0

com_pre_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1299 0 0
T87 504917 0 0 0
T90 0 13 0 0
T100 598670 0 0 0
T130 386012 0 0 0
T149 0 9 0 0
T179 474489 22 0 0
T189 0 51 0 0
T192 51130 0 0 0
T195 0 19 0 0
T299 0 18 0 0
T303 0 45 0 0
T304 0 16 0 0
T305 0 20 0 0
T306 0 36 0 0
T307 118207 0 0 0
T308 44855 0 0 0
T309 323116 0 0 0
T310 460303 0 0 0
T311 210817 0 0 0

com_pre_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1304 0 0
T87 504917 0 0 0
T90 0 19 0 0
T100 598670 0 0 0
T130 386012 0 0 0
T149 0 14 0 0
T179 474489 25 0 0
T189 0 32 0 0
T192 51130 0 0 0
T195 0 14 0 0
T299 0 19 0 0
T303 0 40 0 0
T304 0 18 0 0
T305 0 13 0 0
T306 0 14 0 0
T307 118207 0 0 0
T308 44855 0 0 0
T309 323116 0 0 0
T310 460303 0 0 0
T311 210817 0 0 0

com_pre_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1307 0 0
T87 504917 0 0 0
T90 0 28 0 0
T100 598670 0 0 0
T130 386012 0 0 0
T179 474489 26 0 0
T189 0 35 0 0
T192 51130 0 0 0
T195 0 23 0 0
T230 0 18 0 0
T299 0 19 0 0
T303 0 27 0 0
T304 0 21 0 0
T305 0 22 0 0
T306 0 14 0 0
T307 118207 0 0 0
T308 44855 0 0 0
T309 323116 0 0 0
T310 460303 0 0 0
T311 210817 0 0 0

com_pre_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 3982 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 44 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 33 0 0
T99 0 130 0 0
T127 0 43 0 0
T179 0 159 0 0
T194 0 64 0 0
T205 0 73 0 0
T214 0 69 0 0
T216 0 73 0 0
T270 0 75 0 0

com_pre_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4417 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 35 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 61 0 0
T99 0 155 0 0
T127 0 46 0 0
T179 0 163 0 0
T194 0 70 0 0
T205 0 81 0 0
T214 0 64 0 0
T216 0 74 0 0
T270 0 85 0 0

com_pre_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4386 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 39 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 62 0 0
T99 0 136 0 0
T127 0 47 0 0
T179 0 185 0 0
T194 0 54 0 0
T205 0 56 0 0
T214 0 71 0 0
T216 0 85 0 0
T270 0 44 0 0

com_pre_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4347 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 23 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 45 0 0
T99 0 137 0 0
T127 0 46 0 0
T179 0 161 0 0
T194 0 66 0 0
T205 0 70 0 0
T214 0 72 0 0
T216 0 76 0 0
T270 0 43 0 0

com_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4294 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 10 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 40 0 0
T99 0 117 0 0
T127 0 58 0 0
T179 0 216 0 0
T194 0 69 0 0
T205 0 67 0 0
T214 0 49 0 0
T216 0 67 0 0
T270 0 75 0 0

com_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4393 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 22 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 39 0 0
T99 0 124 0 0
T127 0 53 0 0
T179 0 173 0 0
T194 0 66 0 0
T205 0 82 0 0
T214 0 58 0 0
T216 0 72 0 0
T270 0 72 0 0

com_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4070 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 24 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 43 0 0
T99 0 145 0 0
T127 0 53 0 0
T179 0 151 0 0
T194 0 79 0 0
T205 0 80 0 0
T214 0 62 0 0
T216 0 68 0 0
T270 0 69 0 0

com_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4268 0 0
T26 104391 0 0 0
T27 438563 0 0 0
T28 211811 0 0 0
T35 194403 34 0 0
T36 490786 0 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 40 0 0
T99 0 153 0 0
T127 0 40 0 0
T179 0 156 0 0
T194 0 74 0 0
T205 0 69 0 0
T214 0 77 0 0
T216 0 72 0 0
T270 0 69 0 0

ec_rst_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 2248 0 0
T2 479566 0 0 0
T3 451922 0 0 0
T7 411994 0 0 0
T16 89079 4 0 0
T17 34284 0 0 0
T18 246865 0 0 0
T19 253002 0 0 0
T20 220949 0 0 0
T21 235350 0 0 0
T35 0 11 0 0
T48 365333 0 0 0
T60 0 2 0 0
T127 0 16 0 0
T194 0 51 0 0
T216 0 38 0 0
T265 0 5 0 0
T270 0 5 0 0
T312 0 1 0 0
T313 0 5 0 0

intr_enable_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1515 0 0
T74 251764 0 0 0
T90 0 35 0 0
T94 512613 0 0 0
T110 118219 12 0 0
T111 719931 0 0 0
T112 12986 0 0 0
T113 201077 0 0 0
T114 128477 0 0 0
T115 255668 0 0 0
T116 27597 0 0 0
T149 0 5 0 0
T152 78667 0 0 0
T179 0 63 0 0
T189 0 47 0 0
T195 0 30 0 0
T299 0 15 0 0
T303 0 53 0 0
T304 0 27 0 0
T314 0 6 0 0

key_intr_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4346 0 0
T26 104391 0 0 0
T27 438563 1 0 0
T28 211811 0 0 0
T36 490786 0 0 0
T39 612033 0 0 0
T47 0 4 0 0
T51 309171 0 0 0
T70 133343 0 0 0
T71 26564 0 0 0
T72 221106 0 0 0
T78 420266 0 0 0
T90 0 35 0 0
T155 0 1 0 0
T179 0 62 0 0
T189 0 38 0 0
T205 0 9 0 0
T206 0 7 0 0
T272 0 10 0 0
T299 0 15 0 0

key_intr_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1116 0 0
T87 504917 0 0 0
T90 0 19 0 0
T100 598670 0 0 0
T130 386012 0 0 0
T149 0 12 0 0
T179 474489 35 0 0
T189 0 42 0 0
T192 51130 0 0 0
T195 0 15 0 0
T299 0 23 0 0
T303 0 27 0 0
T304 0 5 0 0
T305 0 11 0 0
T306 0 13 0 0
T307 118207 0 0 0
T308 44855 0 0 0
T309 323116 0 0 0
T310 460303 0 0 0
T311 210817 0 0 0

key_invert_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 6149 0 0
T47 0 72 0 0
T90 0 373 0 0
T94 512613 0 0 0
T112 12986 76 0 0
T113 201077 0 0 0
T114 128477 0 0 0
T115 255668 0 0 0
T116 27597 0 0 0
T152 78667 0 0 0
T179 0 23 0 0
T189 0 48 0 0
T299 0 258 0 0
T300 293011 0 0 0
T315 0 32 0 0
T316 0 69 0 0
T317 0 69 0 0
T318 0 45 0 0
T319 49761 0 0 0
T320 57608 0 0 0

pin_allowed_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 6489 0 0
T57 200568 0 0 0
T64 52055 0 0 0
T127 637874 0 0 0
T179 0 30 0 0
T189 0 225 0 0
T200 0 75 0 0
T210 0 71 0 0
T299 0 12 0 0
T313 137960 0 0 0
T321 240852 62 0 0
T322 0 88 0 0
T323 0 36 0 0
T324 0 28 0 0
T325 0 70 0 0
T326 83175 0 0 0
T327 39917 0 0 0
T328 202637 0 0 0
T329 118076 0 0 0
T330 245328 0 0 0

pin_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4953 0 0
T57 200568 0 0 0
T64 52055 0 0 0
T127 637874 0 0 0
T179 0 21 0 0
T189 0 207 0 0
T200 0 56 0 0
T210 0 77 0 0
T299 0 19 0 0
T313 137960 0 0 0
T321 240852 65 0 0
T322 0 72 0 0
T323 0 17 0 0
T324 0 58 0 0
T325 0 81 0 0
T326 83175 0 0 0
T327 39917 0 0 0
T328 202637 0 0 0
T329 118076 0 0 0
T330 245328 0 0 0

pin_out_value_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 4858 0 0
T57 200568 0 0 0
T64 52055 0 0 0
T127 637874 0 0 0
T179 0 20 0 0
T189 0 237 0 0
T200 0 59 0 0
T210 0 66 0 0
T299 0 14 0 0
T313 137960 0 0 0
T321 240852 53 0 0
T322 0 72 0 0
T323 0 47 0 0
T324 0 32 0 0
T325 0 78 0 0
T326 83175 0 0 0
T327 39917 0 0 0
T328 202637 0 0 0
T329 118076 0 0 0
T330 245328 0 0 0

regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1312 0 0
T87 504917 0 0 0
T90 0 31 0 0
T100 598670 0 0 0
T130 386012 0 0 0
T149 0 2 0 0
T179 474489 31 0 0
T189 0 29 0 0
T192 51130 0 0 0
T195 0 26 0 0
T299 0 15 0 0
T303 0 43 0 0
T304 0 15 0 0
T305 0 12 0 0
T306 0 14 0 0
T307 118207 0 0 0
T308 44855 0 0 0
T309 323116 0 0 0
T310 460303 0 0 0
T311 210817 0 0 0

ulp_ac_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1352 0 0
T37 447722 0 0 0
T47 0 3 0 0
T61 203860 2 0 0
T62 53284 0 0 0
T74 0 8 0 0
T75 0 2 0 0
T76 0 7 0 0
T79 245502 0 0 0
T90 0 40 0 0
T95 214078 0 0 0
T126 489546 0 0 0
T136 0 1 0 0
T162 28175 0 0 0
T179 0 39 0 0
T189 0 44 0 0
T299 0 22 0 0
T331 174495 0 0 0
T332 57705 0 0 0
T333 53337 0 0 0

ulp_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1297 0 0
T37 447722 0 0 0
T47 0 1 0 0
T61 203860 3 0 0
T62 53284 0 0 0
T64 0 3 0 0
T74 0 5 0 0
T75 0 7 0 0
T77 0 3 0 0
T79 245502 0 0 0
T95 214078 0 0 0
T126 489546 0 0 0
T136 0 1 0 0
T162 28175 0 0 0
T179 0 34 0 0
T189 0 37 0 0
T299 0 29 0 0
T331 174495 0 0 0
T332 57705 0 0 0
T333 53337 0 0 0

ulp_lid_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1413 0 0
T38 178631 0 0 0
T41 177121 0 0 0
T43 211428 0 0 0
T47 0 1 0 0
T64 52055 2 0 0
T74 0 7 0 0
T75 0 6 0 0
T76 0 9 0 0
T90 0 35 0 0
T127 637874 0 0 0
T135 958430 0 0 0
T136 0 5 0 0
T179 0 38 0 0
T189 0 38 0 0
T299 0 14 0 0
T329 118076 0 0 0
T330 245328 0 0 0
T334 45303 0 0 0
T335 63167 0 0 0

ulp_pwrb_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1020615420 1455 0 0
T37 447722 0 0 0
T47 0 3 0 0
T61 203860 11 0 0
T62 53284 0 0 0
T64 0 6 0 0
T74 0 10 0 0
T76 0 6 0 0
T79 245502 0 0 0
T90 0 23 0 0
T95 214078 0 0 0
T126 489546 0 0 0
T136 0 3 0 0
T162 28175 0 0 0
T179 0 26 0 0
T189 0 38 0 0
T299 0 23 0 0
T331 174495 0 0 0
T332 57705 0 0 0
T333 53337 0 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%