Module Definition
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Module : sysrst_ctrl_csr_assert_fpv
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_sysrst_ctrl_csr_assert_0/sysrst_ctrl_csr_assert_fpv.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.sysrst_ctrl_csr_assert 100.00 100.00


Module Instance : tb.dut.sysrst_ctrl_csr_assert

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
99.02 100.00 96.08 100.00 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children

Since this is the module's only instance, the coverage report is the same as for the module.
Assert Coverage for Module : sysrst_ctrl_csr_assert_fpv
TotalAttemptedPercentSucceeded/MatchedPercent
Assertions 36 36 100.00 36 100.00
Cover properties 0 0 0
Cover sequences 0 0 0
Total 36 36 100.00 36 100.00



Assertion Details

NameAttemptsReal SuccessesFailuresIncomplete
TlulOOBAddrErr_A 1492511356 11264 0 0
auto_block_debounce_ctl_rd_A 1492511356 1995 0 0
auto_block_out_ctl_rd_A 1492511356 3138 0 0
com_det_ctl_0_rd_A 1492511356 3627 0 0
com_det_ctl_1_rd_A 1492511356 3764 0 0
com_det_ctl_2_rd_A 1492511356 3779 0 0
com_det_ctl_3_rd_A 1492511356 3795 0 0
com_out_ctl_0_rd_A 1492511356 4515 0 0
com_out_ctl_1_rd_A 1492511356 4565 0 0
com_out_ctl_2_rd_A 1492511356 4529 0 0
com_out_ctl_3_rd_A 1492511356 4521 0 0
com_pre_det_ctl_0_rd_A 1492511356 1738 0 0
com_pre_det_ctl_1_rd_A 1492511356 1625 0 0
com_pre_det_ctl_2_rd_A 1492511356 1609 0 0
com_pre_det_ctl_3_rd_A 1492511356 1679 0 0
com_pre_sel_ctl_0_rd_A 1492511356 4684 0 0
com_pre_sel_ctl_1_rd_A 1492511356 4684 0 0
com_pre_sel_ctl_2_rd_A 1492511356 4667 0 0
com_pre_sel_ctl_3_rd_A 1492511356 4741 0 0
com_sel_ctl_0_rd_A 1492511356 4663 0 0
com_sel_ctl_1_rd_A 1492511356 4747 0 0
com_sel_ctl_2_rd_A 1492511356 4654 0 0
com_sel_ctl_3_rd_A 1492511356 4834 0 0
ec_rst_ctl_rd_A 1492511356 2689 0 0
intr_enable_rd_A 1492511356 2219 0 0
key_intr_ctl_rd_A 1492511356 5196 0 0
key_intr_debounce_ctl_rd_A 1492511356 1674 0 0
key_invert_ctl_rd_A 1492511356 6436 0 0
pin_allowed_ctl_rd_A 1492511356 7038 0 0
pin_out_ctl_rd_A 1492511356 5197 0 0
pin_out_value_rd_A 1492511356 5215 0 0
regwen_rd_A 1492511356 1665 0 0
ulp_ac_debounce_ctl_rd_A 1492511356 1673 0 0
ulp_ctl_rd_A 1492511356 1734 0 0
ulp_lid_debounce_ctl_rd_A 1492511356 1749 0 0
ulp_pwrb_debounce_ctl_rd_A 1492511356 1663 0 0


TlulOOBAddrErr_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 11264 0 0
T12 310937 28 0 0
T26 29873 0 0 0
T34 111117 0 0 0
T35 441629 0 0 0
T38 116364 0 0 0
T39 0 6 0 0
T51 0 6 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T86 0 9 0 0
T87 0 3 0 0
T89 0 14 0 0
T96 0 14 0 0
T100 0 16 0 0
T167 171351 0 0 0
T239 0 2 0 0
T296 0 10 0 0

auto_block_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1995 0 0
T7 88010 0 0 0
T8 897408 0 0 0
T9 180502 0 0 0
T10 257671 0 0 0
T11 206975 0 0 0
T25 237350 0 0 0
T27 971631 10 0 0
T28 43954 0 0 0
T39 0 23 0 0
T47 0 19 0 0
T48 0 13 0 0
T53 135200 0 0 0
T54 99854 0 0 0
T89 0 12 0 0
T96 0 37 0 0
T131 0 15 0 0
T297 0 9 0 0
T298 0 9 0 0
T299 0 9 0 0

auto_block_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 3138 0 0
T7 88010 0 0 0
T8 897408 0 0 0
T9 180502 0 0 0
T10 257671 0 0 0
T11 206975 0 0 0
T25 237350 0 0 0
T27 971631 5 0 0
T28 43954 0 0 0
T39 0 39 0 0
T47 0 9 0 0
T48 0 15 0 0
T53 135200 0 0 0
T54 99854 0 0 0
T89 0 29 0 0
T96 0 28 0 0
T131 0 3 0 0
T297 0 14 0 0
T298 0 15 0 0
T299 0 9 0 0

com_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 3627 0 0
T26 29873 0 0 0
T34 111117 55 0 0
T35 441629 0 0 0
T36 0 21 0 0
T39 0 33 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 13 0 0
T98 0 26 0 0
T109 0 40 0 0
T167 171351 0 0 0
T228 0 30 0 0
T250 0 47 0 0
T300 0 71 0 0
T301 0 40 0 0

com_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 3764 0 0
T26 29873 0 0 0
T34 111117 75 0 0
T35 441629 0 0 0
T36 0 32 0 0
T39 0 59 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 29 0 0
T98 0 35 0 0
T109 0 51 0 0
T167 171351 0 0 0
T228 0 41 0 0
T250 0 30 0 0
T300 0 89 0 0
T301 0 51 0 0

com_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 3779 0 0
T26 29873 0 0 0
T34 111117 65 0 0
T35 441629 0 0 0
T36 0 36 0 0
T39 0 44 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 7 0 0
T98 0 25 0 0
T109 0 42 0 0
T167 171351 0 0 0
T228 0 29 0 0
T250 0 58 0 0
T300 0 124 0 0
T301 0 46 0 0

com_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 3795 0 0
T26 29873 0 0 0
T34 111117 85 0 0
T35 441629 0 0 0
T36 0 35 0 0
T39 0 39 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 21 0 0
T98 0 38 0 0
T109 0 45 0 0
T167 171351 0 0 0
T228 0 26 0 0
T250 0 46 0 0
T300 0 83 0 0
T301 0 62 0 0

com_out_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4515 0 0
T26 29873 0 0 0
T34 111117 99 0 0
T35 441629 0 0 0
T36 0 46 0 0
T39 0 69 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 36 0 0
T98 0 47 0 0
T109 0 39 0 0
T167 171351 0 0 0
T228 0 23 0 0
T250 0 41 0 0
T300 0 91 0 0
T301 0 48 0 0

com_out_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4565 0 0
T26 29873 0 0 0
T34 111117 60 0 0
T35 441629 0 0 0
T36 0 38 0 0
T39 0 55 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 23 0 0
T98 0 19 0 0
T109 0 35 0 0
T167 171351 0 0 0
T228 0 13 0 0
T250 0 63 0 0
T300 0 102 0 0
T301 0 56 0 0

com_out_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4529 0 0
T26 29873 0 0 0
T34 111117 58 0 0
T35 441629 0 0 0
T36 0 46 0 0
T39 0 50 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 27 0 0
T98 0 29 0 0
T109 0 22 0 0
T167 171351 0 0 0
T228 0 8 0 0
T250 0 47 0 0
T300 0 104 0 0
T301 0 65 0 0

com_out_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4521 0 0
T26 29873 0 0 0
T34 111117 50 0 0
T35 441629 0 0 0
T36 0 44 0 0
T39 0 53 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 16 0 0
T98 0 52 0 0
T109 0 37 0 0
T167 171351 0 0 0
T228 0 44 0 0
T250 0 57 0 0
T300 0 115 0 0
T301 0 34 0 0

com_pre_det_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1738 0 0
T33 35034 0 0 0
T36 456956 0 0 0
T39 693180 34 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 15 0 0
T96 0 26 0 0
T102 0 20 0 0
T177 0 38 0 0
T198 0 24 0 0
T302 0 18 0 0
T303 0 7 0 0
T304 0 40 0 0
T305 0 28 0 0

com_pre_det_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1625 0 0
T33 35034 0 0 0
T36 456956 0 0 0
T39 693180 54 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 7 0 0
T96 0 25 0 0
T102 0 30 0 0
T177 0 20 0 0
T198 0 19 0 0
T302 0 17 0 0
T303 0 19 0 0
T304 0 12 0 0
T305 0 21 0 0

com_pre_det_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1609 0 0
T33 35034 0 0 0
T36 456956 0 0 0
T39 693180 41 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 6 0 0
T96 0 29 0 0
T102 0 26 0 0
T177 0 23 0 0
T198 0 11 0 0
T302 0 28 0 0
T303 0 11 0 0
T304 0 34 0 0
T305 0 33 0 0

com_pre_det_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1679 0 0
T33 35034 0 0 0
T36 456956 0 0 0
T39 693180 35 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 5 0 0
T96 0 26 0 0
T102 0 23 0 0
T177 0 26 0 0
T198 0 12 0 0
T302 0 22 0 0
T303 0 17 0 0
T304 0 43 0 0
T305 0 18 0 0

com_pre_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4684 0 0
T26 29873 0 0 0
T34 111117 73 0 0
T35 441629 0 0 0
T36 0 43 0 0
T39 0 49 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 20 0 0
T98 0 40 0 0
T109 0 47 0 0
T167 171351 0 0 0
T228 0 25 0 0
T250 0 36 0 0
T300 0 98 0 0
T301 0 41 0 0

com_pre_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4684 0 0
T26 29873 0 0 0
T34 111117 72 0 0
T35 441629 0 0 0
T36 0 35 0 0
T39 0 48 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 34 0 0
T98 0 46 0 0
T109 0 29 0 0
T167 171351 0 0 0
T228 0 45 0 0
T250 0 40 0 0
T300 0 102 0 0
T301 0 41 0 0

com_pre_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4667 0 0
T26 29873 0 0 0
T34 111117 82 0 0
T35 441629 0 0 0
T36 0 51 0 0
T39 0 60 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 24 0 0
T98 0 41 0 0
T109 0 34 0 0
T167 171351 0 0 0
T228 0 36 0 0
T250 0 62 0 0
T300 0 95 0 0
T301 0 37 0 0

com_pre_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4741 0 0
T26 29873 0 0 0
T34 111117 73 0 0
T35 441629 0 0 0
T36 0 38 0 0
T39 0 54 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 16 0 0
T98 0 39 0 0
T109 0 34 0 0
T167 171351 0 0 0
T228 0 27 0 0
T250 0 59 0 0
T300 0 91 0 0
T301 0 57 0 0

com_sel_ctl_0_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4663 0 0
T26 29873 0 0 0
T34 111117 65 0 0
T35 441629 0 0 0
T36 0 19 0 0
T39 0 51 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 29 0 0
T98 0 34 0 0
T109 0 62 0 0
T167 171351 0 0 0
T228 0 38 0 0
T250 0 50 0 0
T300 0 75 0 0
T301 0 31 0 0

com_sel_ctl_1_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4747 0 0
T26 29873 0 0 0
T34 111117 67 0 0
T35 441629 0 0 0
T36 0 54 0 0
T39 0 35 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 45 0 0
T98 0 36 0 0
T109 0 29 0 0
T167 171351 0 0 0
T228 0 23 0 0
T250 0 38 0 0
T300 0 80 0 0
T301 0 60 0 0

com_sel_ctl_2_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4654 0 0
T26 29873 0 0 0
T34 111117 58 0 0
T35 441629 0 0 0
T36 0 28 0 0
T39 0 79 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 18 0 0
T98 0 37 0 0
T109 0 23 0 0
T167 171351 0 0 0
T228 0 20 0 0
T250 0 36 0 0
T300 0 88 0 0
T301 0 54 0 0

com_sel_ctl_3_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 4834 0 0
T26 29873 0 0 0
T34 111117 57 0 0
T35 441629 0 0 0
T36 0 41 0 0
T39 0 54 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T97 0 32 0 0
T98 0 30 0 0
T109 0 37 0 0
T167 171351 0 0 0
T228 0 27 0 0
T250 0 55 0 0
T300 0 118 0 0
T301 0 46 0 0

ec_rst_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 2689 0 0
T26 29873 0 0 0
T34 111117 22 0 0
T35 441629 0 0 0
T36 0 14 0 0
T39 0 41 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T74 202665 0 0 0
T75 248652 0 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T84 0 4 0 0
T94 0 9 0 0
T97 0 2 0 0
T167 171351 0 0 0
T181 0 6 0 0
T208 0 2 0 0
T228 0 23 0 0
T250 0 15 0 0

intr_enable_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 2219 0 0
T33 35034 0 0 0
T36 456956 0 0 0
T39 693180 55 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 32 0 0
T96 0 55 0 0
T102 0 51 0 0
T120 0 23 0 0
T177 0 63 0 0
T203 0 6 0 0
T302 0 45 0 0
T303 0 42 0 0
T304 0 32 0 0

key_intr_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 5196 0 0
T33 35034 0 0 0
T36 456956 0 0 0
T39 693180 33 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 21 0 0
T96 0 27 0 0
T101 0 2 0 0
T102 0 30 0 0
T129 0 2 0 0
T177 0 33 0 0
T179 0 5 0 0
T302 0 13 0 0
T303 0 9 0 0

key_intr_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1674 0 0
T33 35034 0 0 0
T36 456956 0 0 0
T39 693180 46 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 8 0 0
T96 0 38 0 0
T102 0 35 0 0
T177 0 24 0 0
T198 0 19 0 0
T302 0 12 0 0
T303 0 4 0 0
T304 0 23 0 0
T305 0 33 0 0

key_invert_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 6436 0 0
T7 88010 0 0 0
T8 897408 0 0 0
T9 180502 0 0 0
T10 257671 0 0 0
T11 206975 153 0 0
T12 310937 0 0 0
T25 237350 64 0 0
T26 0 42 0 0
T34 111117 0 0 0
T38 116364 0 0 0
T39 0 212 0 0
T48 0 63 0 0
T72 0 80 0 0
T73 0 65 0 0
T74 202665 0 0 0
T142 0 63 0 0
T191 0 82 0 0
T203 0 76 0 0

pin_allowed_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 7038 0 0
T35 441629 0 0 0
T39 0 136 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T72 44943 0 0 0
T75 248652 67 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T89 0 146 0 0
T96 0 36 0 0
T123 0 44 0 0
T167 171351 0 0 0
T207 197296 0 0 0
T208 229972 0 0 0
T306 0 78 0 0
T307 0 56 0 0
T308 0 66 0 0
T309 0 56 0 0
T310 0 62 0 0

pin_out_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 5197 0 0
T35 441629 0 0 0
T39 0 116 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T72 44943 0 0 0
T75 248652 56 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T89 0 243 0 0
T96 0 19 0 0
T123 0 73 0 0
T167 171351 0 0 0
T207 197296 0 0 0
T208 229972 0 0 0
T306 0 73 0 0
T307 0 73 0 0
T308 0 81 0 0
T309 0 83 0 0
T310 0 68 0 0

pin_out_value_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 5215 0 0
T35 441629 0 0 0
T39 0 97 0 0
T40 57355 0 0 0
T71 241112 0 0 0
T72 44943 0 0 0
T75 248652 64 0 0
T76 123062 0 0 0
T77 63150 0 0 0
T89 0 254 0 0
T96 0 32 0 0
T123 0 53 0 0
T167 171351 0 0 0
T207 197296 0 0 0
T208 229972 0 0 0
T306 0 76 0 0
T307 0 70 0 0
T308 0 63 0 0
T309 0 64 0 0
T310 0 58 0 0

regwen_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1665 0 0
T33 35034 0 0 0
T36 456956 0 0 0
T39 693180 49 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 13 0 0
T96 0 36 0 0
T102 0 43 0 0
T177 0 34 0 0
T198 0 6 0 0
T302 0 10 0 0
T303 0 12 0 0
T304 0 12 0 0
T305 0 23 0 0

ulp_ac_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1673 0 0
T24 0 2 0 0
T33 35034 4 0 0
T36 456956 0 0 0
T39 693180 34 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T58 0 15 0 0
T61 0 2 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 24 0 0
T96 0 15 0 0
T134 0 6 0 0
T177 0 35 0 0
T311 0 3 0 0

ulp_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1734 0 0
T24 0 2 0 0
T33 35034 0 0 0
T36 456956 0 0 0
T39 693180 42 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T58 0 6 0 0
T61 0 1 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 13 0 0
T96 0 22 0 0
T134 0 3 0 0
T177 0 24 0 0
T302 0 14 0 0
T311 0 5 0 0

ulp_lid_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1749 0 0
T33 35034 7 0 0
T36 456956 0 0 0
T39 693180 32 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T61 0 3 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 15 0 0
T96 0 28 0 0
T134 0 2 0 0
T177 0 29 0 0
T302 0 15 0 0
T303 0 24 0 0
T311 0 3 0 0

ulp_pwrb_debounce_ctl_rd_A
NameAttemptsReal SuccessesFailuresIncomplete
Total 1492511356 1663 0 0
T24 0 8 0 0
T33 35034 9 0 0
T36 456956 0 0 0
T39 693180 20 0 0
T43 394501 0 0 0
T46 109834 0 0 0
T57 204134 0 0 0
T58 0 8 0 0
T61 0 5 0 0
T64 211268 0 0 0
T65 151351 0 0 0
T66 83623 0 0 0
T67 125809 0 0 0
T89 0 9 0 0
T96 0 21 0 0
T134 0 4 0 0
T177 0 24 0 0
T311 0 7 0 0

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%