Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.54	98.79	96.76	100.00	95.51	98.26	99.33	94.14

Total tests in report: 913

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
59.23	59.23	77.94	77.94	66.94	66.94	92.24	92.24	14.74	14.74	78.78	78.78	66.28	66.28	17.68	17.68	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3339928599
72.05	12.82	85.45	7.50	76.57	9.63	93.61	1.37	39.10	24.36	86.10	7.32	79.29	13.01	44.25	26.57	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2659282890
77.48	5.42	88.15	2.71	79.25	2.68	94.52	0.91	57.69	18.59	88.54	2.44	85.84	6.55	48.34	4.09	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2484376920
81.64	4.16	93.60	5.45	86.93	7.68	96.80	2.28	60.90	3.21	93.72	5.18	89.31	3.47	50.22	1.88	/workspace/coverage/default/11.sysrst_ctrl_stress_all.1808053499
84.83	3.19	95.19	1.59	88.22	1.29	96.80	0.00	72.44	11.54	95.05	1.33	93.06	3.76	53.04	2.82	/workspace/coverage/default/14.sysrst_ctrl_stress_all.1254804796
86.78	1.95	95.28	0.09	88.42	0.20	96.80	0.00	75.00	2.56	95.27	0.22	93.35	0.29	63.31	10.28	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2650158810
88.15	1.37	95.82	0.54	89.08	0.66	96.80	0.00	77.56	2.56	95.53	0.26	94.61	1.25	67.62	4.31	/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3023804552
89.45	1.30	95.89	0.07	90.32	1.24	97.49	0.68	77.56	0.00	95.64	0.11	94.61	0.00	74.64	7.02	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2421348318
90.62	1.17	96.66	0.77	92.37	2.05	97.49	0.00	82.05	4.49	96.56	0.92	94.61	0.00	74.64	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2726979831
91.54	0.92	97.80	1.14	94.14	1.77	98.17	0.68	82.05	0.00	97.38	0.81	96.34	1.73	74.92	0.28	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1879598543
92.20	0.66	97.85	0.06	94.29	0.15	98.17	0.00	83.33	1.28	97.45	0.07	96.44	0.10	77.85	2.93	/workspace/coverage/default/47.sysrst_ctrl_stress_all.2911484267
92.83	0.63	97.98	0.13	94.46	0.18	98.17	0.00	86.54	3.21	97.63	0.18	96.82	0.39	78.18	0.33	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.21713607
93.26	0.43	98.08	0.09	94.49	0.03	98.17	0.00	86.54	0.00	97.63	0.00	96.92	0.10	80.99	2.82	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.112219176
93.61	0.35	98.15	0.07	94.59	0.10	98.17	0.00	88.46	1.92	97.78	0.15	97.11	0.19	80.99	0.00	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.136328957
93.93	0.32	98.23	0.07	94.77	0.18	98.17	0.00	89.10	0.64	97.82	0.04	97.40	0.29	82.04	1.05	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.659106984
94.23	0.30	98.36	0.13	94.82	0.05	98.17	0.00	90.38	1.28	97.89	0.07	97.50	0.10	82.49	0.44	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.52462627
94.51	0.28	98.43	0.07	94.99	0.18	98.17	0.00	91.03	0.64	97.93	0.04	97.78	0.29	83.20	0.72	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3738767331
94.78	0.28	98.43	0.00	94.99	0.00	98.17	0.00	91.03	0.00	97.93	0.00	97.78	0.00	85.14	1.93	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.704750153
95.03	0.24	98.43	0.00	95.05	0.05	98.17	0.00	91.67	0.64	97.93	0.00	97.98	0.19	85.97	0.83	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3970139664
95.27	0.24	98.49	0.06	95.12	0.08	99.54	1.37	91.67	0.00	97.93	0.00	97.98	0.00	86.13	0.17	/workspace/coverage/default/16.sysrst_ctrl_alert_test.670141045
95.48	0.22	98.54	0.06	95.15	0.03	99.54	0.00	92.95	1.28	98.00	0.07	98.07	0.10	86.13	0.00	/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.399616413
95.66	0.18	98.58	0.04	95.40	0.25	99.54	0.00	92.95	0.00	98.08	0.07	98.75	0.67	86.35	0.22	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_rw.4245065747
95.83	0.17	98.58	0.00	95.42	0.03	99.54	0.00	92.95	0.00	98.08	0.00	98.75	0.00	87.51	1.16	/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3392453894
95.99	0.15	98.60	0.02	95.42	0.00	99.54	0.00	93.59	0.64	98.11	0.04	98.75	0.00	87.90	0.39	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1870783964
96.13	0.14	98.60	0.00	96.36	0.94	99.54	0.00	93.59	0.00	98.11	0.00	98.75	0.00	87.96	0.06	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2645133620
96.27	0.14	98.64	0.04	96.41	0.05	99.54	0.00	93.59	0.00	98.11	0.00	98.75	0.00	88.84	0.88	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1902430440
96.39	0.12	98.68	0.04	96.44	0.03	99.54	0.00	94.23	0.64	98.15	0.04	98.84	0.10	88.84	0.00	/workspace/coverage/default/18.sysrst_ctrl_stress_all.3671577174
96.51	0.12	98.71	0.04	96.46	0.03	99.54	0.00	94.87	0.64	98.19	0.04	98.94	0.10	88.84	0.00	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2342733519
96.62	0.11	98.75	0.04	96.46	0.00	99.54	0.00	95.51	0.64	98.26	0.07	98.94	0.00	88.84	0.00	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3750318054
96.71	0.10	98.75	0.00	96.49	0.03	100.00	0.46	95.51	0.00	98.26	0.00	99.04	0.10	88.95	0.11	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.3994539304
96.81	0.09	98.77	0.02	96.54	0.05	100.00	0.00	95.51	0.00	98.26	0.00	99.13	0.10	89.45	0.50	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1078463013
96.87	0.06	98.77	0.00	96.54	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.13	0.00	89.89	0.44	/workspace/coverage/default/23.sysrst_ctrl_stress_all.2294515632
96.93	0.06	98.77	0.00	96.54	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.13	0.00	90.28	0.39	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2033131836
96.97	0.05	98.77	0.00	96.54	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.13	0.00	90.61	0.33	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.179605065
97.01	0.04	98.77	0.00	96.54	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.13	0.00	90.88	0.28	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3099299212
97.05	0.04	98.77	0.00	96.54	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.13	0.00	91.16	0.28	/workspace/coverage/default/34.sysrst_ctrl_stress_all.44120608
97.09	0.04	98.77	0.00	96.54	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.13	0.00	91.44	0.28	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.980310104
97.13	0.04	98.77	0.00	96.56	0.03	100.00	0.00	95.51	0.00	98.26	0.00	99.13	0.00	91.66	0.22	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2383199416
97.16	0.03	98.79	0.02	96.56	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.13	0.00	91.88	0.22	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2954220789
97.19	0.03	98.79	0.00	96.59	0.03	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.10	91.93	0.06	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2117562218
97.21	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	92.10	0.17	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3977515251
97.23	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	92.27	0.17	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3593453820
97.26	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	92.43	0.17	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.3477662307
97.28	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	92.60	0.17	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.849920793
97.30	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	92.71	0.11	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.2990855184
97.31	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	92.82	0.11	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1297896988
97.33	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	92.93	0.11	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2564481812
97.35	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	93.04	0.11	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.535393507
97.36	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	93.15	0.11	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3857284094
97.38	0.02	98.79	0.00	96.59	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	93.26	0.11	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2637239313
97.39	0.01	98.79	0.00	96.69	0.10	100.00	0.00	95.51	0.00	98.26	0.00	99.23	0.00	93.26	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.1385111588
97.41	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.10	93.26	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.3217293912
97.41	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.31	0.06	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1584623127
97.42	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.37	0.06	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1171812466
97.43	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.43	0.06	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2481901533
97.44	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.48	0.06	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.185092694
97.44	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.54	0.06	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2854117809
97.45	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.59	0.06	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2836428478
97.46	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.65	0.06	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1748221705
97.47	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.70	0.06	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1860374511
97.48	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.76	0.06	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3902951681
97.48	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.81	0.06	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2938610222
97.49	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.87	0.06	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2262280590
97.50	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.92	0.06	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.4263971589
97.51	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	93.98	0.06	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.3715568542
97.52	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	94.03	0.06	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.728508384
97.52	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	94.09	0.06	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1676689900
97.53	0.01	98.79	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	94.14	0.06	/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1914524665
97.54	0.01	98.79	0.00	96.74	0.05	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	94.14	0.00	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.901259754

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1847205372
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3648702538
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.598976387
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.4157139248
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.1007086679
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2626846336
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3489322568
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3178371279
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.992821280
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3624558104
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3123498625
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1606007465
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3307177292
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1518849984
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2873973841
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1019829862
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2715571657
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.355323976
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1675480445
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2997165422
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3457022830
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2899691968
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1806366091
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.4173423571
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4117987809
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3288248570
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1507209547
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.170159992
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2967753500
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2279865494
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2294788692
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2764817989
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1699490871
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1531328087
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2937501293
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2395090192
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2684629730
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2303822128
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1420908178
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.2028052419
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2079597909
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1773895861
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1137158852
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/workspace/coverage/default/39.sysrst_ctrl_smoke.3437077905
/workspace/coverage/default/39.sysrst_ctrl_stress_all.4224561727
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2150409783
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2490170270
/workspace/coverage/default/4.sysrst_ctrl_alert_test.15347036
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.9651855
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2425614864
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3889540716
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2912929011
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.175142854
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2014459994
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2433260796
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2210471479
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1079070890
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.4013247526
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.524223575
/workspace/coverage/default/4.sysrst_ctrl_smoke.1097402270
/workspace/coverage/default/4.sysrst_ctrl_stress_all.3512776581
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1272741026
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1324599067
/workspace/coverage/default/40.sysrst_ctrl_alert_test.1917740529
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.4244795593
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.643010248
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3373362088
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2356762524
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1928066196
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2430051327
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2731598672
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.286033478
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.595998165
/workspace/coverage/default/40.sysrst_ctrl_smoke.4175607674
/workspace/coverage/default/40.sysrst_ctrl_stress_all.2488406006
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3617260334
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1717251189
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2154479928
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.166792556
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1042043879
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1682662000
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2790092608
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.4084860053
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2693967510
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.720147450
/workspace/coverage/default/41.sysrst_ctrl_smoke.4274621653
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1400652139
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3123992076
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3002748118
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.896379323
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.774121685
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.594094801
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1076550677
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.899408469
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2918131524
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2090107981
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1208209445
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1899657085
/workspace/coverage/default/42.sysrst_ctrl_smoke.2170872792
/workspace/coverage/default/42.sysrst_ctrl_stress_all.3507411862
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1275419297
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3173858976
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.499033503
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.674656614
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1881759442
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.975730551
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.656116373
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3347986814
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3933949106
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1242214517
/workspace/coverage/default/43.sysrst_ctrl_smoke.1398558411
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1566790427
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.774664534
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2507069813
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1093496423
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2778416103
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3171403656
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.886496225
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2214262789
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.4010882314
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1544533736
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1415476421
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1576987794
/workspace/coverage/default/44.sysrst_ctrl_smoke.548971357
/workspace/coverage/default/44.sysrst_ctrl_stress_all.788510884
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3109883110
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3708441560
/workspace/coverage/default/45.sysrst_ctrl_alert_test.867334472
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3296513539
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1526765948
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.237733967
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3021820311
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2556910025
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4121439573
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2764915224
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.460099509
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3829474137
/workspace/coverage/default/45.sysrst_ctrl_smoke.4104959079
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3064991996
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1537048837
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2082713123
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1917769592
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3774377506
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3662071537
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3668129099
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2473634391
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3422134925
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2870191716
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2401003848
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1109566330
/workspace/coverage/default/46.sysrst_ctrl_smoke.3015400816
/workspace/coverage/default/46.sysrst_ctrl_stress_all.2981366734
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.820686558
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2031455020
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1717300874
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3189757515
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3773377868
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2559226199
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.642160449
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2703030012
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1827311476
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.406141530
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2842429294
/workspace/coverage/default/47.sysrst_ctrl_smoke.823341905
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1307340725
/workspace/coverage/default/48.sysrst_ctrl_alert_test.586427474
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3095819976
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.930680526
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3563345959
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3237897221
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1684084915
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.379929659
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2482138407
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1507359281
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.804907344
/workspace/coverage/default/48.sysrst_ctrl_smoke.1234718415
/workspace/coverage/default/48.sysrst_ctrl_stress_all.580818632
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.12520589
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2329656526
/workspace/coverage/default/49.sysrst_ctrl_alert_test.4175348046
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3032056902
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1651198256
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1647621482
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1773521630
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.692515725
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2690635111
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.4093978610
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3327078665
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4228878798
/workspace/coverage/default/49.sysrst_ctrl_smoke.3278954923
/workspace/coverage/default/49.sysrst_ctrl_stress_all.600697070
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.4056185385
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1756789720
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2139119158
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4050009439
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2696850000
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3090292397
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.213764637
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.176093437
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2651525535
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3605080281
/workspace/coverage/default/5.sysrst_ctrl_smoke.971983195
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3615668348
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.612500705
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2087711144
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.531220217
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.154665197
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2981277350
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.4256372126
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2728319289
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3477309769
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3531397308
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1623369617
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1346553776
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1563420732
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.1547914463
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1504528513
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.237364510
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2947738665
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2425208849
/workspace/coverage/default/6.sysrst_ctrl_smoke.581858221
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2610023545
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.760297628
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.876028334
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1042739936
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.710830671
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3422303940
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2338162252
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1032242480
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.922127517
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1678481662
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.521946896
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1711357177
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4023095645
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.285573212
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2536373052
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.156662883
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2851762564
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.64069072
/workspace/coverage/default/7.sysrst_ctrl_smoke.445280697
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1943636075
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2977765947
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.635401954
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3007524121
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2552649486
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.107704050
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3866242767
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2128651549
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2722351561
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.483531985
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.4163800684
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.4173297282
/workspace/coverage/default/8.sysrst_ctrl_alert_test.191433040
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2357067276
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3451200894
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1360529238
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1861319476
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2505474502
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2896194845
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.401617544
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3693486406
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1880153542
/workspace/coverage/default/8.sysrst_ctrl_smoke.227027431
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3814222457
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.742721628
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3553498022
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1671501454
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2742118535
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2420758458
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3836305542
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2220965074
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.817999834
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2883592099
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2769179969
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1136611409
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1527197152
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2865616164
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.711002340
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3418856014
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2270383230
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1996284391
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2100286933
/workspace/coverage/default/9.sysrst_ctrl_smoke.1137310390
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3433569454
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3886132768
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1015224023
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2316456280
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.994418981
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2272669892
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3357537787
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2330519665
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3716277990
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.292874102

Total test records in report: 913

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/34.sysrst_ctrl_stress_all.44120608	May 28 01:40:59 PM PDT 24	May 28 01:41:37 PM PDT 24	12130494595 ps
T1	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.711002340	May 28 01:39:32 PM PDT 24	May 28 01:39:43 PM PDT 24	2703260500 ps
T5	/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.231111490	May 28 01:42:03 PM PDT 24	May 28 01:42:14 PM PDT 24	2026269816 ps
T13	/workspace/coverage/default/45.sysrst_ctrl_smoke.4104959079	May 28 01:42:09 PM PDT 24	May 28 01:42:21 PM PDT 24	2118622026 ps
T14	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3662071537	May 28 01:42:11 PM PDT 24	May 28 01:43:29 PM PDT 24	27080680931 ps
T2	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3339928599	May 28 01:42:18 PM PDT 24	May 28 01:43:29 PM PDT 24	88777619320 ps
T3	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.4044603851	May 28 01:39:31 PM PDT 24	May 28 01:40:53 PM PDT 24	46037633194 ps
T15	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2674826063	May 28 01:39:50 PM PDT 24	May 28 01:39:59 PM PDT 24	2093042233 ps
T6	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.817999834	May 28 01:42:19 PM PDT 24	May 28 01:44:31 PM PDT 24	45330860181 ps
T16	/workspace/coverage/default/25.sysrst_ctrl_smoke.864809871	May 28 01:40:13 PM PDT 24	May 28 01:40:17 PM PDT 24	2128505807 ps
T17	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.2939395776	May 28 01:40:02 PM PDT 24	May 28 01:40:12 PM PDT 24	2612595478 ps
T27	/workspace/coverage/default/11.sysrst_ctrl_stress_all.1808053499	May 28 01:39:35 PM PDT 24	May 28 01:44:07 PM PDT 24	101214880655 ps
T53	/workspace/coverage/default/4.sysrst_ctrl_alert_test.15347036	May 28 01:39:16 PM PDT 24	May 28 01:39:25 PM PDT 24	2017876609 ps
T28	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1304191410	May 28 01:41:00 PM PDT 24	May 28 01:41:06 PM PDT 24	3381069311 ps
T54	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.175142854	May 28 01:39:15 PM PDT 24	May 28 01:39:21 PM PDT 24	3994271998 ps
T25	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2090107981	May 28 01:42:09 PM PDT 24	May 28 01:42:26 PM PDT 24	2472500270 ps
T7	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1928066196	May 28 01:42:11 PM PDT 24	May 28 01:42:24 PM PDT 24	4053222361 ps
T8	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.112219176	May 28 01:42:15 PM PDT 24	May 28 01:46:40 PM PDT 24	92513826664 ps
T9	/workspace/coverage/default/46.sysrst_ctrl_stress_all.2981366734	May 28 01:42:10 PM PDT 24	May 28 01:42:26 PM PDT 24	7460167490 ps
T10	/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3023804552	May 28 01:42:14 PM PDT 24	May 28 01:43:29 PM PDT 24	73619191534 ps
T11	/workspace/coverage/default/18.sysrst_ctrl_stress_all.3671577174	May 28 01:39:58 PM PDT 24	May 28 01:50:54 PM PDT 24	933730845542 ps
T12	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1537048837	May 28 01:42:08 PM PDT 24	May 28 01:43:42 PM PDT 24	31093790054 ps
T38	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.285573212	May 28 01:39:29 PM PDT 24	May 28 01:39:39 PM PDT 24	4494717495 ps
T34	/workspace/coverage/default/44.sysrst_ctrl_stress_all.788510884	May 28 01:42:10 PM PDT 24	May 28 01:47:08 PM PDT 24	111117544250 ps
T74	/workspace/coverage/default/38.sysrst_ctrl_smoke.597916165	May 28 01:42:02 PM PDT 24	May 28 01:42:13 PM PDT 24	2111190570 ps
T26	/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.1621170508	May 28 01:40:15 PM PDT 24	May 28 01:40:19 PM PDT 24	2489536312 ps
T75	/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4228878798	May 28 01:42:11 PM PDT 24	May 28 01:42:28 PM PDT 24	2511650595 ps
T167	/workspace/coverage/default/2.sysrst_ctrl_alert_test.680724621	May 28 01:39:16 PM PDT 24	May 28 01:39:26 PM PDT 24	2015978584 ps
T35	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.930680526	May 28 01:42:07 PM PDT 24	May 28 01:44:23 PM PDT 24	138009354104 ps
T76	/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.4193612081	May 28 01:39:16 PM PDT 24	May 28 01:39:25 PM PDT 24	2511460138 ps
T77	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2430051327	May 28 01:42:04 PM PDT 24	May 28 01:42:14 PM PDT 24	2631348873 ps
T71	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1827311476	May 28 01:42:10 PM PDT 24	May 28 01:42:29 PM PDT 24	2460331138 ps
T40	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1682662000	May 28 01:42:04 PM PDT 24	May 28 01:42:12 PM PDT 24	4279540992 ps
T207	/workspace/coverage/default/28.sysrst_ctrl_alert_test.2213915355	May 28 01:40:37 PM PDT 24	May 28 01:40:46 PM PDT 24	2013233471 ps
T208	/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.3749763884	May 28 01:41:00 PM PDT 24	May 28 01:41:13 PM PDT 24	3066241700 ps
T72	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2270383230	May 28 01:39:30 PM PDT 24	May 28 01:39:36 PM PDT 24	2496942454 ps
T209	/workspace/coverage/default/24.sysrst_ctrl_smoke.590651154	May 28 01:40:17 PM PDT 24	May 28 01:40:27 PM PDT 24	2112607663 ps
T78	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3829474137	May 28 01:42:09 PM PDT 24	May 28 01:42:26 PM PDT 24	2510942032 ps
T79	/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.4166761441	May 28 01:39:30 PM PDT 24	May 28 01:39:42 PM PDT 24	2611562275 ps
T210	/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2918131524	May 28 01:42:07 PM PDT 24	May 28 01:42:18 PM PDT 24	2628267216 ps
T39	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2659282890	May 28 01:42:13 PM PDT 24	May 28 01:45:15 PM PDT 24	73428665484 ps
T46	/workspace/coverage/default/42.sysrst_ctrl_stress_all.3507411862	May 28 01:42:09 PM PDT 24	May 28 01:42:47 PM PDT 24	12624387633 ps
T36	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.4263971589	May 28 01:40:36 PM PDT 24	May 28 01:42:47 PM PDT 24	93255774309 ps
T33	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3059608085	May 28 01:39:16 PM PDT 24	May 28 01:39:23 PM PDT 24	2827676488 ps
T57	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2262280590	May 28 01:40:17 PM PDT 24	May 28 01:41:13 PM PDT 24	81654010350 ps
T64	/workspace/coverage/default/12.sysrst_ctrl_smoke.36690818	May 28 01:39:35 PM PDT 24	May 28 01:39:45 PM PDT 24	2112708412 ps
T65	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1076550677	May 28 01:42:07 PM PDT 24	May 28 01:42:21 PM PDT 24	3290265852 ps
T66	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.1450063571	May 28 01:39:13 PM PDT 24	May 28 01:39:17 PM PDT 24	2459583419 ps
T67	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3611226736	May 28 01:40:36 PM PDT 24	May 28 01:40:42 PM PDT 24	2620998137 ps
T43	/workspace/coverage/default/25.sysrst_ctrl_edge_detect.1084592956	May 28 01:40:17 PM PDT 24	May 28 01:40:32 PM PDT 24	4890007618 ps
T68	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1776814938	May 28 01:39:44 PM PDT 24	May 28 01:39:50 PM PDT 24	2493442384 ps
T69	/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1077785378	May 28 01:40:56 PM PDT 24	May 28 01:41:04 PM PDT 24	2515316556 ps
T70	/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3462414594	May 28 01:39:52 PM PDT 24	May 28 01:39:56 PM PDT 24	2138638791 ps
T389	/workspace/coverage/default/30.sysrst_ctrl_alert_test.3836641305	May 28 01:40:54 PM PDT 24	May 28 01:41:04 PM PDT 24	2015471588 ps
T80	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.1392076277	May 28 01:40:37 PM PDT 24	May 28 01:40:44 PM PDT 24	2550649179 ps
T37	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1042861559	May 28 01:40:53 PM PDT 24	May 28 01:41:41 PM PDT 24	69269633332 ps
T390	/workspace/coverage/default/28.sysrst_ctrl_smoke.1095163258	May 28 01:40:39 PM PDT 24	May 28 01:40:44 PM PDT 24	2122982361 ps
T73	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.749473011	May 28 01:40:40 PM PDT 24	May 28 01:40:46 PM PDT 24	2470412090 ps
T82	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2383199416	May 28 01:42:15 PM PDT 24	May 28 01:44:29 PM PDT 24	91671301252 ps
T81	/workspace/coverage/default/14.sysrst_ctrl_stress_all.1254804796	May 28 01:39:41 PM PDT 24	May 28 01:39:51 PM PDT 24	15202665627 ps
T107	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2639080666	May 28 01:42:02 PM PDT 24	May 28 01:44:39 PM PDT 24	60430423241 ps
T41	/workspace/coverage/default/33.sysrst_ctrl_edge_detect.2245790887	May 28 01:40:52 PM PDT 24	May 28 01:40:58 PM PDT 24	2473780657 ps
T83	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3563345959	May 28 01:42:16 PM PDT 24	May 28 01:42:40 PM PDT 24	25096539217 ps
T202	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.899408469	May 28 01:42:07 PM PDT 24	May 28 01:42:20 PM PDT 24	3173022558 ps
T203	/workspace/coverage/default/48.sysrst_ctrl_stress_all.580818632	May 28 01:42:15 PM PDT 24	May 28 01:42:37 PM PDT 24	9489906445 ps
T22	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1275419297	May 28 01:42:06 PM PDT 24	May 28 01:42:17 PM PDT 24	4086504430 ps
T23	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1777170924	May 28 01:39:58 PM PDT 24	May 28 01:40:06 PM PDT 24	6913406395 ps
T58	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.1399325327	May 28 01:40:16 PM PDT 24	May 28 01:40:23 PM PDT 24	9641628173 ps
T91	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3620839830	May 28 01:40:37 PM PDT 24	May 28 01:40:47 PM PDT 24	2510737635 ps
T84	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.922127517	May 28 01:42:14 PM PDT 24	May 28 01:43:24 PM PDT 24	24078722349 ps
T92	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.245728926	May 28 01:41:03 PM PDT 24	May 28 01:41:09 PM PDT 24	2906733641 ps
T93	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3373362088	May 28 01:42:10 PM PDT 24	May 28 01:45:14 PM PDT 24	63651469988 ps
T94	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.2120407149	May 28 01:39:18 PM PDT 24	May 28 01:39:25 PM PDT 24	3843481909 ps
T95	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.424661005	May 28 01:40:02 PM PDT 24	May 28 01:40:07 PM PDT 24	2536576943 ps
T47	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2954220789	May 28 01:39:52 PM PDT 24	May 28 01:40:00 PM PDT 24	3491223106 ps
T162	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.431966825	May 28 01:39:31 PM PDT 24	May 28 01:39:40 PM PDT 24	2591424803 ps
T42	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.4018363239	May 28 01:40:00 PM PDT 24	May 28 01:40:12 PM PDT 24	4334199786 ps
T391	/workspace/coverage/default/42.sysrst_ctrl_alert_test.3002748118	May 28 01:42:08 PM PDT 24	May 28 01:42:23 PM PDT 24	2011644038 ps
T388	/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.2188006751	May 28 01:39:30 PM PDT 24	May 28 01:39:43 PM PDT 24	2507989592 ps
T59	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.614982263	May 28 01:41:57 PM PDT 24	May 28 01:42:06 PM PDT 24	4622602540 ps
T392	/workspace/coverage/default/33.sysrst_ctrl_alert_test.2396909386	May 28 01:41:01 PM PDT 24	May 28 01:41:12 PM PDT 24	2010578011 ps
T60	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.635203997	May 28 01:39:45 PM PDT 24	May 28 01:39:55 PM PDT 24	4342630545 ps
T61	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.3617260334	May 28 01:42:05 PM PDT 24	May 28 01:42:17 PM PDT 24	7077620184 ps
T393	/workspace/coverage/default/24.sysrst_ctrl_stress_all.2126012492	May 28 01:40:17 PM PDT 24	May 28 01:40:40 PM PDT 24	6497613533 ps
T394	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3233573596	May 28 01:39:37 PM PDT 24	May 28 01:39:44 PM PDT 24	2467180280 ps
T228	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1671501454	May 28 01:42:22 PM PDT 24	May 28 01:43:18 PM PDT 24	79623218437 ps
T395	/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3601966500	May 28 01:41:12 PM PDT 24	May 28 01:41:16 PM PDT 24	2035118180 ps
T396	/workspace/coverage/default/37.sysrst_ctrl_alert_test.279129132	May 28 01:42:01 PM PDT 24	May 28 01:42:07 PM PDT 24	2031633184 ps
T306	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.280635983	May 28 01:39:44 PM PDT 24	May 28 01:39:52 PM PDT 24	2520878565 ps
T97	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.52462627	May 28 01:40:16 PM PDT 24	May 28 01:41:51 PM PDT 24	34527302437 ps
T397	/workspace/coverage/default/10.sysrst_ctrl_smoke.1593954614	May 28 01:39:31 PM PDT 24	May 28 01:39:38 PM PDT 24	2128746760 ps
T24	/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.999574017	May 28 01:39:58 PM PDT 24	May 28 01:40:03 PM PDT 24	6295222158 ps
T142	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.16769844	May 28 01:42:02 PM PDT 24	May 28 01:42:14 PM PDT 24	2461794370 ps
T62	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.774664534	May 28 01:42:07 PM PDT 24	May 28 01:44:03 PM PDT 24	3326295318758 ps
T45	/workspace/coverage/default/32.sysrst_ctrl_stress_all.2142106597	May 28 01:40:53 PM PDT 24	May 28 01:41:04 PM PDT 24	8653858020 ps
T143	/workspace/coverage/default/16.sysrst_ctrl_alert_test.670141045	May 28 01:39:50 PM PDT 24	May 28 01:39:55 PM PDT 24	2023291392 ps
T144	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3418856014	May 28 01:39:32 PM PDT 24	May 28 01:39:39 PM PDT 24	2639071892 ps
T145	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.1038947160	May 28 01:39:13 PM PDT 24	May 28 01:39:20 PM PDT 24	2992569161 ps
T48	/workspace/coverage/default/9.sysrst_ctrl_stress_all.3433569454	May 28 01:39:30 PM PDT 24	May 28 01:40:00 PM PDT 24	10371475545 ps
T146	/workspace/coverage/default/39.sysrst_ctrl_alert_test.3275531816	May 28 01:42:02 PM PDT 24	May 28 01:42:11 PM PDT 24	2022651433 ps
T147	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1628133880	May 28 01:39:43 PM PDT 24	May 28 01:39:51 PM PDT 24	5408751212 ps
T180	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1748221705	May 28 01:39:45 PM PDT 24	May 28 01:40:02 PM PDT 24	65444463382 ps
T181	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.135849485	May 28 01:40:16 PM PDT 24	May 28 01:40:30 PM PDT 24	4195928268 ps
T63	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1879598543	May 28 01:42:08 PM PDT 24	May 28 01:43:04 PM PDT 24	682610877891 ps
T398	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1544533736	May 28 01:42:06 PM PDT 24	May 28 01:42:19 PM PDT 24	2462509490 ps
T234	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.4073587605	May 28 01:39:43 PM PDT 24	May 28 01:41:28 PM PDT 24	78641974138 ps
T49	/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.643270135	May 28 01:39:58 PM PDT 24	May 28 01:40:11 PM PDT 24	3383346309 ps
T50	/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.896379323	May 28 01:42:07 PM PDT 24	May 28 01:42:18 PM PDT 24	3415070605 ps
T229	/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3392453894	May 28 01:42:02 PM PDT 24	May 28 01:44:30 PM PDT 24	217984468061 ps
T238	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2778416103	May 28 01:42:09 PM PDT 24	May 28 01:47:03 PM PDT 24	108192422954 ps
T246	/workspace/coverage/default/29.sysrst_ctrl_alert_test.1503086423	May 28 01:40:36 PM PDT 24	May 28 01:40:40 PM PDT 24	2084223354 ps
T247	/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.278567506	May 28 01:40:14 PM PDT 24	May 28 01:40:23 PM PDT 24	2610720463 ps
T248	/workspace/coverage/default/23.sysrst_ctrl_alert_test.2620296303	May 28 01:40:16 PM PDT 24	May 28 01:40:26 PM PDT 24	2010199367 ps
T44	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2556910025	May 28 01:42:09 PM PDT 24	May 28 01:42:21 PM PDT 24	3262165744 ps
T249	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.308474459	May 28 01:39:02 PM PDT 24	May 28 01:39:11 PM PDT 24	2477460555 ps
T51	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3738767331	May 28 01:39:17 PM PDT 24	May 28 01:40:19 PM PDT 24	46941018264 ps
T52	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1365224253	May 28 01:39:45 PM PDT 24	May 28 01:40:00 PM PDT 24	3885633923 ps
T186	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2908746280	May 28 01:39:16 PM PDT 24	May 28 01:40:57 PM PDT 24	67153048741 ps
T187	/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.3942243819	May 28 01:40:09 PM PDT 24	May 28 01:40:15 PM PDT 24	3376714898 ps
T188	/workspace/coverage/default/5.sysrst_ctrl_smoke.971983195	May 28 01:39:17 PM PDT 24	May 28 01:39:23 PM PDT 24	2150213496 ps
T108	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1078463013	May 28 01:39:30 PM PDT 24	May 28 01:40:49 PM PDT 24	114862060722 ps
T189	/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4023095645	May 28 01:39:28 PM PDT 24	May 28 01:39:43 PM PDT 24	5292140751 ps
T190	/workspace/coverage/default/7.sysrst_ctrl_alert_test.1678481662	May 28 01:39:31 PM PDT 24	May 28 01:39:37 PM PDT 24	2098695131 ps
T191	/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2764915224	May 28 01:42:10 PM PDT 24	May 28 01:42:28 PM PDT 24	2455822506 ps
T192	/workspace/coverage/default/35.sysrst_ctrl_alert_test.791562344	May 28 01:41:19 PM PDT 24	May 28 01:41:26 PM PDT 24	2011276651 ps
T239	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3713890382	May 28 01:39:58 PM PDT 24	May 28 01:41:12 PM PDT 24	79172131750 ps
T250	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.531220217	May 28 01:42:16 PM PDT 24	May 28 01:45:19 PM PDT 24	63881867350 ps
T255	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.720147450	May 28 01:42:05 PM PDT 24	May 28 01:42:16 PM PDT 24	2528438778 ps
T256	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1415476421	May 28 01:42:08 PM PDT 24	May 28 01:42:24 PM PDT 24	2159542157 ps
T257	/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.1459332113	May 28 01:39:04 PM PDT 24	May 28 01:39:17 PM PDT 24	2454139726 ps
T258	/workspace/coverage/default/8.sysrst_ctrl_smoke.227027431	May 28 01:39:30 PM PDT 24	May 28 01:39:41 PM PDT 24	2109107966 ps
T259	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1917818293	May 28 01:39:29 PM PDT 24	May 28 01:39:41 PM PDT 24	2462269625 ps
T260	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.772732885	May 28 01:39:02 PM PDT 24	May 28 01:39:11 PM PDT 24	2522071349 ps
T261	/workspace/coverage/default/40.sysrst_ctrl_smoke.4175607674	May 28 01:42:11 PM PDT 24	May 28 01:42:24 PM PDT 24	2113578548 ps
T262	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.2835655364	May 28 01:39:18 PM PDT 24	May 28 01:39:28 PM PDT 24	2188904233 ps
T399	/workspace/coverage/default/24.sysrst_ctrl_alert_test.2874370290	May 28 01:40:15 PM PDT 24	May 28 01:40:19 PM PDT 24	2028725559 ps
T342	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.753135599	May 28 01:41:02 PM PDT 24	May 28 01:41:52 PM PDT 24	156431477847 ps
T98	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3716277990	May 28 01:42:20 PM PDT 24	May 28 01:43:30 PM PDT 24	48645342632 ps
T109	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.1091083163	May 28 01:39:58 PM PDT 24	May 28 01:42:06 PM PDT 24	95345055845 ps
T400	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2731598672	May 28 01:42:04 PM PDT 24	May 28 01:42:19 PM PDT 24	2465030684 ps
T110	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2590675785	May 28 01:40:54 PM PDT 24	May 28 01:42:19 PM PDT 24	30329161053 ps
T240	/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1651198256	May 28 01:42:15 PM PDT 24	May 28 01:43:02 PM PDT 24	55849567687 ps
T307	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.219152014	May 28 01:40:34 PM PDT 24	May 28 01:40:42 PM PDT 24	2511224003 ps
T387	/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.624570055	May 28 01:39:52 PM PDT 24	May 28 01:39:59 PM PDT 24	2514714567 ps
T401	/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2433260796	May 28 01:39:15 PM PDT 24	May 28 01:39:26 PM PDT 24	2611088507 ps
T345	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3593453820	May 28 01:39:01 PM PDT 24	May 28 01:40:45 PM PDT 24	51707653234 ps
T402	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.252450161	May 28 01:39:02 PM PDT 24	May 28 01:39:13 PM PDT 24	2620422331 ps
T403	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2356762524	May 28 01:42:05 PM PDT 24	May 28 01:42:16 PM PDT 24	3222662230 ps
T404	/workspace/coverage/default/0.sysrst_ctrl_alert_test.3656432126	May 28 01:39:01 PM PDT 24	May 28 01:39:08 PM PDT 24	2035487713 ps
T164	/workspace/coverage/default/38.sysrst_ctrl_edge_detect.2350934431	May 28 01:42:02 PM PDT 24	May 28 01:42:11 PM PDT 24	4596521961 ps
T101	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.136328957	May 28 01:40:40 PM PDT 24	May 28 01:40:45 PM PDT 24	4855543323 ps
T405	/workspace/coverage/default/27.sysrst_ctrl_stress_all.1753753260	May 28 01:40:41 PM PDT 24	May 28 01:41:05 PM PDT 24	16710941241 ps
T351	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.154665197	May 28 01:42:16 PM PDT 24	May 28 01:43:39 PM PDT 24	105917368818 ps
T406	/workspace/coverage/default/18.sysrst_ctrl_alert_test.769106296	May 28 01:39:59 PM PDT 24	May 28 01:40:09 PM PDT 24	2014275715 ps
T85	/workspace/coverage/default/36.sysrst_ctrl_stress_all.4241049072	May 28 01:41:42 PM PDT 24	May 28 01:42:01 PM PDT 24	8183367243 ps
T407	/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3531397308	May 28 01:39:30 PM PDT 24	May 28 01:39:40 PM PDT 24	3152602149 ps
T296	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2689293667	May 28 01:39:48 PM PDT 24	May 28 01:40:02 PM PDT 24	14981919062 ps
T105	/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2357067276	May 28 01:39:31 PM PDT 24	May 28 01:41:33 PM PDT 24	44878917362 ps
T251	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3773377868	May 28 01:42:20 PM PDT 24	May 28 01:45:10 PM PDT 24	59736804714 ps
T313	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.2241169388	May 28 01:40:40 PM PDT 24	May 28 01:43:29 PM PDT 24	61200841032 ps
T241	/workspace/coverage/default/47.sysrst_ctrl_stress_all.2911484267	May 28 01:42:15 PM PDT 24	May 28 02:35:34 PM PDT 24	1166840159769 ps
T131	/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3095819976	May 28 01:42:15 PM PDT 24	May 28 01:42:26 PM PDT 24	3080225653 ps
T111	/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.932928395	May 28 01:39:37 PM PDT 24	May 28 01:39:58 PM PDT 24	28618741358 ps
T314	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2145159680	May 28 01:39:52 PM PDT 24	May 28 01:39:59 PM PDT 24	2465404144 ps
T165	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.692515725	May 28 01:42:16 PM PDT 24	May 28 01:42:29 PM PDT 24	4275516068 ps
T315	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3327078665	May 28 01:42:16 PM PDT 24	May 28 01:42:27 PM PDT 24	2245261652 ps
T300	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1902430440	May 28 01:42:19 PM PDT 24	May 28 01:46:23 PM PDT 24	176261629564 ps
T297	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.4130347356	May 28 01:40:17 PM PDT 24	May 28 01:40:30 PM PDT 24	3635719842 ps
T301	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1714155147	May 28 01:42:01 PM PDT 24	May 28 01:43:05 PM PDT 24	99434132775 ps
T366	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.842179277	May 28 01:40:21 PM PDT 24	May 28 01:41:03 PM PDT 24	178169019570 ps
T408	/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1779697733	May 28 01:39:02 PM PDT 24	May 28 01:39:11 PM PDT 24	2189888698 ps
T409	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3768272464	May 28 01:39:52 PM PDT 24	May 28 01:40:01 PM PDT 24	2031788303 ps
T212	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3090292397	May 28 01:39:18 PM PDT 24	May 28 01:39:26 PM PDT 24	2863401598 ps
T308	/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.595998165	May 28 01:42:05 PM PDT 24	May 28 01:42:19 PM PDT 24	2510447715 ps
T235	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2033131836	May 28 01:42:16 PM PDT 24	May 28 01:46:07 PM PDT 24	94644490661 ps
T410	/workspace/coverage/default/2.sysrst_ctrl_smoke.4196143898	May 28 01:39:14 PM PDT 24	May 28 01:39:18 PM PDT 24	2136001624 ps
T411	/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1680133491	May 28 01:40:16 PM PDT 24	May 28 01:40:26 PM PDT 24	2609094610 ps
T135	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1861956311	May 28 01:39:59 PM PDT 24	May 28 01:40:06 PM PDT 24	3418898287 ps
T86	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2166215484	May 28 01:40:50 PM PDT 24	May 28 01:42:57 PM PDT 24	68095561691 ps
T412	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.486419248	May 28 01:39:42 PM PDT 24	May 28 01:39:47 PM PDT 24	2531563487 ps
T87	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.271236255	May 28 01:40:39 PM PDT 24	May 28 01:41:05 PM PDT 24	36830907048 ps
T149	/workspace/coverage/default/47.sysrst_ctrl_edge_detect.642160449	May 28 01:42:11 PM PDT 24	May 28 01:42:28 PM PDT 24	4078973661 ps
T150	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.176093437	May 28 01:39:17 PM PDT 24	May 28 01:39:25 PM PDT 24	2467544735 ps
T151	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1576987794	May 28 01:42:07 PM PDT 24	May 28 01:42:23 PM PDT 24	2512093000 ps
T152	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1647621482	May 28 01:42:13 PM PDT 24	May 28 01:42:43 PM PDT 24	41745124566 ps
T153	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2883592099	May 28 01:42:20 PM PDT 24	May 28 01:43:12 PM PDT 24	64416355562 ps
T154	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1042043879	May 28 01:42:05 PM PDT 24	May 28 01:42:14 PM PDT 24	3487311036 ps
T155	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3693486406	May 28 01:39:29 PM PDT 24	May 28 01:39:41 PM PDT 24	2226340397 ps
T156	/workspace/coverage/default/27.sysrst_ctrl_smoke.895795317	May 28 01:40:37 PM PDT 24	May 28 01:40:42 PM PDT 24	2132014158 ps
T157	/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3705548606	May 28 01:40:48 PM PDT 24	May 28 01:40:57 PM PDT 24	2116662106 ps
T340	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.2950797596	May 28 01:40:15 PM PDT 24	May 28 01:41:27 PM PDT 24	108635341218 ps
T112	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2117562218	May 28 01:42:17 PM PDT 24	May 28 01:43:28 PM PDT 24	22833222259 ps
T413	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.4013247526	May 28 01:39:15 PM PDT 24	May 28 01:39:21 PM PDT 24	2530159405 ps
T414	/workspace/coverage/default/44.sysrst_ctrl_alert_test.2507069813	May 28 01:42:06 PM PDT 24	May 28 01:42:21 PM PDT 24	2011118741 ps
T242	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.704750153	May 28 01:41:27 PM PDT 24	May 28 01:42:59 PM PDT 24	130785266873 ps
T88	/workspace/coverage/default/23.sysrst_ctrl_stress_all.2294515632	May 28 01:40:16 PM PDT 24	May 28 01:42:16 PM PDT 24	91786946124 ps
T415	/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3634882173	May 28 01:42:05 PM PDT 24	May 28 01:42:19 PM PDT 24	2453283353 ps
T243	/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2425614864	May 28 01:39:17 PM PDT 24	May 28 01:45:48 PM PDT 24	148368159964 ps
T89	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2484376920	May 28 01:42:05 PM PDT 24	May 28 01:45:50 PM PDT 24	1978950247135 ps
T376	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.4183745760	May 28 01:40:49 PM PDT 24	May 28 01:44:53 PM PDT 24	99882190531 ps
T237	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4050009439	May 28 01:39:18 PM PDT 24	May 28 01:41:33 PM PDT 24	53229836823 ps
T416	/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3214857764	May 28 01:40:15 PM PDT 24	May 28 01:40:24 PM PDT 24	2245317166 ps
T417	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.848862409	May 28 01:41:42 PM PDT 24	May 28 01:41:48 PM PDT 24	4197629768 ps
T96	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.659106984	May 28 01:39:29 PM PDT 24	May 28 01:40:46 PM PDT 24	202667765603 ps
T122	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.3609294392	May 28 01:39:51 PM PDT 24	May 28 01:42:04 PM PDT 24	100766411103 ps
T123	/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.2113866586	May 28 01:40:56 PM PDT 24	May 28 01:41:05 PM PDT 24	2519797118 ps
T124	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.1725525129	May 28 01:39:14 PM PDT 24	May 28 01:42:50 PM PDT 24	163346927525 ps
T125	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1312164153	May 28 01:41:00 PM PDT 24	May 28 01:41:09 PM PDT 24	2618846530 ps
T126	/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1109566330	May 28 01:42:10 PM PDT 24	May 28 01:42:28 PM PDT 24	2512340985 ps
T127	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3273493554	May 28 01:40:00 PM PDT 24	May 28 01:40:05 PM PDT 24	2636302100 ps
T128	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2100286933	May 28 01:39:29 PM PDT 24	May 28 01:39:42 PM PDT 24	2507689053 ps
T129	/workspace/coverage/default/22.sysrst_ctrl_edge_detect.3482781988	May 28 01:40:16 PM PDT 24	May 28 01:40:26 PM PDT 24	3152852592 ps
T130	/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2139119158	May 28 01:39:14 PM PDT 24	May 28 01:39:19 PM PDT 24	3105885035 ps
T418	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.431773213	May 28 01:40:37 PM PDT 24	May 28 01:41:03 PM PDT 24	56016985620 ps
T90	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2624471474	May 28 01:39:43 PM PDT 24	May 28 01:39:53 PM PDT 24	8007510094 ps
T419	/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2558475282	May 28 01:39:16 PM PDT 24	May 28 01:39:28 PM PDT 24	2704290557 ps
T420	/workspace/coverage/default/47.sysrst_ctrl_alert_test.1717300874	May 28 01:42:10 PM PDT 24	May 28 01:42:26 PM PDT 24	2015151851 ps
T346	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1860374511	May 28 01:39:58 PM PDT 24	May 28 01:45:33 PM PDT 24	129354371908 ps
T344	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3866242767	May 28 01:42:15 PM PDT 24	May 28 01:44:03 PM PDT 24	119416180183 ps
T132	/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.566635650	May 28 01:40:14 PM PDT 24	May 28 01:40:25 PM PDT 24	8314997979 ps
T185	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.3669602836	May 28 01:42:04 PM PDT 24	May 28 01:42:20 PM PDT 24	3997095254 ps
T244	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.592623855	May 28 01:42:05 PM PDT 24	May 28 01:43:55 PM PDT 24	161993242146 ps
T421	/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3237897221	May 28 01:42:16 PM PDT 24	May 28 01:42:28 PM PDT 24	3314864392 ps
T298	/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1258119445	May 28 01:40:54 PM PDT 24	May 28 01:41:09 PM PDT 24	4064812169 ps
T422	/workspace/coverage/default/17.sysrst_ctrl_alert_test.2710620152	May 28 01:40:06 PM PDT 24	May 28 01:40:09 PM PDT 24	2027305978 ps
T133	/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.3135652048	May 28 01:40:40 PM PDT 24	May 28 01:41:41 PM PDT 24	1668912915180 ps
T311	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.4043454403	May 28 01:41:00 PM PDT 24	May 28 01:41:09 PM PDT 24	2899619220 ps
T423	/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3628067897	May 28 01:40:21 PM PDT 24	May 28 01:40:24 PM PDT 24	2529349209 ps
T424	/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1504528513	May 28 01:39:29 PM PDT 24	May 28 01:39:36 PM PDT 24	2635535525 ps
T425	/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.3404978122	May 28 01:39:41 PM PDT 24	May 28 01:39:50 PM PDT 24	5080322945 ps
T230	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.2150743368	May 28 01:41:57 PM PDT 24	May 28 01:48:24 PM PDT 24	143811685137 ps
T426	/workspace/coverage/default/38.sysrst_ctrl_alert_test.3609540046	May 28 01:42:02 PM PDT 24	May 28 01:42:09 PM PDT 24	2029064721 ps
T427	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.373938346	May 28 01:39:17 PM PDT 24	May 28 01:39:24 PM PDT 24	2324626271 ps
T428	/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3422134925	May 28 01:42:10 PM PDT 24	May 28 01:42:28 PM PDT 24	2609884119 ps
T429	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2072613984	May 28 01:39:48 PM PDT 24	May 28 01:39:58 PM PDT 24	2457912581 ps
T134	/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3239616442	May 28 01:39:14 PM PDT 24	May 28 01:39:20 PM PDT 24	5172497511 ps
T430	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.3986881628	May 28 01:40:48 PM PDT 24	May 28 01:40:53 PM PDT 24	2475157220 ps
T431	/workspace/coverage/default/1.sysrst_ctrl_alert_test.638541652	May 28 01:39:17 PM PDT 24	May 28 01:39:23 PM PDT 24	2027799589 ps
T100	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.12520589	May 28 01:42:13 PM PDT 24	May 28 01:42:57 PM PDT 24	706950384916 ps
T317	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2154479928	May 28 01:42:05 PM PDT 24	May 28 01:42:22 PM PDT 24	3002693368 ps
T318	/workspace/coverage/default/11.sysrst_ctrl_alert_test.1804982710	May 28 01:39:35 PM PDT 24	May 28 01:39:40 PM PDT 24	2024837699 ps
T319	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.1773668198	May 28 01:39:55 PM PDT 24	May 28 01:40:01 PM PDT 24	2898665352 ps
T320	/workspace/coverage/default/13.sysrst_ctrl_alert_test.2791049289	May 28 01:39:44 PM PDT 24	May 28 01:39:53 PM PDT 24	2017112994 ps
T321	/workspace/coverage/default/9.sysrst_ctrl_alert_test.2769179969	May 28 01:39:30 PM PDT 24	May 28 01:39:38 PM PDT 24	2014525775 ps
T113	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2220965074	May 28 01:42:20 PM PDT 24	May 28 01:43:06 PM PDT 24	59422789410 ps
T322	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3978997688	May 28 01:39:50 PM PDT 24	May 28 01:42:03 PM PDT 24	50923958967 ps
T323	/workspace/coverage/default/36.sysrst_ctrl_smoke.2728048957	May 28 01:41:26 PM PDT 24	May 28 01:41:28 PM PDT 24	2153235543 ps
T324	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2783350224	May 28 01:39:14 PM PDT 24	May 28 01:39:18 PM PDT 24	2459771093 ps
T432	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3031417244	May 28 01:40:16 PM PDT 24	May 28 01:40:21 PM PDT 24	4088695632 ps
T433	/workspace/coverage/default/21.sysrst_ctrl_smoke.198206115	May 28 01:40:08 PM PDT 24	May 28 01:40:11 PM PDT 24	2131790982 ps