Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.81 99.33 96.41 100.00 96.79 98.78 99.52 93.81


Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T346 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.699579534 May 30 01:27:09 PM PDT 24 May 30 01:31:14 PM PDT 24 91112450692 ps
T440 /workspace/coverage/default/47.sysrst_ctrl_smoke.162093765 May 30 01:27:19 PM PDT 24 May 30 01:27:23 PM PDT 24 2118559619 ps
T441 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2269694288 May 30 01:27:35 PM PDT 24 May 30 01:28:41 PM PDT 24 24831629288 ps
T442 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.297742044 May 30 01:24:08 PM PDT 24 May 30 01:24:11 PM PDT 24 2121992648 ps
T355 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3312289627 May 30 01:26:35 PM PDT 24 May 30 01:29:08 PM PDT 24 60599802995 ps
T443 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.98359062 May 30 01:26:32 PM PDT 24 May 30 01:29:15 PM PDT 24 1041596529064 ps
T100 /workspace/coverage/default/33.sysrst_ctrl_stress_all.2885634673 May 30 01:26:32 PM PDT 24 May 30 01:29:04 PM PDT 24 216792405971 ps
T444 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2681619680 May 30 01:27:09 PM PDT 24 May 30 01:27:12 PM PDT 24 2529257514 ps
T445 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2144808754 May 30 01:27:16 PM PDT 24 May 30 01:27:21 PM PDT 24 2068773989 ps
T446 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.305120446 May 30 01:26:17 PM PDT 24 May 30 01:26:49 PM PDT 24 22337855642 ps
T447 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2292459879 May 30 01:25:38 PM PDT 24 May 30 01:25:43 PM PDT 24 2150496744 ps
T448 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.3020191033 May 30 01:24:08 PM PDT 24 May 30 01:24:18 PM PDT 24 3540205026 ps
T449 /workspace/coverage/default/21.sysrst_ctrl_alert_test.3054582382 May 30 01:25:40 PM PDT 24 May 30 01:25:43 PM PDT 24 2030592095 ps
T351 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.190229943 May 30 01:27:49 PM PDT 24 May 30 01:31:25 PM PDT 24 163261106526 ps
T450 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3123400141 May 30 01:24:45 PM PDT 24 May 30 01:24:53 PM PDT 24 2037025241 ps
T451 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.799806624 May 30 01:24:43 PM PDT 24 May 30 01:24:52 PM PDT 24 5303966595 ps
T208 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.2704028437 May 30 01:26:34 PM PDT 24 May 30 01:26:43 PM PDT 24 4256708270 ps
T305 /workspace/coverage/default/18.sysrst_ctrl_stress_all.2051408343 May 30 01:25:23 PM PDT 24 May 30 01:27:10 PM PDT 24 183491266825 ps
T452 /workspace/coverage/default/24.sysrst_ctrl_smoke.541197421 May 30 01:25:48 PM PDT 24 May 30 01:25:54 PM PDT 24 2108936325 ps
T352 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2222350895 May 30 01:27:39 PM PDT 24 May 30 01:28:10 PM PDT 24 66476478487 ps
T453 /workspace/coverage/default/49.sysrst_ctrl_stress_all.3138536211 May 30 01:27:24 PM PDT 24 May 30 01:27:36 PM PDT 24 15146915957 ps
T454 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.4205210661 May 30 01:25:22 PM PDT 24 May 30 01:25:27 PM PDT 24 3757775845 ps
T455 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.2268348795 May 30 01:26:33 PM PDT 24 May 30 01:26:40 PM PDT 24 2106806468 ps
T456 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3493095691 May 30 01:24:47 PM PDT 24 May 30 01:24:54 PM PDT 24 3613216004 ps
T457 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2131452935 May 30 01:24:58 PM PDT 24 May 30 01:25:05 PM PDT 24 2196777169 ps
T458 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.4086666164 May 30 01:26:36 PM PDT 24 May 30 01:26:44 PM PDT 24 2462981713 ps
T88 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2892200397 May 30 01:26:31 PM PDT 24 May 30 01:27:50 PM PDT 24 33144909737 ps
T225 /workspace/coverage/default/6.sysrst_ctrl_smoke.200452478 May 30 01:24:43 PM PDT 24 May 30 01:24:50 PM PDT 24 2111508603 ps
T177 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.373824347 May 30 01:26:52 PM PDT 24 May 30 01:27:01 PM PDT 24 3451507209 ps
T226 /workspace/coverage/default/15.sysrst_ctrl_alert_test.609332577 May 30 01:25:20 PM PDT 24 May 30 01:25:26 PM PDT 24 2012598393 ps
T169 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.241797124 May 30 01:24:45 PM PDT 24 May 30 01:26:30 PM PDT 24 46037045308 ps
T227 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.748029829 May 30 01:25:49 PM PDT 24 May 30 01:26:22 PM PDT 24 48125112687 ps
T228 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2023487440 May 30 01:27:38 PM PDT 24 May 30 01:30:13 PM PDT 24 62713141527 ps
T229 /workspace/coverage/default/45.sysrst_ctrl_alert_test.2661184640 May 30 01:27:21 PM PDT 24 May 30 01:27:27 PM PDT 24 2014277272 ps
T230 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.589729920 May 30 01:25:37 PM PDT 24 May 30 01:25:59 PM PDT 24 29107160294 ps
T231 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3701944603 May 30 01:27:08 PM PDT 24 May 30 01:27:11 PM PDT 24 3660901236 ps
T241 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1469176984 May 30 01:26:35 PM PDT 24 May 30 01:26:40 PM PDT 24 3589528623 ps
T242 /workspace/coverage/default/27.sysrst_ctrl_smoke.3456113791 May 30 01:25:52 PM PDT 24 May 30 01:25:54 PM PDT 24 2168222713 ps
T333 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.1367026886 May 30 01:26:18 PM PDT 24 May 30 01:29:04 PM PDT 24 133357427256 ps
T155 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2114408091 May 30 01:26:34 PM PDT 24 May 30 01:28:16 PM PDT 24 72548777703 ps
T160 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2373097317 May 30 01:24:54 PM PDT 24 May 30 01:25:01 PM PDT 24 2513897990 ps
T161 /workspace/coverage/default/33.sysrst_ctrl_alert_test.4117729514 May 30 01:26:33 PM PDT 24 May 30 01:26:36 PM PDT 24 2026275798 ps
T162 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2185605304 May 30 01:27:07 PM PDT 24 May 30 01:27:14 PM PDT 24 2141346195 ps
T163 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.2456551068 May 30 01:25:40 PM PDT 24 May 30 01:25:43 PM PDT 24 2709940257 ps
T164 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.1415500952 May 30 01:25:25 PM PDT 24 May 30 01:25:30 PM PDT 24 4004768077 ps
T165 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.4070641582 May 30 01:24:45 PM PDT 24 May 30 01:24:54 PM PDT 24 2607578131 ps
T166 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1695900505 May 30 01:25:23 PM PDT 24 May 30 01:25:32 PM PDT 24 2609052178 ps
T167 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3681892690 May 30 01:24:07 PM PDT 24 May 30 01:26:14 PM PDT 24 44776969648 ps
T168 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.405392148 May 30 01:26:52 PM PDT 24 May 30 01:26:57 PM PDT 24 3225249121 ps
T356 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.90814875 May 30 01:24:47 PM PDT 24 May 30 01:25:31 PM PDT 24 222504170187 ps
T459 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1339175016 May 30 01:25:39 PM PDT 24 May 30 01:25:42 PM PDT 24 3421259385 ps
T460 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.2832575498 May 30 01:26:52 PM PDT 24 May 30 01:27:40 PM PDT 24 84678805306 ps
T461 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2679583827 May 30 01:26:35 PM PDT 24 May 30 01:26:41 PM PDT 24 2512050466 ps
T462 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.1172026102 May 30 01:26:20 PM PDT 24 May 30 01:26:27 PM PDT 24 2255479407 ps
T463 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.2857696637 May 30 01:26:13 PM PDT 24 May 30 01:26:16 PM PDT 24 2524711729 ps
T464 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3918093460 May 30 01:24:57 PM PDT 24 May 30 01:25:02 PM PDT 24 4803299158 ps
T465 /workspace/coverage/default/43.sysrst_ctrl_smoke.3370859605 May 30 01:27:06 PM PDT 24 May 30 01:27:09 PM PDT 24 2139690064 ps
T466 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1017626290 May 30 01:26:25 PM PDT 24 May 30 01:26:32 PM PDT 24 2262812331 ps
T132 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2570378411 May 30 01:25:51 PM PDT 24 May 30 01:26:59 PM PDT 24 60990407541 ps
T138 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3998300144 May 30 01:27:24 PM PDT 24 May 30 01:29:22 PM PDT 24 1057694184682 ps
T467 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2552074014 May 30 01:24:45 PM PDT 24 May 30 01:38:16 PM PDT 24 302586710503 ps
T468 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1416049580 May 30 01:27:07 PM PDT 24 May 30 01:27:10 PM PDT 24 2633639465 ps
T469 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.119055229 May 30 01:24:27 PM PDT 24 May 30 01:24:38 PM PDT 24 3608511869 ps
T470 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.4207144393 May 30 01:27:34 PM PDT 24 May 30 01:28:49 PM PDT 24 28083744702 ps
T471 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.748699997 May 30 01:26:33 PM PDT 24 May 30 01:28:55 PM PDT 24 115955017369 ps
T472 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2436971285 May 30 01:24:44 PM PDT 24 May 30 01:24:48 PM PDT 24 2266255292 ps
T473 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3029174762 May 30 01:26:55 PM PDT 24 May 30 01:27:02 PM PDT 24 4465243487 ps
T170 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2131751254 May 30 01:24:48 PM PDT 24 May 30 01:25:42 PM PDT 24 21807928060 ps
T474 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.1957665214 May 30 01:27:06 PM PDT 24 May 30 01:27:48 PM PDT 24 66811605551 ps
T475 /workspace/coverage/default/14.sysrst_ctrl_alert_test.2496794124 May 30 01:25:09 PM PDT 24 May 30 01:25:12 PM PDT 24 2027224901 ps
T101 /workspace/coverage/default/41.sysrst_ctrl_stress_all.3280471308 May 30 01:27:09 PM PDT 24 May 30 01:28:55 PM PDT 24 164200995819 ps
T476 /workspace/coverage/default/41.sysrst_ctrl_alert_test.1610186814 May 30 01:27:07 PM PDT 24 May 30 01:27:10 PM PDT 24 2033018921 ps
T477 /workspace/coverage/default/13.sysrst_ctrl_smoke.1510932796 May 30 01:24:57 PM PDT 24 May 30 01:25:00 PM PDT 24 2141818934 ps
T478 /workspace/coverage/default/49.sysrst_ctrl_smoke.123980808 May 30 01:27:24 PM PDT 24 May 30 01:27:26 PM PDT 24 2130132162 ps
T479 /workspace/coverage/default/26.sysrst_ctrl_stress_all.11201350 May 30 01:25:52 PM PDT 24 May 30 01:25:57 PM PDT 24 8705498891 ps
T480 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.141476818 May 30 01:26:56 PM PDT 24 May 30 01:27:05 PM PDT 24 2608755715 ps
T481 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.4089672339 May 30 01:24:48 PM PDT 24 May 30 01:25:57 PM PDT 24 111368128992 ps
T482 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.4100580570 May 30 01:26:23 PM PDT 24 May 30 01:26:36 PM PDT 24 4418097816 ps
T483 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.4110460720 May 30 01:24:45 PM PDT 24 May 30 01:24:57 PM PDT 24 3608757593 ps
T484 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2844788894 May 30 01:27:21 PM PDT 24 May 30 01:27:34 PM PDT 24 3971592444 ps
T485 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4249139722 May 30 01:27:25 PM PDT 24 May 30 01:27:28 PM PDT 24 2548931031 ps
T486 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1218331291 May 30 01:24:58 PM PDT 24 May 30 01:25:01 PM PDT 24 2555575591 ps
T487 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.3406318889 May 30 01:24:54 PM PDT 24 May 30 01:25:01 PM PDT 24 3446231683 ps
T488 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.3029320970 May 30 01:24:57 PM PDT 24 May 30 01:25:06 PM PDT 24 2611408379 ps
T489 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1402837448 May 30 01:24:07 PM PDT 24 May 30 01:24:15 PM PDT 24 2509986991 ps
T490 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1743027490 May 30 01:26:35 PM PDT 24 May 30 01:26:55 PM PDT 24 25349404075 ps
T254 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.518504505 May 30 01:27:04 PM PDT 24 May 30 01:29:31 PM PDT 24 243732894081 ps
T360 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.131581249 May 30 01:27:21 PM PDT 24 May 30 01:28:39 PM PDT 24 108091400916 ps
T491 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1748022493 May 30 01:27:19 PM PDT 24 May 30 01:27:22 PM PDT 24 2502950735 ps
T492 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3052275575 May 30 01:27:33 PM PDT 24 May 30 01:28:41 PM PDT 24 25334275401 ps
T493 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.835222447 May 30 01:25:52 PM PDT 24 May 30 01:26:00 PM PDT 24 2451881980 ps
T494 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.220628128 May 30 01:24:51 PM PDT 24 May 30 01:24:56 PM PDT 24 2466362742 ps
T495 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3247158008 May 30 01:27:09 PM PDT 24 May 30 01:27:16 PM PDT 24 2674014431 ps
T334 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.3413301205 May 30 01:26:33 PM PDT 24 May 30 01:29:30 PM PDT 24 133070642838 ps
T496 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.2166619117 May 30 01:27:25 PM PDT 24 May 30 01:28:58 PM PDT 24 139923088431 ps
T139 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1757302652 May 30 01:25:09 PM PDT 24 May 30 01:29:02 PM PDT 24 357678732266 ps
T140 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3156653935 May 30 01:24:29 PM PDT 24 May 30 01:24:33 PM PDT 24 5340557915 ps
T497 /workspace/coverage/default/10.sysrst_ctrl_alert_test.489811102 May 30 01:24:55 PM PDT 24 May 30 01:24:58 PM PDT 24 2043676323 ps
T265 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2510172373 May 30 01:25:36 PM PDT 24 May 30 01:28:45 PM PDT 24 147375843773 ps
T156 /workspace/coverage/default/7.sysrst_ctrl_stress_all.2692363377 May 30 01:24:50 PM PDT 24 May 30 01:25:17 PM PDT 24 10486879406 ps
T498 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1162116738 May 30 01:27:34 PM PDT 24 May 30 01:28:39 PM PDT 24 49023436502 ps
T499 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1757313198 May 30 01:24:46 PM PDT 24 May 30 01:24:50 PM PDT 24 2523153513 ps
T500 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.1331963577 May 30 01:25:23 PM PDT 24 May 30 01:25:26 PM PDT 24 2196922224 ps
T501 /workspace/coverage/default/30.sysrst_ctrl_alert_test.1106784172 May 30 01:26:16 PM PDT 24 May 30 01:26:20 PM PDT 24 2020595965 ps
T502 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1656385205 May 30 01:24:47 PM PDT 24 May 30 01:24:50 PM PDT 24 3896141308 ps
T503 /workspace/coverage/default/26.sysrst_ctrl_smoke.2257708110 May 30 01:25:53 PM PDT 24 May 30 01:25:56 PM PDT 24 2126196152 ps
T337 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2774761487 May 30 01:27:36 PM PDT 24 May 30 01:30:17 PM PDT 24 66113449467 ps
T222 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.3479570820 May 30 01:25:24 PM PDT 24 May 30 01:25:27 PM PDT 24 3286270073 ps
T504 /workspace/coverage/default/43.sysrst_ctrl_alert_test.1224998121 May 30 01:27:07 PM PDT 24 May 30 01:27:10 PM PDT 24 2036773638 ps
T304 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.314426926 May 30 01:26:34 PM PDT 24 May 30 01:27:08 PM PDT 24 26735540700 ps
T505 /workspace/coverage/default/12.sysrst_ctrl_stress_all.2508312717 May 30 01:24:54 PM PDT 24 May 30 01:25:18 PM PDT 24 8718736970 ps
T506 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1042955176 May 30 01:26:52 PM PDT 24 May 30 01:26:55 PM PDT 24 6613137277 ps
T171 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.3495398576 May 30 01:27:22 PM PDT 24 May 30 02:09:59 PM PDT 24 1614336584722 ps
T507 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.3187179172 May 30 01:26:18 PM PDT 24 May 30 01:26:20 PM PDT 24 6984115745 ps
T338 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.955418996 May 30 01:27:48 PM PDT 24 May 30 01:29:12 PM PDT 24 93136871724 ps
T83 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.737428868 May 30 01:27:49 PM PDT 24 May 30 01:29:06 PM PDT 24 55023785448 ps
T508 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2039752354 May 30 01:26:26 PM PDT 24 May 30 01:26:34 PM PDT 24 2448851663 ps
T509 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.2076980931 May 30 01:26:54 PM PDT 24 May 30 01:29:45 PM PDT 24 259191702476 ps
T510 /workspace/coverage/default/37.sysrst_ctrl_stress_all.1461624728 May 30 01:26:56 PM PDT 24 May 30 01:27:28 PM PDT 24 11610787832 ps
T511 /workspace/coverage/default/23.sysrst_ctrl_alert_test.1415960706 May 30 01:25:52 PM PDT 24 May 30 01:25:55 PM PDT 24 2031642257 ps
T512 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1268564784 May 30 01:24:08 PM PDT 24 May 30 01:24:11 PM PDT 24 2239846776 ps
T513 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2713026413 May 30 01:26:58 PM PDT 24 May 30 01:27:01 PM PDT 24 2471801151 ps
T172 /workspace/coverage/default/38.sysrst_ctrl_stress_all.3877728651 May 30 01:26:58 PM PDT 24 May 30 01:37:14 PM PDT 24 265751814879 ps
T514 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1230894623 May 30 01:27:23 PM PDT 24 May 30 01:27:31 PM PDT 24 2509753528 ps
T515 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.10021997 May 30 01:25:21 PM PDT 24 May 30 01:25:24 PM PDT 24 2489092740 ps
T516 /workspace/coverage/default/32.sysrst_ctrl_smoke.3100474036 May 30 01:26:24 PM PDT 24 May 30 01:26:27 PM PDT 24 2132152767 ps
T517 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1554067113 May 30 01:27:21 PM PDT 24 May 30 01:27:29 PM PDT 24 2170898130 ps
T518 /workspace/coverage/default/42.sysrst_ctrl_alert_test.3055456107 May 30 01:27:07 PM PDT 24 May 30 01:27:13 PM PDT 24 2011304831 ps
T180 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.3114951766 May 30 01:27:08 PM PDT 24 May 30 01:27:13 PM PDT 24 5995644402 ps
T519 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1698359024 May 30 01:24:31 PM PDT 24 May 30 01:24:33 PM PDT 24 2200350868 ps
T520 /workspace/coverage/default/47.sysrst_ctrl_stress_all.1582411708 May 30 01:27:23 PM PDT 24 May 30 01:28:54 PM PDT 24 124290284122 ps
T521 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.29565064 May 30 01:25:38 PM PDT 24 May 30 02:13:18 PM PDT 24 1107107532036 ps
T522 /workspace/coverage/default/1.sysrst_ctrl_alert_test.987906701 May 30 01:24:06 PM PDT 24 May 30 01:24:13 PM PDT 24 2011095301 ps
T283 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.1557701270 May 30 01:24:28 PM PDT 24 May 30 01:24:44 PM PDT 24 22073251309 ps
T523 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.572892426 May 30 01:25:54 PM PDT 24 May 30 01:26:05 PM PDT 24 3790179208 ps
T524 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.1871354681 May 30 01:25:39 PM PDT 24 May 30 01:25:48 PM PDT 24 2610574534 ps
T525 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1821812613 May 30 01:26:29 PM PDT 24 May 30 01:26:35 PM PDT 24 2515833488 ps
T526 /workspace/coverage/default/8.sysrst_ctrl_stress_all.2696838814 May 30 01:24:51 PM PDT 24 May 30 01:25:24 PM PDT 24 12821276845 ps
T527 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2317874321 May 30 01:24:56 PM PDT 24 May 30 01:25:01 PM PDT 24 2621077763 ps
T309 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3349708904 May 30 01:26:24 PM PDT 24 May 30 01:28:13 PM PDT 24 40703703633 ps
T244 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2337078868 May 30 01:25:40 PM PDT 24 May 30 01:26:40 PM PDT 24 23832813663 ps
T102 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.3991825325 May 30 01:25:22 PM PDT 24 May 30 01:30:07 PM PDT 24 239436857468 ps
T528 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1227514621 May 30 01:27:23 PM PDT 24 May 30 01:27:36 PM PDT 24 4066105302 ps
T529 /workspace/coverage/default/18.sysrst_ctrl_smoke.3384306766 May 30 01:25:24 PM PDT 24 May 30 01:25:27 PM PDT 24 2138945337 ps
T530 /workspace/coverage/default/31.sysrst_ctrl_alert_test.2022841589 May 30 01:26:24 PM PDT 24 May 30 01:26:31 PM PDT 24 2013555721 ps
T531 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.2433385766 May 30 01:24:29 PM PDT 24 May 30 01:24:32 PM PDT 24 4383472044 ps
T532 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3698310127 May 30 01:25:07 PM PDT 24 May 30 01:25:10 PM PDT 24 2540993374 ps
T533 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2165259723 May 30 01:26:27 PM PDT 24 May 30 01:26:34 PM PDT 24 5910102252 ps
T534 /workspace/coverage/default/15.sysrst_ctrl_stress_all.4256503043 May 30 01:25:09 PM PDT 24 May 30 01:25:36 PM PDT 24 9208153517 ps
T535 /workspace/coverage/default/39.sysrst_ctrl_stress_all.1171475642 May 30 01:26:59 PM PDT 24 May 30 01:27:08 PM PDT 24 7102196427 ps
T536 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1034996827 May 30 01:26:52 PM PDT 24 May 30 01:26:56 PM PDT 24 2052129055 ps
T537 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.2128171815 May 30 01:25:42 PM PDT 24 May 30 01:25:50 PM PDT 24 2457871639 ps
T538 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.3335684193 May 30 01:26:35 PM PDT 24 May 30 01:26:39 PM PDT 24 7486420527 ps
T539 /workspace/coverage/default/20.sysrst_ctrl_alert_test.3514530758 May 30 01:25:38 PM PDT 24 May 30 01:25:46 PM PDT 24 2011745101 ps
T540 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.989013875 May 30 01:26:35 PM PDT 24 May 30 01:26:38 PM PDT 24 2631241874 ps
T179 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.2125553810 May 30 01:27:06 PM PDT 24 May 30 01:27:17 PM PDT 24 3752394566 ps
T541 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2405407802 May 30 01:24:58 PM PDT 24 May 30 01:25:06 PM PDT 24 2510870871 ps
T142 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3902385251 May 30 01:27:23 PM PDT 24 May 30 01:27:34 PM PDT 24 7721167149 ps
T209 /workspace/coverage/default/46.sysrst_ctrl_stress_all.4035445101 May 30 01:27:20 PM PDT 24 May 30 01:28:06 PM PDT 24 16661009379 ps
T542 /workspace/coverage/default/20.sysrst_ctrl_smoke.286761321 May 30 01:25:38 PM PDT 24 May 30 01:25:44 PM PDT 24 2113865306 ps
T543 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.514893209 May 30 01:26:23 PM PDT 24 May 30 01:26:25 PM PDT 24 3105716698 ps
T544 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2592065980 May 30 01:25:38 PM PDT 24 May 30 01:25:41 PM PDT 24 2543358572 ps
T545 /workspace/coverage/default/23.sysrst_ctrl_stress_all.1249275523 May 30 01:26:00 PM PDT 24 May 30 01:26:09 PM PDT 24 16468086796 ps
T546 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.1183445344 May 30 01:25:26 PM PDT 24 May 30 01:25:54 PM PDT 24 26038433623 ps
T78 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.1450492856 May 30 01:24:06 PM PDT 24 May 30 01:24:14 PM PDT 24 33666119795 ps
T547 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.417904895 May 30 01:24:57 PM PDT 24 May 30 01:25:09 PM PDT 24 3683029091 ps
T548 /workspace/coverage/default/33.sysrst_ctrl_smoke.1712221019 May 30 01:26:32 PM PDT 24 May 30 01:26:38 PM PDT 24 2114089374 ps
T549 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2677082435 May 30 01:26:02 PM PDT 24 May 30 01:26:10 PM PDT 24 2508977146 ps
T345 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3878026890 May 30 01:27:49 PM PDT 24 May 30 01:28:00 PM PDT 24 33226495400 ps
T550 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.2672331673 May 30 01:24:28 PM PDT 24 May 30 01:24:31 PM PDT 24 2255218845 ps
T551 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.307030654 May 30 01:27:07 PM PDT 24 May 30 01:27:15 PM PDT 24 2472453793 ps
T552 /workspace/coverage/default/46.sysrst_ctrl_smoke.872551827 May 30 01:27:23 PM PDT 24 May 30 01:27:30 PM PDT 24 2112523725 ps
T553 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3256768840 May 30 01:26:56 PM PDT 24 May 30 01:26:59 PM PDT 24 2827113006 ps
T554 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1329565994 May 30 01:24:28 PM PDT 24 May 30 01:24:30 PM PDT 24 2678056618 ps
T555 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3522557942 May 30 01:24:33 PM PDT 24 May 30 01:24:37 PM PDT 24 3732486473 ps
T556 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.4061221001 May 30 01:26:59 PM PDT 24 May 30 01:27:02 PM PDT 24 3161852950 ps
T557 /workspace/coverage/default/30.sysrst_ctrl_smoke.2204163776 May 30 01:26:17 PM PDT 24 May 30 01:26:23 PM PDT 24 2114328733 ps
T344 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2226696685 May 30 01:27:06 PM PDT 24 May 30 01:27:30 PM PDT 24 108214337434 ps
T266 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3699036934 May 30 01:24:06 PM PDT 24 May 30 01:24:51 PM PDT 24 74785615611 ps
T558 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2359316059 May 30 01:27:16 PM PDT 24 May 30 01:27:22 PM PDT 24 2515949978 ps
T559 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3983985397 May 30 01:26:56 PM PDT 24 May 30 01:28:33 PM PDT 24 38390646124 ps
T560 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.4203792875 May 30 01:25:25 PM PDT 24 May 30 01:25:29 PM PDT 24 4082003615 ps
T561 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.162522433 May 30 01:24:30 PM PDT 24 May 30 01:25:40 PM PDT 24 49029308990 ps
T562 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2722425430 May 30 01:24:10 PM PDT 24 May 30 01:24:14 PM PDT 24 2234092386 ps
T563 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.454336979 May 30 01:25:38 PM PDT 24 May 30 01:25:41 PM PDT 24 2570051279 ps
T564 /workspace/coverage/default/31.sysrst_ctrl_smoke.4173901133 May 30 01:26:16 PM PDT 24 May 30 01:26:22 PM PDT 24 2115054872 ps
T565 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.3091201363 May 30 01:25:23 PM PDT 24 May 30 01:34:25 PM PDT 24 582357135001 ps
T366 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.2018581108 May 30 01:24:55 PM PDT 24 May 30 01:27:03 PM PDT 24 47863355124 ps
T566 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3638858660 May 30 01:27:36 PM PDT 24 May 30 01:28:50 PM PDT 24 27833449167 ps
T567 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.1060656354 May 30 01:25:36 PM PDT 24 May 30 01:26:20 PM PDT 24 109343737693 ps
T568 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2763456179 May 30 01:24:49 PM PDT 24 May 30 01:24:56 PM PDT 24 2170178617 ps
T569 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1917256463 May 30 01:25:52 PM PDT 24 May 30 01:25:56 PM PDT 24 3894048906 ps
T570 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.2861162251 May 30 01:25:39 PM PDT 24 May 30 01:25:49 PM PDT 24 2845367430 ps
T571 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2388792219 May 30 01:26:04 PM PDT 24 May 30 01:26:06 PM PDT 24 3469165632 ps
T572 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3378879001 May 30 01:27:35 PM PDT 24 May 30 01:28:46 PM PDT 24 102765231601 ps
T573 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3904150867 May 30 01:26:00 PM PDT 24 May 30 01:26:03 PM PDT 24 3366239725 ps
T211 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.317141129 May 30 01:25:48 PM PDT 24 May 30 01:25:50 PM PDT 24 2364953654 ps
T574 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.4026825967 May 30 01:26:33 PM PDT 24 May 30 01:26:37 PM PDT 24 3795235713 ps
T575 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.3596461211 May 30 01:25:36 PM PDT 24 May 30 01:25:48 PM PDT 24 4113676839 ps
T576 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.371506670 May 30 01:25:08 PM PDT 24 May 30 01:25:15 PM PDT 24 2242983717 ps
T577 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3627878941 May 30 01:24:28 PM PDT 24 May 30 01:24:36 PM PDT 24 2289035960 ps
T103 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.4248350070 May 30 01:27:21 PM PDT 24 May 30 01:28:29 PM PDT 24 230516113823 ps
T198 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4232250967 May 30 01:24:46 PM PDT 24 May 30 01:27:00 PM PDT 24 102878271661 ps
T199 /workspace/coverage/default/35.sysrst_ctrl_smoke.3562253056 May 30 01:26:31 PM PDT 24 May 30 01:26:34 PM PDT 24 2133170086 ps
T200 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.2701321007 May 30 01:26:19 PM PDT 24 May 30 01:26:24 PM PDT 24 2513693336 ps
T201 /workspace/coverage/default/7.sysrst_ctrl_alert_test.1442941489 May 30 01:24:46 PM PDT 24 May 30 01:24:49 PM PDT 24 2195104358 ps
T202 /workspace/coverage/default/48.sysrst_ctrl_stress_all.1646471858 May 30 01:27:23 PM PDT 24 May 30 01:27:56 PM PDT 24 12883591568 ps
T203 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.4094595873 May 30 01:24:43 PM PDT 24 May 30 01:24:52 PM PDT 24 3882592135 ps
T204 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2826572517 May 30 01:27:33 PM PDT 24 May 30 01:28:10 PM PDT 24 52789664581 ps
T205 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1613540075 May 30 01:25:26 PM PDT 24 May 30 01:25:29 PM PDT 24 2481574784 ps
T206 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2613055387 May 30 01:24:29 PM PDT 24 May 30 01:24:37 PM PDT 24 2509651521 ps
T207 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3182103932 May 30 01:24:30 PM PDT 24 May 30 01:24:34 PM PDT 24 2520406008 ps
T255 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.2588240081 May 30 01:26:55 PM PDT 24 May 30 01:28:41 PM PDT 24 160164381996 ps
T578 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.3369057157 May 30 01:26:34 PM PDT 24 May 30 01:26:38 PM PDT 24 3321681385 ps
T579 /workspace/coverage/default/7.sysrst_ctrl_smoke.3306471819 May 30 01:24:46 PM PDT 24 May 30 01:24:53 PM PDT 24 2110772004 ps
T580 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.2910466844 May 30 01:25:37 PM PDT 24 May 30 01:25:40 PM PDT 24 2530081185 ps
T347 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1558677262 May 30 01:27:34 PM PDT 24 May 30 01:29:20 PM PDT 24 83955825284 ps
T181 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.2712149126 May 30 01:27:23 PM PDT 24 May 30 01:27:33 PM PDT 24 4390341347 ps
T581 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.3678305615 May 30 01:26:36 PM PDT 24 May 30 01:29:00 PM PDT 24 215264071566 ps
T582 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.3586877505 May 30 01:26:19 PM PDT 24 May 30 01:27:43 PM PDT 24 118903282405 ps
T583 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2771745799 May 30 01:25:38 PM PDT 24 May 30 01:25:41 PM PDT 24 6328664055 ps
T258 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1554539978 May 30 01:27:36 PM PDT 24 May 30 01:40:42 PM PDT 24 286833606073 ps
T104 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.1061420212 May 30 01:25:35 PM PDT 24 May 30 01:27:33 PM PDT 24 81786653803 ps
T105 /workspace/coverage/default/0.sysrst_ctrl_stress_all.1026109222 May 30 01:24:08 PM PDT 24 May 30 01:25:39 PM PDT 24 76551026145 ps
T113 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2386315976 May 30 01:24:50 PM PDT 24 May 30 01:24:53 PM PDT 24 2511613497 ps
T114 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.3035882662 May 30 01:25:52 PM PDT 24 May 30 01:27:57 PM PDT 24 83348154961 ps
T115 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.157078350 May 30 01:27:09 PM PDT 24 May 30 01:27:12 PM PDT 24 2498593622 ps
T116 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1247145006 May 30 01:25:51 PM PDT 24 May 30 01:25:55 PM PDT 24 16625840447 ps
T117 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3476859727 May 30 01:27:09 PM PDT 24 May 30 01:27:17 PM PDT 24 2468184570 ps
T118 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2371133583 May 30 01:25:50 PM PDT 24 May 30 01:26:25 PM PDT 24 25633046079 ps
T119 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.2927421344 May 30 01:24:47 PM PDT 24 May 30 01:26:02 PM PDT 24 98147502071 ps
T120 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3254981129 May 30 01:24:44 PM PDT 24 May 30 01:24:49 PM PDT 24 2087866965 ps
T121 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1134384059 May 30 01:27:35 PM PDT 24 May 30 01:27:57 PM PDT 24 34561088281 ps
T584 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.3072929011 May 30 01:25:51 PM PDT 24 May 30 01:25:54 PM PDT 24 2627962529 ps
T585 /workspace/coverage/default/3.sysrst_ctrl_stress_all.1617688571 May 30 01:24:30 PM PDT 24 May 30 01:24:36 PM PDT 24 6686134021 ps
T586 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.930756385 May 30 01:25:40 PM PDT 24 May 30 01:26:56 PM PDT 24 26706633704 ps
T587 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3987653960 May 30 01:26:33 PM PDT 24 May 30 01:26:41 PM PDT 24 2509725134 ps
T588 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1659730679 May 30 01:26:32 PM PDT 24 May 30 01:26:35 PM PDT 24 2472727431 ps
T589 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1780136579 May 30 01:24:48 PM PDT 24 May 30 01:24:52 PM PDT 24 2623569457 ps
T590 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2753795916 May 30 01:25:43 PM PDT 24 May 30 01:25:49 PM PDT 24 3110463459 ps
T79 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.292741244 May 30 01:26:31 PM PDT 24 May 30 01:27:59 PM PDT 24 35521371294 ps
T591 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.1628372801 May 30 01:24:46 PM PDT 24 May 30 01:24:50 PM PDT 24 3166257390 ps
T592 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.4004874405 May 30 01:25:53 PM PDT 24 May 30 01:26:01 PM PDT 24 2512087301 ps
T593 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.3087504536 May 30 01:26:01 PM PDT 24 May 30 01:26:09 PM PDT 24 2455554713 ps
T594 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.859915298 May 30 01:24:44 PM PDT 24 May 30 01:24:50 PM PDT 24 3658238187 ps
T350 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.926385549 May 30 01:25:22 PM PDT 24 May 30 01:27:52 PM PDT 24 58051281686 ps
T595 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.743699956 May 30 01:27:22 PM PDT 24 May 30 01:27:30 PM PDT 24 2759453378 ps
T596 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.359148095 May 30 01:25:08 PM PDT 24 May 30 01:25:10 PM PDT 24 2509327710 ps
T597 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.2961547044 May 30 01:24:56 PM PDT 24 May 30 01:25:06 PM PDT 24 9890715809 ps
T598 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.2678977615 May 30 01:25:21 PM PDT 24 May 30 01:25:28 PM PDT 24 2611322147 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%