Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.81 99.33 96.41 100.00 96.79 98.78 99.52 93.81


Total tests in report: 914
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
56.28 56.28 79.57 79.57 67.34 67.34 65.98 65.98 13.46 13.46 80.74 80.74 65.03 65.03 21.85 21.85 /workspace/coverage/default/17.sysrst_ctrl_stress_all.224753967
68.80 12.52 86.15 6.59 77.25 9.91 86.76 20.78 37.18 23.72 87.32 6.58 75.92 10.89 31.02 9.17 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1135276211
76.45 7.65 89.85 3.69 80.92 3.67 87.44 0.68 58.97 21.79 90.46 3.14 87.67 11.75 39.84 8.82 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2728456767
83.61 7.16 96.49 6.64 89.79 8.87 96.80 9.36 68.59 9.62 95.90 5.43 95.57 7.90 42.12 2.28 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2661446655
87.31 3.70 98.04 1.55 91.84 2.05 96.80 0.00 88.46 19.87 97.38 1.48 96.53 0.96 42.12 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2686634375
90.47 3.16 98.13 0.09 91.91 0.08 96.80 0.00 89.10 0.64 97.56 0.18 96.82 0.29 62.93 20.81 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2819612169
91.70 1.23 98.21 0.07 93.07 1.16 97.49 0.68 89.10 0.00 97.67 0.11 96.82 0.00 69.52 6.59 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.176035651
92.73 1.04 98.32 0.11 93.53 0.46 97.49 0.00 89.10 0.00 97.82 0.15 97.01 0.19 75.87 6.34 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1952867659
93.56 0.83 98.32 0.00 93.78 0.25 98.17 0.68 89.10 0.00 97.82 0.00 97.40 0.39 80.33 4.46 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2023338207
93.99 0.43 98.43 0.11 93.91 0.13 98.17 0.00 89.10 0.00 97.82 0.00 97.40 0.00 83.10 2.78 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.4277875729
94.30 0.31 98.49 0.06 94.03 0.13 98.17 0.00 89.10 0.00 97.82 0.00 97.50 0.10 84.99 1.88 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.2163063465
94.59 0.29 98.58 0.09 94.41 0.38 98.17 0.00 90.38 1.28 97.93 0.11 97.69 0.19 84.99 0.00 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3499284226
94.87 0.28 98.58 0.00 94.44 0.03 99.77 1.60 90.38 0.00 97.93 0.00 97.78 0.10 85.23 0.25 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2512375359
95.11 0.23 98.68 0.09 94.59 0.15 99.77 0.00 91.03 0.64 98.08 0.15 97.88 0.10 85.73 0.50 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3938184520
95.32 0.21 98.75 0.07 94.62 0.03 99.77 0.00 91.67 0.64 98.19 0.11 97.98 0.10 86.27 0.55 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.4248350070
95.48 0.15 98.79 0.04 94.64 0.03 99.77 0.00 92.31 0.64 98.23 0.04 98.07 0.10 86.52 0.25 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4232250967
95.62 0.15 98.79 0.00 94.64 0.00 99.77 0.00 92.31 0.00 98.23 0.00 98.07 0.00 87.56 1.04 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3825568729
95.76 0.14 98.79 0.00 95.63 0.99 99.77 0.00 92.31 0.00 98.23 0.00 98.07 0.00 87.56 0.00 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.2725345367
95.90 0.14 98.79 0.00 95.73 0.10 99.77 0.00 92.31 0.00 98.23 0.00 98.75 0.67 87.76 0.20 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1530095113
96.04 0.13 98.82 0.04 95.75 0.03 99.77 0.00 92.95 0.64 98.26 0.04 98.84 0.10 87.86 0.10 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2892200397
96.17 0.13 98.84 0.02 95.75 0.00 99.77 0.00 92.95 0.00 98.26 0.00 98.84 0.00 88.75 0.89 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.699579534
96.29 0.12 98.88 0.04 95.80 0.05 99.77 0.00 93.59 0.64 98.30 0.04 98.94 0.10 88.75 0.00 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2114408091
96.41 0.12 98.92 0.04 95.83 0.03 99.77 0.00 94.23 0.64 98.34 0.04 99.04 0.10 88.75 0.00 /workspace/coverage/default/0.sysrst_ctrl_stress_all.1026109222
96.53 0.12 98.96 0.04 95.85 0.03 99.77 0.00 94.87 0.64 98.37 0.04 99.13 0.10 88.75 0.00 /workspace/coverage/default/19.sysrst_ctrl_stress_all.3780976249
96.65 0.12 98.99 0.04 95.88 0.03 99.77 0.00 95.51 0.64 98.41 0.04 99.23 0.10 88.75 0.00 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1958264216
96.77 0.12 99.03 0.04 95.90 0.03 99.77 0.00 96.15 0.64 98.45 0.04 99.33 0.10 88.75 0.00 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.373824347
96.89 0.12 99.07 0.04 95.93 0.03 99.77 0.00 96.79 0.64 98.48 0.04 99.42 0.10 88.75 0.00 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3521287834
96.99 0.10 99.10 0.04 95.93 0.00 99.77 0.00 96.79 0.00 98.48 0.00 99.42 0.00 89.40 0.64 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3818157340
97.07 0.08 99.14 0.04 95.93 0.00 99.77 0.00 96.79 0.00 98.56 0.07 99.42 0.00 89.84 0.45 /workspace/coverage/default/13.sysrst_ctrl_stress_all.874734696
97.13 0.07 99.16 0.02 95.93 0.00 99.77 0.00 96.79 0.00 98.56 0.00 99.42 0.00 90.29 0.45 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.210605020
97.20 0.06 99.16 0.00 95.93 0.00 99.77 0.00 96.79 0.00 98.56 0.00 99.42 0.00 90.73 0.45 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.3559832531
97.25 0.05 99.22 0.06 96.01 0.08 100.00 0.23 96.79 0.00 98.56 0.00 99.42 0.00 90.73 0.00 /workspace/coverage/default/13.sysrst_ctrl_alert_test.3726364763
97.30 0.05 99.25 0.04 96.16 0.15 100.00 0.00 96.79 0.00 98.63 0.07 99.52 0.10 90.73 0.00 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.242104686
97.35 0.05 99.25 0.00 96.16 0.00 100.00 0.00 96.79 0.00 98.63 0.00 99.52 0.00 91.08 0.35 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1994944065
97.39 0.04 99.25 0.00 96.16 0.00 100.00 0.00 96.79 0.00 98.63 0.00 99.52 0.00 91.38 0.30 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3771474394
97.43 0.04 99.25 0.00 96.28 0.13 100.00 0.00 96.79 0.00 98.63 0.00 99.52 0.00 91.53 0.15 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4101771674
97.47 0.04 99.25 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.63 0.00 99.52 0.00 91.77 0.25 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.259032941
97.50 0.04 99.25 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.63 0.00 99.52 0.00 92.02 0.25 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1757302652
97.53 0.02 99.25 0.00 96.31 0.03 100.00 0.00 96.79 0.00 98.63 0.00 99.52 0.00 92.17 0.15 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2029887568
97.55 0.02 99.25 0.00 96.33 0.03 100.00 0.00 96.79 0.00 98.63 0.00 99.52 0.00 92.32 0.15 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1554539978
97.57 0.02 99.29 0.04 96.33 0.00 100.00 0.00 96.79 0.00 98.71 0.07 99.52 0.00 92.37 0.05 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.44126007
97.59 0.02 99.29 0.00 96.33 0.00 100.00 0.00 96.79 0.00 98.71 0.00 99.52 0.00 92.52 0.15 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.110365152
97.62 0.02 99.29 0.00 96.33 0.00 100.00 0.00 96.79 0.00 98.71 0.00 99.52 0.00 92.67 0.15 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1033746659
97.64 0.02 99.29 0.00 96.33 0.00 100.00 0.00 96.79 0.00 98.71 0.00 99.52 0.00 92.81 0.15 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2484735715
97.66 0.02 99.29 0.00 96.33 0.00 100.00 0.00 96.79 0.00 98.71 0.00 99.52 0.00 92.96 0.15 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.90814875
97.67 0.01 99.29 0.00 96.33 0.00 100.00 0.00 96.79 0.00 98.71 0.00 99.52 0.00 93.06 0.10 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3312289627
97.69 0.01 99.29 0.00 96.33 0.00 100.00 0.00 96.79 0.00 98.71 0.00 99.52 0.00 93.16 0.10 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2774761487
97.70 0.01 99.31 0.02 96.36 0.03 100.00 0.00 96.79 0.00 98.74 0.04 99.52 0.00 93.16 0.00 /workspace/coverage/default/42.sysrst_ctrl_stress_all.2614138078
97.71 0.01 99.33 0.02 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.04 99.52 0.00 93.16 0.00 /workspace/coverage/default/4.sysrst_ctrl_stress_all.2945997232
97.71 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.21 0.05 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.1241109700
97.72 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.26 0.05 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2857665185
97.73 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.31 0.05 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.636059698
97.73 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.36 0.05 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1916958100
97.74 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.41 0.05 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.1793560304
97.75 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.46 0.05 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3218793637
97.76 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.51 0.05 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2558771544
97.76 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.56 0.05 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.1373371230
97.77 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.61 0.05 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.650245549
97.78 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.66 0.05 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2226696685
97.78 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.71 0.05 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3988306798
97.79 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.76 0.05 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2222350895
97.80 0.01 99.33 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.81 0.05 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3878026890
97.80 0.01 99.33 0.00 96.39 0.03 100.00 0.00 96.79 0.00 98.78 0.00 99.52 0.00 93.81 0.00 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.737428868


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3901583677
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1587529514
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.474277187
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.4067972277
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3636331997
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.332345270
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.946550501
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.773966203
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1219102755
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1475313102
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2208791063
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.688264619
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1596554615
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.247961100
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.4120085103
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1120842470
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.1156867601
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1421264676
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.969421725
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1476167667
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2750237046
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1621761867
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.24132792
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3784242268
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1340283722
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.373527966
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.292369981
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.210034553
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2776009611
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3263951005
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.4201814727
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.333977079
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1103200021
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2842713450
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3845689595
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1362970968
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3627609176
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.401118165
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1544984942
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2096486203
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.4215721062
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1220170244
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1902825204
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.382827633
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2425547033
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.239047480
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.3659941231
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2459310823
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2028137112
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1316794076
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2079172783
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3424640015
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2807070750
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.253456039
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3977476028
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3454023005
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2229390141
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3880464125
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.3434724946
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2824927540
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.3370306983
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3423750213
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.57108251
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.2161886594
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2319175268
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2961395986
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.1999817003
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.3558283398
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.1305158627
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2717465219
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.1789057533
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.675688298
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2129182803
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.1652405323
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.1529999415
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.2365818583
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2288754756
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2488082324
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2604766803
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.133121460
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.4039907496
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.1871621374
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.2590583005
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.2044653281
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.577693518
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.2749205442
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.1307967452
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.3850401837
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.591851551
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.1634007537
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.2912645491
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.174667204
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.497178880
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/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3527182378
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2836604993
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.338815178
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2681619680
/workspace/coverage/default/42.sysrst_ctrl_smoke.2733180039
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.518504505
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.433125860
/workspace/coverage/default/43.sysrst_ctrl_alert_test.1224998121
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3084082740
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1447814699
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1265814563
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2125553810
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3297831061
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3476859727
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2185605304
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3066061570
/workspace/coverage/default/43.sysrst_ctrl_smoke.3370859605
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3352499041
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1692391049
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3247158008
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1058962482
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3701944603
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1957665214
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1938421816
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1416049580
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3114951766
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1100239603
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.307030654
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2144808754
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2818278341
/workspace/coverage/default/44.sysrst_ctrl_smoke.369964892
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3285860820
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.394541119
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2661184640
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.4187770978
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.590466563
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1289408163
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3579324487
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.467045891
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3162014500
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.157078350
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.411594134
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2359316059
/workspace/coverage/default/45.sysrst_ctrl_smoke.1135547298
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3117644398
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.621101602
/workspace/coverage/default/46.sysrst_ctrl_alert_test.423554022
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.732814825
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.131581249
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.335534420
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.743699956
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1612683939
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2588439889
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1748022493
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1169619719
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3490573738
/workspace/coverage/default/46.sysrst_ctrl_smoke.872551827
/workspace/coverage/default/46.sysrst_ctrl_stress_all.4035445101
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.500844050
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.4138912759
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2597265070
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3911752680
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2166619117
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.88417591
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3495398576
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1263654666
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.4177464203
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1153522153
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.3372991554
/workspace/coverage/default/47.sysrst_ctrl_smoke.162093765
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1582411708
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2720039744
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3902385251
/workspace/coverage/default/48.sysrst_ctrl_alert_test.212923437
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3978134943
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.62714635
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1286909338
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2844788894
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2712149126
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3216376578
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1598689554
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1554067113
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1230894623
/workspace/coverage/default/48.sysrst_ctrl_smoke.1476753576
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1646471858
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4252386703
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2806377009
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.5349766
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3838970155
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1227514621
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.729536662
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4174743721
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.4219838216
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2656389441
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4249139722
/workspace/coverage/default/49.sysrst_ctrl_smoke.123980808
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3138536211
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2208463836
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3998300144
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2629996470
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2723479101
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1629825431
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2229256687
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2391695025
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1505823774
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1341204097
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1698359024
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1218331291
/workspace/coverage/default/5.sysrst_ctrl_smoke.3608740366
/workspace/coverage/default/5.sysrst_ctrl_stress_all.792669646
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.103282880
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.823836584
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.740056423
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1662132128
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3378879001
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1134384059
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2023487440
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2832401745
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2552074014
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2081912582
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3826079922
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3918093460
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2041204039
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3570217954
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1286092814
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3254981129
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.17476997
/workspace/coverage/default/6.sysrst_ctrl_smoke.200452478
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1679017034
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1544800156
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.799806624
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2269694288
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3666365041
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.415458746
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1162116738
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.813112345
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3638858660
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.4038554886
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.709483031
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1442941489
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3968052517
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1506650684
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3180675972
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.4094595873
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3118749859
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3759774192
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3123400141
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2892727350
/workspace/coverage/default/7.sysrst_ctrl_smoke.3306471819
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2692363377
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.241797124
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2284695430
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4135864763
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.4207144393
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3036832216
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2616713419
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3307960182
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2239316777
/workspace/coverage/default/8.sysrst_ctrl_alert_test.484716369
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.859915298
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.649932858
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1388088179
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.778825934
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1197628256
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2814830873
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2224249431
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3393850365
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1958035849
/workspace/coverage/default/8.sysrst_ctrl_smoke.978414607
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2696838814
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.291398568
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1656385205
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2090080168
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2826572517
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1558677262
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3052275575
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.281345328
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.382222176
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.190229943
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3743792052
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.4110460720
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2817960034
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1166132406
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2509118587
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3477281014
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.4070641582
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2321887147
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2436971285
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1757313198
/workspace/coverage/default/9.sysrst_ctrl_smoke.1772238229
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1932749883
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2510851990
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1717397217
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2824914446
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3908140185
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.570684375
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.955418996
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3599171788
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1284198077
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2545216105




Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.1926915028 May 30 01:25:48 PM PDT 24 May 30 01:26:22 PM PDT 24 99341967806 ps
T5 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.2191875818 May 30 01:25:09 PM PDT 24 May 30 01:25:19 PM PDT 24 3410642501 ps
T6 /workspace/coverage/default/15.sysrst_ctrl_smoke.2635340108 May 30 01:25:08 PM PDT 24 May 30 01:25:11 PM PDT 24 2129575649 ps
T2 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2023338207 May 30 01:24:08 PM PDT 24 May 30 01:24:44 PM PDT 24 44570031491 ps
T13 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1263654666 May 30 01:27:22 PM PDT 24 May 30 01:27:28 PM PDT 24 2621349407 ps
T14 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4135864763 May 30 01:27:39 PM PDT 24 May 30 01:29:55 PM PDT 24 52532271091 ps
T15 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2224249431 May 30 01:24:44 PM PDT 24 May 30 01:24:49 PM PDT 24 2451455779 ps
T16 /workspace/coverage/default/31.sysrst_ctrl_stress_all.2736756458 May 30 01:26:17 PM PDT 24 May 30 01:26:25 PM PDT 24 10126544297 ps
T3 /workspace/coverage/default/17.sysrst_ctrl_stress_all.224753967 May 30 01:25:24 PM PDT 24 May 30 01:34:10 PM PDT 24 211309402849 ps
T4 /workspace/coverage/default/4.sysrst_ctrl_stress_all.2945997232 May 30 01:24:29 PM PDT 24 May 30 01:24:58 PM PDT 24 11141073270 ps
T51 /workspace/coverage/default/32.sysrst_ctrl_alert_test.1726472554 May 30 01:26:31 PM PDT 24 May 30 01:26:38 PM PDT 24 2011629475 ps
T40 /workspace/coverage/default/30.sysrst_ctrl_stress_all.3849902066 May 30 01:26:17 PM PDT 24 May 30 01:26:43 PM PDT 24 10066085903 ps
T41 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2285486515 May 30 01:24:57 PM PDT 24 May 30 01:33:14 PM PDT 24 184246339458 ps
T7 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.647009337 May 30 01:26:18 PM PDT 24 May 30 01:26:28 PM PDT 24 5613215435 ps
T8 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.4138912759 May 30 01:27:22 PM PDT 24 May 30 01:27:26 PM PDT 24 6968227828 ps
T52 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1754788310 May 30 01:26:55 PM PDT 24 May 30 01:31:43 PM PDT 24 656127938141 ps
T9 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.4169173617 May 30 01:24:59 PM PDT 24 May 30 01:25:07 PM PDT 24 4376282565 ps
T25 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2661446655 May 30 01:25:38 PM PDT 24 May 30 01:27:16 PM PDT 24 36294765609 ps
T10 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.110365152 May 30 01:25:20 PM PDT 24 May 30 01:28:54 PM PDT 24 84195135122 ps
T42 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.3704655807 May 30 01:24:08 PM PDT 24 May 30 01:24:12 PM PDT 24 3895817033 ps
T11 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.4277875729 May 30 01:24:58 PM PDT 24 May 30 01:25:40 PM PDT 24 161561868953 ps
T43 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1116556199 May 30 01:25:36 PM PDT 24 May 30 01:29:15 PM PDT 24 192690696673 ps
T58 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.1105529935 May 30 01:24:07 PM PDT 24 May 30 01:24:11 PM PDT 24 3553827309 ps
T59 /workspace/coverage/default/14.sysrst_ctrl_smoke.2160740712 May 30 01:24:55 PM PDT 24 May 30 01:24:58 PM PDT 24 2188562698 ps
T178 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.3378344009 May 30 01:24:57 PM PDT 24 May 30 01:25:00 PM PDT 24 3902095280 ps
T12 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1135276211 May 30 01:26:56 PM PDT 24 May 30 01:28:46 PM PDT 24 42818385925 ps
T122 /workspace/coverage/default/25.sysrst_ctrl_smoke.2790928890 May 30 01:25:49 PM PDT 24 May 30 01:25:55 PM PDT 24 2109298582 ps
T24 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3825568729 May 30 01:25:38 PM PDT 24 May 30 01:26:40 PM PDT 24 42526077719 ps
T60 /workspace/coverage/default/32.sysrst_ctrl_stress_all.2499414239 May 30 01:26:26 PM PDT 24 May 30 01:26:47 PM PDT 24 7072917212 ps
T44 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1468172874 May 30 01:26:19 PM PDT 24 May 30 01:26:29 PM PDT 24 3389232591 ps
T64 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.1555773533 May 30 01:26:17 PM PDT 24 May 30 01:26:19 PM PDT 24 2755942120 ps
T22 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2510851990 May 30 01:24:58 PM PDT 24 May 30 01:25:02 PM PDT 24 4303042404 ps
T66 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.1238390252 May 30 01:26:17 PM PDT 24 May 30 01:26:25 PM PDT 24 2697560203 ps
T23 /workspace/coverage/default/14.sysrst_ctrl_stress_all.3194698720 May 30 01:25:10 PM PDT 24 May 30 01:25:34 PM PDT 24 11163673652 ps
T65 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3239188538 May 30 01:26:33 PM PDT 24 May 30 01:26:36 PM PDT 24 2623729671 ps
T125 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.3485901493 May 30 01:26:52 PM PDT 24 May 30 01:26:59 PM PDT 24 2019558038 ps
T61 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.4177464203 May 30 01:27:20 PM PDT 24 May 30 01:27:29 PM PDT 24 2454874315 ps
T34 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.1786763521 May 30 01:27:09 PM PDT 24 May 30 01:27:21 PM PDT 24 5520649503 ps
T126 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3924498939 May 30 01:24:31 PM PDT 24 May 30 01:24:33 PM PDT 24 2157145095 ps
T67 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.3625689602 May 30 01:25:51 PM PDT 24 May 30 01:25:57 PM PDT 24 4037342493 ps
T127 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3180675972 May 30 01:24:49 PM PDT 24 May 30 01:24:53 PM PDT 24 2734985383 ps
T45 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.721286921 May 30 01:25:23 PM PDT 24 May 30 01:26:18 PM PDT 24 96544965254 ps
T54 /workspace/coverage/default/1.sysrst_ctrl_stress_all.3769779004 May 30 01:24:07 PM PDT 24 May 30 01:24:34 PM PDT 24 11273801725 ps
T194 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.822798103 May 30 01:25:38 PM PDT 24 May 30 01:25:43 PM PDT 24 2231978622 ps
T195 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3066061570 May 30 01:27:07 PM PDT 24 May 30 01:27:10 PM PDT 24 2559094306 ps
T196 /workspace/coverage/default/2.sysrst_ctrl_smoke.1224723476 May 30 01:24:07 PM PDT 24 May 30 01:24:10 PM PDT 24 2121607491 ps
T53 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.1421181406 May 30 01:25:50 PM PDT 24 May 30 01:25:54 PM PDT 24 6682206092 ps
T46 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3938184520 May 30 01:26:17 PM PDT 24 May 30 01:27:03 PM PDT 24 18438680500 ps
T47 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.1738044924 May 30 01:25:25 PM PDT 24 May 30 01:26:01 PM PDT 24 54866047539 ps
T37 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.2117505180 May 30 01:26:57 PM PDT 24 May 30 01:27:01 PM PDT 24 3033507328 ps
T62 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2808610641 May 30 01:26:03 PM PDT 24 May 30 01:26:04 PM PDT 24 2602487635 ps
T134 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2656389441 May 30 01:27:25 PM PDT 24 May 30 01:27:31 PM PDT 24 2150086483 ps
T135 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2276123256 May 30 01:26:35 PM PDT 24 May 30 01:26:46 PM PDT 24 3696961175 ps
T136 /workspace/coverage/default/16.sysrst_ctrl_smoke.2057524335 May 30 01:25:22 PM PDT 24 May 30 01:25:30 PM PDT 24 2111518152 ps
T48 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3385573736 May 30 01:26:53 PM PDT 24 May 30 01:29:21 PM PDT 24 54089422935 ps
T137 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.191867089 May 30 01:25:51 PM PDT 24 May 30 01:25:56 PM PDT 24 3612274703 ps
T379 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.404158832 May 30 01:24:48 PM PDT 24 May 30 01:24:51 PM PDT 24 2544592632 ps
T380 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2221606540 May 30 01:25:52 PM PDT 24 May 30 01:25:59 PM PDT 24 2614256650 ps
T381 /workspace/coverage/default/45.sysrst_ctrl_smoke.1135547298 May 30 01:27:09 PM PDT 24 May 30 01:27:17 PM PDT 24 2111186778 ps
T175 /workspace/coverage/default/24.sysrst_ctrl_stress_all.2781564464 May 30 01:25:45 PM PDT 24 May 30 01:25:53 PM PDT 24 8875082687 ps
T72 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3775688359 May 30 01:25:39 PM PDT 24 May 30 01:28:48 PM PDT 24 137246508223 ps
T291 /workspace/coverage/default/48.sysrst_ctrl_alert_test.212923437 May 30 01:27:22 PM PDT 24 May 30 01:27:30 PM PDT 24 2012868753 ps
T49 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.580766248 May 30 01:25:08 PM PDT 24 May 30 01:25:13 PM PDT 24 3483618896 ps
T50 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.732814825 May 30 01:27:23 PM PDT 24 May 30 01:27:34 PM PDT 24 3706047444 ps
T68 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1195156929 May 30 01:26:52 PM PDT 24 May 30 01:28:50 PM PDT 24 90660015398 ps
T63 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1184986426 May 30 01:26:20 PM PDT 24 May 30 01:26:27 PM PDT 24 2473898244 ps
T36 /workspace/coverage/default/36.sysrst_ctrl_stress_all.1959962791 May 30 01:26:33 PM PDT 24 May 30 01:26:36 PM PDT 24 10536552100 ps
T55 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.381736541 May 30 01:25:49 PM PDT 24 May 30 01:27:21 PM PDT 24 76511016759 ps
T157 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.2041204039 May 30 01:24:54 PM PDT 24 May 30 01:24:57 PM PDT 24 2872183660 ps
T259 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3443500431 May 30 01:26:56 PM PDT 24 May 30 01:26:59 PM PDT 24 3486592473 ps
T260 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1245325548 May 30 01:25:50 PM PDT 24 May 30 01:25:57 PM PDT 24 2142533583 ps
T56 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1370634730 May 30 01:24:47 PM PDT 24 May 30 01:25:12 PM PDT 24 41967332072 ps
T69 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2824914446 May 30 01:27:46 PM PDT 24 May 30 01:28:00 PM PDT 24 23615435286 ps
T70 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.281345328 May 30 01:27:38 PM PDT 24 May 30 01:33:00 PM PDT 24 123655931168 ps
T71 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2545216105 May 30 01:27:46 PM PDT 24 May 30 01:28:52 PM PDT 24 26580200714 ps
T90 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2877810758 May 30 01:26:30 PM PDT 24 May 30 01:26:40 PM PDT 24 3356102841 ps
T245 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.795042966 May 30 01:25:49 PM PDT 24 May 30 01:25:54 PM PDT 24 3285271580 ps
T80 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.2709921394 May 30 01:24:28 PM PDT 24 May 30 01:28:09 PM PDT 24 176012677854 ps
T57 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.1708463590 May 30 01:25:52 PM PDT 24 May 30 01:25:56 PM PDT 24 9209531072 ps
T29 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.2163063465 May 30 01:26:01 PM PDT 24 May 30 01:26:51 PM PDT 24 70694198205 ps
T39 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.525320360 May 30 01:25:09 PM PDT 24 May 30 01:26:09 PM PDT 24 47256980711 ps
T107 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.165659893 May 30 01:24:55 PM PDT 24 May 30 01:25:02 PM PDT 24 2134178762 ps
T108 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3227371469 May 30 01:26:13 PM PDT 24 May 30 01:26:16 PM PDT 24 2639933021 ps
T38 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.3602492147 May 30 01:26:23 PM PDT 24 May 30 01:26:30 PM PDT 24 3271436378 ps
T109 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.1529215827 May 30 01:24:56 PM PDT 24 May 30 01:24:58 PM PDT 24 3627891060 ps
T110 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2896895846 May 30 01:24:30 PM PDT 24 May 30 01:24:34 PM PDT 24 2148150376 ps
T111 /workspace/coverage/default/6.sysrst_ctrl_alert_test.2832401745 May 30 01:24:43 PM PDT 24 May 30 01:24:46 PM PDT 24 2046504429 ps
T112 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2155849719 May 30 01:26:18 PM PDT 24 May 30 01:33:04 PM PDT 24 151920764367 ps
T91 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.648584328 May 30 01:25:48 PM PDT 24 May 30 01:26:44 PM PDT 24 20834096315 ps
T73 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3206574699 May 30 01:24:30 PM PDT 24 May 30 01:24:34 PM PDT 24 4247066153 ps
T246 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2386969509 May 30 01:24:08 PM PDT 24 May 30 01:24:12 PM PDT 24 2555394926 ps
T306 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1958035849 May 30 01:24:46 PM PDT 24 May 30 01:24:53 PM PDT 24 2512878992 ps
T382 /workspace/coverage/default/29.sysrst_ctrl_alert_test.1546364222 May 30 01:26:21 PM PDT 24 May 30 01:26:27 PM PDT 24 2011543729 ps
T383 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1265814563 May 30 01:27:06 PM PDT 24 May 30 01:27:11 PM PDT 24 4277547407 ps
T32 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2922351223 May 30 01:26:55 PM PDT 24 May 30 01:27:48 PM PDT 24 75256913069 ps
T247 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1602299596 May 30 01:25:21 PM PDT 24 May 30 01:29:55 PM PDT 24 100240842553 ps
T384 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.2670360809 May 30 01:24:55 PM PDT 24 May 30 01:24:58 PM PDT 24 3462567597 ps
T74 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1870902138 May 30 01:24:08 PM PDT 24 May 30 01:24:10 PM PDT 24 7381321009 ps
T248 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.210605020 May 30 01:27:33 PM PDT 24 May 30 01:31:01 PM PDT 24 83507136755 ps
T385 /workspace/coverage/default/11.sysrst_ctrl_smoke.2279438480 May 30 01:24:47 PM PDT 24 May 30 01:24:50 PM PDT 24 2129715168 ps
T33 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2728456767 May 30 01:25:39 PM PDT 24 May 30 01:28:51 PM PDT 24 161469867755 ps
T236 /workspace/coverage/default/22.sysrst_ctrl_smoke.2523981368 May 30 01:25:39 PM PDT 24 May 30 01:25:43 PM PDT 24 2128418561 ps
T237 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1402711537 May 30 01:24:08 PM PDT 24 May 30 01:24:11 PM PDT 24 5762004711 ps
T238 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.631691013 May 30 01:26:24 PM PDT 24 May 30 01:26:27 PM PDT 24 2637549951 ps
T76 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.2457244855 May 30 01:26:17 PM PDT 24 May 30 01:28:05 PM PDT 24 40300484679 ps
T75 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2686634375 May 30 01:24:07 PM PDT 24 May 30 01:24:59 PM PDT 24 39163931286 ps
T35 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.44126007 May 30 01:27:16 PM PDT 24 May 30 01:27:36 PM PDT 24 41332235921 ps
T223 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.1854984321 May 30 01:24:11 PM PDT 24 May 30 01:24:18 PM PDT 24 2575805796 ps
T239 /workspace/coverage/default/18.sysrst_ctrl_alert_test.3815144628 May 30 01:25:23 PM PDT 24 May 30 01:25:27 PM PDT 24 2029409262 ps
T240 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.3210114112 May 30 01:26:53 PM PDT 24 May 30 01:27:02 PM PDT 24 2453566160 ps
T92 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.823836584 May 30 01:27:34 PM PDT 24 May 30 01:28:37 PM PDT 24 26083560384 ps
T257 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2187414599 May 30 01:25:46 PM PDT 24 May 30 01:25:51 PM PDT 24 2225779177 ps
T128 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2346737401 May 30 01:26:52 PM PDT 24 May 30 01:27:33 PM PDT 24 64558811053 ps
T30 /workspace/coverage/default/20.sysrst_ctrl_stress_all.958994408 May 30 01:25:43 PM PDT 24 May 30 01:27:18 PM PDT 24 144490617757 ps
T123 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.974360151 May 30 01:26:33 PM PDT 24 May 30 01:26:56 PM PDT 24 42641334311 ps
T386 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2811465334 May 30 01:26:36 PM PDT 24 May 30 01:26:42 PM PDT 24 2044814566 ps
T387 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.90368035 May 30 01:25:24 PM PDT 24 May 30 01:25:33 PM PDT 24 2509703238 ps
T129 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.243546382 May 30 01:26:04 PM PDT 24 May 30 01:26:14 PM PDT 24 3407796174 ps
T388 /workspace/coverage/default/29.sysrst_ctrl_smoke.3490686962 May 30 01:26:13 PM PDT 24 May 30 01:26:20 PM PDT 24 2109955372 ps
T307 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2315075616 May 30 01:24:55 PM PDT 24 May 30 01:25:03 PM PDT 24 2513554873 ps
T252 /workspace/coverage/default/43.sysrst_ctrl_stress_all.3352499041 May 30 01:27:08 PM PDT 24 May 30 01:29:49 PM PDT 24 114890463940 ps
T176 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.2020436567 May 30 01:25:09 PM PDT 24 May 30 01:25:16 PM PDT 24 4154105563 ps
T281 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.264325958 May 30 01:24:31 PM PDT 24 May 30 01:24:57 PM PDT 24 43152847733 ps
T84 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4252386703 May 30 01:27:22 PM PDT 24 May 30 01:27:25 PM PDT 24 3480834835 ps
T147 /workspace/coverage/default/4.sysrst_ctrl_smoke.80274755 May 30 01:24:28 PM PDT 24 May 30 01:24:31 PM PDT 24 2127137691 ps
T148 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3938312212 May 30 01:25:47 PM PDT 24 May 30 01:25:51 PM PDT 24 2520028632 ps
T149 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2202690675 May 30 01:26:26 PM PDT 24 May 30 01:26:28 PM PDT 24 2246685205 ps
T150 /workspace/coverage/default/38.sysrst_ctrl_alert_test.3380902950 May 30 01:26:59 PM PDT 24 May 30 01:27:05 PM PDT 24 2010676221 ps
T31 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2029887568 May 30 01:24:43 PM PDT 24 May 30 01:30:53 PM PDT 24 140058967138 ps
T151 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.4201622692 May 30 01:26:51 PM PDT 24 May 30 01:26:55 PM PDT 24 8358966479 ps
T152 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.1798869958 May 30 01:26:56 PM PDT 24 May 30 01:26:59 PM PDT 24 2625601763 ps
T153 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.291398568 May 30 01:24:50 PM PDT 24 May 30 01:26:29 PM PDT 24 161955942363 ps
T154 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.94793650 May 30 01:27:05 PM PDT 24 May 30 01:27:16 PM PDT 24 4770004757 ps
T77 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.590466563 May 30 01:27:20 PM PDT 24 May 30 01:31:54 PM PDT 24 105686456186 ps
T389 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.3170221049 May 30 01:25:49 PM PDT 24 May 30 01:25:57 PM PDT 24 2468224904 ps
T390 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.4219838216 May 30 01:27:23 PM PDT 24 May 30 01:27:31 PM PDT 24 2461563242 ps
T261 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1717397217 May 30 01:27:48 PM PDT 24 May 30 01:27:57 PM PDT 24 54375027370 ps
T391 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.88417591 May 30 01:27:22 PM PDT 24 May 30 01:27:28 PM PDT 24 3008393754 ps
T330 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1536325056 May 30 01:26:04 PM PDT 24 May 30 01:29:04 PM PDT 24 79541367403 ps
T282 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.2512375359 May 30 01:24:28 PM PDT 24 May 30 01:25:28 PM PDT 24 22012002782 ps
T392 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1315544505 May 30 01:24:30 PM PDT 24 May 30 01:24:34 PM PDT 24 2528637416 ps
T393 /workspace/coverage/default/41.sysrst_ctrl_smoke.248352561 May 30 01:26:55 PM PDT 24 May 30 01:27:02 PM PDT 24 2111502933 ps
T243 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.740056423 May 30 01:27:37 PM PDT 24 May 30 01:28:52 PM PDT 24 131910104470 ps
T197 /workspace/coverage/default/13.sysrst_ctrl_stress_all.874734696 May 30 01:24:57 PM PDT 24 May 30 01:28:30 PM PDT 24 171282702898 ps
T93 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3036832216 May 30 01:27:32 PM PDT 24 May 30 01:27:51 PM PDT 24 26351436403 ps
T394 /workspace/coverage/default/13.sysrst_ctrl_alert_test.3726364763 May 30 01:24:55 PM PDT 24 May 30 01:24:59 PM PDT 24 2014128924 ps
T158 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.536470148 May 30 01:26:02 PM PDT 24 May 30 01:26:05 PM PDT 24 2848742006 ps
T262 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2239316777 May 30 01:27:38 PM PDT 24 May 30 01:32:08 PM PDT 24 103312942975 ps
T159 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.1612683939 May 30 01:27:20 PM PDT 24 May 30 01:27:25 PM PDT 24 4197745026 ps
T94 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3659392934 May 30 01:24:56 PM PDT 24 May 30 01:25:30 PM PDT 24 60686083311 ps
T220 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.3789229278 May 30 01:25:51 PM PDT 24 May 30 01:25:54 PM PDT 24 2675095256 ps
T395 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1559744933 May 30 01:25:24 PM PDT 24 May 30 01:25:27 PM PDT 24 2470805113 ps
T95 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.1963559251 May 30 01:26:35 PM PDT 24 May 30 01:32:38 PM PDT 24 133664280997 ps
T267 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2906534719 May 30 01:24:07 PM PDT 24 May 30 01:24:10 PM PDT 24 2631245427 ps
T268 /workspace/coverage/default/16.sysrst_ctrl_alert_test.3330404061 May 30 01:25:23 PM PDT 24 May 30 01:25:26 PM PDT 24 2034486549 ps
T264 /workspace/coverage/default/21.sysrst_ctrl_stress_all.2403829122 May 30 01:25:43 PM PDT 24 May 30 01:32:16 PM PDT 24 140517718378 ps
T269 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.2366075391 May 30 01:26:20 PM PDT 24 May 30 01:26:23 PM PDT 24 2472576625 ps
T182 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.2031020456 May 30 01:25:59 PM PDT 24 May 30 01:26:05 PM PDT 24 3850009945 ps
T270 /workspace/coverage/default/24.sysrst_ctrl_alert_test.1585734852 May 30 01:25:59 PM PDT 24 May 30 01:26:02 PM PDT 24 2036301635 ps
T271 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.4250656261 May 30 01:24:28 PM PDT 24 May 30 01:24:33 PM PDT 24 2614806551 ps
T272 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3118749859 May 30 01:24:46 PM PDT 24 May 30 01:24:49 PM PDT 24 2632457220 ps
T273 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2592961412 May 30 01:26:57 PM PDT 24 May 30 01:27:04 PM PDT 24 2098935870 ps
T396 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1834409745 May 30 01:25:23 PM PDT 24 May 30 01:25:27 PM PDT 24 3583374493 ps
T397 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.778825934 May 30 01:24:45 PM PDT 24 May 30 01:24:50 PM PDT 24 4406294880 ps
T398 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.3859343013 May 30 01:25:52 PM PDT 24 May 30 01:25:54 PM PDT 24 2852385671 ps
T399 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.4019733726 May 30 01:24:51 PM PDT 24 May 30 01:24:58 PM PDT 24 2611812973 ps
T400 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2916076703 May 30 01:27:06 PM PDT 24 May 30 01:27:10 PM PDT 24 3617792844 ps
T263 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3826079922 May 30 01:24:55 PM PDT 24 May 30 01:26:15 PM PDT 24 98991942304 ps
T401 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.415345191 May 30 01:24:07 PM PDT 24 May 30 01:24:15 PM PDT 24 2451541692 ps
T402 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.1295490877 May 30 01:25:38 PM PDT 24 May 30 01:25:42 PM PDT 24 2637644181 ps
T403 /workspace/coverage/default/27.sysrst_ctrl_alert_test.2961358007 May 30 01:26:03 PM PDT 24 May 30 01:26:09 PM PDT 24 2014273607 ps
T308 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3490573738 May 30 01:27:21 PM PDT 24 May 30 01:27:25 PM PDT 24 2531309118 ps
T404 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3272357916 May 30 01:26:35 PM PDT 24 May 30 01:26:39 PM PDT 24 2495498916 ps
T405 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2874643882 May 30 01:26:35 PM PDT 24 May 30 01:26:38 PM PDT 24 3422709163 ps
T130 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.5349766 May 30 01:27:24 PM PDT 24 May 30 01:27:34 PM PDT 24 3092967777 ps
T96 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2050878932 May 30 01:26:26 PM PDT 24 May 30 01:30:06 PM PDT 24 82376930563 ps
T406 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3911752680 May 30 01:27:21 PM PDT 24 May 30 01:27:54 PM PDT 24 12703336680 ps
T124 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.394541119 May 30 01:27:16 PM PDT 24 May 30 01:27:21 PM PDT 24 6565939930 ps
T407 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2588439889 May 30 01:27:19 PM PDT 24 May 30 01:27:24 PM PDT 24 2616103375 ps
T408 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.127048518 May 30 01:26:35 PM PDT 24 May 30 01:26:40 PM PDT 24 2268058163 ps
T409 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.621101602 May 30 01:27:19 PM PDT 24 May 30 01:27:26 PM PDT 24 2907761922 ps
T410 /workspace/coverage/default/39.sysrst_ctrl_smoke.3134331996 May 30 01:26:54 PM PDT 24 May 30 01:26:59 PM PDT 24 2122897579 ps
T411 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.59219945 May 30 01:25:40 PM PDT 24 May 30 01:25:48 PM PDT 24 2612097414 ps
T359 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.144088898 May 30 01:25:50 PM PDT 24 May 30 01:32:40 PM PDT 24 167723054934 ps
T81 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3521287834 May 30 01:27:23 PM PDT 24 May 30 01:28:11 PM PDT 24 279781554373 ps
T183 /workspace/coverage/default/42.sysrst_ctrl_stress_all.2614138078 May 30 01:27:09 PM PDT 24 May 30 01:27:21 PM PDT 24 15979830749 ps
T184 /workspace/coverage/default/26.sysrst_ctrl_alert_test.4002687619 May 30 01:25:50 PM PDT 24 May 30 01:25:52 PM PDT 24 2051745326 ps
T185 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.4281759577 May 30 01:26:52 PM PDT 24 May 30 01:27:00 PM PDT 24 2514942110 ps
T186 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.650245549 May 30 01:26:51 PM PDT 24 May 30 01:28:10 PM PDT 24 136654910527 ps
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T187 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2331141201 May 30 01:26:32 PM PDT 24 May 30 01:26:39 PM PDT 24 2021320318 ps
T188 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2069565473 May 30 01:26:55 PM PDT 24 May 30 01:27:40 PM PDT 24 34903157696 ps
T189 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1166132406 May 30 01:24:45 PM PDT 24 May 30 01:26:25 PM PDT 24 39476266860 ps
T190 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1750969376 May 30 01:26:56 PM PDT 24 May 30 01:27:04 PM PDT 24 2515617336 ps
T251 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.3072827895 May 30 01:26:35 PM PDT 24 May 30 01:27:21 PM PDT 24 120373403690 ps
T412 /workspace/coverage/default/11.sysrst_ctrl_alert_test.3594908721 May 30 01:24:57 PM PDT 24 May 30 01:25:02 PM PDT 24 2018656193 ps
T413 /workspace/coverage/default/36.sysrst_ctrl_smoke.2605952485 May 30 01:26:34 PM PDT 24 May 30 01:26:37 PM PDT 24 2127922789 ps
T414 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1169619719 May 30 01:27:22 PM PDT 24 May 30 01:27:30 PM PDT 24 2211148299 ps
T415 /workspace/coverage/default/34.sysrst_ctrl_alert_test.2211469032 May 30 01:26:35 PM PDT 24 May 30 01:26:42 PM PDT 24 2010581496 ps
T416 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.3505929078 May 30 01:25:38 PM PDT 24 May 30 01:25:43 PM PDT 24 3648481064 ps
T417 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.4124469486 May 30 01:25:51 PM PDT 24 May 30 01:26:44 PM PDT 24 78135611741 ps
T418 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.3941883421 May 30 01:26:34 PM PDT 24 May 30 01:26:43 PM PDT 24 2455258166 ps
T419 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3084082740 May 30 01:27:10 PM PDT 24 May 30 01:33:07 PM PDT 24 300083704822 ps
T420 /workspace/coverage/default/36.sysrst_ctrl_alert_test.703149863 May 30 01:26:34 PM PDT 24 May 30 01:26:40 PM PDT 24 2010478229 ps
T421 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.1771230577 May 30 01:25:40 PM PDT 24 May 30 01:25:48 PM PDT 24 2129237009 ps
T85 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.679844630 May 30 01:25:38 PM PDT 24 May 30 01:25:49 PM PDT 24 11005482874 ps
T82 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1952867659 May 30 01:24:57 PM PDT 24 May 30 01:25:44 PM PDT 24 296736069443 ps
T422 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3978134943 May 30 01:27:22 PM PDT 24 May 30 01:37:12 PM PDT 24 213283315909 ps
T423 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3042501335 May 30 01:25:47 PM PDT 24 May 30 01:25:55 PM PDT 24 2612381240 ps
T349 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2090080168 May 30 01:27:35 PM PDT 24 May 30 01:30:13 PM PDT 24 59711562501 ps
T424 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.729536662 May 30 01:27:25 PM PDT 24 May 30 01:27:27 PM PDT 24 2682635774 ps
T425 /workspace/coverage/default/8.sysrst_ctrl_smoke.978414607 May 30 01:24:54 PM PDT 24 May 30 01:24:57 PM PDT 24 2127395005 ps
T426 /workspace/coverage/default/4.sysrst_ctrl_alert_test.128866737 May 30 01:24:33 PM PDT 24 May 30 01:24:35 PM PDT 24 2052502523 ps
T427 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.2032645639 May 30 01:25:49 PM PDT 24 May 30 01:25:56 PM PDT 24 3882736117 ps
T89 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.3502944209 May 30 01:26:03 PM PDT 24 May 30 01:26:10 PM PDT 24 5812575344 ps
T358 /workspace/coverage/default/5.sysrst_ctrl_stress_all.792669646 May 30 01:24:45 PM PDT 24 May 30 01:27:54 PM PDT 24 144028798883 ps
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T428 /workspace/coverage/default/3.sysrst_ctrl_smoke.1638522509 May 30 01:24:32 PM PDT 24 May 30 01:24:35 PM PDT 24 2132383407 ps
T221 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.609627442 May 30 01:25:26 PM PDT 24 May 30 01:25:33 PM PDT 24 4032738908 ps
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T429 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2229256687 May 30 01:24:45 PM PDT 24 May 30 01:49:52 PM PDT 24 563595110994 ps
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T212 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4174743721 May 30 01:27:22 PM PDT 24 May 30 01:27:28 PM PDT 24 2622786963 ps
T213 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1460782927 May 30 01:26:32 PM PDT 24 May 30 01:26:35 PM PDT 24 2473552235 ps
T214 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3818157340 May 30 01:27:40 PM PDT 24 May 30 01:32:24 PM PDT 24 118424705221 ps
T99 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1313002901 May 30 01:24:29 PM PDT 24 May 30 01:25:04 PM PDT 24 25584915949 ps
T215 /workspace/coverage/default/44.sysrst_ctrl_alert_test.1058962482 May 30 01:27:09 PM PDT 24 May 30 01:27:11 PM PDT 24 2046657587 ps
T216 /workspace/coverage/default/5.sysrst_ctrl_smoke.3608740366 May 30 01:24:32 PM PDT 24 May 30 01:24:35 PM PDT 24 2124191141 ps
T217 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.791815904 May 30 01:26:06 PM PDT 24 May 30 01:27:24 PM PDT 24 27580000517 ps
T218 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1153522153 May 30 01:27:23 PM PDT 24 May 30 01:27:28 PM PDT 24 2093470408 ps
T219 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1544800156 May 30 01:24:49 PM PDT 24 May 30 01:25:40 PM PDT 24 34303860536 ps
T86 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3499284226 May 30 01:26:34 PM PDT 24 May 30 01:26:38 PM PDT 24 6389046854 ps
T430 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.1777163428 May 30 01:25:35 PM PDT 24 May 30 01:25:38 PM PDT 24 2531419622 ps
T431 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2892727350 May 30 01:24:54 PM PDT 24 May 30 01:24:57 PM PDT 24 2532109297 ps
T332 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1994944065 May 30 01:25:37 PM PDT 24 May 30 01:26:46 PM PDT 24 96506203243 ps
T432 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3297831061 May 30 01:27:08 PM PDT 24 May 30 01:27:12 PM PDT 24 2628837479 ps
T131 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.32777762 May 30 01:26:55 PM PDT 24 May 30 01:26:58 PM PDT 24 6520683783 ps
T191 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.3559832531 May 30 01:24:29 PM PDT 24 May 30 01:25:57 PM PDT 24 37746409991 ps
T433 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.874090435 May 30 01:25:54 PM PDT 24 May 30 01:25:57 PM PDT 24 3056919634 ps
T336 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.3024971760 May 30 01:25:09 PM PDT 24 May 30 01:34:38 PM PDT 24 213659234538 ps
T434 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.4117309008 May 30 01:25:36 PM PDT 24 May 30 01:25:40 PM PDT 24 2154810566 ps
T435 /workspace/coverage/default/12.sysrst_ctrl_smoke.2167322315 May 30 01:24:57 PM PDT 24 May 30 01:25:02 PM PDT 24 2115725383 ps
T436 /workspace/coverage/default/28.sysrst_ctrl_smoke.4092076393 May 30 01:26:01 PM PDT 24 May 30 01:26:08 PM PDT 24 2111849376 ps
T437 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1012981153 May 30 01:24:47 PM PDT 24 May 30 01:24:51 PM PDT 24 2101257674 ps
T361 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.2959056365 May 30 01:26:59 PM PDT 24 May 30 01:29:44 PM PDT 24 106514471560 ps
T438 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.4187770978 May 30 01:27:21 PM PDT 24 May 30 01:27:32 PM PDT 24 3084383139 ps
T439 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3686900255 May 30 01:25:23 PM PDT 24 May 30 01:25:31 PM PDT 24 2226333081 ps
T253 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.1947425635 May 30 01:24:28 PM PDT 24 May 30 01:29:17 PM PDT 24 115033216870 ps
T374 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.103282880 May 30 01:24:44 PM PDT 24 May 30 01:27:01 PM PDT 24 566799759070 ps
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