Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.17 99.40 96.81 100.00 98.08 98.85 99.71 94.33


Total tests in report: 911
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
55.80 55.80 77.98 77.98 65.19 65.19 62.79 62.79 11.54 11.54 79.15 79.15 62.43 62.43 31.51 31.51 /workspace/coverage/default/0.sysrst_ctrl_stress_all.3302927599
77.62 21.82 96.25 18.27 88.68 23.48 66.44 3.65 71.79 60.26 95.86 16.71 89.02 26.59 35.31 3.80 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2354813605
83.51 5.89 97.16 0.91 90.52 1.85 93.84 27.40 78.21 6.41 96.64 0.78 91.52 2.50 36.68 1.37 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3818642348
85.90 2.40 97.52 0.35 91.78 1.26 95.21 1.37 80.13 1.92 96.97 0.33 92.97 1.45 46.76 10.08 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.209104394
88.13 2.23 97.56 0.04 91.86 0.08 95.21 0.00 80.77 0.64 97.01 0.04 93.74 0.77 60.79 14.03 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2355893688
89.62 1.49 98.12 0.56 91.96 0.10 95.21 0.00 89.74 8.97 97.52 0.52 94.03 0.29 60.79 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.526621456
90.88 1.25 98.19 0.07 93.07 1.11 95.89 0.68 89.74 0.00 97.63 0.11 94.12 0.10 67.48 6.69 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.1862154356
92.09 1.22 98.23 0.04 93.58 0.51 97.95 2.05 89.74 0.00 97.63 0.00 96.05 1.93 71.48 4.00 /workspace/coverage/default/18.sysrst_ctrl_stress_all.4055815263
92.81 0.71 98.28 0.06 93.86 0.28 97.95 0.00 89.74 0.00 97.74 0.11 96.44 0.39 75.63 4.15 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2794626301
93.28 0.47 98.40 0.11 94.29 0.43 97.95 0.00 90.38 0.64 97.82 0.07 96.92 0.48 77.20 1.57 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.320808113
93.73 0.45 98.40 0.00 94.29 0.00 97.95 0.00 90.38 0.00 97.82 0.00 96.92 0.00 80.34 3.14 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.853650864
94.16 0.44 98.51 0.11 94.44 0.15 97.95 0.00 90.38 0.00 97.82 0.00 96.92 0.00 83.13 2.79 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.109406418
94.56 0.40 98.62 0.11 94.62 0.18 97.95 0.00 92.31 1.92 97.93 0.11 97.40 0.48 83.13 0.00 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.352244021
94.84 0.28 98.64 0.02 94.87 0.25 97.95 0.00 92.31 0.00 97.93 0.00 97.40 0.00 84.80 1.67 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.992066359
95.08 0.24 98.69 0.06 94.94 0.08 99.32 1.37 92.31 0.00 97.93 0.00 97.40 0.00 85.01 0.20 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2105291927
95.30 0.22 98.75 0.06 95.07 0.13 99.32 0.00 92.31 0.00 98.00 0.07 97.40 0.00 86.27 1.27 /workspace/coverage/default/2.sysrst_ctrl_stress_all.2630166864
95.49 0.18 98.79 0.04 95.10 0.03 99.32 0.00 92.95 0.64 98.04 0.04 97.50 0.10 86.73 0.46 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.584232186
95.64 0.15 98.86 0.07 95.15 0.05 99.32 0.00 93.59 0.64 98.15 0.11 97.59 0.10 86.83 0.10 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.616518423
95.79 0.14 98.86 0.00 95.85 0.71 99.32 0.00 93.59 0.00 98.15 0.00 97.59 0.00 87.13 0.30 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.1724015667
95.93 0.14 98.86 0.00 95.85 0.00 99.32 0.00 93.59 0.00 98.15 0.00 98.17 0.58 87.54 0.41 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4119218662
96.06 0.13 98.92 0.06 95.90 0.05 99.32 0.00 94.23 0.64 98.23 0.07 98.27 0.10 87.54 0.00 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3779199481
96.19 0.13 98.97 0.06 95.90 0.00 99.32 0.00 94.23 0.00 98.23 0.00 98.27 0.00 88.40 0.86 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3405818916
96.32 0.13 99.03 0.06 95.93 0.03 99.32 0.00 94.87 0.64 98.30 0.07 98.36 0.10 88.40 0.00 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.1870465725
96.44 0.12 99.03 0.00 95.93 0.00 99.32 0.00 94.87 0.00 98.30 0.00 98.36 0.00 89.26 0.86 /workspace/coverage/default/20.sysrst_ctrl_stress_all.3436541729
96.56 0.12 99.07 0.04 95.96 0.03 99.32 0.00 95.51 0.64 98.34 0.04 98.46 0.10 89.26 0.00 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.625210303
96.68 0.12 99.10 0.04 95.98 0.03 99.32 0.00 96.15 0.64 98.37 0.04 98.55 0.10 89.26 0.00 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.1977339247
96.80 0.12 99.14 0.04 96.01 0.03 99.32 0.00 96.79 0.64 98.41 0.04 98.65 0.10 89.26 0.00 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.3906863524
96.92 0.12 99.18 0.04 96.03 0.03 99.32 0.00 97.44 0.64 98.45 0.04 98.75 0.10 89.26 0.00 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.2035339704
97.04 0.12 99.22 0.04 96.06 0.03 99.32 0.00 98.08 0.64 98.48 0.04 98.84 0.10 89.26 0.00 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.2528560632
97.15 0.12 99.22 0.00 96.16 0.10 99.32 0.00 98.08 0.00 98.48 0.00 99.42 0.58 89.41 0.15 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.2546257522
97.26 0.11 99.22 0.00 96.16 0.00 99.32 0.00 98.08 0.00 98.48 0.00 99.42 0.00 90.17 0.76 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2633680503
97.36 0.10 99.22 0.00 96.18 0.03 99.77 0.46 98.08 0.00 98.48 0.00 99.52 0.10 90.27 0.10 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.752991194
97.45 0.09 99.22 0.00 96.23 0.05 100.00 0.23 98.08 0.00 98.52 0.04 99.52 0.00 90.58 0.30 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.916271936
97.52 0.08 99.23 0.02 96.23 0.00 100.00 0.00 98.08 0.00 98.52 0.00 99.52 0.00 91.08 0.51 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3684706972
97.59 0.07 99.27 0.04 96.39 0.15 100.00 0.00 98.08 0.00 98.60 0.07 99.71 0.19 91.08 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1555146462
97.65 0.06 99.27 0.00 96.39 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.71 0.00 91.49 0.41 /workspace/coverage/default/13.sysrst_ctrl_stress_all.3494402719
97.70 0.05 99.27 0.00 96.39 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.71 0.00 91.84 0.35 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.4255634648
97.74 0.05 99.27 0.00 96.71 0.33 100.00 0.00 98.08 0.00 98.60 0.00 99.71 0.00 91.84 0.00 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3656243024
97.78 0.04 99.27 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.71 0.00 92.10 0.25 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1260821987
97.81 0.03 99.27 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.71 0.00 92.30 0.20 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.416043330
97.84 0.03 99.27 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.71 0.00 92.50 0.20 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2386591182
97.87 0.03 99.27 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.71 0.00 92.71 0.20 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1113483022
97.90 0.03 99.27 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.71 0.00 92.91 0.20 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3532026560
97.92 0.02 99.31 0.04 96.71 0.00 100.00 0.00 98.08 0.00 98.67 0.07 99.71 0.00 92.96 0.05 /workspace/coverage/default/29.sysrst_ctrl_stress_all.494911705
97.94 0.02 99.31 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.67 0.00 99.71 0.00 93.11 0.15 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.719882447
97.96 0.02 99.31 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.67 0.00 99.71 0.00 93.26 0.15 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1000422063
97.98 0.02 99.31 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.67 0.00 99.71 0.00 93.41 0.15 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.249193275
98.00 0.02 99.35 0.04 96.71 0.00 100.00 0.00 98.08 0.00 98.74 0.07 99.71 0.00 93.41 0.00 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.2888781952
98.02 0.02 99.37 0.02 96.71 0.00 100.00 0.00 98.08 0.00 98.78 0.04 99.71 0.00 93.47 0.05 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3166011880
98.03 0.01 99.37 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 93.57 0.10 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2291924006
98.05 0.01 99.37 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 93.67 0.10 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.450513972
98.06 0.01 99.37 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.78 0.00 99.71 0.00 93.77 0.10 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3301700540
98.07 0.01 99.38 0.02 96.71 0.00 100.00 0.00 98.08 0.00 98.82 0.04 99.71 0.00 93.77 0.00 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.727468616
98.08 0.01 99.40 0.02 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.04 99.71 0.00 93.77 0.00 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.179364210
98.08 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 93.82 0.05 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.558159747
98.09 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 93.87 0.05 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.3356703808
98.10 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 93.92 0.05 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1982718444
98.10 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 93.97 0.05 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3606115510
98.11 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.02 0.05 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1829226598
98.12 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.07 0.05 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.3524968970
98.13 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.12 0.05 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3829509254
98.13 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.17 0.05 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2150554315
98.14 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.22 0.05 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.372613010
98.15 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.28 0.05 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2807922419
98.15 0.01 99.40 0.00 96.71 0.00 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.33 0.05 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.238509176
98.16 0.01 99.40 0.00 96.74 0.03 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.33 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.90409315
98.16 0.01 99.40 0.00 96.76 0.03 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.33 0.00 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2947427304
98.17 0.01 99.40 0.00 96.79 0.03 100.00 0.00 98.08 0.00 98.85 0.00 99.71 0.00 94.33 0.00 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2110074132

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2755655578
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1209457041
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.524343361
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1712361264
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.2383680389
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3682941076
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1937904963
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3505850033
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3789543381
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1715571806
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.555972022
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3683782705
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3266613720
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1872051563
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.4153558131
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2435951407
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1330283350
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2159452458
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1355631544
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.194574157
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2723280617
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.508830869
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.652443072
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3012644804
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.414019787
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.662092123
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1614557801
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1355751553
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1249110741
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.4011904941
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3448976652
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2836084437
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.274285884
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1614836980
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3443378853
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3293186973
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1413494722
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1753726132
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3937989266
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2324316250
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3925057939
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2300594812
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.598056502
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2496852494
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2965659173
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3198190780
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.419747643
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.4105896720
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2926252692
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.322709345
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3122492105
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3382980208
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2872928991
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.1518486127
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3671487260
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.3500436057
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3062331420
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1623267770
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.4286650723
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.173517226
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.571097496
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.1120439144
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1396588716
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.3297796815
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.134077288
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2206437643
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.3895908285
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.2894474976
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.2093412
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.1367416212
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.2386881876
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.2191942846
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1662673828
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2407924374
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.2226487045
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.2196225445
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2108834987
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1606550178
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.841410525
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.2848527408
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.2704574062
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/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1413745921
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1550914494
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3439293306
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1547939889
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1154961790
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.529097996
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.818865087
/workspace/coverage/default/42.sysrst_ctrl_smoke.2819870577
/workspace/coverage/default/42.sysrst_ctrl_stress_all.3208081300
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3807244889
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.171609844
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3957371508
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1736494130
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3041324657
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1753289908
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.4271326531
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1437280749
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1566859180
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2976400372
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3037940752
/workspace/coverage/default/43.sysrst_ctrl_smoke.2519743024
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1841020994
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.146608583
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3982403513
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.10621561
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.802228806
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3376824625
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1708081617
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.195641065
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.730987299
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2920040388
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1070635977
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2611157353
/workspace/coverage/default/44.sysrst_ctrl_smoke.2692878189
/workspace/coverage/default/44.sysrst_ctrl_stress_all.4151412191
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1004266942
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3745249286
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1938038844
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2037379391
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1371152077
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1605863135
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4124566440
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.4153992095
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.667227583
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3755058183
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.815931318
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1075745716
/workspace/coverage/default/45.sysrst_ctrl_smoke.1016533849
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3695787921
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1228586747
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3792121050
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1574810616
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2900340195
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3758081879
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.363353821
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1628988760
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1562866424
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3972009611
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3745449064
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1827974815
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3777597885
/workspace/coverage/default/46.sysrst_ctrl_smoke.2713496411
/workspace/coverage/default/46.sysrst_ctrl_stress_all.622914545
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1614103354
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1976661322
/workspace/coverage/default/47.sysrst_ctrl_alert_test.4248604483
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1641225973
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2043642552
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2399829805
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1869125819
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3893458171
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.496423627
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3776505295
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2213291427
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.617463299
/workspace/coverage/default/47.sysrst_ctrl_smoke.3884335041
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2381571945
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3935155781
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1536968835
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2976564251
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.929721493
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1065993748
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1619794625
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3457238235
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1918553993
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3947619283
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2043106411
/workspace/coverage/default/48.sysrst_ctrl_smoke.123615052
/workspace/coverage/default/48.sysrst_ctrl_stress_all.308863331
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2828958301
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4177142445
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2064494206
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1950660497
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1098377443
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1057536682
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2281954939
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4234443425
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3154202754
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.83922807
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3140474597
/workspace/coverage/default/49.sysrst_ctrl_smoke.2723601816
/workspace/coverage/default/49.sysrst_ctrl_stress_all.283662016
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.86952854
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.118593868
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1187879868
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1735313557
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.539015595
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3749269032
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2993002302
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1974345053
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.386688153
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1690746939
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3577483788
/workspace/coverage/default/5.sysrst_ctrl_smoke.788650467
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3108768061
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3883078436
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3962760104
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3989685373
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1530590512
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3827784460
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.515498426
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3698988733
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.4078471501
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3564429684
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3236827552
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1025638511
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3434812160
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.4041625318
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.574781959
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2891046563
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.582265659
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2262511640
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.300771370
/workspace/coverage/default/6.sysrst_ctrl_smoke.1572648287
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1300779296
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2695021923
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1943665299
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1726414756
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2205698894
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3541534446
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2590431555
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2161446259
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3940262220
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.332409904
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.693567928
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2068326398
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.161927975
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2922778396
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3219074939
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2010816021
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3496508614
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1623161566
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3772253960
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2092235874
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.534671166
/workspace/coverage/default/7.sysrst_ctrl_smoke.3788169781
/workspace/coverage/default/7.sysrst_ctrl_stress_all.680343684
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2620213648
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.4261984910
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4166328886
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2559194225
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2166488909
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2605823866
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1052706387
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1297280685
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1531382083
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3771863219
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.4099892311
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.4131483103
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3123596716
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1085100901
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1541155963
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2498548171
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2929288659
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2898988469
/workspace/coverage/default/8.sysrst_ctrl_smoke.1425078903
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3150590729
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.562658165
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4108037952
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1674421425
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1181633819
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3967427995
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1182073890
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2508896990
/workspace/coverage/default/9.sysrst_ctrl_alert_test.397505450
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.982345787
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1507152447
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3946748719
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2704942759
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2373512823
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3038142114
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.4235694894
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3026985796
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1106617647
/workspace/coverage/default/9.sysrst_ctrl_smoke.634521461
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1808071012
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2541463301
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4241021395
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2281922501
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2298132427
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.252199272
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2678313260
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2697440260
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2507711459



Total test records in report: 911
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T6 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3989685373 Jun 09 01:40:36 PM PDT 24 Jun 09 01:41:41 PM PDT 24 27084357791 ps
T7 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2508896990 Jun 09 01:40:40 PM PDT 24 Jun 09 01:42:42 PM PDT 24 46403221742 ps
T8 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1889017418 Jun 09 01:38:26 PM PDT 24 Jun 09 01:38:29 PM PDT 24 3480003525 ps
T19 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.524646618 Jun 09 01:39:22 PM PDT 24 Jun 09 01:39:25 PM PDT 24 3598416956 ps
T20 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.648666421 Jun 09 01:39:48 PM PDT 24 Jun 09 01:39:51 PM PDT 24 2629719109 ps
T21 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.916271936 Jun 09 01:38:16 PM PDT 24 Jun 09 01:38:18 PM PDT 24 3406807974 ps
T1 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1726414756 Jun 09 01:40:35 PM PDT 24 Jun 09 01:44:50 PM PDT 24 90637655425 ps
T2 /workspace/coverage/default/0.sysrst_ctrl_stress_all.3302927599 Jun 09 01:37:30 PM PDT 24 Jun 09 01:44:07 PM PDT 24 177985362126 ps
T14 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.845198281 Jun 09 01:39:50 PM PDT 24 Jun 09 01:39:57 PM PDT 24 4375811500 ps
T15 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.4288804943 Jun 09 01:38:56 PM PDT 24 Jun 09 01:39:03 PM PDT 24 2472372798 ps
T3 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.3051331028 Jun 09 01:38:03 PM PDT 24 Jun 09 01:38:06 PM PDT 24 2517180449 ps
T16 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3787665759 Jun 09 01:40:05 PM PDT 24 Jun 09 01:40:08 PM PDT 24 2526427762 ps
T4 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3818642348 Jun 09 01:37:44 PM PDT 24 Jun 09 01:37:47 PM PDT 24 9103114776 ps
T9 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3940262220 Jun 09 01:40:33 PM PDT 24 Jun 09 01:41:58 PM PDT 24 113434634124 ps
T17 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2537800012 Jun 09 01:40:00 PM PDT 24 Jun 09 01:40:03 PM PDT 24 2473551090 ps
T18 /workspace/coverage/default/41.sysrst_ctrl_smoke.3223727283 Jun 09 01:39:57 PM PDT 24 Jun 09 01:39:59 PM PDT 24 2158203407 ps
T5 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.2937594331 Jun 09 01:39:09 PM PDT 24 Jun 09 01:39:12 PM PDT 24 3389555108 ps
T55 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3140474597 Jun 09 01:40:29 PM PDT 24 Jun 09 01:40:37 PM PDT 24 2509595230 ps
T56 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.1599812291 Jun 09 01:39:42 PM PDT 24 Jun 09 01:39:49 PM PDT 24 2213317749 ps
T10 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.2826743533 Jun 09 01:38:22 PM PDT 24 Jun 09 01:39:52 PM PDT 24 70621981162 ps
T57 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.970065088 Jun 09 01:39:26 PM PDT 24 Jun 09 01:39:28 PM PDT 24 2541877079 ps
T63 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.4202977824 Jun 09 01:39:19 PM PDT 24 Jun 09 01:39:21 PM PDT 24 2464384508 ps
T11 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2354813605 Jun 09 01:37:27 PM PDT 24 Jun 09 01:38:56 PM PDT 24 35292217831 ps
T48 /workspace/coverage/default/4.sysrst_ctrl_stress_all.1210253849 Jun 09 01:37:43 PM PDT 24 Jun 09 01:39:12 PM PDT 24 35801296146 ps
T86 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2105291927 Jun 09 01:38:10 PM PDT 24 Jun 09 01:38:17 PM PDT 24 2011936724 ps
T12 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.3135453743 Jun 09 01:39:16 PM PDT 24 Jun 09 01:39:18 PM PDT 24 4710676485 ps
T68 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.39761861 Jun 09 01:39:08 PM PDT 24 Jun 09 01:39:11 PM PDT 24 2524476016 ps
T13 /workspace/coverage/default/18.sysrst_ctrl_stress_all.4055815263 Jun 09 01:38:37 PM PDT 24 Jun 09 01:42:44 PM PDT 24 97570340872 ps
T49 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.1057915891 Jun 09 01:39:11 PM PDT 24 Jun 09 01:39:12 PM PDT 24 3325881639 ps
T64 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2268447245 Jun 09 01:38:06 PM PDT 24 Jun 09 01:38:11 PM PDT 24 2461906826 ps
T65 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.1807916703 Jun 09 01:39:08 PM PDT 24 Jun 09 01:39:15 PM PDT 24 2477173916 ps
T66 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3772253960 Jun 09 01:37:56 PM PDT 24 Jun 09 01:37:58 PM PDT 24 2478355592 ps
T50 /workspace/coverage/default/2.sysrst_ctrl_stress_all.2630166864 Jun 09 01:37:33 PM PDT 24 Jun 09 01:43:45 PM PDT 24 143308295446 ps
T45 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.4010064460 Jun 09 01:38:54 PM PDT 24 Jun 09 01:39:04 PM PDT 24 3826427694 ps
T33 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.1897252294 Jun 09 01:38:56 PM PDT 24 Jun 09 01:39:24 PM PDT 24 41674046625 ps
T69 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4234443425 Jun 09 01:40:28 PM PDT 24 Jun 09 01:40:31 PM PDT 24 2624366682 ps
T206 /workspace/coverage/default/4.sysrst_ctrl_alert_test.3058451642 Jun 09 01:37:44 PM PDT 24 Jun 09 01:37:47 PM PDT 24 2020287489 ps
T51 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3093230117 Jun 09 01:39:28 PM PDT 24 Jun 09 01:39:36 PM PDT 24 3279217464 ps
T70 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3479637317 Jun 09 01:37:25 PM PDT 24 Jun 09 01:37:33 PM PDT 24 2607087850 ps
T71 /workspace/coverage/default/33.sysrst_ctrl_stress_all.2898201728 Jun 09 01:39:34 PM PDT 24 Jun 09 01:39:52 PM PDT 24 13296622074 ps
T35 /workspace/coverage/default/23.sysrst_ctrl_stress_all.3960712923 Jun 09 01:38:57 PM PDT 24 Jun 09 01:44:19 PM PDT 24 117570318705 ps
T207 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2262511640 Jun 09 01:37:47 PM PDT 24 Jun 09 01:37:53 PM PDT 24 2052846575 ps
T36 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1260821987 Jun 09 01:38:21 PM PDT 24 Jun 09 01:38:55 PM PDT 24 57636602817 ps
T291 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2976400372 Jun 09 01:40:08 PM PDT 24 Jun 09 01:40:11 PM PDT 24 2266809097 ps
T67 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2360158809 Jun 09 01:38:50 PM PDT 24 Jun 09 01:38:58 PM PDT 24 2470659295 ps
T38 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.209104394 Jun 09 01:37:43 PM PDT 24 Jun 09 01:40:59 PM PDT 24 84906542206 ps
T198 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3745579902 Jun 09 01:39:20 PM PDT 24 Jun 09 01:39:28 PM PDT 24 2513095807 ps
T52 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.4280792420 Jun 09 01:37:44 PM PDT 24 Jun 09 01:37:54 PM PDT 24 3282001979 ps
T199 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2144301532 Jun 09 01:38:37 PM PDT 24 Jun 09 01:38:44 PM PDT 24 2615519305 ps
T200 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2620301733 Jun 09 01:39:37 PM PDT 24 Jun 09 01:39:40 PM PDT 24 2615565654 ps
T41 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3403173401 Jun 09 01:39:59 PM PDT 24 Jun 09 01:41:15 PM PDT 24 58466269986 ps
T201 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.1838432825 Jun 09 01:38:15 PM PDT 24 Jun 09 01:38:20 PM PDT 24 2617072203 ps
T53 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1950660497 Jun 09 01:40:29 PM PDT 24 Jun 09 01:49:05 PM PDT 24 194867573944 ps
T202 /workspace/coverage/default/44.sysrst_ctrl_alert_test.3982403513 Jun 09 01:40:15 PM PDT 24 Jun 09 01:40:20 PM PDT 24 2010369016 ps
T34 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3405818916 Jun 09 01:40:44 PM PDT 24 Jun 09 01:44:21 PM PDT 24 82396889955 ps
T423 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1869125819 Jun 09 01:40:24 PM PDT 24 Jun 09 01:40:28 PM PDT 24 2654246310 ps
T110 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.243996607 Jun 09 01:39:56 PM PDT 24 Jun 09 01:40:06 PM PDT 24 3618911463 ps
T424 /workspace/coverage/default/28.sysrst_ctrl_smoke.3649294506 Jun 09 01:39:17 PM PDT 24 Jun 09 01:39:19 PM PDT 24 2144479791 ps
T31 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.23997881 Jun 09 01:39:32 PM PDT 24 Jun 09 01:39:39 PM PDT 24 5256462147 ps
T425 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1708081617 Jun 09 01:40:13 PM PDT 24 Jun 09 01:40:17 PM PDT 24 4646514228 ps
T58 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.416043330 Jun 09 01:38:32 PM PDT 24 Jun 09 01:39:10 PM PDT 24 28193708999 ps
T426 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3038142114 Jun 09 01:37:58 PM PDT 24 Jun 09 01:38:01 PM PDT 24 2652619327 ps
T421 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.324452604 Jun 09 01:38:26 PM PDT 24 Jun 09 01:38:34 PM PDT 24 2511783345 ps
T427 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1672185265 Jun 09 01:38:36 PM PDT 24 Jun 09 01:38:42 PM PDT 24 2022862539 ps
T428 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.687287235 Jun 09 01:37:38 PM PDT 24 Jun 09 01:37:46 PM PDT 24 2612263008 ps
T429 /workspace/coverage/default/14.sysrst_ctrl_smoke.2790053928 Jun 09 01:38:24 PM PDT 24 Jun 09 01:38:29 PM PDT 24 2113725656 ps
T25 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2828958301 Jun 09 01:40:29 PM PDT 24 Jun 09 01:40:45 PM PDT 24 21922440742 ps
T430 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.1668894149 Jun 09 01:38:48 PM PDT 24 Jun 09 01:38:56 PM PDT 24 2607353088 ps
T431 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3416527693 Jun 09 01:39:58 PM PDT 24 Jun 09 01:40:05 PM PDT 24 2671279557 ps
T318 /workspace/coverage/default/21.sysrst_ctrl_alert_test.4005053344 Jun 09 01:38:47 PM PDT 24 Jun 09 01:38:50 PM PDT 24 2018848713 ps
T432 /workspace/coverage/default/39.sysrst_ctrl_smoke.4248676372 Jun 09 01:39:54 PM PDT 24 Jun 09 01:40:00 PM PDT 24 2109454870 ps
T115 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1579041615 Jun 09 01:38:30 PM PDT 24 Jun 09 01:38:35 PM PDT 24 3335577219 ps
T32 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2620213648 Jun 09 01:37:56 PM PDT 24 Jun 09 01:39:54 PM PDT 24 48770963244 ps
T333 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.523090877 Jun 09 01:37:28 PM PDT 24 Jun 09 01:37:30 PM PDT 24 2121660425 ps
T334 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3037940752 Jun 09 01:40:08 PM PDT 24 Jun 09 01:40:13 PM PDT 24 2520968114 ps
T59 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2231154708 Jun 09 01:39:54 PM PDT 24 Jun 09 01:39:59 PM PDT 24 4606221564 ps
T37 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1000422063 Jun 09 01:38:10 PM PDT 24 Jun 09 01:39:10 PM PDT 24 93731907879 ps
T335 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1506988546 Jun 09 01:37:43 PM PDT 24 Jun 09 01:37:58 PM PDT 24 4858041950 ps
T336 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1628988760 Jun 09 01:40:23 PM PDT 24 Jun 09 01:40:30 PM PDT 24 4209155524 ps
T60 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.171609844 Jun 09 01:40:11 PM PDT 24 Jun 09 01:40:16 PM PDT 24 4823840700 ps
T39 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.625210303 Jun 09 01:38:26 PM PDT 24 Jun 09 01:38:34 PM PDT 24 3670561354 ps
T131 /workspace/coverage/default/6.sysrst_ctrl_alert_test.3564429684 Jun 09 01:37:48 PM PDT 24 Jun 09 01:37:51 PM PDT 24 2037551446 ps
T132 /workspace/coverage/default/21.sysrst_ctrl_smoke.1635597347 Jun 09 01:38:54 PM PDT 24 Jun 09 01:39:00 PM PDT 24 2111770411 ps
T47 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.1562866424 Jun 09 01:40:19 PM PDT 24 Jun 09 01:40:26 PM PDT 24 2897073577 ps
T42 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.245830423 Jun 09 01:38:16 PM PDT 24 Jun 09 01:38:18 PM PDT 24 3600352629 ps
T133 /workspace/coverage/default/36.sysrst_ctrl_stress_all.1054384866 Jun 09 01:39:45 PM PDT 24 Jun 09 01:39:54 PM PDT 24 11228273710 ps
T134 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2316449236 Jun 09 01:39:16 PM PDT 24 Jun 09 01:39:18 PM PDT 24 2824216459 ps
T135 /workspace/coverage/default/40.sysrst_ctrl_alert_test.2246559904 Jun 09 01:39:58 PM PDT 24 Jun 09 01:40:05 PM PDT 24 2013043877 ps
T61 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3792121050 Jun 09 01:40:19 PM PDT 24 Jun 09 01:40:22 PM PDT 24 6927718047 ps
T139 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.2726152471 Jun 09 01:39:43 PM PDT 24 Jun 09 01:40:41 PM PDT 24 98015822154 ps
T433 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2873559248 Jun 09 01:38:40 PM PDT 24 Jun 09 01:38:47 PM PDT 24 2739322429 ps
T54 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.109406418 Jun 09 01:37:25 PM PDT 24 Jun 09 01:43:19 PM PDT 24 137559655174 ps
T279 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.2289030208 Jun 09 01:38:53 PM PDT 24 Jun 09 01:47:04 PM PDT 24 189710389474 ps
T422 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.383361004 Jun 09 01:38:10 PM PDT 24 Jun 09 01:38:14 PM PDT 24 2522411778 ps
T434 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2898988469 Jun 09 01:37:54 PM PDT 24 Jun 09 01:37:57 PM PDT 24 2528019508 ps
T435 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.398638873 Jun 09 01:38:58 PM PDT 24 Jun 09 01:39:06 PM PDT 24 2608793352 ps
T436 /workspace/coverage/default/24.sysrst_ctrl_smoke.3738663760 Jun 09 01:38:58 PM PDT 24 Jun 09 01:39:02 PM PDT 24 2118463180 ps
T437 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.2162373729 Jun 09 01:38:17 PM PDT 24 Jun 09 01:38:23 PM PDT 24 2176683413 ps
T330 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.982345787 Jun 09 01:38:05 PM PDT 24 Jun 09 01:38:07 PM PDT 24 3015700649 ps
T293 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.34392196 Jun 09 01:39:23 PM PDT 24 Jun 09 01:40:26 PM PDT 24 99935344839 ps
T340 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2122864643 Jun 09 01:39:06 PM PDT 24 Jun 09 01:39:13 PM PDT 24 2511030217 ps
T62 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.2168882514 Jun 09 01:39:12 PM PDT 24 Jun 09 01:39:16 PM PDT 24 4893893391 ps
T123 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.2025557678 Jun 09 01:39:34 PM PDT 24 Jun 09 01:39:42 PM PDT 24 2509578924 ps
T124 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3966259353 Jun 09 01:39:22 PM PDT 24 Jun 09 01:39:34 PM PDT 24 4396582309 ps
T40 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.320808113 Jun 09 01:38:21 PM PDT 24 Jun 09 01:39:24 PM PDT 24 93646965787 ps
T72 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2507711459 Jun 09 01:40:45 PM PDT 24 Jun 09 01:40:59 PM PDT 24 25365440687 ps
T102 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2753794882 Jun 09 01:39:44 PM PDT 24 Jun 09 01:40:10 PM PDT 24 39333517336 ps
T103 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.595639049 Jun 09 01:39:42 PM PDT 24 Jun 09 01:39:45 PM PDT 24 5493860977 ps
T104 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.3030159179 Jun 09 01:39:41 PM PDT 24 Jun 09 01:39:51 PM PDT 24 3775374706 ps
T105 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3776505295 Jun 09 01:40:23 PM PDT 24 Jun 09 01:40:26 PM PDT 24 2479990728 ps
T106 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2356687749 Jun 09 01:40:03 PM PDT 24 Jun 09 01:40:09 PM PDT 24 3486461886 ps
T107 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.582321330 Jun 09 01:38:24 PM PDT 24 Jun 09 01:38:26 PM PDT 24 2093870130 ps
T108 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3301700540 Jun 09 01:40:38 PM PDT 24 Jun 09 01:46:27 PM PDT 24 128180338089 ps
T109 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4124566440 Jun 09 01:40:20 PM PDT 24 Jun 09 01:40:21 PM PDT 24 3322871924 ps
T438 /workspace/coverage/default/16.sysrst_ctrl_alert_test.3045464740 Jun 09 01:38:30 PM PDT 24 Jun 09 01:38:37 PM PDT 24 2010772067 ps
T287 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.1507152447 Jun 09 01:38:04 PM PDT 24 Jun 09 01:38:37 PM PDT 24 174141883035 ps
T329 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1004266942 Jun 09 01:40:15 PM PDT 24 Jun 09 01:40:57 PM PDT 24 16031939015 ps
T439 /workspace/coverage/default/19.sysrst_ctrl_stress_all.15133436 Jun 09 01:38:40 PM PDT 24 Jun 09 01:39:02 PM PDT 24 8225345227 ps
T440 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3672325833 Jun 09 01:39:23 PM PDT 24 Jun 09 01:39:29 PM PDT 24 2144692759 ps
T441 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.815931318 Jun 09 01:40:17 PM PDT 24 Jun 09 01:40:24 PM PDT 24 2097271564 ps
T442 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3577483788 Jun 09 01:37:47 PM PDT 24 Jun 09 01:37:54 PM PDT 24 2510217647 ps
T443 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.3061127157 Jun 09 01:39:18 PM PDT 24 Jun 09 01:39:19 PM PDT 24 2208693958 ps
T444 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3993511752 Jun 09 01:37:21 PM PDT 24 Jun 09 01:37:30 PM PDT 24 2611667102 ps
T339 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2042200164 Jun 09 01:37:24 PM PDT 24 Jun 09 01:37:25 PM PDT 24 2533861080 ps
T294 /workspace/coverage/default/14.sysrst_ctrl_stress_all.3578812409 Jun 09 01:38:19 PM PDT 24 Jun 09 01:43:54 PM PDT 24 124670995791 ps
T445 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.300310516 Jun 09 01:38:36 PM PDT 24 Jun 09 01:38:38 PM PDT 24 2556574013 ps
T446 /workspace/coverage/default/26.sysrst_ctrl_stress_all.3083581066 Jun 09 01:39:07 PM PDT 24 Jun 09 01:39:31 PM PDT 24 8829125234 ps
T447 /workspace/coverage/default/9.sysrst_ctrl_smoke.634521461 Jun 09 01:38:00 PM PDT 24 Jun 09 01:38:03 PM PDT 24 2121777137 ps
T448 /workspace/coverage/default/36.sysrst_ctrl_alert_test.2345559658 Jun 09 01:39:49 PM PDT 24 Jun 09 01:39:51 PM PDT 24 2034682972 ps
T449 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.325911312 Jun 09 01:38:56 PM PDT 24 Jun 09 01:38:58 PM PDT 24 2530779387 ps
T280 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.1345258246 Jun 09 01:38:25 PM PDT 24 Jun 09 01:42:13 PM PDT 24 83955749207 ps
T450 /workspace/coverage/default/43.sysrst_ctrl_smoke.2519743024 Jun 09 01:40:09 PM PDT 24 Jun 09 01:40:11 PM PDT 24 2128464678 ps
T451 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.2281747439 Jun 09 01:37:38 PM PDT 24 Jun 09 01:37:39 PM PDT 24 2816920814 ps
T452 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.3322538555 Jun 09 01:37:26 PM PDT 24 Jun 09 01:37:28 PM PDT 24 2217575038 ps
T419 /workspace/coverage/default/8.sysrst_ctrl_stress_all.3150590729 Jun 09 01:38:02 PM PDT 24 Jun 09 01:38:32 PM PDT 24 203855977485 ps
T87 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2559194225 Jun 09 01:40:39 PM PDT 24 Jun 09 01:42:45 PM PDT 24 97637246150 ps
T276 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.289189069 Jun 09 01:39:19 PM PDT 24 Jun 09 01:44:11 PM PDT 24 115307502548 ps
T88 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2161446259 Jun 09 01:40:35 PM PDT 24 Jun 09 01:41:23 PM PDT 24 24580368804 ps
T453 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2118799923 Jun 09 01:38:56 PM PDT 24 Jun 09 01:39:05 PM PDT 24 3063825718 ps
T454 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.4045025477 Jun 09 01:38:21 PM PDT 24 Jun 09 01:38:24 PM PDT 24 2488407143 ps
T455 /workspace/coverage/default/18.sysrst_ctrl_smoke.115066313 Jun 09 01:38:29 PM PDT 24 Jun 09 01:38:32 PM PDT 24 2134542357 ps
T286 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.543064554 Jun 09 01:39:24 PM PDT 24 Jun 09 01:41:38 PM PDT 24 51745890541 ps
T456 /workspace/coverage/default/15.sysrst_ctrl_alert_test.1334540864 Jun 09 01:38:26 PM PDT 24 Jun 09 01:38:28 PM PDT 24 2041467783 ps
T457 /workspace/coverage/default/19.sysrst_ctrl_smoke.327436852 Jun 09 01:38:37 PM PDT 24 Jun 09 01:38:43 PM PDT 24 2111234776 ps
T73 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1976661322 Jun 09 01:40:16 PM PDT 24 Jun 09 01:40:23 PM PDT 24 4824984861 ps
T458 /workspace/coverage/default/2.sysrst_ctrl_smoke.1544517166 Jun 09 01:37:26 PM PDT 24 Jun 09 01:37:29 PM PDT 24 2126299664 ps
T459 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3713518709 Jun 09 01:38:23 PM PDT 24 Jun 09 01:38:25 PM PDT 24 2569199552 ps
T460 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3138374576 Jun 09 01:38:32 PM PDT 24 Jun 09 01:38:35 PM PDT 24 2522607261 ps
T461 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.410230941 Jun 09 01:37:28 PM PDT 24 Jun 09 01:37:38 PM PDT 24 3189910189 ps
T74 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3935155781 Jun 09 01:40:25 PM PDT 24 Jun 09 01:41:10 PM PDT 24 2231470872135 ps
T462 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3519170540 Jun 09 01:37:38 PM PDT 24 Jun 09 01:37:40 PM PDT 24 2292689897 ps
T463 /workspace/coverage/default/26.sysrst_ctrl_alert_test.3426084443 Jun 09 01:39:08 PM PDT 24 Jun 09 01:39:10 PM PDT 24 2037302158 ps
T89 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.3758081879 Jun 09 01:40:20 PM PDT 24 Jun 09 01:43:27 PM PDT 24 86328384032 ps
T292 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.992066359 Jun 09 01:40:34 PM PDT 24 Jun 09 01:41:31 PM PDT 24 87170501761 ps
T81 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.616518423 Jun 09 01:39:51 PM PDT 24 Jun 09 01:41:08 PM PDT 24 83419214941 ps
T241 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2637606319 Jun 09 01:38:04 PM PDT 24 Jun 09 01:38:10 PM PDT 24 3569274255 ps
T83 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.177924658 Jun 09 01:38:36 PM PDT 24 Jun 09 01:38:39 PM PDT 24 4255161263 ps
T111 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.796602814 Jun 09 01:37:23 PM PDT 24 Jun 09 01:37:30 PM PDT 24 6794364013 ps
T146 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.468411194 Jun 09 01:37:34 PM PDT 24 Jun 09 01:37:49 PM PDT 24 78327767558 ps
T43 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.173524284 Jun 09 01:39:30 PM PDT 24 Jun 09 01:40:17 PM PDT 24 17248335940 ps
T147 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.2063279253 Jun 09 01:38:05 PM PDT 24 Jun 09 01:38:08 PM PDT 24 2631866266 ps
T112 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1914086273 Jun 09 01:39:43 PM PDT 24 Jun 09 01:39:53 PM PDT 24 10550956304 ps
T148 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.2883347540 Jun 09 01:38:39 PM PDT 24 Jun 09 01:38:43 PM PDT 24 3775101161 ps
T149 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.3931549513 Jun 09 01:39:11 PM PDT 24 Jun 09 01:39:14 PM PDT 24 3306270132 ps
T150 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.4274805259 Jun 09 01:38:40 PM PDT 24 Jun 09 01:38:41 PM PDT 24 2582098866 ps
T151 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2240065097 Jun 09 01:39:12 PM PDT 24 Jun 09 01:39:15 PM PDT 24 3360959193 ps
T464 /workspace/coverage/default/8.sysrst_ctrl_smoke.1425078903 Jun 09 01:37:55 PM PDT 24 Jun 09 01:38:02 PM PDT 24 2109659865 ps
T285 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.238509176 Jun 09 01:40:34 PM PDT 24 Jun 09 01:41:15 PM PDT 24 88946921192 ps
T465 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.415915188 Jun 09 01:39:38 PM PDT 24 Jun 09 01:39:44 PM PDT 24 2098080494 ps
T466 /workspace/coverage/default/1.sysrst_ctrl_alert_test.3085899602 Jun 09 01:37:27 PM PDT 24 Jun 09 01:37:33 PM PDT 24 2010539788 ps
T467 /workspace/coverage/default/31.sysrst_ctrl_smoke.4077318416 Jun 09 01:39:23 PM PDT 24 Jun 09 01:39:30 PM PDT 24 2111662049 ps
T468 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1070635977 Jun 09 01:40:17 PM PDT 24 Jun 09 01:40:24 PM PDT 24 2184876201 ps
T337 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2853514511 Jun 09 01:37:22 PM PDT 24 Jun 09 01:37:31 PM PDT 24 3472321460 ps
T469 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2486572387 Jun 09 01:39:39 PM PDT 24 Jun 09 01:39:44 PM PDT 24 3142826873 ps
T470 /workspace/coverage/default/11.sysrst_ctrl_alert_test.2247291792 Jun 09 01:38:12 PM PDT 24 Jun 09 01:38:15 PM PDT 24 2023447030 ps
T338 /workspace/coverage/default/25.sysrst_ctrl_stress_all.2962389922 Jun 09 01:39:06 PM PDT 24 Jun 09 01:39:14 PM PDT 24 6420726374 ps
T203 /workspace/coverage/default/11.sysrst_ctrl_stress_all.3046974194 Jun 09 01:38:11 PM PDT 24 Jun 09 01:44:05 PM PDT 24 1288297920393 ps
T471 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1511774784 Jun 09 01:38:30 PM PDT 24 Jun 09 01:38:32 PM PDT 24 2049349546 ps
T44 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.90078200 Jun 09 01:37:24 PM PDT 24 Jun 09 01:37:34 PM PDT 24 3748954093 ps
T331 /workspace/coverage/default/13.sysrst_ctrl_stress_all.3494402719 Jun 09 01:38:19 PM PDT 24 Jun 09 01:39:05 PM PDT 24 131272750240 ps
T204 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1614103354 Jun 09 01:40:25 PM PDT 24 Jun 09 01:42:30 PM PDT 24 47032907756 ps
T472 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3436560321 Jun 09 01:37:40 PM PDT 24 Jun 09 01:37:42 PM PDT 24 2486193294 ps
T473 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1619794625 Jun 09 01:40:31 PM PDT 24 Jun 09 01:40:37 PM PDT 24 3266911104 ps
T474 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2524587994 Jun 09 01:39:08 PM PDT 24 Jun 09 01:39:10 PM PDT 24 2048408400 ps
T475 /workspace/coverage/default/29.sysrst_ctrl_smoke.735264431 Jun 09 01:39:19 PM PDT 24 Jun 09 01:39:26 PM PDT 24 2113720803 ps
T476 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1154961790 Jun 09 01:40:04 PM PDT 24 Jun 09 01:40:07 PM PDT 24 2488437131 ps
T477 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.1219869817 Jun 09 01:39:52 PM PDT 24 Jun 09 01:39:54 PM PDT 24 3970087340 ps
T478 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.1854274293 Jun 09 01:39:47 PM PDT 24 Jun 09 01:39:59 PM PDT 24 3743120097 ps
T479 /workspace/coverage/default/25.sysrst_ctrl_smoke.636473331 Jun 09 01:39:02 PM PDT 24 Jun 09 01:39:04 PM PDT 24 2124936688 ps
T480 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.4114961707 Jun 09 01:39:57 PM PDT 24 Jun 09 01:39:58 PM PDT 24 2245789212 ps
T46 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.4153992095 Jun 09 01:40:17 PM PDT 24 Jun 09 01:40:26 PM PDT 24 4379636882 ps
T181 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.4185590639 Jun 09 01:37:39 PM PDT 24 Jun 09 01:39:51 PM PDT 24 50325765043 ps
T79 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2291924006 Jun 09 01:40:08 PM PDT 24 Jun 09 01:43:29 PM PDT 24 213334491272 ps
T182 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2037379391 Jun 09 01:40:19 PM PDT 24 Jun 09 01:40:29 PM PDT 24 3521314160 ps
T183 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.1490676186 Jun 09 01:38:46 PM PDT 24 Jun 09 01:38:48 PM PDT 24 3215131061 ps
T184 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.300771370 Jun 09 01:37:49 PM PDT 24 Jun 09 01:37:57 PM PDT 24 2512814245 ps
T185 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1204845354 Jun 09 01:38:05 PM PDT 24 Jun 09 01:38:11 PM PDT 24 2031337699 ps
T186 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.2888728163 Jun 09 01:37:45 PM PDT 24 Jun 09 01:37:49 PM PDT 24 2518131121 ps
T187 /workspace/coverage/default/23.sysrst_ctrl_smoke.2286059238 Jun 09 01:38:53 PM PDT 24 Jun 09 01:38:55 PM PDT 24 2140434036 ps
T138 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.3953187114 Jun 09 01:39:26 PM PDT 24 Jun 09 01:39:39 PM PDT 24 5647832981 ps
T405 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.725531773 Jun 09 01:39:39 PM PDT 24 Jun 09 01:44:08 PM PDT 24 106763392818 ps
T481 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.701289937 Jun 09 01:39:20 PM PDT 24 Jun 09 01:39:23 PM PDT 24 2616512385 ps
T482 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.49254011 Jun 09 01:38:26 PM PDT 24 Jun 09 01:38:29 PM PDT 24 2632082133 ps
T483 /workspace/coverage/default/46.sysrst_ctrl_alert_test.1574810616 Jun 09 01:40:23 PM PDT 24 Jun 09 01:40:24 PM PDT 24 2052725414 ps
T374 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.3356703808 Jun 09 01:38:04 PM PDT 24 Jun 09 01:38:46 PM PDT 24 134466726575 ps
T484 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1736494130 Jun 09 01:40:08 PM PDT 24 Jun 09 01:40:13 PM PDT 24 3613778169 ps
T485 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1106617647 Jun 09 01:37:59 PM PDT 24 Jun 09 01:38:06 PM PDT 24 2511998525 ps
T486 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.277578612 Jun 09 01:39:39 PM PDT 24 Jun 09 01:39:41 PM PDT 24 2520576041 ps
T90 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.252199272 Jun 09 01:40:45 PM PDT 24 Jun 09 01:42:13 PM PDT 24 122657983462 ps
T375 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.807670688 Jun 09 01:38:26 PM PDT 24 Jun 09 01:46:14 PM PDT 24 174500834954 ps
T487 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3580889114 Jun 09 01:39:41 PM PDT 24 Jun 09 01:39:49 PM PDT 24 2442300248 ps
T488 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3188809919 Jun 09 01:39:02 PM PDT 24 Jun 09 01:39:03 PM PDT 24 2636978986 ps
T91 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1530590512 Jun 09 01:40:33 PM PDT 24 Jun 09 01:41:30 PM PDT 24 109445721166 ps
T281 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.3041324657 Jun 09 01:40:09 PM PDT 24 Jun 09 01:41:49 PM PDT 24 151798681152 ps
T77 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.2035339704 Jun 09 01:39:22 PM PDT 24 Jun 09 01:39:24 PM PDT 24 2695844568 ps
T190 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3947619283 Jun 09 01:40:31 PM PDT 24 Jun 09 01:40:37 PM PDT 24 2220844751 ps
T191 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.496065683 Jun 09 01:38:55 PM PDT 24 Jun 09 01:38:56 PM PDT 24 3306493474 ps
T192 /workspace/coverage/default/39.sysrst_ctrl_alert_test.1091268896 Jun 09 01:39:58 PM PDT 24 Jun 09 01:40:00 PM PDT 24 2039134225 ps
T193 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1483274064 Jun 09 01:38:44 PM PDT 24 Jun 09 01:38:46 PM PDT 24 2544375330 ps
T194 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.817326284 Jun 09 01:37:26 PM PDT 24 Jun 09 01:37:28 PM PDT 24 2306229481 ps
T195 /workspace/coverage/default/22.sysrst_ctrl_stress_all.4232838404 Jun 09 01:38:54 PM PDT 24 Jun 09 01:39:16 PM PDT 24 8573647088 ps
T92 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3962760104 Jun 09 01:40:33 PM PDT 24 Jun 09 01:40:39 PM PDT 24 25848724951 ps
T196 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.1562166477 Jun 09 01:38:54 PM PDT 24 Jun 09 01:39:06 PM PDT 24 4128729870 ps
T197 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2931110390 Jun 09 01:39:38 PM PDT 24 Jun 09 01:39:40 PM PDT 24 2535896426 ps
T341 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.553787240 Jun 09 01:38:20 PM PDT 24 Jun 09 01:38:27 PM PDT 24 2508916031 ps
T489 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2092235874 Jun 09 01:37:55 PM PDT 24 Jun 09 01:38:00 PM PDT 24 2164579458 ps
T490 /workspace/coverage/default/17.sysrst_ctrl_smoke.3821465409 Jun 09 01:38:31 PM PDT 24 Jun 09 01:38:37 PM PDT 24 2114267079 ps
T154 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.3439293306 Jun 09 01:40:10 PM PDT 24 Jun 09 01:55:18 PM PDT 24 347968189889 ps
T491 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1051854697 Jun 09 01:39:19 PM PDT 24 Jun 09 01:39:23 PM PDT 24 2142489015 ps
T492 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3674112914 Jun 09 01:38:55 PM PDT 24 Jun 09 01:39:02 PM PDT 24 2158630187 ps
T493 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1900307504 Jun 09 01:38:25 PM PDT 24 Jun 09 01:49:44 PM PDT 24 314881926311 ps
T494 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.559979110 Jun 09 01:39:57 PM PDT 24 Jun 09 01:40:05 PM PDT 24 2613074139 ps
T93 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3967427995 Jun 09 01:40:38 PM PDT 24 Jun 09 01:40:57 PM PDT 24 28843091435 ps
T155 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3166011880 Jun 09 01:40:05 PM PDT 24 Jun 09 01:42:59 PM PDT 24 69735378855 ps
T113 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3027371452 Jun 09 01:39:08 PM PDT 24 Jun 09 01:39:11 PM PDT 24 2934093382 ps
T495 /workspace/coverage/default/27.sysrst_ctrl_stress_all.3784949833 Jun 09 01:39:13 PM PDT 24 Jun 09 01:39:31 PM PDT 24 6123861200 ps
T496 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.818865087 Jun 09 01:40:04 PM PDT 24 Jun 09 01:40:06 PM PDT 24 2543009813 ps
T497 /workspace/coverage/default/0.sysrst_ctrl_smoke.2449585442 Jun 09 01:37:25 PM PDT 24 Jun 09 01:37:32 PM PDT 24 2111495934 ps
T498 /workspace/coverage/default/31.sysrst_ctrl_alert_test.1326040837 Jun 09 01:39:28 PM PDT 24 Jun 09 01:39:31 PM PDT 24 2019462793 ps
T114 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.4184820654 Jun 09 01:38:06 PM PDT 24 Jun 09 01:38:11 PM PDT 24 5514556734 ps
T499 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.1696721965 Jun 09 01:38:48 PM PDT 24 Jun 09 01:38:51 PM PDT 24 2085266611 ps
T500 /workspace/coverage/default/11.sysrst_ctrl_smoke.530560802 Jun 09 01:38:07 PM PDT 24 Jun 09 01:38:10 PM PDT 24 2133893729 ps
T94 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.4020149593 Jun 09 01:39:49 PM PDT 24 Jun 09 01:41:23 PM PDT 24 33381440222 ps
T277 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.524776104 Jun 09 01:39:07 PM PDT 24 Jun 09 01:39:56 PM PDT 24 82238796824 ps
T501 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.280444341 Jun 09 01:38:51 PM PDT 24 Jun 09 01:38:56 PM PDT 24 2516735753 ps
T137 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.4136978012 Jun 09 01:38:15 PM PDT 24 Jun 09 01:38:21 PM PDT 24 5461121220 ps
T221 /workspace/coverage/default/34.sysrst_ctrl_smoke.687234562 Jun 09 01:39:39 PM PDT 24 Jun 09 01:39:41 PM PDT 24 2130830366 ps
T222 /workspace/coverage/default/44.sysrst_ctrl_smoke.2692878189 Jun 09 01:40:15 PM PDT 24 Jun 09 01:40:22 PM PDT 24 2111438267 ps
T223 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.410890185 Jun 09 01:39:56 PM PDT 24 Jun 09 01:39:57 PM PDT 24 2705372431 ps
T224 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.55237448 Jun 09 01:40:02 PM PDT 24 Jun 09 01:40:11 PM PDT 24 3299066275 ps
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