Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.79	99.35	96.41	100.00	96.79	98.82	99.52	93.61

Total tests in report: 914

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
61.15	61.15	79.75	79.75	69.62	69.62	86.76	86.76	16.03	16.03	80.70	80.70	66.86	66.86	28.35	28.35	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3307611179
74.43	13.27	87.65	7.89	79.47	9.86	95.66	8.90	44.23	28.21	88.47	7.76	78.52	11.66	46.99	18.64	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3088618872
85.14	10.71	96.40	8.75	90.65	11.17	97.49	1.83	78.21	33.97	96.23	7.76	89.21	10.69	47.77	0.78	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3085815510
87.69	2.55	97.78	1.38	91.84	1.19	97.49	0.00	89.10	10.90	97.26	1.04	92.49	3.28	47.87	0.10	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3671460160
90.15	2.46	97.89	0.11	91.94	0.10	97.49	0.00	90.38	1.28	97.41	0.15	92.77	0.29	63.19	15.32	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.59510440
91.56	1.41	98.23	0.34	92.26	0.33	97.49	0.00	92.31	1.92	97.63	0.22	96.82	4.05	66.20	3.01	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1724030158
92.64	1.07	98.25	0.02	93.33	1.06	98.17	0.68	92.31	0.00	97.67	0.04	96.82	0.00	71.91	5.71	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.3235057743
93.33	0.70	98.34	0.09	93.43	0.10	98.17	0.00	92.31	0.00	97.86	0.18	97.11	0.29	76.12	4.21	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2662014986
93.94	0.61	98.51	0.17	93.63	0.20	98.17	0.00	92.31	0.00	97.86	0.00	97.11	0.00	80.01	3.89	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1910397106
94.40	0.45	98.64	0.13	93.96	0.33	98.17	0.00	92.31	0.00	97.93	0.07	97.11	0.00	82.66	2.65	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.4107914278
94.69	0.30	98.75	0.11	94.11	0.15	98.17	0.00	93.59	1.28	98.08	0.15	97.50	0.39	82.66	0.00	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.1762783345
94.98	0.28	98.75	0.00	94.14	0.03	99.77	1.60	93.59	0.00	98.08	0.00	97.59	0.10	82.92	0.26	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2441939777
95.24	0.26	98.77	0.02	94.19	0.05	99.77	0.00	93.59	0.00	98.11	0.04	97.69	0.10	84.53	1.61	/workspace/coverage/default/47.sysrst_ctrl_stress_all.1130776074
95.48	0.24	98.82	0.06	94.46	0.28	99.77	0.00	93.59	0.00	98.19	0.07	98.36	0.67	85.15	0.62	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.426667999
95.69	0.21	98.90	0.07	94.46	0.00	99.77	0.00	93.59	0.00	98.19	0.00	98.36	0.00	86.55	1.40	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.55806313
95.90	0.21	98.94	0.04	94.49	0.03	99.77	0.00	94.23	0.64	98.26	0.07	98.55	0.19	87.02	0.47	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1711759284
96.08	0.18	98.94	0.00	95.50	1.01	99.77	0.00	94.23	0.00	98.26	0.00	98.55	0.00	87.28	0.26	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.2146776471
96.25	0.17	98.94	0.00	95.50	0.00	99.77	0.00	94.23	0.00	98.26	0.00	98.55	0.00	88.47	1.19	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2310504678
96.40	0.15	98.99	0.06	95.58	0.08	99.77	0.00	94.87	0.64	98.34	0.07	98.75	0.19	88.47	0.00	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.1628556154
96.53	0.14	99.01	0.02	95.58	0.00	99.77	0.00	94.87	0.00	98.34	0.00	98.75	0.00	89.41	0.93	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1612773430
96.66	0.13	99.07	0.06	95.60	0.03	99.77	0.00	95.51	0.64	98.41	0.07	98.84	0.10	89.41	0.00	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.3096278071
96.78	0.12	99.10	0.04	95.63	0.03	99.77	0.00	96.15	0.64	98.45	0.04	98.94	0.10	89.41	0.00	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2593054432
96.90	0.12	99.14	0.04	95.65	0.03	99.77	0.00	96.79	0.64	98.48	0.04	99.04	0.10	89.41	0.00	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3652476511
97.01	0.11	99.14	0.00	95.65	0.00	99.77	0.00	96.79	0.00	98.48	0.00	99.04	0.00	90.19	0.78	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3252487503
97.09	0.08	99.14	0.00	95.65	0.00	99.77	0.00	96.79	0.00	98.48	0.00	99.04	0.00	90.76	0.57	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3794849572
97.16	0.07	99.14	0.00	95.65	0.00	99.77	0.00	96.79	0.00	98.48	0.00	99.04	0.00	91.23	0.47	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.3414689343
97.22	0.06	99.14	0.00	95.65	0.00	99.77	0.00	96.79	0.00	98.48	0.00	99.42	0.39	91.28	0.05	/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.277999610
97.28	0.06	99.14	0.00	95.65	0.00	99.77	0.00	96.79	0.00	98.48	0.00	99.42	0.00	91.69	0.42	/workspace/coverage/default/17.sysrst_ctrl_stress_all.3493881550
97.33	0.05	99.16	0.02	95.65	0.00	99.77	0.00	96.79	0.00	98.52	0.04	99.42	0.00	92.00	0.31	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1460189401
97.38	0.05	99.22	0.06	95.73	0.08	100.00	0.23	96.79	0.00	98.52	0.00	99.42	0.00	92.00	0.00	/workspace/coverage/default/11.sysrst_ctrl_alert_test.2991443492
97.44	0.05	99.25	0.04	95.88	0.15	100.00	0.00	96.79	0.00	98.60	0.07	99.52	0.10	92.00	0.00	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.17332976
97.49	0.05	99.25	0.00	96.18	0.30	100.00	0.00	96.79	0.00	98.60	0.00	99.52	0.00	92.06	0.05	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2178013582
97.53	0.04	99.25	0.00	96.18	0.00	100.00	0.00	96.79	0.00	98.60	0.00	99.52	0.00	92.37	0.31	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3863009463
97.56	0.03	99.25	0.00	96.21	0.03	100.00	0.00	96.79	0.00	98.60	0.00	99.52	0.00	92.58	0.21	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3549271403
97.58	0.02	99.29	0.04	96.21	0.00	100.00	0.00	96.79	0.00	98.67	0.07	99.52	0.00	92.58	0.00	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2006477514
97.60	0.02	99.33	0.04	96.21	0.00	100.00	0.00	96.79	0.00	98.74	0.07	99.52	0.00	92.58	0.00	/workspace/coverage/default/31.sysrst_ctrl_stress_all.3175986139
97.61	0.01	99.33	0.00	96.21	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.68	0.10	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.91717710
97.63	0.01	99.33	0.00	96.21	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.78	0.10	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.3683480866
97.64	0.01	99.33	0.00	96.21	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.89	0.10	/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.2233274444
97.65	0.01	99.33	0.00	96.21	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.99	0.10	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1223837432
97.67	0.01	99.33	0.00	96.21	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	93.09	0.10	/workspace/coverage/default/43.sysrst_ctrl_stress_all.3055566181
97.68	0.01	99.33	0.00	96.31	0.10	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	93.09	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.920248260
97.70	0.01	99.33	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.04	99.52	0.00	93.15	0.05	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1684179870
97.70	0.01	99.35	0.02	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.04	99.52	0.00	93.15	0.00	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.3102081382
97.71	0.01	99.35	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.20	0.05	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1178567190
97.72	0.01	99.35	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.25	0.05	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.458553262
97.73	0.01	99.35	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.30	0.05	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2422767521
97.73	0.01	99.35	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.35	0.05	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.843601091
97.74	0.01	99.35	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.41	0.05	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1715480955
97.75	0.01	99.35	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.46	0.05	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2476648037
97.76	0.01	99.35	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.51	0.05	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.928112288
97.76	0.01	99.35	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.56	0.05	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2753458402
97.77	0.01	99.35	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.61	0.05	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.467428837
97.78	0.01	99.35	0.00	96.36	0.05	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.61	0.00	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1242575064
97.78	0.01	99.35	0.00	96.39	0.03	100.00	0.00	96.79	0.00	98.82	0.00	99.52	0.00	93.61	0.00	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2662517265

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.995605041
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.2289426788
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.292980077
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2259873911
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3296046942
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.260596073
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.539205005
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3177154694
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1780965456
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3646290596
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1129581888
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1964518103
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1145821959
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3955761224
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3660032013
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3207301617
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3373998437
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2263487789
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2933571963
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1089642621
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1079631783
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4262898892
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.701242532
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1616463765
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.2677941706
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1741027811
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.871637720
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1709208766
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3272442309
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1904114404
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3717471399
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.4232946327
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2389758
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1698210622
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3734957371
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1038917400
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2183224866
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2719721137
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2141300686
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.691631442
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.500632910
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1132074639
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.347600680
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.599304322
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2196922806
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.4104782814
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3403893092
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2296054333
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2283857908
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2841458761
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3645353825
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3013872978
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3763870295
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1739736704
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2945846947
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2939025301
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2980244129
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1408421713
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.178277017
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2562987019
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.3834319588
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.4003681443
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3228086920
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1970435637
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2877666119
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3760765056
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.1154720182
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.2181166560
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.993735774
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.1734800584
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.4243031669
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.3135962127
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.222332416
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3821503054
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3052324206
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.3312608006
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.2390627761
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2312359324
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.3768787496
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.753559535
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.3953297491
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.3156457759
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.897892774
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.3456022078
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/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1715199879
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.4239735996
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2985829554
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1062126870
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1663063067
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.973180968
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1282758352
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1585795096
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2486735353
/workspace/coverage/default/41.sysrst_ctrl_smoke.3720083186
/workspace/coverage/default/41.sysrst_ctrl_stress_all.778263622
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1442810123
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3967280845
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3424904981
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.445659190
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2749926029
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4281029090
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3440886568
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1933850004
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1134716524
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1407871690
/workspace/coverage/default/42.sysrst_ctrl_smoke.3856630823
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1331847460
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1447241800
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2151882202
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3592928097
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.425069474
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2848796439
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1170982320
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1880287381
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3800208436
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2093820325
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3393046141
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1922870980
/workspace/coverage/default/43.sysrst_ctrl_smoke.917190291
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3344677130
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.131842780
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2800779982
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.318939741
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2645575763
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.223126593
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2253121471
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1467280938
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.347062712
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2975788373
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1487511887
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3715496595
/workspace/coverage/default/44.sysrst_ctrl_smoke.1251447076
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3478717134
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2846625870
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.3289324841
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3707973866
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.331782775
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3416997791
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3766001571
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1660321806
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2971117952
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4093561942
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1065007891
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3353452935
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1235625924
/workspace/coverage/default/45.sysrst_ctrl_smoke.2659219486
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3445358127
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3958473499
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2611587769
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1550816128
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2230092210
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2726759422
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.1527412806
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2380512898
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3724447543
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2397388680
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1349749152
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.839860966
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.566761698
/workspace/coverage/default/46.sysrst_ctrl_smoke.564899088
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1418459375
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3273214285
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2424890652
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1752295944
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.4079823130
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1319425522
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2143316280
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3082563167
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.2895407794
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2493529953
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.326520021
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2642412764
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2478466536
/workspace/coverage/default/47.sysrst_ctrl_smoke.3163704677
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2577412700
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3435379430
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2963084438
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1797647229
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2471533314
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3466951508
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2428468396
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2584692166
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2906803401
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3611945087
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1591492923
/workspace/coverage/default/48.sysrst_ctrl_smoke.731244348
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1912672000
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3178978585
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2522981602
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3575755691
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.531876022
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1493064606
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.54786978
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2890135305
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.721282397
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4037497694
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2812304045
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3995014322
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3708543857
/workspace/coverage/default/49.sysrst_ctrl_smoke.459252032
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1486708001
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3590078140
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2048647248
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2358484572
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3934986383
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3274370726
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2534420380
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2585554332
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1793457270
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.435008765
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2623894799
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3057202373
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.720234434
/workspace/coverage/default/5.sysrst_ctrl_smoke.1700827300
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2977231845
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.655219998
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1012213496
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3569268649
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2591650473
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3426493628
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1385973763
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1056078296
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.277800782
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3540291831
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.195853782
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.494293304
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.665605282
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.1991409198
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2146523842
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2532948087
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2392195012
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.726367743
/workspace/coverage/default/6.sysrst_ctrl_smoke.2886215195
/workspace/coverage/default/6.sysrst_ctrl_stress_all.4287864421
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.474844400
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1432079998
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3441135874
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1570167858
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.283184240
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1135674605
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1848195328
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1540863108
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1540657307
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3872215166
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1269773335
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.387339837
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3044421996
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1414120631
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4061728379
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.357071114
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3705301288
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1700275334
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.487401141
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3504828279
/workspace/coverage/default/7.sysrst_ctrl_smoke.455373023
/workspace/coverage/default/7.sysrst_ctrl_stress_all.141728957
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3468344285
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.207382821
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2110419275
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1089177818
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.4133049354
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2806430243
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1123069308
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2645657905
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1784519887
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2360555105
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.875304581
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1678821989
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1729969434
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.4079504586
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1178073140
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.848713390
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2083549940
/workspace/coverage/default/8.sysrst_ctrl_smoke.1533409782
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1086807512
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.906438458
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2545109352
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1470736179
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1238618005
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2850792858
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2536232220
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3374172538
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2056285742
/workspace/coverage/default/9.sysrst_ctrl_alert_test.236549368
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.4180624182
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.681053508
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1315678568
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1088559287
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.69865588
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2787282912
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2362994
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.686277767
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3046896167
/workspace/coverage/default/9.sysrst_ctrl_smoke.2170689002
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3979462634
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1887829838
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1606565052
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3572558593
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.394332955
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2830125739
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1956769026
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.481964532

Total test records in report: 914

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3307611179	Jun 23 04:24:31 PM PDT 24	Jun 23 04:26:03 PM PDT 24	73744687168 ps
T2	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1875752687	Jun 23 04:25:51 PM PDT 24	Jun 23 04:27:08 PM PDT 24	34616459456 ps
T3	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.2176749696	Jun 23 04:25:09 PM PDT 24	Jun 23 04:25:13 PM PDT 24	2687920491 ps
T11	/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.640178587	Jun 23 04:24:18 PM PDT 24	Jun 23 04:24:22 PM PDT 24	2618729854 ps
T12	/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2906803401	Jun 23 04:25:52 PM PDT 24	Jun 23 04:25:55 PM PDT 24	2471937148 ps
T13	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1200451909	Jun 23 04:25:52 PM PDT 24	Jun 23 04:25:55 PM PDT 24	2249250292 ps
T14	/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.277999610	Jun 23 04:25:23 PM PDT 24	Jun 23 04:25:31 PM PDT 24	2515318613 ps
T15	/workspace/coverage/default/33.sysrst_ctrl_smoke.2614513261	Jun 23 04:25:10 PM PDT 24	Jun 23 04:25:13 PM PDT 24	2145258181 ps
T4	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2006477514	Jun 23 04:24:45 PM PDT 24	Jun 23 04:25:50 PM PDT 24	38234107389 ps
T16	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.578301149	Jun 23 04:24:40 PM PDT 24	Jun 23 04:24:48 PM PDT 24	3001467363 ps
T5	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.2178275060	Jun 23 04:25:04 PM PDT 24	Jun 23 04:26:06 PM PDT 24	49891735910 ps
T21	/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1055892071	Jun 23 04:25:20 PM PDT 24	Jun 23 04:25:26 PM PDT 24	3756189630 ps
T45	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1811442099	Jun 23 04:25:09 PM PDT 24	Jun 23 04:25:20 PM PDT 24	3159916608 ps
T56	/workspace/coverage/default/39.sysrst_ctrl_smoke.3537524858	Jun 23 04:25:20 PM PDT 24	Jun 23 04:25:23 PM PDT 24	2129987456 ps
T33	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1470823875	Jun 23 04:25:11 PM PDT 24	Jun 23 04:25:15 PM PDT 24	3767718131 ps
T107	/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.839860966	Jun 23 04:25:58 PM PDT 24	Jun 23 04:25:59 PM PDT 24	2134139949 ps
T34	/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3424904981	Jun 23 04:25:36 PM PDT 24	Jun 23 04:25:45 PM PDT 24	3720305050 ps
T57	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.4232966904	Jun 23 04:24:27 PM PDT 24	Jun 23 04:24:31 PM PDT 24	2520604788 ps
T6	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3303146491	Jun 23 04:25:00 PM PDT 24	Jun 23 04:25:31 PM PDT 24	58025484116 ps
T7	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3088618872	Jun 23 04:25:34 PM PDT 24	Jun 23 04:26:59 PM PDT 24	141016791085 ps
T51	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1433160496	Jun 23 04:24:55 PM PDT 24	Jun 23 04:24:57 PM PDT 24	2475852944 ps
T8	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1910397106	Jun 23 04:26:14 PM PDT 24	Jun 23 04:28:16 PM PDT 24	173911812690 ps
T39	/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.145080497	Jun 23 04:25:19 PM PDT 24	Jun 23 04:25:26 PM PDT 24	2261948334 ps
T9	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1460189401	Jun 23 04:24:22 PM PDT 24	Jun 23 04:25:34 PM PDT 24	59333693118 ps
T40	/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.387781813	Jun 23 04:25:30 PM PDT 24	Jun 23 04:25:36 PM PDT 24	2022364084 ps
T41	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.396920329	Jun 23 04:24:39 PM PDT 24	Jun 23 04:24:48 PM PDT 24	2507184921 ps
T10	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.532917881	Jun 23 04:24:50 PM PDT 24	Jun 23 04:27:19 PM PDT 24	54966146242 ps
T42	/workspace/coverage/default/44.sysrst_ctrl_alert_test.2800779982	Jun 23 04:25:57 PM PDT 24	Jun 23 04:26:01 PM PDT 24	2019375449 ps
T43	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2476050837	Jun 23 04:25:34 PM PDT 24	Jun 23 04:25:38 PM PDT 24	2620125541 ps
T44	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2486735353	Jun 23 04:25:31 PM PDT 24	Jun 23 04:25:39 PM PDT 24	2552877515 ps
T22	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.843601091	Jun 23 04:25:07 PM PDT 24	Jun 23 04:26:53 PM PDT 24	82664434454 ps
T52	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.326520021	Jun 23 04:25:49 PM PDT 24	Jun 23 04:25:57 PM PDT 24	2458670623 ps
T31	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1684179870	Jun 23 04:25:00 PM PDT 24	Jun 23 04:25:22 PM PDT 24	36771545553 ps
T35	/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1797647229	Jun 23 04:25:54 PM PDT 24	Jun 23 04:26:14 PM PDT 24	15626737575 ps
T137	/workspace/coverage/default/7.sysrst_ctrl_smoke.455373023	Jun 23 04:24:23 PM PDT 24	Jun 23 04:24:30 PM PDT 24	2108316207 ps
T29	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3794849572	Jun 23 04:25:54 PM PDT 24	Jun 23 04:33:17 PM PDT 24	167393741661 ps
T53	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.2310281308	Jun 23 04:25:06 PM PDT 24	Jun 23 04:25:14 PM PDT 24	2444849707 ps
T138	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3393046141	Jun 23 04:25:49 PM PDT 24	Jun 23 04:25:55 PM PDT 24	2240549793 ps
T30	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.1628556154	Jun 23 04:25:05 PM PDT 24	Jun 23 04:25:14 PM PDT 24	3780030387 ps
T139	/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.665605282	Jun 23 04:24:33 PM PDT 24	Jun 23 04:24:36 PM PDT 24	3362501608 ps
T140	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3715496595	Jun 23 04:26:55 PM PDT 24	Jun 23 04:27:00 PM PDT 24	2514834520 ps
T141	/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.1588314736	Jun 23 04:25:18 PM PDT 24	Jun 23 04:25:22 PM PDT 24	3229392375 ps
T36	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.138346657	Jun 23 04:24:21 PM PDT 24	Jun 23 04:25:26 PM PDT 24	122716811120 ps
T27	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.2185156829	Jun 23 04:25:05 PM PDT 24	Jun 23 04:25:48 PM PDT 24	153266106311 ps
T37	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.387339837	Jun 23 04:24:50 PM PDT 24	Jun 23 04:24:59 PM PDT 24	3237735033 ps
T212	/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.4079504586	Jun 23 04:24:27 PM PDT 24	Jun 23 04:24:31 PM PDT 24	2614063951 ps
T106	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.529581373	Jun 23 04:24:29 PM PDT 24	Jun 23 04:24:36 PM PDT 24	2401671065 ps
T68	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.1827843006	Jun 23 04:24:26 PM PDT 24	Jun 23 04:25:21 PM PDT 24	91999329268 ps
T28	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.4107914278	Jun 23 04:25:09 PM PDT 24	Jun 23 04:29:22 PM PDT 24	104547473531 ps
T231	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.282298420	Jun 23 04:25:31 PM PDT 24	Jun 23 04:33:50 PM PDT 24	198521064077 ps
T38	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1865928493	Jun 23 04:25:19 PM PDT 24	Jun 23 04:25:28 PM PDT 24	3416111196 ps
T237	/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3970276571	Jun 23 04:25:21 PM PDT 24	Jun 23 04:25:29 PM PDT 24	2834582246 ps
T54	/workspace/coverage/default/45.sysrst_ctrl_stress_all.3445358127	Jun 23 04:25:49 PM PDT 24	Jun 23 04:26:04 PM PDT 24	7778762297 ps
T55	/workspace/coverage/default/11.sysrst_ctrl_stress_all.967990415	Jun 23 04:24:55 PM PDT 24	Jun 23 04:25:03 PM PDT 24	10603361546 ps
T238	/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1700275334	Jun 23 04:24:28 PM PDT 24	Jun 23 04:24:33 PM PDT 24	2455529507 ps
T239	/workspace/coverage/default/1.sysrst_ctrl_smoke.2129949764	Jun 23 04:24:27 PM PDT 24	Jun 23 04:24:29 PM PDT 24	2200897944 ps
T80	/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.318939741	Jun 23 04:26:56 PM PDT 24	Jun 23 04:37:07 PM PDT 24	223312207313 ps
T352	/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.4120269862	Jun 23 04:24:46 PM PDT 24	Jun 23 04:24:49 PM PDT 24	2663746471 ps
T353	/workspace/coverage/default/12.sysrst_ctrl_smoke.3280573180	Jun 23 04:24:48 PM PDT 24	Jun 23 04:24:55 PM PDT 24	2112119936 ps
T351	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1015677789	Jun 23 04:24:53 PM PDT 24	Jun 23 04:25:00 PM PDT 24	2512080007 ps
T280	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1462105048	Jun 23 04:24:53 PM PDT 24	Jun 23 04:25:00 PM PDT 24	2455274332 ps
T354	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.37589856	Jun 23 04:24:46 PM PDT 24	Jun 23 04:24:53 PM PDT 24	2509698079 ps
T58	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.768681529	Jun 23 04:25:07 PM PDT 24	Jun 23 04:26:09 PM PDT 24	80071358612 ps
T46	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2703976851	Jun 23 04:25:04 PM PDT 24	Jun 23 04:25:06 PM PDT 24	7793549463 ps
T59	/workspace/coverage/default/25.sysrst_ctrl_edge_detect.2613369945	Jun 23 04:25:14 PM PDT 24	Jun 23 04:25:18 PM PDT 24	2430372838 ps
T96	/workspace/coverage/default/38.sysrst_ctrl_alert_test.100842698	Jun 23 04:25:42 PM PDT 24	Jun 23 04:25:49 PM PDT 24	2012748376 ps
T97	/workspace/coverage/default/11.sysrst_ctrl_alert_test.2991443492	Jun 23 04:24:40 PM PDT 24	Jun 23 04:24:47 PM PDT 24	2009914775 ps
T98	/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2585074184	Jun 23 04:25:15 PM PDT 24	Jun 23 04:25:26 PM PDT 24	3757704724 ps
T99	/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2089438112	Jun 23 04:24:23 PM PDT 24	Jun 23 04:24:29 PM PDT 24	3874361387 ps
T100	/workspace/coverage/default/48.sysrst_ctrl_stress_all.1912672000	Jun 23 04:26:12 PM PDT 24	Jun 23 04:26:29 PM PDT 24	17144048851 ps
T23	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.55806313	Jun 23 04:24:59 PM PDT 24	Jun 23 04:27:23 PM PDT 24	116836398655 ps
T47	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.712243925	Jun 23 04:24:39 PM PDT 24	Jun 23 04:24:42 PM PDT 24	3801607551 ps
T244	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1319425522	Jun 23 04:25:46 PM PDT 24	Jun 23 04:26:31 PM PDT 24	129373347278 ps
T249	/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1175724200	Jun 23 04:25:19 PM PDT 24	Jun 23 04:25:23 PM PDT 24	2526982959 ps
T32	/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1123069308	Jun 23 04:26:00 PM PDT 24	Jun 23 04:29:12 PM PDT 24	82696038979 ps
T250	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2520882521	Jun 23 04:25:44 PM PDT 24	Jun 23 04:25:59 PM PDT 24	5227009358 ps
T60	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2985829554	Jun 23 04:25:57 PM PDT 24	Jun 23 04:26:31 PM PDT 24	61341826332 ps
T251	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.4252825272	Jun 23 04:25:09 PM PDT 24	Jun 23 04:25:17 PM PDT 24	2039381300 ps
T252	/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1893773842	Jun 23 04:24:37 PM PDT 24	Jun 23 04:26:25 PM PDT 24	42007639618 ps
T253	/workspace/coverage/default/22.sysrst_ctrl_stress_all.2519474686	Jun 23 04:24:59 PM PDT 24	Jun 23 04:47:01 PM PDT 24	744942939483 ps
T254	/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.1655276245	Jun 23 04:25:22 PM PDT 24	Jun 23 04:25:30 PM PDT 24	2612077529 ps
T48	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3085815510	Jun 23 04:24:18 PM PDT 24	Jun 23 04:26:00 PM PDT 24	40110555875 ps
T218	/workspace/coverage/default/30.sysrst_ctrl_smoke.777953031	Jun 23 04:25:08 PM PDT 24	Jun 23 04:25:15 PM PDT 24	2111408334 ps
T219	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.4109856632	Jun 23 04:25:22 PM PDT 24	Jun 23 04:30:39 PM PDT 24	131822943101 ps
T220	/workspace/coverage/default/15.sysrst_ctrl_smoke.1084914739	Jun 23 04:24:40 PM PDT 24	Jun 23 04:24:44 PM PDT 24	2124283705 ps
T49	/workspace/coverage/default/37.sysrst_ctrl_stress_all.3587310718	Jun 23 04:25:44 PM PDT 24	Jun 23 04:26:33 PM PDT 24	357625437745 ps
T61	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.2310504678	Jun 23 04:25:04 PM PDT 24	Jun 23 04:26:41 PM PDT 24	151187856148 ps
T62	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2806430243	Jun 23 04:26:05 PM PDT 24	Jun 23 04:26:47 PM PDT 24	62963741542 ps
T221	/workspace/coverage/default/12.sysrst_ctrl_alert_test.3945138107	Jun 23 04:24:56 PM PDT 24	Jun 23 04:25:00 PM PDT 24	2016222725 ps
T222	/workspace/coverage/default/45.sysrst_ctrl_alert_test.3707973866	Jun 23 04:25:53 PM PDT 24	Jun 23 04:25:55 PM PDT 24	2029284377 ps
T223	/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2027641794	Jun 23 04:24:38 PM PDT 24	Jun 23 04:24:46 PM PDT 24	2632023134 ps
T355	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4093561942	Jun 23 04:26:12 PM PDT 24	Jun 23 04:26:14 PM PDT 24	2637548468 ps
T356	/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2057069605	Jun 23 04:24:58 PM PDT 24	Jun 23 04:25:01 PM PDT 24	2624915082 ps
T357	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1324783474	Jun 23 04:25:01 PM PDT 24	Jun 23 04:25:06 PM PDT 24	2617438365 ps
T358	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1062126870	Jun 23 04:25:38 PM PDT 24	Jun 23 04:25:41 PM PDT 24	3754075067 ps
T359	/workspace/coverage/default/9.sysrst_ctrl_smoke.2170689002	Jun 23 04:24:40 PM PDT 24	Jun 23 04:24:47 PM PDT 24	2115147654 ps
T360	/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2068352101	Jun 23 04:24:36 PM PDT 24	Jun 23 04:24:39 PM PDT 24	2490605765 ps
T361	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.242321070	Jun 23 04:25:04 PM PDT 24	Jun 23 04:25:14 PM PDT 24	3546389635 ps
T63	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1385973763	Jun 23 04:26:05 PM PDT 24	Jun 23 04:26:23 PM PDT 24	27846088837 ps
T50	/workspace/coverage/default/12.sysrst_ctrl_stress_all.3742686120	Jun 23 04:24:58 PM PDT 24	Jun 23 04:25:12 PM PDT 24	12306305090 ps
T65	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1997379156	Jun 23 04:25:29 PM PDT 24	Jun 23 04:25:32 PM PDT 24	7708107350 ps
T362	/workspace/coverage/default/2.sysrst_ctrl_alert_test.791592249	Jun 23 04:24:23 PM PDT 24	Jun 23 04:24:29 PM PDT 24	2014362534 ps
T281	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3700017479	Jun 23 04:25:39 PM PDT 24	Jun 23 04:25:42 PM PDT 24	2464524130 ps
T363	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1660321806	Jun 23 04:25:36 PM PDT 24	Jun 23 04:25:44 PM PDT 24	5150248199 ps
T173	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.825481585	Jun 23 04:24:44 PM PDT 24	Jun 23 04:24:48 PM PDT 24	4771339994 ps
T71	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1880287381	Jun 23 04:25:34 PM PDT 24	Jun 23 04:25:37 PM PDT 24	3123946175 ps
T64	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3572558593	Jun 23 04:26:17 PM PDT 24	Jun 23 04:26:35 PM PDT 24	25103957195 ps
T110	/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3389966505	Jun 23 04:25:21 PM PDT 24	Jun 23 04:25:26 PM PDT 24	2595525520 ps
T175	/workspace/coverage/default/42.sysrst_ctrl_stress_all.1331847460	Jun 23 04:25:49 PM PDT 24	Jun 23 04:26:00 PM PDT 24	56915393252 ps
T144	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1793457270	Jun 23 04:24:24 PM PDT 24	Jun 23 04:24:30 PM PDT 24	3088650435 ps
T176	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1135674605	Jun 23 04:25:50 PM PDT 24	Jun 23 04:26:55 PM PDT 24	50589608874 ps
T66	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.679732541	Jun 23 04:24:56 PM PDT 24	Jun 23 04:26:19 PM PDT 24	173025485756 ps
T177	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.1151881692	Jun 23 04:25:19 PM PDT 24	Jun 23 04:27:31 PM PDT 24	190838952577 ps
T72	/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.331782775	Jun 23 04:26:06 PM PDT 24	Jun 23 04:26:18 PM PDT 24	3781873530 ps
T101	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3525557021	Jun 23 04:25:06 PM PDT 24	Jun 23 04:25:14 PM PDT 24	2511908453 ps
T81	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.1793178903	Jun 23 04:25:47 PM PDT 24	Jun 23 04:26:17 PM PDT 24	54039703300 ps
T102	/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.317232592	Jun 23 04:24:53 PM PDT 24	Jun 23 04:24:57 PM PDT 24	2515291049 ps
T67	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3072041532	Jun 23 04:25:24 PM PDT 24	Jun 23 04:27:12 PM PDT 24	51273606973 ps
T103	/workspace/coverage/default/37.sysrst_ctrl_alert_test.2881441631	Jun 23 04:25:33 PM PDT 24	Jun 23 04:25:37 PM PDT 24	2018110894 ps
T104	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.4211158135	Jun 23 04:24:54 PM PDT 24	Jun 23 04:25:02 PM PDT 24	2510250347 ps
T73	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2534420380	Jun 23 04:24:28 PM PDT 24	Jun 23 04:27:29 PM PDT 24	146408158842 ps
T78	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1724030158	Jun 23 04:24:25 PM PDT 24	Jun 23 04:26:43 PM PDT 24	1799232973364 ps
T105	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.1287969015	Jun 23 04:25:21 PM PDT 24	Jun 23 04:25:23 PM PDT 24	7440181473 ps
T230	/workspace/coverage/default/23.sysrst_ctrl_stress_all.3129979322	Jun 23 04:25:20 PM PDT 24	Jun 23 04:26:00 PM PDT 24	88110791803 ps
T75	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.3255523483	Jun 23 04:25:11 PM PDT 24	Jun 23 04:25:16 PM PDT 24	2375997358 ps
T192	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1847224945	Jun 23 04:24:54 PM PDT 24	Jun 23 04:24:56 PM PDT 24	2097418093 ps
T193	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.656297376	Jun 23 04:25:47 PM PDT 24	Jun 23 04:25:50 PM PDT 24	2226666167 ps
T194	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1659606452	Jun 23 04:25:35 PM PDT 24	Jun 23 04:25:38 PM PDT 24	3674524617 ps
T76	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3652476511	Jun 23 04:24:18 PM PDT 24	Jun 23 04:24:21 PM PDT 24	2955269004 ps
T180	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1425382995	Jun 23 04:25:55 PM PDT 24	Jun 23 04:26:31 PM PDT 24	48065683428 ps
T129	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.1426983627	Jun 23 04:25:24 PM PDT 24	Jun 23 04:25:27 PM PDT 24	2971635269 ps
T181	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.584135009	Jun 23 04:25:21 PM PDT 24	Jun 23 04:25:33 PM PDT 24	4411797372 ps
T182	/workspace/coverage/default/29.sysrst_ctrl_stress_all.3444068800	Jun 23 04:25:18 PM PDT 24	Jun 23 04:26:02 PM PDT 24	354944534366 ps
T183	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.2662154549	Jun 23 04:25:18 PM PDT 24	Jun 23 04:26:30 PM PDT 24	98902736223 ps
T184	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1034099754	Jun 23 04:25:12 PM PDT 24	Jun 23 04:25:21 PM PDT 24	2610343265 ps
T185	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1170982320	Jun 23 04:25:55 PM PDT 24	Jun 23 04:25:57 PM PDT 24	3600767403 ps
T186	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.3052169570	Jun 23 04:25:08 PM PDT 24	Jun 23 04:28:40 PM PDT 24	85220611656 ps
T187	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2441939777	Jun 23 04:24:28 PM PDT 24	Jun 23 04:25:25 PM PDT 24	42016733623 ps
T364	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.848713390	Jun 23 04:25:16 PM PDT 24	Jun 23 04:25:18 PM PDT 24	2136374056 ps
T143	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3671460160	Jun 23 04:25:14 PM PDT 24	Jun 23 04:25:36 PM PDT 24	30848735850 ps
T108	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1012213496	Jun 23 04:24:28 PM PDT 24	Jun 23 04:24:36 PM PDT 24	3026720602 ps
T160	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3119293058	Jun 23 04:25:11 PM PDT 24	Jun 23 04:25:15 PM PDT 24	3218266290 ps
T161	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.1023938383	Jun 23 04:24:45 PM PDT 24	Jun 23 04:24:48 PM PDT 24	2487491287 ps
T162	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2253121471	Jun 23 04:25:56 PM PDT 24	Jun 23 04:26:00 PM PDT 24	5090883195 ps
T163	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1484101009	Jun 23 04:25:20 PM PDT 24	Jun 23 04:25:23 PM PDT 24	2626425142 ps
T164	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.1898746003	Jun 23 04:25:16 PM PDT 24	Jun 23 04:25:20 PM PDT 24	2619576083 ps
T165	/workspace/coverage/default/43.sysrst_ctrl_smoke.917190291	Jun 23 04:25:43 PM PDT 24	Jun 23 04:25:49 PM PDT 24	2111970689 ps
T166	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3231434695	Jun 23 04:25:05 PM PDT 24	Jun 23 04:25:14 PM PDT 24	2512716403 ps
T167	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2578843840	Jun 23 04:25:00 PM PDT 24	Jun 23 04:25:11 PM PDT 24	15025680210 ps
T155	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.2667852497	Jun 23 04:25:05 PM PDT 24	Jun 23 04:25:10 PM PDT 24	2696331583 ps
T291	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.3537072098	Jun 23 04:24:37 PM PDT 24	Jun 23 04:24:40 PM PDT 24	2056929843 ps
T275	/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.2747218075	Jun 23 04:25:45 PM PDT 24	Jun 23 04:25:48 PM PDT 24	3460784866 ps
T77	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2650652443	Jun 23 04:25:05 PM PDT 24	Jun 23 04:27:25 PM PDT 24	54020289473 ps
T292	/workspace/coverage/default/39.sysrst_ctrl_stress_all.2458224305	Jun 23 04:25:51 PM PDT 24	Jun 23 04:25:58 PM PDT 24	8228714878 ps
T293	/workspace/coverage/default/45.sysrst_ctrl_smoke.2659219486	Jun 23 04:25:46 PM PDT 24	Jun 23 04:25:53 PM PDT 24	2113794572 ps
T294	/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.1903364115	Jun 23 04:24:21 PM PDT 24	Jun 23 04:24:23 PM PDT 24	2310889481 ps
T295	/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.295132943	Jun 23 04:20:06 PM PDT 24	Jun 23 04:20:10 PM PDT 24	2036201760 ps
T296	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.997306740	Jun 23 04:25:27 PM PDT 24	Jun 23 04:25:33 PM PDT 24	2512473382 ps
T365	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1933850004	Jun 23 04:25:44 PM PDT 24	Jun 23 04:25:45 PM PDT 24	2532344289 ps
T125	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.655219998	Jun 23 04:24:32 PM PDT 24	Jun 23 04:26:29 PM PDT 24	48000483641 ps
T276	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.3683480866	Jun 23 04:24:55 PM PDT 24	Jun 23 04:27:20 PM PDT 24	113595617336 ps
T366	/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.531876022	Jun 23 04:25:52 PM PDT 24	Jun 23 04:25:55 PM PDT 24	3736447103 ps
T367	/workspace/coverage/default/13.sysrst_ctrl_alert_test.683582940	Jun 23 04:24:57 PM PDT 24	Jun 23 04:25:00 PM PDT 24	2031446025 ps
T368	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.3975210139	Jun 23 04:24:40 PM PDT 24	Jun 23 04:24:49 PM PDT 24	2482319215 ps
T369	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2642412764	Jun 23 04:25:45 PM PDT 24	Jun 23 04:25:48 PM PDT 24	2214122486 ps
T370	/workspace/coverage/default/19.sysrst_ctrl_smoke.506971200	Jun 23 04:24:41 PM PDT 24	Jun 23 04:24:43 PM PDT 24	2135483674 ps
T371	/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2877060653	Jun 23 04:24:21 PM PDT 24	Jun 23 04:24:25 PM PDT 24	2206644657 ps
T372	/workspace/coverage/default/0.sysrst_ctrl_smoke.3646989107	Jun 23 04:23:29 PM PDT 24	Jun 23 04:23:31 PM PDT 24	2131876246 ps
T373	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.543883048	Jun 23 04:25:14 PM PDT 24	Jun 23 04:26:28 PM PDT 24	27469033914 ps
T79	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3617433985	Jun 23 04:24:20 PM PDT 24	Jun 23 04:24:30 PM PDT 24	12206994438 ps
T158	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3590078140	Jun 23 04:25:55 PM PDT 24	Jun 23 04:27:09 PM PDT 24	60628923895 ps
T224	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.4269790904	Jun 23 04:24:59 PM PDT 24	Jun 23 04:26:11 PM PDT 24	111944865241 ps
T226	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2825195793	Jun 23 04:24:17 PM PDT 24	Jun 23 04:24:57 PM PDT 24	58080529914 ps
T130	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.596489846	Jun 23 04:25:00 PM PDT 24	Jun 23 04:25:04 PM PDT 24	3026871888 ps
T374	/workspace/coverage/default/6.sysrst_ctrl_stress_all.4287864421	Jun 23 04:24:33 PM PDT 24	Jun 23 04:24:58 PM PDT 24	10307560209 ps
T375	/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.751050451	Jun 23 04:25:27 PM PDT 24	Jun 23 04:25:32 PM PDT 24	2618822156 ps
T322	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3863009463	Jun 23 04:25:59 PM PDT 24	Jun 23 04:26:21 PM PDT 24	81904375609 ps
T376	/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3335574377	Jun 23 04:25:22 PM PDT 24	Jun 23 04:25:26 PM PDT 24	2538090490 ps
T109	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1008286831	Jun 23 04:24:57 PM PDT 24	Jun 23 04:24:59 PM PDT 24	3813119347 ps
T377	/workspace/coverage/default/20.sysrst_ctrl_stress_all.3132625990	Jun 23 04:24:58 PM PDT 24	Jun 23 04:25:03 PM PDT 24	13273915884 ps
T378	/workspace/coverage/default/17.sysrst_ctrl_smoke.3045433161	Jun 23 04:24:55 PM PDT 24	Jun 23 04:25:00 PM PDT 24	2117531874 ps
T379	/workspace/coverage/default/10.sysrst_ctrl_smoke.2560614382	Jun 23 04:24:33 PM PDT 24	Jun 23 04:24:36 PM PDT 24	2127873064 ps
T195	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.546005261	Jun 23 04:24:17 PM PDT 24	Jun 23 04:24:25 PM PDT 24	4550266110 ps
T380	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1349749152	Jun 23 04:25:55 PM PDT 24	Jun 23 04:25:57 PM PDT 24	2471920270 ps
T381	/workspace/coverage/default/2.sysrst_ctrl_smoke.664517788	Jun 23 04:24:20 PM PDT 24	Jun 23 04:24:27 PM PDT 24	2111110641 ps
T382	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3591311349	Jun 23 04:25:30 PM PDT 24	Jun 23 04:25:38 PM PDT 24	2875811230 ps
T383	/workspace/coverage/default/6.sysrst_ctrl_alert_test.3540291831	Jun 23 04:24:48 PM PDT 24	Jun 23 04:24:51 PM PDT 24	2032008013 ps
T323	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2471533314	Jun 23 04:25:56 PM PDT 24	Jun 23 04:29:49 PM PDT 24	86186371402 ps
T384	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.1025886519	Jun 23 04:23:09 PM PDT 24	Jun 23 04:23:17 PM PDT 24	2611546414 ps
T385	/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.3795524441	Jun 23 04:25:09 PM PDT 24	Jun 23 04:25:15 PM PDT 24	2491393804 ps
T386	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3890222996	Jun 23 04:25:12 PM PDT 24	Jun 23 04:25:16 PM PDT 24	2524910240 ps
T387	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.347062712	Jun 23 04:25:44 PM PDT 24	Jun 23 04:25:52 PM PDT 24	2611651957 ps
T82	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.3929551230	Jun 23 04:25:12 PM PDT 24	Jun 23 04:26:28 PM PDT 24	86211854496 ps
T388	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2524307881	Jun 23 04:24:47 PM PDT 24	Jun 23 04:24:50 PM PDT 24	3748780918 ps
T156	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2511671494	Jun 23 04:24:36 PM PDT 24	Jun 23 04:24:42 PM PDT 24	2441889405 ps
T389	/workspace/coverage/default/39.sysrst_ctrl_alert_test.2430664228	Jun 23 04:25:39 PM PDT 24	Jun 23 04:25:43 PM PDT 24	2025497082 ps
T390	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.3468298018	Jun 23 04:24:47 PM PDT 24	Jun 23 04:24:58 PM PDT 24	2763439925 ps
T282	/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.3435613042	Jun 23 04:25:20 PM PDT 24	Jun 23 04:25:24 PM PDT 24	2448913583 ps
T391	/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.156022974	Jun 23 04:25:22 PM PDT 24	Jun 23 04:25:25 PM PDT 24	3359164678 ps
T227	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1612773430	Jun 23 04:25:00 PM PDT 24	Jun 23 04:26:15 PM PDT 24	89171988253 ps
T392	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1679950920	Jun 23 04:25:00 PM PDT 24	Jun 23 04:25:07 PM PDT 24	2449852643 ps
T74	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3549271403	Jun 23 04:26:03 PM PDT 24	Jun 23 04:28:21 PM PDT 24	113305402750 ps
T393	/workspace/coverage/default/34.sysrst_ctrl_smoke.2740139946	Jun 23 04:25:24 PM PDT 24	Jun 23 04:25:26 PM PDT 24	2135481586 ps
T313	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.528865324	Jun 23 04:24:10 PM PDT 24	Jun 23 04:28:00 PM PDT 24	86305620105 ps
T83	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3252487503	Jun 23 04:25:56 PM PDT 24	Jun 23 04:30:45 PM PDT 24	108645185557 ps
T84	/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1056078296	Jun 23 04:25:57 PM PDT 24	Jun 23 04:27:37 PM PDT 24	166896568866 ps
T283	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.4220329679	Jun 23 04:25:18 PM PDT 24	Jun 23 04:25:22 PM PDT 24	2462736155 ps
T394	/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.686277767	Jun 23 04:24:42 PM PDT 24	Jun 23 04:24:46 PM PDT 24	2232994797 ps
T319	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.3206223026	Jun 23 04:24:42 PM PDT 24	Jun 23 04:25:48 PM PDT 24	105501583489 ps
T395	/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.1033999630	Jun 23 04:24:28 PM PDT 24	Jun 23 04:24:38 PM PDT 24	3059704142 ps
T124	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2611587769	Jun 23 04:25:31 PM PDT 24	Jun 23 04:25:34 PM PDT 24	5012335421 ps
T286	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.4111971738	Jun 23 04:24:51 PM PDT 24	Jun 23 04:25:55 PM PDT 24	21980489891 ps
T396	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2532948087	Jun 23 04:24:30 PM PDT 24	Jun 23 04:24:36 PM PDT 24	2487449729 ps
T397	/workspace/coverage/default/5.sysrst_ctrl_stress_all.2977231845	Jun 23 04:25:43 PM PDT 24	Jun 23 04:26:37 PM PDT 24	281311096977 ps
T284	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1837247353	Jun 23 04:25:25 PM PDT 24	Jun 23 04:25:32 PM PDT 24	2515135472 ps
T398	/workspace/coverage/default/22.sysrst_ctrl_alert_test.316704493	Jun 23 04:25:06 PM PDT 24	Jun 23 04:25:12 PM PDT 24	2012226267 ps
T399	/workspace/coverage/default/15.sysrst_ctrl_alert_test.852918934	Jun 23 04:24:59 PM PDT 24	Jun 23 04:25:01 PM PDT 24	2065231788 ps
T400	/workspace/coverage/default/32.sysrst_ctrl_stress_all.1955555501	Jun 23 04:25:37 PM PDT 24	Jun 23 04:25:42 PM PDT 24	6577065433 ps
T126	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.169698830	Jun 23 04:25:25 PM PDT 24	Jun 23 04:25:32 PM PDT 24	3049675757 ps
T401	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2226449595	Jun 23 04:24:21 PM PDT 24	Jun 23 04:24:24 PM PDT 24	2629358689 ps
T119	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3468344285	Jun 23 04:24:38 PM PDT 24	Jun 23 04:24:43 PM PDT 24	6930385428 ps
T402	/workspace/coverage/default/21.sysrst_ctrl_smoke.3938084566	Jun 23 04:24:51 PM PDT 24	Jun 23 04:24:53 PM PDT 24	2187820307 ps
T403	/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3925365220	Jun 23 04:25:31 PM PDT 24	Jun 23 04:25:37 PM PDT 24	2042364094 ps
T404	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.4137476375	Jun 23 04:25:09 PM PDT 24	Jun 23 04:25:16 PM PDT 24	2441766163 ps
T232	/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2726759422	Jun 23 04:25:50 PM PDT 24	Jun 23 04:27:49 PM PDT 24	179333081853 ps
T115	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.826957822	Jun 23 04:25:07 PM PDT 24	Jun 23 04:25:09 PM PDT 24	7278251767 ps
T159	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1663063067	Jun 23 04:25:35 PM PDT 24	Jun 23 04:25:36 PM PDT 24	2795454438 ps
T247	/workspace/coverage/default/24.sysrst_ctrl_stress_all.1326497941	Jun 23 04:25:18 PM PDT 24	Jun 23 04:25:37 PM PDT 24	90269189446 ps
T405	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2979015545	Jun 23 04:25:29 PM PDT 24	Jun 23 04:25:32 PM PDT 24	2907989504 ps
T406	/workspace/coverage/default/29.sysrst_ctrl_smoke.3366691631	Jun 23 04:25:20 PM PDT 24	Jun 23 04:25:22 PM PDT 24	2179919896 ps
T407	/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2890135305	Jun 23 04:26:05 PM PDT 24	Jun 23 04:26:10 PM PDT 24	3951388502 ps
T408	/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.698223188	Jun 23 04:24:50 PM PDT 24	Jun 23 04:24:57 PM PDT 24	3600688707 ps
T409	/workspace/coverage/default/47.sysrst_ctrl_smoke.3163704677	Jun 23 04:25:55 PM PDT 24	Jun 23 04:25:57 PM PDT 24	2127935253 ps
T216	/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.4133049354	Jun 23 04:26:05 PM PDT 24	Jun 23 04:26:20 PM PDT 24	22596063785 ps
T410	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1088559287	Jun 23 04:24:39 PM PDT 24	Jun 23 04:24:47 PM PDT 24	4257586981 ps
T411	/workspace/coverage/default/8.sysrst_ctrl_alert_test.1784519887	Jun 23 04:24:47 PM PDT 24	Jun 23 04:24:49 PM PDT 24	2032565060 ps
T233	/workspace/coverage/default/28.sysrst_ctrl_stress_all.42062801	Jun 23 04:25:30 PM PDT 24	Jun 23 04:26:23 PM PDT 24	79774942416 ps
T412	/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3451109460	Jun 23 04:25:43 PM PDT 24	Jun 23 04:25:46 PM PDT 24	2488391671 ps
T413	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2056285742	Jun 23 04:25:55 PM PDT 24	Jun 23 04:26:54 PM PDT 24	21330769028 ps
T85	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2662014986	Jun 23 04:25:26 PM PDT 24	Jun 23 04:28:21 PM PDT 24	931074946800 ps
T414	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2852918421	Jun 23 04:25:09 PM PDT 24	Jun 23 04:25:13 PM PDT 24	2250037322 ps
T415	/workspace/coverage/default/35.sysrst_ctrl_alert_test.996830911	Jun 23 04:25:15 PM PDT 24	Jun 23 04:25:19 PM PDT 24	2017341247 ps
T416	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2428468396	Jun 23 04:26:00 PM PDT 24	Jun 23 04:26:02 PM PDT 24	2349208501 ps
T417	/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2397388680	Jun 23 04:25:54 PM PDT 24	Jun 23 04:25:55 PM PDT 24	2664939900 ps
T418	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.215145241	Jun 23 04:24:37 PM PDT 24	Jun 23 04:24:44 PM PDT 24	3692400759 ps
T419	/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.1921455643	Jun 23 04:25:42 PM PDT 24	Jun 23 04:25:53 PM PDT 24	3636549792 ps
T420	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.3345082281	Jun 23 04:25:42 PM PDT 24	Jun 23 04:25:50 PM PDT 24	4280788673 ps
T421	/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.427681896	Jun 23 04:24:19 PM PDT 24	Jun 23 04:24:28 PM PDT 24	3426602977 ps
T422	/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3882829318	Jun 23 04:25:00 PM PDT 24	Jun 23 04:25:02 PM PDT 24	2507652796 ps
T423	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.1059066720	Jun 23 04:25:41 PM PDT 24	Jun 23 04:26:05 PM PDT 24	32885717045 ps