SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
sysrst_ctrl_combo_detect_action_cg_0 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sysrst_ctrl_combo_detect_action_cg_1 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sysrst_ctrl_combo_detect_action_cg_2 | 100.00 | 1 | 100 | 1 | 64 | 64 |
sysrst_ctrl_combo_detect_action_cg_3 | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 28 | 0 | 28 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_bat_disable | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_interrupt | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_rst_req | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 28 | 0 | 28 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_bat_disable | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_interrupt | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_rst_req | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 28 | 0 | 28 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_bat_disable | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_interrupt | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_rst_req | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 28 | 0 | 28 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_bat_disable | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_ec_rst | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_interrupt | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_ac_present_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key0_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key1_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_key2_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_precondition_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_pwrb_in_sel | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 | |
cp_rst_req | 2 | 0 | 2 | 100.00 | 100 | 1 | 1 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 439 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 111 | 1 | T6 | 5 | T31 | 8 | T92 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 334 | 1 | T1 | 13 | T5 | 5 | T15 | 3 | ||||
auto[1] | 216 | 1 | T1 | 2 | T3 | 3 | T6 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 296 | 1 | T1 | 10 | T5 | 5 | T15 | 3 | ||||
auto[1] | 254 | 1 | T1 | 5 | T17 | 1 | T3 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 263 | 1 | T1 | 10 | T5 | 5 | T15 | 3 | ||||
auto[1] | 287 | 1 | T1 | 5 | T3 | 8 | T6 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 411 | 1 | T1 | 15 | T5 | 5 | T17 | 1 | ||||
auto[1] | 139 | 1 | T15 | 3 | T6 | 5 | T7 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 406 | 1 | T1 | 15 | T5 | 5 | T17 | 1 | ||||
auto[1] | 144 | 1 | T15 | 3 | T6 | 5 | T7 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 462 | 1 | T1 | 8 | T5 | 5 | T15 | 3 | ||||
auto[1] | 88 | 1 | T1 | 7 | T7 | 2 | T92 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 535 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 15 | 1 | T195 | 1 | T196 | 2 | T297 | 9 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 513 | 1 | T1 | 8 | T5 | 5 | T15 | 3 | ||||
auto[1] | 37 | 1 | T1 | 7 | T92 | 4 | T301 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 493 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 57 | 1 | T31 | 8 | T195 | 1 | T210 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 518 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 32 | 1 | T6 | 5 | T149 | 2 | T114 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 515 | 1 | T1 | 15 | T5 | 5 | T17 | 1 | ||||
auto[1] | 35 | 1 | T15 | 3 | T6 | 5 | T31 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 425 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 125 | 1 | T7 | 2 | T10 | 3 | T40 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 306 | 1 | T5 | 5 | T3 | 8 | T6 | 3 | ||||
auto[1] | 244 | 1 | T1 | 15 | T15 | 3 | T17 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 470 | 1 | T1 | 13 | T15 | 3 | T17 | 1 | ||||
auto[1] | 162 | 1 | T1 | 2 | T5 | 5 | T3 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 323 | 1 | T1 | 13 | T5 | 5 | T15 | 3 | ||||
auto[1] | 309 | 1 | T1 | 2 | T3 | 3 | T6 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 348 | 1 | T1 | 10 | T5 | 5 | T15 | 3 | ||||
auto[1] | 284 | 1 | T1 | 5 | T17 | 1 | T3 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 333 | 1 | T1 | 10 | T5 | 5 | T15 | 3 | ||||
auto[1] | 299 | 1 | T1 | 5 | T3 | 8 | T6 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 465 | 1 | T1 | 13 | T5 | 5 | T15 | 3 | ||||
auto[1] | 167 | 1 | T1 | 2 | T6 | 4 | T7 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 461 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 171 | 1 | T7 | 3 | T33 | 1 | T212 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 490 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 142 | 1 | T6 | 4 | T93 | 3 | T212 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 569 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 63 | 1 | T6 | 4 | T301 | 3 | T210 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 563 | 1 | T1 | 15 | T15 | 3 | T17 | 1 | ||||
auto[1] | 69 | 1 | T5 | 5 | T3 | 3 | T59 | 17 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 553 | 1 | T1 | 13 | T5 | 5 | T15 | 3 | ||||
auto[1] | 79 | 1 | T1 | 2 | T3 | 3 | T31 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 585 | 1 | T1 | 13 | T5 | 5 | T15 | 3 | ||||
auto[1] | 47 | 1 | T1 | 2 | T3 | 3 | T31 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 588 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 44 | 1 | T263 | 2 | T77 | 2 | T324 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 443 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 189 | 1 | T6 | 4 | T8 | 11 | T10 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 348 | 1 | T5 | 5 | T3 | 8 | T6 | 3 | ||||
auto[1] | 284 | 1 | T1 | 15 | T15 | 3 | T17 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 488 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 130 | 1 | T17 | 1 | T6 | 3 | T7 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 388 | 1 | T1 | 13 | T5 | 5 | T15 | 3 | ||||
auto[1] | 230 | 1 | T1 | 2 | T3 | 3 | T6 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 350 | 1 | T1 | 10 | T5 | 5 | T15 | 3 | ||||
auto[1] | 268 | 1 | T1 | 5 | T17 | 1 | T3 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 272 | 1 | T1 | 10 | T5 | 5 | T15 | 3 | ||||
auto[1] | 346 | 1 | T1 | 5 | T3 | 8 | T6 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 457 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 161 | 1 | T8 | 12 | T10 | 2 | T39 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 432 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 186 | 1 | T7 | 5 | T10 | 2 | T33 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 492 | 1 | T1 | 11 | T5 | 5 | T15 | 3 | ||||
auto[1] | 126 | 1 | T1 | 4 | T17 | 1 | T3 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 550 | 1 | T1 | 11 | T5 | 5 | T15 | 3 | ||||
auto[1] | 68 | 1 | T1 | 4 | T3 | 5 | T211 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 563 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 55 | 1 | T17 | 1 | T3 | 5 | T6 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 545 | 1 | T1 | 11 | T5 | 5 | T15 | 3 | ||||
auto[1] | 73 | 1 | T1 | 4 | T6 | 3 | T39 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 595 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 23 | 1 | T149 | 2 | T302 | 4 | T263 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 574 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 44 | 1 | T3 | 5 | T301 | 2 | T297 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 480 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 138 | 1 | T17 | 1 | T39 | 2 | T33 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 352 | 1 | T5 | 5 | T3 | 8 | T6 | 3 | ||||
auto[1] | 266 | 1 | T1 | 15 | T15 | 3 | T17 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 499 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 140 | 1 | T8 | 10 | T10 | 1 | T31 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 354 | 1 | T1 | 13 | T5 | 5 | T15 | 3 | ||||
auto[1] | 285 | 1 | T1 | 2 | T3 | 3 | T6 | 4 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 320 | 1 | T1 | 10 | T5 | 5 | T15 | 3 | ||||
auto[1] | 319 | 1 | T1 | 5 | T17 | 1 | T3 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 286 | 1 | T1 | 10 | T5 | 5 | T15 | 3 | ||||
auto[1] | 353 | 1 | T1 | 5 | T3 | 8 | T6 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 501 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 138 | 1 | T7 | 5 | T31 | 5 | T40 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 481 | 1 | T1 | 5 | T5 | 5 | T15 | 3 | ||||
auto[1] | 158 | 1 | T1 | 10 | T3 | 5 | T7 | 5 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 492 | 1 | T1 | 5 | T5 | 5 | T15 | 3 | ||||
auto[1] | 147 | 1 | T1 | 10 | T10 | 1 | T23 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 591 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 48 | 1 | T3 | 5 | T301 | 2 | T297 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 586 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 53 | 1 | T3 | 5 | T59 | 17 | T197 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 578 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 61 | 1 | T31 | 5 | T59 | 17 | T210 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 599 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 40 | 1 | T31 | 5 | T211 | 3 | T301 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 608 | 1 | T1 | 5 | T5 | 5 | T15 | 3 | ||||
auto[1] | 31 | 1 | T1 | 10 | T3 | 5 | T297 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 465 | 1 | T1 | 15 | T5 | 5 | T15 | 3 | ||||
auto[1] | 174 | 1 | T10 | 1 | T31 | 5 | T23 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
auto[0] | 317 | 1 | T5 | 5 | T3 | 8 | T6 | 3 | ||||
auto[1] | 322 | 1 | T1 | 15 | T15 | 3 | T17 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |