Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.56	99.27	96.33	100.00	95.51	98.74	99.33	93.71

Total tests in report: 906

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
57.57	57.57	75.85	75.85	64.91	64.91	90.30	90.30	12.82	12.82	76.97	76.97	67.15	67.15	14.96	14.96	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.294430207
74.79	17.22	88.86	13.01	81.40	16.48	94.18	3.88	55.77	42.95	89.43	12.46	88.34	21.19	25.55	10.59	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1120112833
81.00	6.21	91.83	2.97	85.95	4.55	94.63	0.46	64.74	8.97	92.13	2.70	91.62	3.28	46.10	20.55	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2977257423
85.21	4.21	94.08	2.26	88.47	2.53	95.43	0.80	83.97	19.23	93.94	1.81	93.74	2.12	46.80	0.70	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2814738146
87.70	2.50	97.48	3.40	91.84	3.36	96.80	1.37	83.97	0.00	97.04	3.11	94.99	1.25	51.80	5.01	/workspace/coverage/default/14.sysrst_ctrl_stress_all.770590685
90.10	2.40	97.80	0.32	92.16	0.33	96.80	0.00	87.18	3.21	97.30	0.26	95.86	0.87	63.62	11.82	/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.773990826
91.54	1.44	97.87	0.07	93.40	1.24	97.49	0.68	87.18	0.00	97.41	0.11	95.86	0.00	71.59	7.97	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3539339401
92.90	1.35	98.43	0.56	93.91	0.51	97.95	0.46	91.67	4.49	97.89	0.48	97.50	1.64	72.93	1.34	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1671485011
93.53	0.64	98.45	0.02	94.14	0.23	97.95	0.00	91.67	0.00	97.97	0.07	97.78	0.29	76.78	3.84	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1587149906
94.12	0.59	98.56	0.11	94.21	0.08	98.17	0.23	91.67	0.00	97.97	0.00	97.78	0.00	80.50	3.73	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2389895706
94.46	0.34	98.60	0.04	94.31	0.10	98.17	0.00	91.67	0.00	97.97	0.00	97.78	0.00	82.71	2.21	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.1212048098
94.72	0.26	98.64	0.04	94.31	0.00	98.17	0.00	91.67	0.00	97.97	0.00	97.78	0.00	84.52	1.80	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3856926633
94.96	0.24	98.69	0.06	94.39	0.08	99.54	1.37	91.67	0.00	97.97	0.00	97.78	0.00	84.69	0.17	/workspace/coverage/default/1.sysrst_ctrl_alert_test.1956250991
95.15	0.19	98.69	0.00	94.39	0.00	99.54	0.00	91.67	0.00	97.97	0.00	97.78	0.00	86.03	1.34	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.4189460508
95.33	0.18	98.75	0.06	94.44	0.05	99.54	0.00	92.31	0.64	98.04	0.07	97.88	0.10	86.38	0.35	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3898312987
95.50	0.16	98.79	0.04	94.44	0.00	99.54	0.00	92.31	0.00	98.04	0.00	97.88	0.00	87.49	1.11	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3758571490
95.66	0.16	98.82	0.04	94.46	0.03	99.54	0.00	92.95	0.64	98.08	0.04	97.98	0.10	87.78	0.29	/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2357131603
95.81	0.15	98.84	0.02	94.46	0.00	99.54	0.00	92.95	0.00	98.11	0.04	97.98	0.00	88.77	0.99	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3173419055
95.95	0.14	98.88	0.04	94.49	0.03	99.54	0.00	93.59	0.64	98.15	0.04	98.07	0.10	88.94	0.17	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2759144662
96.10	0.14	98.88	0.00	95.37	0.88	99.54	0.00	93.59	0.00	98.15	0.00	98.07	0.00	89.06	0.12	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2278560709
96.23	0.13	98.92	0.04	95.40	0.03	99.54	0.00	94.23	0.64	98.19	0.04	98.27	0.19	89.06	0.00	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.2541179478
96.36	0.13	98.96	0.04	95.42	0.03	99.54	0.00	94.87	0.64	98.23	0.04	98.36	0.10	89.12	0.06	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2834184035
96.48	0.12	98.96	0.00	95.53	0.10	99.54	0.00	94.87	0.00	98.23	0.00	99.13	0.77	89.12	0.00	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.329179711
96.60	0.12	98.99	0.04	95.55	0.03	99.54	0.00	95.51	0.64	98.26	0.04	99.23	0.10	89.12	0.00	/workspace/coverage/default/32.sysrst_ctrl_stress_all.2686433394
96.72	0.11	99.01	0.02	95.58	0.03	99.54	0.00	95.51	0.00	98.26	0.00	99.23	0.00	89.87	0.76	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2871039625
96.81	0.10	99.01	0.00	95.60	0.03	100.00	0.46	95.51	0.00	98.26	0.00	99.33	0.10	89.99	0.12	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.2549795069
96.90	0.08	99.01	0.00	95.60	0.00	100.00	0.00	95.51	0.00	98.26	0.00	99.33	0.00	90.57	0.58	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1615564516
96.95	0.06	99.07	0.06	95.60	0.00	100.00	0.00	95.51	0.00	98.37	0.11	99.33	0.00	90.80	0.23	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1582465755
97.00	0.05	99.10	0.04	95.70	0.10	100.00	0.00	95.51	0.00	98.45	0.07	99.33	0.00	90.92	0.12	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_rw.1647364837
97.05	0.04	99.10	0.00	96.01	0.30	100.00	0.00	95.51	0.00	98.45	0.00	99.33	0.00	90.92	0.00	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.768819325
97.09	0.04	99.10	0.00	96.01	0.00	100.00	0.00	95.51	0.00	98.45	0.00	99.33	0.00	91.21	0.29	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1161892346
97.13	0.04	99.10	0.00	96.01	0.00	100.00	0.00	95.51	0.00	98.45	0.00	99.33	0.00	91.50	0.29	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.864149688
97.17	0.04	99.14	0.04	96.01	0.00	100.00	0.00	95.51	0.00	98.52	0.07	99.33	0.00	91.68	0.17	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.4289432628
97.20	0.03	99.14	0.00	96.01	0.00	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	91.91	0.23	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3544096493
97.23	0.02	99.14	0.00	96.01	0.00	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	92.08	0.17	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2281058641
97.25	0.02	99.14	0.00	96.01	0.00	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	92.26	0.17	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2738470601
97.28	0.02	99.14	0.00	96.01	0.00	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	92.43	0.17	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2416200095
97.30	0.02	99.14	0.00	96.16	0.15	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	92.43	0.00	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.360154925
97.32	0.02	99.16	0.02	96.16	0.00	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	92.55	0.12	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1270676346
97.33	0.02	99.16	0.00	96.16	0.00	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	92.67	0.12	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3351408710
97.35	0.02	99.16	0.00	96.16	0.00	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	92.78	0.12	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.3691625450
97.37	0.02	99.16	0.00	96.16	0.00	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	92.90	0.12	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3772005658
97.38	0.02	99.16	0.00	96.16	0.00	100.00	0.00	95.51	0.00	98.52	0.00	99.33	0.00	93.02	0.12	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3693883315
97.40	0.02	99.20	0.04	96.16	0.00	100.00	0.00	95.51	0.00	98.60	0.07	99.33	0.00	93.02	0.00	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.4213250121
97.41	0.01	99.20	0.00	96.23	0.08	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.02	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.2716130266
97.42	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.07	0.06	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.2752571333
97.43	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.13	0.06	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.291760754
97.44	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.19	0.06	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.4094742647
97.44	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.25	0.06	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.12700375
97.45	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.31	0.06	/workspace/coverage/default/28.sysrst_ctrl_stress_all.1914751015
97.46	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.36	0.06	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.3417034689
97.47	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.42	0.06	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.202666339
97.48	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.48	0.06	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.544931647
97.49	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.54	0.06	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.31658706
97.49	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.60	0.06	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1643659689
97.50	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.66	0.06	/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1401246882
97.51	0.01	99.20	0.00	96.23	0.00	100.00	0.00	95.51	0.00	98.60	0.00	99.33	0.00	93.71	0.06	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.4276489864
97.52	0.01	99.22	0.02	96.23	0.00	100.00	0.00	95.51	0.00	98.63	0.04	99.33	0.00	93.71	0.00	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.2969037661
97.53	0.01	99.23	0.02	96.23	0.00	100.00	0.00	95.51	0.00	98.67	0.04	99.33	0.00	93.71	0.00	/workspace/coverage/default/13.sysrst_ctrl_stress_all.3777799999
97.54	0.01	99.25	0.02	96.23	0.00	100.00	0.00	95.51	0.00	98.71	0.04	99.33	0.00	93.71	0.00	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1805109231
97.54	0.01	99.27	0.02	96.23	0.00	100.00	0.00	95.51	0.00	98.74	0.04	99.33	0.00	93.71	0.00	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.3240316866
97.55	0.01	99.27	0.00	96.28	0.05	100.00	0.00	95.51	0.00	98.74	0.00	99.33	0.00	93.71	0.00	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.510721696
97.55	0.01	99.27	0.00	96.31	0.03	100.00	0.00	95.51	0.00	98.74	0.00	99.33	0.00	93.71	0.00	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3529279775

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3333006879
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.274104229
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.342644081
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1528066400
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.4001029314
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3456056628
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.843591440
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2184426934
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2044740750
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.811079940
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1569506735
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.324661725
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.536079069
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3421728718
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1613706757
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2753190661
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2782769390
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.784674549
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2322675137
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1660854059
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.639395489
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3906092973
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1848027388
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3871241411
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.4258014389
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.377980932
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.3762057892
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1847832951
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2361718591
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.462034888
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1385283689
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.994016705
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1334744164
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1061478545
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1117593431
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1483386989
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.4211820393
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2214086726
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2642310577
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3805677172
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.4269284283
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3239724927
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1216821683
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.114257579
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1054317382
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3573156162
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.52486655
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.844399586
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3548376007
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3334623699
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3190804856
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3486918304
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2240853238
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1410505119
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.1812599979
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2924092163
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2194145459
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2068550395
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.586293821
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.482472618
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.3076922006
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/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1708907493
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3568796857
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3815270991
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3474596217
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.393338972
/workspace/coverage/default/40.sysrst_ctrl_smoke.3172404375
/workspace/coverage/default/40.sysrst_ctrl_stress_all.555606019
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2182239338
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1351006942
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.909549417
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.4212256976
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1476438955
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3252899078
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.618939218
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2900777829
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.937370967
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.4080010121
/workspace/coverage/default/41.sysrst_ctrl_smoke.2987709030
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2594463798
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1375382440
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.150266440
/workspace/coverage/default/42.sysrst_ctrl_alert_test.1372651082
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3203627220
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3802005979
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1230388158
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2239252222
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1666969035
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2643805133
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.294635425
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.4118862645
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.132620236
/workspace/coverage/default/42.sysrst_ctrl_smoke.3162328876
/workspace/coverage/default/42.sysrst_ctrl_stress_all.309143459
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.258971935
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3655709063
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3374253882
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1930096992
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.4119769940
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3892321608
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3448368567
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.266778880
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3483874247
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3196749199
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.259136540
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.990159229
/workspace/coverage/default/43.sysrst_ctrl_smoke.3562854685
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1374207337
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3756960317
/workspace/coverage/default/44.sysrst_ctrl_alert_test.732778436
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2885907924
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2285188631
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.369098076
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2120061809
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1461380230
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3922634325
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3059599325
/workspace/coverage/default/44.sysrst_ctrl_smoke.828520133
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2822520353
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.4116637453
/workspace/coverage/default/45.sysrst_ctrl_alert_test.32100573
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1463424094
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2978789260
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1864189278
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1536266209
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.945192446
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.704248052
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3690075366
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1556584178
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4085842059
/workspace/coverage/default/45.sysrst_ctrl_smoke.1421263223
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3647121469
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1309764238
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1913285680
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2954414424
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1370591040
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1046305543
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3082892763
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.4011731225
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.410241324
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2919190397
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.907214249
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1092495368
/workspace/coverage/default/46.sysrst_ctrl_smoke.1582058118
/workspace/coverage/default/46.sysrst_ctrl_stress_all.96192385
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1177119509
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.193164191
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1785695838
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3173844740
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2162597245
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2212592852
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3416209577
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3353562854
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2683192716
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1816363656
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.671241383
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.3351266114
/workspace/coverage/default/47.sysrst_ctrl_smoke.1617790155
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2952731240
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2808976866
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3070520567
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1509416081
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.4275693417
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.751579541
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2611445519
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3325795914
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3945136809
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1902023470
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3787750527
/workspace/coverage/default/48.sysrst_ctrl_smoke.1487833712
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2039371142
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.867069127
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3251343207
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1115653964
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.14025371
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3109149509
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3023274264
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.4132731979
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.493665149
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2634777970
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2178327244
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1140771132
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1234088714
/workspace/coverage/default/49.sysrst_ctrl_smoke.3900989972
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3311775565
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.464539452
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2289284195
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3316124089
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1335906529
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3824238847
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.697482388
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2054797509
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.4286138270
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1170257935
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.935008978
/workspace/coverage/default/5.sysrst_ctrl_smoke.2067120631
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2178560313
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1660361089
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.799394707
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.4209979414
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3958881246
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.518386938
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1113527027
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1487814907
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3014144475
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1756628877
/workspace/coverage/default/6.sysrst_ctrl_alert_test.279233844
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1203141167
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3833366700
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2379038558
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3518223531
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3619103260
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.4057050242
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2157657630
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.696444223
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1404628632
/workspace/coverage/default/6.sysrst_ctrl_smoke.1837778718
/workspace/coverage/default/6.sysrst_ctrl_stress_all.180648356
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2057162217
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.732639379
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3018005898
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.915871482
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.4108479894
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.531495921
/workspace/coverage/default/7.sysrst_ctrl_alert_test.573254545
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2244648821
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3664861371
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2295648364
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.162696318
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.103779554
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2148092511
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3564540011
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1563111449
/workspace/coverage/default/7.sysrst_ctrl_smoke.3921961477
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1531633784
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3204791353
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1990903218
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.4011774870
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3947621403
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2999690117
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2503369720
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3209815958
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2810384020
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.955427117
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2513077959
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1563680624
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3053469814
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3801900036
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.196493211
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3036537636
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.546596209
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1308700501
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.387463320
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3202006014
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3349793260
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2690001364
/workspace/coverage/default/8.sysrst_ctrl_smoke.1068448734
/workspace/coverage/default/8.sysrst_ctrl_stress_all.4146460876
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1748691246
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.358831994
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.848816272
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2790644566
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1777052170
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3958787577
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.935346510
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1851355170
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4024137041
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1655201950
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1130784754
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3648959941
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3609585004
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1208463972
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.892297907
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3055310088
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.4056820488
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1389570198
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2704926742
/workspace/coverage/default/9.sysrst_ctrl_smoke.139200186
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1960934336
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1203737308
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1165671779
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1848756275
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3914699128
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.56999585
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.411699030
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2345820815
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1982828968
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1269847512
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.800149606

Total test records in report: 906

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/41.sysrst_ctrl_alert_test.1351006942	Jun 28 06:05:24 PM PDT 24	Jun 28 06:05:35 PM PDT 24	2014221953 ps
T1	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2389895706	Jun 28 06:05:12 PM PDT 24	Jun 28 06:13:10 PM PDT 24	184074354344 ps
T5	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.294430207	Jun 28 06:04:56 PM PDT 24	Jun 28 06:05:27 PM PDT 24	31328137498 ps
T13	/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.1348411132	Jun 28 06:04:47 PM PDT 24	Jun 28 06:04:53 PM PDT 24	3151768500 ps
T14	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3571151982	Jun 28 06:05:23 PM PDT 24	Jun 28 06:05:39 PM PDT 24	4141755613 ps
T15	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1848756275	Jun 28 06:05:47 PM PDT 24	Jun 28 06:09:11 PM PDT 24	148732616015 ps
T16	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.3773603056	Jun 28 06:04:04 PM PDT 24	Jun 28 06:04:12 PM PDT 24	2511743804 ps
T2	/workspace/coverage/default/25.sysrst_ctrl_edge_detect.3988457873	Jun 28 06:04:50 PM PDT 24	Jun 28 06:05:00 PM PDT 24	5590116404 ps
T17	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1622356377	Jun 28 06:05:11 PM PDT 24	Jun 28 06:05:36 PM PDT 24	49218837742 ps
T3	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.864149688	Jun 28 06:05:45 PM PDT 24	Jun 28 06:09:08 PM PDT 24	166022108561 ps
T6	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2871039625	Jun 28 06:05:25 PM PDT 24	Jun 28 06:08:43 PM PDT 24	82477177859 ps
T21	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2814738146	Jun 28 06:03:48 PM PDT 24	Jun 28 06:05:34 PM PDT 24	35511421189 ps
T7	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.1212048098	Jun 28 06:05:10 PM PDT 24	Jun 28 06:10:00 PM PDT 24	112332989927 ps
T24	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2919190397	Jun 28 06:05:38 PM PDT 24	Jun 28 06:05:52 PM PDT 24	2464026714 ps
T25	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.53857978	Jun 28 06:05:03 PM PDT 24	Jun 28 06:05:17 PM PDT 24	2469652424 ps
T45	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2365924126	Jun 28 06:04:03 PM PDT 24	Jun 28 06:04:15 PM PDT 24	2474497359 ps
T8	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.204951322	Jun 28 06:04:19 PM PDT 24	Jun 28 06:06:11 PM PDT 24	189257694407 ps
T46	/workspace/coverage/default/1.sysrst_ctrl_alert_test.1956250991	Jun 28 06:03:49 PM PDT 24	Jun 28 06:03:59 PM PDT 24	2021602434 ps
T28	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.2541179478	Jun 28 06:04:49 PM PDT 24	Jun 28 06:04:57 PM PDT 24	3846446628 ps
T47	/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3488474469	Jun 28 06:04:49 PM PDT 24	Jun 28 06:04:58 PM PDT 24	2148274241 ps
T26	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3902192491	Jun 28 06:05:08 PM PDT 24	Jun 28 06:05:17 PM PDT 24	2534662910 ps
T48	/workspace/coverage/default/26.sysrst_ctrl_alert_test.1716622148	Jun 28 06:04:54 PM PDT 24	Jun 28 06:05:03 PM PDT 24	2104783301 ps
T55	/workspace/coverage/default/46.sysrst_ctrl_smoke.1582058118	Jun 28 06:05:38 PM PDT 24	Jun 28 06:05:48 PM PDT 24	2115113937 ps
T27	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3529279775	Jun 28 06:04:31 PM PDT 24	Jun 28 06:04:44 PM PDT 24	2521443139 ps
T56	/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.4141273783	Jun 28 06:04:31 PM PDT 24	Jun 28 06:04:52 PM PDT 24	4105566104 ps
T9	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.1888719115	Jun 28 06:05:09 PM PDT 24	Jun 28 06:05:23 PM PDT 24	2737013243 ps
T57	/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.4087832448	Jun 28 06:04:00 PM PDT 24	Jun 28 06:04:02 PM PDT 24	2046328384 ps
T10	/workspace/coverage/default/14.sysrst_ctrl_stress_all.770590685	Jun 28 06:04:19 PM PDT 24	Jun 28 06:05:31 PM PDT 24	106130182295 ps
T11	/workspace/coverage/default/47.sysrst_ctrl_stress_all.2952731240	Jun 28 06:05:38 PM PDT 24	Jun 28 06:05:52 PM PDT 24	334703469305 ps
T12	/workspace/coverage/default/34.sysrst_ctrl_stress_all.570519785	Jun 28 06:05:06 PM PDT 24	Jun 28 06:05:26 PM PDT 24	18440723485 ps
T31	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1726116128	Jun 28 06:04:43 PM PDT 24	Jun 28 06:10:18 PM PDT 24	137887439886 ps
T39	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2790644566	Jun 28 06:05:55 PM PDT 24	Jun 28 06:06:09 PM PDT 24	42797408024 ps
T138	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.804902629	Jun 28 06:04:55 PM PDT 24	Jun 28 06:05:05 PM PDT 24	2139762239 ps
T35	/workspace/coverage/default/22.sysrst_ctrl_edge_detect.1446088228	Jun 28 06:04:37 PM PDT 24	Jun 28 06:04:48 PM PDT 24	2575415663 ps
T139	/workspace/coverage/default/36.sysrst_ctrl_alert_test.4237587167	Jun 28 06:05:10 PM PDT 24	Jun 28 06:05:17 PM PDT 24	2110916054 ps
T51	/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.45778481	Jun 28 06:03:56 PM PDT 24	Jun 28 06:04:06 PM PDT 24	2465919691 ps
T22	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1428593049	Jun 28 06:03:41 PM PDT 24	Jun 28 06:04:40 PM PDT 24	31787374448 ps
T23	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1120112833	Jun 28 06:04:21 PM PDT 24	Jun 28 06:05:15 PM PDT 24	75961491391 ps
T30	/workspace/coverage/default/36.sysrst_ctrl_stress_all.2141782860	Jun 28 06:05:13 PM PDT 24	Jun 28 06:05:50 PM PDT 24	12500548419 ps
T98	/workspace/coverage/default/16.sysrst_ctrl_alert_test.1106478607	Jun 28 06:04:16 PM PDT 24	Jun 28 06:04:22 PM PDT 24	2031430703 ps
T99	/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2645516513	Jun 28 06:05:10 PM PDT 24	Jun 28 06:05:19 PM PDT 24	2056040917 ps
T36	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.2654159977	Jun 28 06:04:42 PM PDT 24	Jun 28 06:04:52 PM PDT 24	2673720872 ps
T52	/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3461126324	Jun 28 06:03:48 PM PDT 24	Jun 28 06:03:57 PM PDT 24	2521991595 ps
T37	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.850139578	Jun 28 06:04:19 PM PDT 24	Jun 28 06:04:33 PM PDT 24	2506921142 ps
T53	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2346121835	Jun 28 06:04:24 PM PDT 24	Jun 28 06:04:35 PM PDT 24	2524454971 ps
T54	/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2643805133	Jun 28 06:05:38 PM PDT 24	Jun 28 06:05:47 PM PDT 24	2628469335 ps
T103	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2533607484	Jun 28 06:04:19 PM PDT 24	Jun 28 06:04:29 PM PDT 24	2164627323 ps
T266	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2239252222	Jun 28 06:05:34 PM PDT 24	Jun 28 06:05:44 PM PDT 24	3345258939 ps
T40	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.3746859723	Jun 28 06:04:58 PM PDT 24	Jun 28 06:05:38 PM PDT 24	50841562513 ps
T358	/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.387463320	Jun 28 06:04:16 PM PDT 24	Jun 28 06:04:24 PM PDT 24	2631605767 ps
T359	/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3926488764	Jun 28 06:04:31 PM PDT 24	Jun 28 06:04:46 PM PDT 24	2150942048 ps
T49	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.768819325	Jun 28 06:04:17 PM PDT 24	Jun 28 06:04:26 PM PDT 24	6865870056 ps
T32	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.947281040	Jun 28 06:04:47 PM PDT 24	Jun 28 06:06:41 PM PDT 24	513549838567 ps
T120	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.4011731225	Jun 28 06:05:35 PM PDT 24	Jun 28 06:05:46 PM PDT 24	4974965636 ps
T58	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3127461385	Jun 28 06:03:43 PM PDT 24	Jun 28 06:03:52 PM PDT 24	2291847012 ps
T164	/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.2707896393	Jun 28 06:04:33 PM PDT 24	Jun 28 06:04:45 PM PDT 24	2170788292 ps
T50	/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.150266440	Jun 28 06:05:23 PM PDT 24	Jun 28 06:05:31 PM PDT 24	11377755669 ps
T88	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4102113614	Jun 28 06:03:48 PM PDT 24	Jun 28 06:03:58 PM PDT 24	2531465840 ps
T165	/workspace/coverage/default/21.sysrst_ctrl_stress_all.1742096501	Jun 28 06:04:37 PM PDT 24	Jun 28 06:04:55 PM PDT 24	6842941721 ps
T166	/workspace/coverage/default/37.sysrst_ctrl_alert_test.2109187692	Jun 28 06:05:15 PM PDT 24	Jun 28 06:05:27 PM PDT 24	2013403935 ps
T167	/workspace/coverage/default/44.sysrst_ctrl_alert_test.732778436	Jun 28 06:05:40 PM PDT 24	Jun 28 06:05:48 PM PDT 24	2030157373 ps
T59	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.915871482	Jun 28 06:05:55 PM PDT 24	Jun 28 06:07:10 PM PDT 24	109505034250 ps
T360	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.2233475738	Jun 28 06:04:33 PM PDT 24	Jun 28 06:04:44 PM PDT 24	4266768837 ps
T340	/workspace/coverage/default/4.sysrst_ctrl_stress_all.3891204364	Jun 28 06:04:02 PM PDT 24	Jun 28 06:04:28 PM PDT 24	8525801442 ps
T33	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2977257423	Jun 28 06:04:24 PM PDT 24	Jun 28 06:06:10 PM PDT 24	433086223727 ps
T361	/workspace/coverage/default/17.sysrst_ctrl_alert_test.2407999542	Jun 28 06:04:33 PM PDT 24	Jun 28 06:04:47 PM PDT 24	2008759493 ps
T362	/workspace/coverage/default/2.sysrst_ctrl_alert_test.3643280977	Jun 28 06:04:02 PM PDT 24	Jun 28 06:04:07 PM PDT 24	2052243051 ps
T89	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2987562850	Jun 28 06:05:36 PM PDT 24	Jun 28 06:08:37 PM PDT 24	70040992070 ps
T92	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.291760754	Jun 28 06:04:21 PM PDT 24	Jun 28 06:05:03 PM PDT 24	79553347198 ps
T93	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.3624919902	Jun 28 06:05:32 PM PDT 24	Jun 28 06:09:26 PM PDT 24	111969729357 ps
T195	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1195606560	Jun 28 06:05:04 PM PDT 24	Jun 28 06:05:56 PM PDT 24	45048630214 ps
T363	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.472403537	Jun 28 06:04:04 PM PDT 24	Jun 28 06:04:15 PM PDT 24	2366394055 ps
T364	/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.78178779	Jun 28 06:05:11 PM PDT 24	Jun 28 06:05:21 PM PDT 24	2023512014 ps
T267	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1476438955	Jun 28 06:05:33 PM PDT 24	Jun 28 06:05:37 PM PDT 24	3056848010 ps
T74	/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.1236869424	Jun 28 06:04:50 PM PDT 24	Jun 28 06:05:16 PM PDT 24	28362589155 ps
T365	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1146771899	Jun 28 06:04:23 PM PDT 24	Jun 28 06:04:39 PM PDT 24	2608744948 ps
T212	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.3299142460	Jun 28 06:04:53 PM PDT 24	Jun 28 06:06:39 PM PDT 24	148381718363 ps
T34	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.2110829119	Jun 28 06:03:56 PM PDT 24	Jun 28 06:04:13 PM PDT 24	6228482017 ps
T41	/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.2704835471	Jun 28 06:04:38 PM PDT 24	Jun 28 06:04:49 PM PDT 24	3160877151 ps
T355	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2754813031	Jun 28 06:04:31 PM PDT 24	Jun 28 06:04:42 PM PDT 24	2537192922 ps
T196	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1864189278	Jun 28 06:05:33 PM PDT 24	Jun 28 06:08:40 PM PDT 24	72258821923 ps
T211	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3023274264	Jun 28 06:05:34 PM PDT 24	Jun 28 06:09:34 PM PDT 24	87870482647 ps
T366	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2804881975	Jun 28 06:05:09 PM PDT 24	Jun 28 06:05:23 PM PDT 24	2613576009 ps
T42	/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.733502957	Jun 28 06:05:10 PM PDT 24	Jun 28 06:05:26 PM PDT 24	3426816982 ps
T367	/workspace/coverage/default/5.sysrst_ctrl_stress_all.2178560313	Jun 28 06:04:03 PM PDT 24	Jun 28 06:04:24 PM PDT 24	6405524342 ps
T38	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1805109231	Jun 28 06:04:50 PM PDT 24	Jun 28 06:05:34 PM PDT 24	63678551423 ps
T147	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.241061595	Jun 28 06:05:33 PM PDT 24	Jun 28 06:05:41 PM PDT 24	2096457008 ps
T43	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1671485011	Jun 28 06:04:56 PM PDT 24	Jun 28 06:07:12 PM PDT 24	1509410198607 ps
T148	/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.615181004	Jun 28 06:05:23 PM PDT 24	Jun 28 06:05:35 PM PDT 24	2459758688 ps
T75	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.491837666	Jun 28 06:05:34 PM PDT 24	Jun 28 06:05:46 PM PDT 24	24149510839 ps
T149	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.4108479894	Jun 28 06:05:51 PM PDT 24	Jun 28 06:06:22 PM PDT 24	40932358476 ps
T150	/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.306717989	Jun 28 06:04:58 PM PDT 24	Jun 28 06:05:08 PM PDT 24	2662763834 ps
T151	/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2178327244	Jun 28 06:05:42 PM PDT 24	Jun 28 06:05:51 PM PDT 24	2464350057 ps
T152	/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.4116637453	Jun 28 06:05:25 PM PDT 24	Jun 28 06:05:32 PM PDT 24	4698084441 ps
T153	/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.3140957200	Jun 28 06:04:41 PM PDT 24	Jun 28 06:04:56 PM PDT 24	2610473403 ps
T60	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3498595518	Jun 28 06:04:51 PM PDT 24	Jun 28 06:05:03 PM PDT 24	10831795200 ps
T169	/workspace/coverage/default/40.sysrst_ctrl_alert_test.1790448865	Jun 28 06:05:35 PM PDT 24	Jun 28 06:05:44 PM PDT 24	2028900640 ps
T301	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3544096493	Jun 28 06:05:48 PM PDT 24	Jun 28 06:06:04 PM PDT 24	73653129788 ps
T368	/workspace/coverage/default/48.sysrst_ctrl_alert_test.1509416081	Jun 28 06:05:39 PM PDT 24	Jun 28 06:05:47 PM PDT 24	2056537763 ps
T369	/workspace/coverage/default/4.sysrst_ctrl_alert_test.3539432873	Jun 28 06:04:05 PM PDT 24	Jun 28 06:04:12 PM PDT 24	2049718967 ps
T370	/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1414191517	Jun 28 06:03:46 PM PDT 24	Jun 28 06:03:55 PM PDT 24	2690136157 ps
T371	/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3483874247	Jun 28 06:05:35 PM PDT 24	Jun 28 06:05:46 PM PDT 24	2609646116 ps
T372	/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2674355741	Jun 28 06:04:37 PM PDT 24	Jun 28 06:04:48 PM PDT 24	2898094376 ps
T140	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2759144662	Jun 28 06:04:25 PM PDT 24	Jun 28 06:05:12 PM PDT 24	16169883517 ps
T373	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3448368567	Jun 28 06:05:23 PM PDT 24	Jun 28 06:05:31 PM PDT 24	2770491213 ps
T268	/workspace/coverage/default/40.sysrst_ctrl_stress_all.555606019	Jun 28 06:05:27 PM PDT 24	Jun 28 06:05:48 PM PDT 24	13286675169 ps
T374	/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3518223531	Jun 28 06:04:03 PM PDT 24	Jun 28 06:04:17 PM PDT 24	3459395618 ps
T375	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3093623335	Jun 28 06:04:53 PM PDT 24	Jun 28 06:05:08 PM PDT 24	2477183864 ps
T197	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3693883315	Jun 28 06:05:48 PM PDT 24	Jun 28 06:07:31 PM PDT 24	36540199714 ps
T156	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.630850589	Jun 28 06:04:18 PM PDT 24	Jun 28 06:04:31 PM PDT 24	2636679702 ps
T376	/workspace/coverage/default/9.sysrst_ctrl_smoke.139200186	Jun 28 06:04:19 PM PDT 24	Jun 28 06:04:29 PM PDT 24	2137166675 ps
T157	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.697482388	Jun 28 06:04:01 PM PDT 24	Jun 28 06:16:43 PM PDT 24	302970995597 ps
T76	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.103960300	Jun 28 06:04:30 PM PDT 24	Jun 28 06:05:06 PM PDT 24	27343737421 ps
T377	/workspace/coverage/default/20.sysrst_ctrl_smoke.380887992	Jun 28 06:04:43 PM PDT 24	Jun 28 06:04:52 PM PDT 24	2129951899 ps
T44	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1587149906	Jun 28 06:04:03 PM PDT 24	Jun 28 06:06:37 PM PDT 24	930938218306 ps
T222	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3349793260	Jun 28 06:04:15 PM PDT 24	Jun 28 06:04:19 PM PDT 24	2039582257 ps
T141	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.266778880	Jun 28 06:05:35 PM PDT 24	Jun 28 06:05:43 PM PDT 24	4066557495 ps
T143	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.4043589862	Jun 28 06:04:51 PM PDT 24	Jun 28 06:05:01 PM PDT 24	3915394536 ps
T223	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3282090132	Jun 28 06:04:43 PM PDT 24	Jun 28 06:04:52 PM PDT 24	2479799987 ps
T73	/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1719208551	Jun 28 06:04:51 PM PDT 24	Jun 28 06:05:27 PM PDT 24	45936793660 ps
T224	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1237247542	Jun 28 06:04:05 PM PDT 24	Jun 28 06:04:13 PM PDT 24	4644884408 ps
T210	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1270676346	Jun 28 06:04:18 PM PDT 24	Jun 28 06:08:12 PM PDT 24	83346486395 ps
T90	/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.196493211	Jun 28 06:04:16 PM PDT 24	Jun 28 06:04:24 PM PDT 24	3276408699 ps
T225	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.175001890	Jun 28 06:05:08 PM PDT 24	Jun 28 06:05:25 PM PDT 24	3449051304 ps
T378	/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1522557148	Jun 28 06:04:32 PM PDT 24	Jun 28 06:04:46 PM PDT 24	2460111854 ps
T379	/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1556584178	Jun 28 06:05:37 PM PDT 24	Jun 28 06:05:50 PM PDT 24	2210199530 ps
T91	/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.3885986189	Jun 28 06:03:48 PM PDT 24	Jun 28 06:04:01 PM PDT 24	3522856330 ps
T160	/workspace/coverage/default/7.sysrst_ctrl_stress_all.1531633784	Jun 28 06:04:19 PM PDT 24	Jun 28 06:04:41 PM PDT 24	20850905600 ps
T193	/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3609585004	Jun 28 06:04:15 PM PDT 24	Jun 28 06:06:56 PM PDT 24	59332439298 ps
T380	/workspace/coverage/default/29.sysrst_ctrl_smoke.4024707187	Jun 28 06:04:50 PM PDT 24	Jun 28 06:05:03 PM PDT 24	2111646183 ps
T300	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1615564516	Jun 28 06:05:39 PM PDT 24	Jun 28 06:06:18 PM PDT 24	49456067784 ps
T302	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1643659689	Jun 28 06:05:46 PM PDT 24	Jun 28 06:06:20 PM PDT 24	46640436336 ps
T381	/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.631452666	Jun 28 06:04:57 PM PDT 24	Jun 28 06:05:10 PM PDT 24	2621055213 ps
T382	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1031239238	Jun 28 06:05:13 PM PDT 24	Jun 28 06:05:25 PM PDT 24	2471852982 ps
T383	/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3002930787	Jun 28 06:04:31 PM PDT 24	Jun 28 06:04:42 PM PDT 24	2636546244 ps
T161	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1708907493	Jun 28 06:05:20 PM PDT 24	Jun 28 06:25:24 PM PDT 24	883637143652 ps
T384	/workspace/coverage/default/47.sysrst_ctrl_alert_test.1785695838	Jun 28 06:05:38 PM PDT 24	Jun 28 06:05:46 PM PDT 24	2030866472 ps
T385	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2903592800	Jun 28 06:03:47 PM PDT 24	Jun 28 06:04:04 PM PDT 24	3581897460 ps
T263	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3856926633	Jun 28 06:05:44 PM PDT 24	Jun 28 06:08:07 PM PDT 24	60535261938 ps
T260	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3153698134	Jun 28 06:04:49 PM PDT 24	Jun 28 06:04:59 PM PDT 24	3619390895 ps
T219	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.3871215247	Jun 28 06:05:08 PM PDT 24	Jun 28 06:11:26 PM PDT 24	138355137399 ps
T386	/workspace/coverage/default/49.sysrst_ctrl_smoke.3900989972	Jun 28 06:05:40 PM PDT 24	Jun 28 06:05:53 PM PDT 24	2109987436 ps
T387	/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3353562854	Jun 28 06:05:38 PM PDT 24	Jun 28 06:05:50 PM PDT 24	2996119219 ps
T65	/workspace/coverage/default/42.sysrst_ctrl_stress_all.309143459	Jun 28 06:05:24 PM PDT 24	Jun 28 06:06:10 PM PDT 24	17206363884 ps
T388	/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3202006014	Jun 28 06:04:18 PM PDT 24	Jun 28 06:04:27 PM PDT 24	2505619591 ps
T357	/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.2834172130	Jun 28 06:04:05 PM PDT 24	Jun 28 06:04:13 PM PDT 24	2527308978 ps
T213	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.1759741902	Jun 28 06:04:37 PM PDT 24	Jun 28 06:05:05 PM PDT 24	145465725960 ps
T389	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1689618671	Jun 28 06:03:48 PM PDT 24	Jun 28 06:04:01 PM PDT 24	2205871031 ps
T61	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.18320217	Jun 28 06:04:30 PM PDT 24	Jun 28 06:05:54 PM PDT 24	60481853876 ps
T356	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3212518436	Jun 28 06:03:55 PM PDT 24	Jun 28 06:03:59 PM PDT 24	2554595970 ps
T297	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3758571490	Jun 28 06:05:24 PM PDT 24	Jun 28 06:07:28 PM PDT 24	97939805297 ps
T269	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.4286138270	Jun 28 06:04:02 PM PDT 24	Jun 28 06:04:06 PM PDT 24	2502557013 ps
T390	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.3351266114	Jun 28 06:05:38 PM PDT 24	Jun 28 06:05:47 PM PDT 24	2523298867 ps
T391	/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3121566247	Jun 28 06:04:31 PM PDT 24	Jun 28 06:04:44 PM PDT 24	3582210774 ps
T77	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.4276489864	Jun 28 06:05:55 PM PDT 24	Jun 28 06:10:13 PM PDT 24	104657769950 ps
T392	/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2004856964	Jun 28 06:03:47 PM PDT 24	Jun 28 06:04:02 PM PDT 24	2609008251 ps
T393	/workspace/coverage/default/27.sysrst_ctrl_alert_test.875231016	Jun 28 06:04:51 PM PDT 24	Jun 28 06:05:01 PM PDT 24	2040260727 ps
T62	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2738470601	Jun 28 06:04:20 PM PDT 24	Jun 28 06:04:49 PM PDT 24	55796739356 ps
T299	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.4074301203	Jun 28 06:04:55 PM PDT 24	Jun 28 06:05:49 PM PDT 24	37849059841 ps
T394	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3474596217	Jun 28 06:05:32 PM PDT 24	Jun 28 06:05:40 PM PDT 24	2171064694 ps
T202	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3173419055	Jun 28 06:04:15 PM PDT 24	Jun 28 06:05:25 PM PDT 24	111208118278 ps
T395	/workspace/coverage/default/33.sysrst_ctrl_smoke.3202916942	Jun 28 06:05:01 PM PDT 24	Jun 28 06:05:15 PM PDT 24	2114893264 ps
T396	/workspace/coverage/default/29.sysrst_ctrl_alert_test.3540359734	Jun 28 06:05:02 PM PDT 24	Jun 28 06:05:16 PM PDT 24	2016701210 ps
T397	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3873956492	Jun 28 06:04:35 PM PDT 24	Jun 28 06:04:45 PM PDT 24	2503298881 ps
T316	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2345820815	Jun 28 06:05:52 PM PDT 24	Jun 28 06:08:10 PM PDT 24	76009112781 ps
T344	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.4189460508	Jun 28 06:05:05 PM PDT 24	Jun 28 06:07:28 PM PDT 24	86403995055 ps
T398	/workspace/coverage/default/23.sysrst_ctrl_alert_test.1450488992	Jun 28 06:04:37 PM PDT 24	Jun 28 06:04:51 PM PDT 24	2015043878 ps
T399	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3325795914	Jun 28 06:05:34 PM PDT 24	Jun 28 06:05:40 PM PDT 24	2656919657 ps
T332	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3833366700	Jun 28 06:04:03 PM PDT 24	Jun 28 06:05:06 PM PDT 24	113701391443 ps
T400	/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.2163730557	Jun 28 06:04:14 PM PDT 24	Jun 28 06:04:17 PM PDT 24	2218343860 ps
T129	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.892297907	Jun 28 06:04:15 PM PDT 24	Jun 28 06:04:24 PM PDT 24	2676567237 ps
T200	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.1746040635	Jun 28 06:04:55 PM PDT 24	Jun 28 06:08:49 PM PDT 24	168665947945 ps
T401	/workspace/coverage/default/43.sysrst_ctrl_stress_all.1374207337	Jun 28 06:05:39 PM PDT 24	Jun 28 06:06:07 PM PDT 24	8738064412 ps
T272	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3059599325	Jun 28 06:05:33 PM PDT 24	Jun 28 06:05:44 PM PDT 24	2511005957 ps
T402	/workspace/coverage/default/30.sysrst_ctrl_alert_test.836989920	Jun 28 06:04:52 PM PDT 24	Jun 28 06:05:02 PM PDT 24	2032781995 ps
T403	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.205777699	Jun 28 06:04:23 PM PDT 24	Jun 28 06:04:35 PM PDT 24	2478074549 ps
T404	/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2561749535	Jun 28 06:04:46 PM PDT 24	Jun 28 06:04:54 PM PDT 24	2186934781 ps
T405	/workspace/coverage/default/12.sysrst_ctrl_alert_test.3865364821	Jun 28 06:04:23 PM PDT 24	Jun 28 06:04:34 PM PDT 24	2033086194 ps
T329	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.1690676890	Jun 28 06:04:22 PM PDT 24	Jun 28 06:05:00 PM PDT 24	95899949558 ps
T406	/workspace/coverage/default/28.sysrst_ctrl_smoke.1465175566	Jun 28 06:04:56 PM PDT 24	Jun 28 06:05:07 PM PDT 24	2115276086 ps
T407	/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.3046449539	Jun 28 06:04:33 PM PDT 24	Jun 28 06:04:44 PM PDT 24	2479812130 ps
T408	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1547763860	Jun 28 06:04:50 PM PDT 24	Jun 28 06:05:04 PM PDT 24	2077584858 ps
T409	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2021348912	Jun 28 06:04:03 PM PDT 24	Jun 28 06:04:10 PM PDT 24	2456927982 ps
T410	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3526984619	Jun 28 06:04:31 PM PDT 24	Jun 28 06:04:41 PM PDT 24	2664418917 ps
T411	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2429665189	Jun 28 06:04:47 PM PDT 24	Jun 28 06:04:54 PM PDT 24	2555046079 ps
T328	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.973058451	Jun 28 06:04:03 PM PDT 24	Jun 28 06:06:14 PM PDT 24	208328099792 ps
T277	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.3970135492	Jun 28 06:04:02 PM PDT 24	Jun 28 06:04:38 PM PDT 24	13394821386 ps
T201	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.4119769940	Jun 28 06:05:35 PM PDT 24	Jun 28 06:06:23 PM PDT 24	34506584354 ps
T352	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1487814907	Jun 28 06:05:49 PM PDT 24	Jun 28 06:06:39 PM PDT 24	53165124646 ps
T412	/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2683192716	Jun 28 06:05:40 PM PDT 24	Jun 28 06:05:53 PM PDT 24	2611242729 ps
T94	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2904988476	Jun 28 06:05:34 PM PDT 24	Jun 28 06:06:01 PM PDT 24	35323474938 ps
T68	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3898312987	Jun 28 06:03:46 PM PDT 24	Jun 28 06:06:13 PM PDT 24	57792753097 ps
T100	/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3203627220	Jun 28 06:05:33 PM PDT 24	Jun 28 06:05:40 PM PDT 24	3518455420 ps
T112	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3185691140	Jun 28 06:05:12 PM PDT 24	Jun 28 06:05:21 PM PDT 24	3735058177 ps
T113	/workspace/coverage/default/45.sysrst_ctrl_smoke.1421263223	Jun 28 06:05:37 PM PDT 24	Jun 28 06:05:45 PM PDT 24	2134158533 ps
T114	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.31658706	Jun 28 06:05:56 PM PDT 24	Jun 28 06:06:39 PM PDT 24	57723432727 ps
T115	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.528574758	Jun 28 06:04:25 PM PDT 24	Jun 28 06:04:39 PM PDT 24	3807163215 ps
T116	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.2114813858	Jun 28 06:05:01 PM PDT 24	Jun 28 06:05:10 PM PDT 24	2124529418 ps
T117	/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3156171306	Jun 28 06:05:05 PM PDT 24	Jun 28 06:05:14 PM PDT 24	2556785040 ps
T118	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3014155536	Jun 28 06:04:02 PM PDT 24	Jun 28 06:04:10 PM PDT 24	2288257573 ps
T119	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.1455340776	Jun 28 06:05:10 PM PDT 24	Jun 28 06:05:24 PM PDT 24	2511218279 ps
T413	/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3996851510	Jun 28 06:04:25 PM PDT 24	Jun 28 06:04:39 PM PDT 24	2023725619 ps
T95	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.947836310	Jun 28 06:04:32 PM PDT 24	Jun 28 06:04:42 PM PDT 24	6169724784 ps
T174	/workspace/coverage/default/26.sysrst_ctrl_stress_all.1584550581	Jun 28 06:04:49 PM PDT 24	Jun 28 06:05:10 PM PDT 24	8875054566 ps
T414	/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1463424094	Jun 28 06:05:39 PM PDT 24	Jun 28 06:07:45 PM PDT 24	202601711912 ps
T415	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.618939218	Jun 28 06:05:23 PM PDT 24	Jun 28 06:05:36 PM PDT 24	2608499790 ps
T416	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.2293109153	Jun 28 06:04:35 PM PDT 24	Jun 28 06:04:46 PM PDT 24	2528154278 ps
T417	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.546596209	Jun 28 06:04:24 PM PDT 24	Jun 28 06:04:35 PM PDT 24	3611146102 ps
T261	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2244648821	Jun 28 06:04:20 PM PDT 24	Jun 28 06:04:38 PM PDT 24	3649826855 ps
T66	/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3958787577	Jun 28 06:05:48 PM PDT 24	Jun 28 06:12:10 PM PDT 24	150242689978 ps
T194	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.4209979414	Jun 28 06:05:47 PM PDT 24	Jun 28 06:06:16 PM PDT 24	33997767229 ps
T418	/workspace/coverage/default/18.sysrst_ctrl_stress_all.811043574	Jun 28 06:04:30 PM PDT 24	Jun 28 06:05:05 PM PDT 24	9822214658 ps
T419	/workspace/coverage/default/45.sysrst_ctrl_alert_test.32100573	Jun 28 06:05:44 PM PDT 24	Jun 28 06:05:54 PM PDT 24	2012749178 ps
T330	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.1363296100	Jun 28 06:04:28 PM PDT 24	Jun 28 06:05:14 PM PDT 24	47776761137 ps
T420	/workspace/coverage/default/44.sysrst_ctrl_stress_all.2822520353	Jun 28 06:05:44 PM PDT 24	Jun 28 06:05:57 PM PDT 24	10034474819 ps
T421	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2120061809	Jun 28 06:05:40 PM PDT 24	Jun 28 06:05:53 PM PDT 24	2612628192 ps
T78	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1759053777	Jun 28 06:03:47 PM PDT 24	Jun 28 06:07:18 PM PDT 24	78479414947 ps
T306	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.4094742647	Jun 28 06:04:35 PM PDT 24	Jun 28 06:07:18 PM PDT 24	62641371826 ps
T422	/workspace/coverage/default/42.sysrst_ctrl_alert_test.1372651082	Jun 28 06:05:25 PM PDT 24	Jun 28 06:05:36 PM PDT 24	2010970938 ps
T423	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1278881772	Jun 28 06:04:18 PM PDT 24	Jun 28 06:04:32 PM PDT 24	5319210010 ps
T96	/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2271913500	Jun 28 06:05:23 PM PDT 24	Jun 28 06:05:31 PM PDT 24	12542471546 ps
T214	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.598812476	Jun 28 06:04:00 PM PDT 24	Jun 28 06:05:30 PM PDT 24	32591977678 ps
T158	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.919263202	Jun 28 06:04:29 PM PDT 24	Jun 28 06:04:45 PM PDT 24	3233915287 ps
T424	/workspace/coverage/default/16.sysrst_ctrl_stress_all.1405701591	Jun 28 06:04:19 PM PDT 24	Jun 28 06:04:31 PM PDT 24	6396127761 ps
T425	/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.256842293	Jun 28 06:04:35 PM PDT 24	Jun 28 06:04:45 PM PDT 24	2527233857 ps
T426	/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2072619085	Jun 28 06:04:04 PM PDT 24	Jun 28 06:04:16 PM PDT 24	2609386295 ps
T427	/workspace/coverage/default/37.sysrst_ctrl_smoke.1547181727	Jun 28 06:05:12 PM PDT 24	Jun 28 06:05:20 PM PDT 24	2127035265 ps
T325	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1090514719	Jun 28 06:04:48 PM PDT 24	Jun 28 06:06:48 PM PDT 24	88906842732 ps
T121	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2808976866	Jun 28 06:05:38 PM PDT 24	Jun 28 06:06:55 PM PDT 24	30685082244 ps
T428	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3597422772	Jun 28 06:04:35 PM PDT 24	Jun 28 06:04:46 PM PDT 24	3187623885 ps
T429	/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.821508540	Jun 28 06:04:56 PM PDT 24	Jun 28 06:05:12 PM PDT 24	2472068460 ps
T430	/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3712062063	Jun 28 06:04:57 PM PDT 24	Jun 28 06:05:08 PM PDT 24	2519462552 ps
T431	/workspace/coverage/default/10.sysrst_ctrl_alert_test.2199196461	Jun 28 06:04:17 PM PDT 24	Jun 28 06:04:27 PM PDT 24	2022703188 ps
T218	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1161892346	Jun 28 06:05:40 PM PDT 24	Jun 28 06:07:32 PM PDT 24	68508836118 ps
T432	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2368692404	Jun 28 06:04:05 PM PDT 24	Jun 28 06:04:18 PM PDT 24	2511088703 ps
T433	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.1289392779	Jun 28 06:05:11 PM PDT 24	Jun 28 06:05:25 PM PDT 24	3034832592 ps
T434	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.549025744	Jun 28 06:04:16 PM PDT 24	Jun 28 06:04:23 PM PDT 24	2537134439 ps
T435	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.2084489265	Jun 28 06:04:57 PM PDT 24	Jun 28 06:05:09 PM PDT 24	13727358866 ps
T324	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.518386938	Jun 28 06:05:51 PM PDT 24	Jun 28 06:07:39 PM PDT 24	151856081658 ps
T436	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2666239802	Jun 28 06:03:46 PM PDT 24	Jun 28 06:03:57 PM PDT 24	2614180743 ps
T437	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.103779554	Jun 28 06:04:16 PM PDT 24	Jun 28 06:04:23 PM PDT 24	2632168520 ps
T321	/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2999690117	Jun 28 06:05:56 PM PDT 24	Jun 28 06:08:55 PM PDT 24	126880466683 ps
T438	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1541940157	Jun 28 06:04:29 PM PDT 24	Jun 28 06:04:41 PM PDT 24	3798282039 ps
T439	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2644277487	Jun 28 06:04:17 PM PDT 24	Jun 28 06:04:29 PM PDT 24	2014870140 ps
T79	/workspace/coverage/default/8.sysrst_ctrl_stress_all.4146460876	Jun 28 06:04:19 PM PDT 24	Jun 28 06:08:38 PM PDT 24	122614808575 ps
T97	/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1165671779	Jun 28 06:04:18 PM PDT 24	Jun 28 06:04:32 PM PDT 24	8189533718 ps
T440	/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1370591040	Jun 28 06:05:32 PM PDT 24	Jun 28 06:05:37 PM PDT 24	3380922336 ps
T441	/workspace/coverage/default/38.sysrst_ctrl_alert_test.419756064	Jun 28 06:05:10 PM PDT 24	Jun 28 06:05:20 PM PDT 24	2021856646 ps
T442	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1433445564	Jun 28 06:04:49 PM PDT 24	Jun 28 06:04:58 PM PDT 24	2531614401 ps
T80	/workspace/coverage/default/13.sysrst_ctrl_stress_all.3777799999	Jun 28 06:04:18 PM PDT 24	Jun 28 06:05:37 PM PDT 24	115188916740 ps